MPMC II-UNIT

Instruction formats of 8086:

The instruction format of 8086 has one or more number of fields associated with it.

The first filled is called operation code field or opcode field, which indicates the type of
operation.

The instruction format also contains other fields known as operand fields.

There are six general formats of instructions in 8086 instruction set. The length of an
instruction may vary from one byte to sic bytes.

a) One byte Instruction: This format is only one byte long and may have the implied data
or register operands. The least significant 3 bits of the opcode are used for specifying the
register operand, if any. Otherwise, all the eight bits form an opcode and the operands are
implied.

For example:

11111000 F 8H CLC : clear carry

This is an operation without any operand, which clear the carry flag bit.

Exchange register with accumulator 10010 reg

Depending on the register (reg = RRR), the contents of the specified register will be
exchanged with the accumulator. This operation is having one operand which is specified
in a register.

ASC  Adjust for addition AAA 00110111 37 H

Here the operand to this instruction is implicit and it take the contents of register AL.

b) Register to Register : This format is 2 bytes long. The first byte of the code specifies
the operation code and the width of the operand specifies by w bit. The second byte of the
opcode shows the register operands and RIM field.

D7 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0
OP CODE d w 11 REG R/M

The register represented by the REG field is one of the operands. The RIM field specifies
another register or memory location, ie., the other operand. The register specified by
REG is a source operand if D  0 , else it is a destination operand.
For example:
MOV : data transfer operation from Register to Register.

Op-code is

100010dw 11REG

10001000 11 000 001 88H C1H

REG = 0 0 0 indicates Register AL

REG = 0 0 1 indicates Register CL

w  0 indicates it is a byte operation (8 bit)

d  0 indicates AL is a source register.

This instruction indicates MOV CL, AL, i.e CL  AL

C) Register to/from memory with no displacement : This format is also 2 bytes long and
similar to the register to register format except for the MOD field.

D7 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0
OP CODE d w MOD REG R/M

The MOD field shows the MOD of addressing. In case of no displacement. MOD = 00

For example :

MOV : Data transfer Register/memory to/from register.

100010dw mod reg rim

This format is similar to register to register transfer. The difference is in mod field.

For register to register, mod = 11

For register to/from memory with no displacement, mod = 00.

When mod = 0 0, the r/m fields indicates the address to memory location.

As for example r/m = 1 1 1 indicates (Bx)

The instruction
1 0 0 0 0 1 0 1 0 0 0 0 0 0 1 1 1 indicates the instruction MOV AX, [BX]
In hexadecimal, the instruction is 8 AH O7 H

Here the data is present in a memory location in DS whose offset address is in BX. The
effective address of the data is given as 10H  DS   BX 

There d  1 indicates AX is a destination register so it moves the data from memory to

register.

d) Register to/from Memory with Displacement :

This type of instruction format contains one or two additional bytes for displacement
along with 2-byte the format of the register to/from memory without displacement.
D7 D0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D0

opcode MOD REG R/M Low byte of

displacement
D7 D0
High byte of
displacement

MOD = 0 1 indicates displacement of 8 bytes (instruction is of size 3 bytes)

MOD = 1 0 indicates displacement of 16 bytes. (instruction is of size 4 bytes)

Already we have seen the other two options of MOD

MOD = 1 1 indicates register to register transfer

MOD = 0 0 indicates memory without displacement

In this case, R/M fields indicates a memory when MOD is not 1 1

R/M = 1 1 1 indicates (BX)

When MOD = 0 1, the offset address is  BX   D8

When MOD = 1 0, the offset address is  BX   D16

e) Immediate operand to register

In this format, the first byte as well as the 3 bites from the second byte which are used for
REG field in case of register to register format are used for opcode. It also contains one
or two bytes of immediate data.
D7 D0 D7 D6 D5 D4 D3 D2 D1 D0
Op code w 11 op code R/M

D7 D0 D7 D0
Lower byte Higher byte
DATA DATA

When w  0 , the size of immediate data is 8 bits and the size of instruction is 3 bytes.

When w  1 , the size of immediate data is 16 bits and the size of instruction is 4 bytes.

f) immediate operand to memory with 16-bit displacement : This type of instruction

format requires 5 to 6 bytes for coding. The first two bytes contain the information
regarding OPCODE, MOD and R/M fields. The remaining 4 bytes contain 2 bytes of
displacement and 2 bytes of data.

D7 D0 D7 D6 D5 D4 D3 D2 D1 D0
Op code w MOD op code R/M

D7 D0 D7 D0 D7 D0
Higher byte of Lower byte of Higher byte of
displacement DATA DATA

The REG code of the different registers (either a source or destination operands) in the
opcode byte are assigned with binary code.

w Register code Registers Segment Segment

bit (3 bit) register code (2 register
bit)
0 000 AL 00 ES
0 001 CL 01 CS
0 010 DL 10 SS
0 011 BL 11 DS
0 100 AH
0 101 CH
0 110 DH
0 111 BH
1 000 AX
1 001 CX
1 010 DX
 1 011 BX
1 100 SP
1 101 BP
1 110 SI
1 111 DI

Coding of different registers.

Addressing Modes of 8086 :

The different addressing modes of the 8086 instructions along with corresponding MOD,
REG and R/M field are given in the table.

operands Memory operands Register operands

No Displacement Displacement
Displacement 8 bits 16 bits
MOD 00 01 10 11
RIM w0 w 1
000  BX    SI   BX    SI   D8  BX    SI   D16 AL AX
001  BX    DI   BX    DI   D8  BX    DI   D16 CL CX
010  BP    SI   BP    SI   D8  BP    SI   D16 DL DX
011  BP    DI   BP    DI   D8  BP    DI   D16 BL BX
100  SI   SI   D8  SI   D16 AH SP
101  DI   DI   D8  DI   D16 CH BP
110 D16  BP   D8  BP   D16 DH SS
111  BX   BX   D8  BX   D16 BH DI

D8 and D16 represent 8 and 16 bit displacement respectively.

The default segment for the addressing modes using BP and SP is SS. For all other
addressing modes the default segments are DS or ES.

Addressing mode indicates a way of locating data or operands.

Different addressing modes of 8086 :

1. Immediate : In this addressing mode, immediate data is a part of instruction, and

appears in the form of successive byte or bytes.
ex. MOV AX, 005 OH

Here 005OH is the immediate data and it is moved to register AX. The immediate data
may be 8-bit or 16-bit in size.
2. Direct : In the direct addressing mode, a 16 bit address (offset) is directly specified in
the instruction as a part of it.
ex. MOV AX [1 0 0 0 H]

Here data resides in a memory location in the data segment, whose effective address is
10 H  DS  1000 H

3. Register : In register addressing mode, the data is stored in a register and it is referred
using the particular register. All the registers except IP may be used in this mode.
ex. MOV AX,BX

4. Register Indirect: In this addressing mode, the address of the memory location which
contains data or operand is determined in an indirect way using offset registers. The
offset address of data is in either BX or SI or DI register. The default segment register is
either DS or ES.
e.g. MOV AX,  BX 

The data is present in a memory location in DS whose offset is in BX. The effective
address is 10H  DS   BX 

5. Indexed : In this addressing mode offset of the operand is stored in one of the index
register. DS and ES are the default segments for index registers SI and DI respectively
e.g. MOV AX,  SI 

The effective address of the data is 10H  DS   SI 

6. Register Relative : In this addressing mode the data is available at an effective address
formed by adding an 8-bit or 16-bit displacement with the content of any one of the
registers BX, BP, SI and DI in the default either DS or ES segment.
e.g. MOV AX, 50H  BX 

The effective address of the data is 10 H  DS  50 H   BX 

7. Based Indexed: In this addressing mode the effective address of the data is formed by
adding the content of a base register (any one of BX or BP) to the content of an index
register (any one of SI or DI). The default segment register may be ES or DS.
e.g MOV ,  BX   SI 

The effective address is 10H  DS   BX    SI 

8. Relative Based Indexed : The effective address is formed by adding an 8-bit or 16-bit
displacement with the sum of contents of any one of the base register (BX or BP) and any
one of the index registers in a default segment.
e.g. MOV AX, 50H  BX   SI 

Here 50H is an immediate displacement. The effective address is

10 H  DS   BX    SI   50 H .

9. Intrasegment Direct Mode: In this mode, the address to which the control is to be
transferred lies in the segment in which the control transfer instruction lies and appears
directly in the instruction as an immediate displacement value. The displacement is
computed relative to the content of the instruction pointer IP.

10. Intrasegment Indirect Mode: This mode is similar to intrasegment direct mode except
the displacement to which control is to be transferred is passed to the instruction
indirectly. Here the branch address is found as the content of a register or a memory
location.

11. Intersegment Direct Mode: In this mode, the address to which the control is to be
transferred is in a different segment. This addressing mode provides a means of
branching from one code segment to another code segment. Here, the CS and IP of the
destination address are specified directly in the instruction.

12. Intersegment Indirect Mode: This mode is similar to intersegment direct mode except
the address to which the control is to be transferred is passed to the instruction indirectly.
This information is kept in a memory block of 4 bytes: IP(LSB), IP(MSB), LS(LSR) and
CS(MSB) sequentially. The starting address of the memory block may be referred using
any of the addressing modes, except immediate mode.

Instruction set of 8086

The 8086 instructions are categorized into eight different groups.

a) Data Transfer Instruction: This type of instructions are used to transfer data from
source operand to destination operand. All the store, load, move, exchange, input and
output operations belong to this category.

b) Arithmatic and Logical Instructions: All the instructions performing arithmetic ,

logical, increment, decrement, compare and scan instructions belong to this category.

c) Branch Instructions: These instructions transfer control of execution to the specified

address. All the call, jump, interrupt and return instructions belong to this category.

d) Loop Instructions: The LOP, LOOPNZ and LOOPZ instructions belong to this
category. These are useful to implement different loop structures.

e) machine control Instructions: These instructions control the machine status. NOP,
HLT, WAIT and LOCK instructions belongs to this category.
f) Flag Manipulation Instructions: All instructions which directly affect the flag register
belong to this category. The instructions CLD, STD, CLI, STI etc. belong to this category.

g) Shift and Rotate Instructions: These instructions involve the bitwise shifting or rotation
in either direction with or without a count in CX.

h) String Instructions: These instruction involve string manipulation operations like load,
love, scan. Compare, store etc. These instructions are only to be operated upon the string.

Data Transfer operation:

MOV : move PUSH: Push to stack

POP: pop from stack XCHG: Exchange

IN: Input from the port OUT: Output to the port

XLAT: Translate LEA: Load effective address

LDS/LES: Load pointer to DS/ES

LAHF: Load AH from lower byte of Flag register

SAHF: Store AH to lower byte of Flag register

PUSHF: push Flags to stack

POPF: pop Flags from stack

Arithmatic operations

ADD: add ADC: Add with carry

INC: Increment DEC: Decrement

SUB: Subtract SBB: Subtract with Borrow

CMP: compare

AAA: ASCll Adjust After Addition

AAS: ASCll Adjust After Subtraction

AAM: ASCll Adjust for multiplication

AAD: ASCll Adjust for division

DAA: Decimal Adjust Accumulator

DAS: Decimal Adjust After Subtraction

NEG: Negative

MUL: Unsigned multiplication Byte or word.

IMUL : Signed multiplication

CBW: Convert signed Byte to Word

CWD: Convert signed word to double word

DIV: Unsigned Division

IDIV: Signed Division

Logical Instructions:

Logical Instructions:

AND: Logical OR: Logiacl OR

NOT: Logical Invert XOR: Logical Exclusive OR

TEST: Logical compare Instruction

SHL/SAL: Shift logical/Arithmatic left

SHR: Shift logical Right

SAR: Shift Arithmatic Right

ROR: Rotate Right without carry

ROL: Rotate Left without carry

RCR: Rotate Right through carry

RCL: Rotate Left through carry

String Manipulation Instructions

PEP : Repeat Instruction prefix

MOVSB/MOVSW: Move string Byte or string word.

CMPS: Compare sting Byte or String word.

SCAS: Scan string Byte or string word

LODS: Load string Byte or String word

STOS: Store String Byte or String word

Control transfer or Branching Instructions:

-Unconditional Branch Instructions.

CALL: Unconditional Call

RET: Return from the procedure

INT N: Interrupt type N

INTO: Interrupt on overflow

JMP: Unconditional Jump

JRET: Return from ISR

LOOP: Loop unconditionally

-Conditional Branch Instruction:

JZ Label : Transfer control to ‘Label’ if ZF  1

JZ Label : Transfer control to ‘Label’ if ZF  1

JNZ Label : Transfer control to ‘Label’ if ZF  0

JS Label : Transfer control to ‘Label’ if SF  1

JNS Label : Transfer control to ‘Label’ if SF  0

JO Label : Transfer control to ‘Label’ if OF  1

JNO Label : Transfer control to ‘Label’ if OF  0

JP Label : Transfer control to ‘Label’ if PF  1

JNP Label : Transfer control to ‘Label’ if PF  0

JB Label : Transfer control to ‘Label’ if CF  1

JNB Label : Transfer control to ‘Label’ if CF  0

JBE Label : Transfer control to ‘Label’ if CF  1 or ZF  1

JNBE Label : Transfer control to ‘Label’ if CF  0 or ZF  0

JL Label : Transfer control to ‘Label’ if SF  1 or OF  1

JNL Label : Transfer control to ‘Label’ if SF  0 or OF  0

JLE Label : Transfer control to ‘Label’ if ZF  1 or neither SF nor OF is 1

JNLE Label : Transfer control to ‘Label’ if ZF  0 or at least any one of SF and OF is 1

LOOPZ label : Loop through a sequence of instructions from ‘Label’ while ZF  1 and
CX  0

LOOPNZ label : Loop through a sequence of instructions from ‘Label’ while ZF  0

and CX  0 .

Flag manipulator and Processor control instructions:

CLC – Clear carry flag

CMC- Complement carry flag

STC- Set carry flag

CLD- Clear direction flag

STD- Set direction flag

CLI- Clear interrupt flag

STI- Set Interrupt flag

WAIT- wait for test input pin to go low

HLT- Halt the processor

NOP- No operation

ESC- Escape to external device like NDP (numeric co-processor)

LOCK- Bus lock instruction prefix.