Digital Logics and Microprocessor

Lab Assessment 4
Registration No.: 19BIT0267
Name: ANKIT KUMAR
Slot: L47 + L48

1. Verify the following flip flops:

Truth Table:
Clk S R Qn+1
0 x X Qn
1 0 0 Qn
1 0 1 0
1 1 0 1
1 1 1 Not used

Characteristics Table:
Qn S R Qn+1
0 0 0 0
0 0 1 0
0 1 0 1
0 1 1 x
1 0 0 1
1 0 1 0
1 1 0 1
1 1 1 x

Excitation Table:
Qn Qn+1 S R
0 0 0 x
0 1 1 0
1 0 0 1
1 1 x 0

Expression:
Qn+1 = S + QnR’
Circuit Diagram:

b. D flip flop

Truth Table:
Clk D Qn+1
0 x Qn
1 0 0
1 1 1

Characteristics Table:
Qn D Qn+1
0 0 0
0 1 1
1 0 0
1 1 1

Excitation Table:
Qn Qn+1 D
0 0 0
0 1 1
1 0 0
1 1 1

Expression:
Qn+1 = D
Circuit Diagram:

c. JK Flip Flop

Truth Table:
Clk J K Qn+1
0 x X Qn
1 0 0 Qn
1 0 1 0
1 1 0 1
1 1 1

Characteristics Table:
Qn J K Qn+1
0 0 0 0
0 0 1 0
0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 0
1 1 0 1
1 1 1 0

Excitation Table:
Qn Qn+1 J K
0 0 0 x
0 1 1 x
1 0 x 1
1 1 x 0
Expression:
Qn+1 = Qn’J + Qn K’
J = Qn+1
K = Qn+1’

Circuit Diagram:

d. T flip flop

Truth Table:
Clk T Qn+1
0 x Qn
1 0 Qn
1 1 Q n’

Characteristics Table:
Qn T Qn+1
0 0 0
0 1 1
1 0 1
1 1 1

Excitation Table:
Qn Qn+1 T
0 0 0
0 1 1
1 0 1
1 1 0

Expression:
Qn+1 = Qn ⊕ T
 Circuit Diagram:

2. Design a sequential circuit with two JK flip-flops, A and B, and two inputs, E and x. If E=0,
the circuit remains in the same state regardless of the value of x. When E=1 and x=1, the
circuit goes through the state transitions from 00 to 01 to 10 to 11 back to 00, and repeats.
When E=1 and x=0, the circuit goes through the state transitions from 00 to 11 to 10 to 01
back to 00, and repeats.

State Table:

A B E x A+ B+ JA KA JB KB
0 0 0 0 0 0 0 x 0 x
0 0 0 1 0 0 0 x 0 x
0 0 1 0 1 1 1 x 1 x
0 0 1 1 0 1 0 x 1 x
0 1 0 0 0 1 0 x x 0
0 1 0 1 0 1 0 x x 0
0 1 1 0 0 0 0 x x 1
0 1 1 1 1 0 1 x x 1
1 0 0 0 1 0 x 0 0 x
1 0 0 1 1 0 x 0 0 x
1 0 1 0 0 1 x 1 1 x
1 0 1 1 1 1 x 0 1 x
1 1 0 0 1 1 x 0 x 0
1 1 0 1 1 1 x 0 x 0
1 1 1 0 1 0 x 0 x 1
1 1 1 1 0 0 x 1 x 1

Expression:
JA = KA = E(B ⊕ x)’
JB = KB = E
 Circuit Diagram:

3. Design a sequential circuit for the state diagram given below.

State Table:
Present state Next State Flip Flop inputs Output
QA QB X QA+ Q B+ TA TB Y
0 0 0 0 0 0 0 0
0 0 1 0 1 0 1 0
0 1 0 0 0 0 1 0
0 1 1 1 1 1 0 0
1 0 0 0 0 1 0 0
1 0 1 0 0 1 0 1
1 1 0 1 0 0 1 0
1 1 1 1 1 0 0 0

Expression:
TA = QA QB’ + QA’ QB X
TB = QA’ QB’ X + QB X’
Y = QA QB’ X
 Circuit Diagram:

6. Design a SiSO 4-bit left shift register.

SiSO Table:
Clk D3 D2 D1 D0 Q3 Q2 Q1 Q0
Int 0 0 0 0 0 0 0 0
1 1 0 0 0 1 0 0 0
2 1 1 0 0 1 1 0 0
3 1 1 1 0 1 1 1 0
4 1 1 1 1 1 1 1 1

Circuit Diagram:
7. Design SIPO 4-bt right shift register

Sipo Table:
Clk D3 D2 D1 D0 Q3 Q2 Q1 Q0
Int 0 0 0 0 0 0 0 0
1 1 0 0 0 1 0 0 0
2 1 1 0 0 1 1 0 0
3 1 1 1 0 1 1 1 0
4 1 1 1 1 1 1 1 1

Circuit Diagram:

8. Design a sequential circuit for the following state diagram using JK flip flop.

State Table:
Present state Next State Flip Flop inputs Output
QA QB X QA + QB+ JA KA JB KB A B
0 0 0 0 0 0 x 0 x 0 0
0 0 1 0 1 0 x 1 x 0 0
0 1 0 0 1 0 x x 0 0 0
0 1 1 1 0 1 x x 1 0 0
1 0 0 0 1 x 1 1 x 0 0
1 0 1 1 1 x 0 1 x 1 0
1 1 0 0 1 x 1 x 0 0 0
1 1 1 0 0 x 1 x 1 x x
Expression:
JA = QB X
KA = X’ + QB
JB = X + QAQB’
KB = X
A = QA X

Circuit diagram: