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External Gate Resistor Design Guide for Gate Drivers

Mateo Begue, High Power Drivers

External gate drive resistors play a crucial part in These parasitics cause oscillations in the gate drive
limiting noise and ringing in the gate drive path. loop and are modeled by resonant circuits.
Parasitic inductances and capacitances, high dV/dt Fortunately, the otherwise very high Q resonance
and di/dt, and body-diode reverse recovery can cause between the input capacitance, CISS (CGD + CGS) and
unwanted behavior without an appropriately sized gate the source inductance, LS can be damped by the
resistor. series resistive components of the loop, RG
(RG = RHI or LO+RGATE+RG,I).

RG LS
VDRV CISS

Figure 3. Resonant Circuits in Gate Drive Design

An optimum gate resistor selection is key for a high

performance design. Without optimization, small
resistor values will result in an overshoot in the gate
Figure 1. Gate Drive Elements
drive voltage waveform but also result in faster turn-on
speed. Also, higher resistor values will overdamp the
Figure 1 depicts common elements in the gate drive oscillation and extend the switching times without
path: the internal resistance of the gate driver, external offering much benefit for the gate drive design.
gate resistance, and internal gate resistance of the
MOSFET or IGBT. RGATE is the only component that Select a gate resistor that will give your design a
tunes the gate drive waveform. quality factor Q between 0.5 (critically damped) and 1
(under damped). A quality factor greater than 0.5 will
give you faster turn-on and turn-off if needed. Start by
recording the gate drive ring with no external
resistance. This is your ring frequency fR used in
Equation 1. The MOSFET or IGBT's datasheet
provides the input capacitance, CISS, which will help
you calculate the source inductance LS.
1
LS
2
C ISS 2S¦R (1)
Determine when the series resistance RG is equal to or
twice the inductor's reactance, for under damped or
critically damped performance. The external gate
resistor is then determined by subtracting the internal
gate drive and transistor gate resistance from the total
series resistance.
XL ZL S
Figure 2. Switching Theory Q
RG RG (2)
Figure 2 shows the parasitic inductances and their The above method is an iterative process starting with
effect on the gate drive waveform created by long 0-Ω as the external gate resistance and calculating a
trace length and poor PCB design. new external gate resistor value based on ring
frequency, source inductance, and input capacitance.

SLLA385A – May 2018 – Revised March 2020 External Gate Resistor Design Guide for Gate Drivers Mateo Begue, High Power Drivers 1
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This TI TechNote uses two isolated single-channel Using 3.57MHz as the ring frequency and 9250-pF as
gate drivers in a half-bridge configuration to provide the input capacitance, a critically damped resistor
proof of concept. In the following figures, two value is determined using Equation 1 and Equation 2.
UCC5310MC driven from a 15-V supply are used to Don't forget to subtract the series resistive elements
drive two 100V MOSFETs CSD19536KCS with a RG,I and RHI or LO from this calculated value. Figure 5
typical internal gate resistance, RG,I of 1.4-Ω. demonstrates the effects of adding a 7-Ω resistor to
the gate drive path which makes the waveform
The CSD19536KCS MOSFET was selected due to its
critically damped.
relatively small internal gate resistance in order to
show the effects of adding external gate resistors. The selection of the external gate resistor will affect
External gate resistors may not be required if a three things: drive current, gate-driver power
MOSFET or IGBT's internal gate resistance is large dissipation, and rise and fall times. Figure 4 and
enough. Figure 5 show the gate resistor's dampening effect and
its effect on rise and fall times.
If the rise and fall times are too slow after adding an
optimized gate resistor, another option is to calculate
your gate resistor with a Q-factor set to 1. This will
promote an under damped solution and caution should
be used to prevent overshoot or undershoot. If this
doesn't work, look at the source and sink current of
your gate driver and find a device with greater peak
currents to replace it with. This will charge and
discharge your FET at a faster rate but will need a new
optimized gate resistor to prevent overshooting.
Generally, another way to decrease the ringing from
the series RLC circuit shown in Figure 3 is to minimize
loop inductance between the source of the high-side
Figure 4. External Gate Resistor RGATE = 0-Ω transistor to the source of the low-side transistor.
Confining the high peak currents that charge and
At 0-Ω, there is unwanted ringing on the gate-source discharge the transistor gates to a minimum physical
waveform. The internal gate resistance of the area is essential. The gate driver must be placed as
CSD19536KCS MOSFET is not enough to dampen close as possible to the transistors to reduce these
the oscillations found in Figure 4. parasitics.
The trade-off between fast rise and fall times vs
oscillations is why the external gate resistor element of
the gate-drive design is so valuable.

Table 1. Alternative Device Recommendations

Device Optimized Parameters Performance Trade-Off
Requires larger value
Miller Clamp Feature gate resistor due to
UCC5350MC
Available higher source/sink
current
Need to design a method
Split Output Feature
UCC5320SC to prevent miller current
Available
induced turn-on
True UVLO2 monitoring
UVLO2 referenced to at the expense of not
Figure 5. Critically Damped External Gate Resistor UCC5390EC
GND2 Feature Available having split output or
RGATE = 7-Ω Miller clamp
Difficult to layout both
Configured as a half-
transistors close to each
UCC21220 bridge or two low-side
output when using a dual
drivers
channel

2 External Gate Resistor Design Guide for Gate Drivers Mateo Begue, High Power Drivers SLLA385A – May 2018 – Revised March 2020
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www.ti.com Revision History

Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Original (May 2018) to A Revision ........................................................................................................... Page

• Added additional Gate Driver detail. .................................................................................................... 1

SLLA385A – May 2018 – Revised March 2020 Revision History 3

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