Hall Ticket No: Question Paper Code : B3201

(AUTONOMOUS)
M. Tech I Semester Regular/Supplementary Examinations, December - 2017
(Regulations: VCE-R15)
ADVANCED DATA STRUCTRUES AND ALGORITHMS
(Computer Science and Engineering)
Date: 27 December, 2017 FN Time: 3 hours Max Marks: 70
Answer any FIVE Questions
Each Question carries equal marks

1. a) Explain the algorithm for insertion and deletion on double linked list. 9M
b) Explain Postfix expression evolution with example. 5M

2. a) Explain Rehashing with example. 6M

b) Construct hash table with table size of 13 for the following values: 8M
42, 7, 25, 14, 70, 8, 38, 21, 11, 34.
Implement using linear probing and double hashing functions.

3. a) Explain the Threaded binary tree. 6M

b) Explain the properties of binary search tree. Construct binary search tree for the 8M
following elements:
67, 12, 45, 98, 80, 73, 7, 120, 85, 30, 42

4. a) Define Red-Black Trees. Explain insertion and deletion operation of Red-Black Trees 7M
with example.
b) Start with AVL search tree that is a 15-nodes full binary tree. The keys are 1-15. 7M
Remove the keys in the order 15, 14, 13 & 12. Draw your tree immediately following
each deletion and also after each rotation that is performed. Label all nodes with their
balance factor and identify the rotation type (if any) that is done.

5. a) How are recursive program analyzed? 7M

b) Distinguish between best, worst and average case complexities of an algorithm. 7M

6. a) Explain the general principle of Greedy method and also list the application of Greedy 6M
method.
b) Explain quick sorting technique. Sort the following elements using quick sort: 8M
65, 70, 75, 80, 85, 60, 55, 50, 45

7. a) Explain the All-Pair Shortest Path Problem (APSP) with example. 7M

b) What is Principle of Optimality? Explain how travelling sales person problem uses the 7M
Dynamic Programming technique with example.

8. a) Give the 0/1 Knapsack Least Cost Branch and Bound algorithm. Explain how to find 7M
optimal solution.
b) Explain the Graph-coloring problem. Draw the state space tree for m=3 colors, n=4 7M
vertices graph. Discuss the time and space complexity.
Hall Ticket No: Question Paper Code : B3202

(AUTONOMOUS)
M. Tech I Semester Regular Examinations, December - 2017
(Regulations: VCE-R15)
ADVANCED OPERATING SYSTEMS
(Computer Science and Engineering)
Date: 29 December, 2017 FN Time: 3 hours Max Marks: 70
Answer any FIVE Questions
Each Question carries equal marks

1. a) Define process and mention process states in process state diagram. 6M

b) What is Thread and explain the implementation of threads and usage of threads? 8M

2. a) What is an Interprocess communication explain in detail? 8M

b) What are Semaphores explain two primitive semaphore operations? 6M

3. a) Explain Deadlock Prevention with necessary conditions each. 6M

b) Describe Bankers algorithm with supporting example for deadlock avoidance. 8M

4. a) Differentiate between Logical and Physical Address space. 6M

b) Consider the following reference string:7, 0, 1, 2, 3, 0, 4, 0, 2, 3, 0, 3, 2, 1, 2, 0, 1, 7, 1, 0. 8M
How many Page fault would occur for FIFO and LRU, Assuming three frames are empty?

5. a) What are the Access methods for File? 6M

b) With the help of neat diagram, Discuss: 8M
i. Tree-Structured directory
ii. Acyclic-graph directory

6. a) What is Distributed System and mention its Design Issues. 6M

b) Describe the following: 8M
i. Parameter Marshaling
ii. Dynamic Binding
iii. Load Request Message
iv. Load Reply Message

7. a) Explain differences between Logical Clock and Physical Clock. 6M

b) Explain Berkeley Algorithm for Clock Synchronization. 8M

8. a) Illustrate the differences in the occurrence of deadlocks in single process system and 8M
distributed System.
b) Discuss about Centralized deadlock detection. 6M
Hall Ticket No: Question Paper Code : B3203

(AUTONOMOUS)
M. Tech I Semester Regular/Supplementary Examinations, January - 2018
(Regulations: VCE-R15)
COMPUTER ORGANIZATION AND ARCHITECTURE
(Computer Science and Engineering)
Date: 02 January, 2018 FN Time: 3 hours Max Marks: 70
Answer any FIVE Questions
Each Question carries equal marks

1. a) Design and explain a full adder and half adder using NAND gates. 7M
b) Minimize the following expressions using K-map method and write the circuit diagram 7M
using basic gates:
i. F = n(0, 1, 8, 9, 10)
ii. F = E(0, 13, 14, 15) + d(1, 2, 3, 9, 10,11)

2. a) Explain the different registers that are available in the processor of a digital computer 7M
and the connection between the processor and the memory.
b) Explain the single bus structure and also explain how performance of the computer can 7M
be measured.

3. a) Explain the following addressing mode with suitable example: 7M

i. Immediate Mode
ii. Indirect Mode
iii. Index Mode
iv. Autodecrement Mode
v. Register Mode
b) Explain role of different computer registers with respect to instruction Fetch cycle and 7M
execution. Give example.

4. a) Using Booth algorithm multiply (-13) and (+107). 7M

b) Explain 4 bit carry-look ahead adder and use it to build a 12 bit carry-look ahead adder. 7M

5. a) With the diagram, explain the basic organization of microprogrammed control unit. 7M
b) Illustrate micro instructions to execution of a complete instruction Add (R3), R1. 7M

6. a) Explain the Internal Organization of Memory chips with a diagram. 7M

b) What is cache memory? What is locality of reference? With neat Diagrams explain the 7M
cache memory mapping functions.

7. a) Describe the input transfer on a synchronous bus with the detailed timing diagram. 7M
b) What is the role of a DMA (Direct Memory Access) controller? Explain DMA by 7M
providing the registers used.

8. a) Explain the principle characteristics of multiprocessors? List its advantages. 7M

b) Explain the concepts of shred memory in multiprocessors. 7M
Hall Ticket No: Question Paper Code : B3901

(AUTONOMOUS)
M. Tech I Semester Regular Examinations, January - 2018
(Regulations: VCE-R15)
NATIONAL SERVICE SCHEME
(Common to Computer Science and Engineering & Power Electronics and Electric Drives)
Date: 04 January, 2018 FN Time: 3 hours Max Marks: 70
Answer any FIVE Questions
Each Question carries equal marks

1. a) Discuss the aims and objectives of NSS. 8M

b) Draw NSS emblem and explain its features. 6M

2. a) Explain the NSS organizational structure. 7M

b) What are responsibilities of NSS volunteers? 7M

3. a) What are the different regular activities to be conducted through NSS? 6M

b) What is the methodology of conducting survey? 8M

4. a) Why NSS youth festivals are conducted and how it is useful for volunteers? 7M
b) How NSS get benefitted by coordinating with different local and non-local agencies? 7M

5. a) What does the youth profile contains? 7M

b) Discuss various opportunities for youth through NSS. 7M

6. a) Explain the culture of community mobilization. 8M

b) Define community mobilization and explain the community mobilization mapping. 6M

7. a) Write any two methods to be implemented for community mobilization. 9M

b) Discuss the objectives of youth-adult partnership. 5M

8. a) What do you mean by volunteerism of Indian tradition? 7M

b) How shramdan becomes as part of volunteerism? 7M
Hall Ticket No: Question Paper Code : B3251

(AUTONOMOUS)
M. Tech I Semester Regular/Supplementary Examinations, January - 2018
(Regulations: VCE-R15)
DIGITAL IMAGE PROCESSING
(Computer Science and Engineering)
Date: 06 January, 2018 FN Time: 3 hours Max Marks: 70
Answer any FIVE Questions
Each Question carries equal marks

1. a) How image is mathematically modeled? Explain in detail. 7M

b) Explain image digitization process in detail. 7M

2. a) Explain how Walsh transform is used in image processing. 7M

b) Define and explain the properties of Haar transform. 7M

3. a) Explain the mechanics of spatial filters used in image enhancement. Define spatial mask 7M
used for image averaging in spatial domain and explain.
b) Compare smoothing frequency domain filters. 7M

4. a) Draw and explain the block diagram of simple image degradation/restoration model 7M
and derive the expression for image degradation model.
b) Derive LMS filter used for digital image restoration. 7M

5. a) What is Hough transform? Explain it in detail with a suitable example. 7M

b) What are the different ways of performing region based image segmentation? Explain 7M
any one method with a suitable example.

6. a) Explain LZW coding used in image compression with a suitable example. 7M

b) Draw the block diagram of lossy predictive coding system and explain it. 7M

7. a) Compare RGB and HSI color models. 7M

b) Write about pseudo color image processing. 7M

8. a) Explain the concept of opening and the concept of closing used in image morphology. 7M
b) What is skeletonization? Explain in detail. 7M
Hall Ticket No: Question Paper Code : B3256

(AUTONOMOUS)
M. Tech I Semester Regular/Supplementary Examinations, January - 2018
(Regulations: VCE-R15)
OBJECT ORIENTED ANALYSIS AND DESIGN
(Computer Science and Engineering)
Date: 08 January, 2018 FN Time: 3 hours Max Marks: 70
Answer any FIVE Questions
Each Question carries equal marks

1. a) Briefly describe the three perspectives to apply UML. 6M

b) What do you mean by Agile Modeling and Unified Process? Briefly explain. 8M

2. a) What do you mean by Inception? Briefly describe the inception artifacts. 6M

b) Explain Functional and Non-Functional Requirements with example. 8M

3. a) What are the motivations to create a domain model? Are domain and data 7M
models the same thing?
b) Explain operation contracts with suitable example. 7M

4. a) What are patterns? How it is useful for Object Oriented Analysis and Design? 7M
b) What is Test-Driven or Test-First Development? Explain. 7M

5. a) Write short notes on the following GRASP patterns: 8M

i. Pure Fabrication
ii. Protected Variations
b) Explain Singleton Patterns and its applications with suitable example. 6M

6. a) Explain the following: 8M

i. Association Class
ii. Aggregation
iii. Composition
iv. Reflexive Association
b) What is state diagram? Draw the state diagram for telephone line system. 6M

7. a) What are the basic architectural design principles? Explain in detail. 7M

b) Explain the concept of Inter-Layer and Inter-Package Coupling with suitable 7M
example.

8. a) What is Iterative and evolutionary development? How to handle change on an 7M

Iterative project?
b) What are Agile principles? How it support Iterative and Flexible project 7M
development?
Hall Ticket No: Question Paper Code : B3401

(AUTONOMOUS)
M. Tech I Semester Regular/Supplementary Examinations, December - 2017
(Regulations: VCE-R15)
ADVANCED DATA COMMUNICATIONS
(Digital Electronics and Communication Systems)
Date: 27 December, 2017 FN Time: 3 hours Max Marks: 70
Answer any FIVE Questions
Each Question carries equal marks

1. a) Define Modulation. Explain the advantages and disadvantages of each type of 10M
modulation
b) We have available bandwidth of 100 kHz which spans from 200 to 300kHz. What 4M
should be the carrier frequency and the bit rate if we modulated our data by
using FSK with d=1?

2. a) Draw a block diagram of an 8-PSK receiver and explain its components. 7M

b) For a QPSK modulator with an input data rate (f b) equal to 10Mbps and 7M
a carrier frequency 70 MHz, determine the minimum double-sided Nyquist
bandwidth (fN) and the baud.

3. a) Explain the five components of data communication with a neat diagram. 6M

b) What are the three criteria necessary for an effective and efficient network? 8M

4. a) Categorize and explain the four basic topologies in terms of line configuration. 8M
b) Describe different data transmission modes used in data communication. 6M

5. a) Compare Synchronous time division multiplexing versus Statistical time division 10M
multiplexing.
b) Five channels, each with a 100-kHz bandwidth, are to be multiplexed together. 4M
What is the minimum bandwidth of the link if there is a need for a guard band
of 10-kHz between channels to prevent interference?

6. a) Explain different types of errors, explain each with an Example. 8M

b) Assume that, in stop-and-wait ARQ system, the bandwidth of the line is 1Mbps 6M
and 1 bit takes 20ms to make a round trip. What is the bandwidth-delay
product? If the system data frames are 1000 bits length, what is the utilization
percentage of the link?

7. a) Explain HDLC frame structure with a neat diagram. 8M

b) Differentiate Synchronous and Asynchronous Protocols. 6M

8. a) Compare circuit switching, message switching and packet switching. 10M

b) Why data communication through circuit switching is not efficient? 4M
Hall Ticket No: Question Paper Code : B3402

(AUTONOMOUS)
M. Tech I Semester Regular/Supplementary Examinations, December - 2017
(Regulations: VCE-R15)
DIGITAL SYSTEMS DESIGN
(Digital Electronics and Communication Systems)
Date: 29 December, 2017 FN Time: 3 hours Max Marks: 70
Answer any FIVE Questions
Each Question carries equal marks

1. a) Write behavioural style Verilog HDL program to detect 4-bit prime number. 7M
Design canonical sum of product circuit.
b) Determine the minimal sum of products form for the following expression using 7M
K-Map method F(W,X,Y,Z)=∑(0,2,4,9,11,13,15)+d(1,5,7,10).
2. a) Draw the general structure of a CPLD and explain how a logic function can be 7M
realized on CPLD with an example.
b) Realize F1,F2 using PLA. Give the PLA table and connection diagram for 7M
F1=∑m( 1,2,4,5,6,8,10,12,14), F2=∑m(2,4,6,11,15).
3. a) List out the advantages of carry look ahead adder and design 4-bit binary adder. 6M
b) Write behavioural style of Verilog HDL code for 8-input priority encoder with 8M
the help of truth table.
4. a) Explain the functional behavior of master slave JK flip flop with a neat sketch. 7M
b) Convert the following mealy machine into a corresponding moore machine 7M
PS NS, Output
A B,0 E,0
B E,0 D,0
C D,1 A,0
D C,1 E,0
E B,0 D,0
5. a) Explain the reasons for clock skew and how it can be avoided. 7M
b) Write a behavioural style Verilog HDL code for positive edge sensitive D flip flop 7M
with asynchronous preset and clear.
6. a) Explain the difference between flowchart and SM chart with symbols. 6M
b) Draw an ASM chart to design control logic of a binary multiplier. Realize the 8M
same using multiplexer and encoder.
7. a) Explain the different faults presented in a combinational circuit with examples. 6M
b) Explain the procedure to find fault detection and location in a sequential 8M
circuits.
8. a) Explain how Kohavi algorithm is useful in the detection of circuits with example. 7M
b) Apply D-algorithm to detect h – stuck at 0 fault in the given circuit and derive 7M
the test vectors.

Fig.1
Hall Ticket No: Question Paper Code : B3403

(AUTONOMOUS)
M. Tech I Semester Regular Examinations, January - 2018
(Regulations: VCE-R15)
CMOS VLSI DESIGN
(Digital Electronics and Communication Systems)
Date: 02 January, 2018 FN Time: 3 hours Max Marks: 70
Answer any FIVE Questions
Each Question carries equal marks

1. a) Using bulk charge model explain the current voltage characteristics of the MOSFET. 9M
b) What is the significance of body bias? Explain how it affects threshold voltage. 5M
2. a) Define the following with reference to CMOS inverter design: 4M
i. Noise margin
ii. Maximum switching frequency
b) How can the propagation delay be estimated in a CMOS inverter? Derive the delay for 10M
different transitions.
3. a) Write a brief note on MOSFET application as switch logic. 6M
b) With relevant figures explain how series connected MOSFETS increase voltage and 8M
power handling.
4. a) Construct a CMOS logic gate to implement the function F= *A.(B+C)+’. 7M
b) Draw the schematic of a 3 bit CMOS NOR gate and explain its functioning. 7M
5. a) Explain the operation of a TG based D Flipflop with relevant schematic and timing 8M
diagram.
b) Implement XOR function using CMOS transmission gates. 6M
6. a) Highlight the issue of charge leakage in dynamic design and suggest a solution to 7M
eliminate it.
b) Explain clock feed through and its significance in dynamic design. 7M
7. a) What are the principles of dynamic logic? Explain with relevance to precharge and 8M
evaluation citing suitable example.
b) Cascade two dynamic gates and analyze its performance. 6M
8. a) Discuss any one variation on CVSL logic. 6M
b) Design a generic differential (Cascode Voltage Switch) logic and analyze its 8M
performance.
Hall Ticket No: Question Paper Code : B3271

(AUTONOMOUS)
M. Tech I Semester Regular/Supplementary Examinations, January - 2018
(Regulations: VCE-R15)
SOFTWARE ENGINEERING PRINCIPLES
(Common to Digital Electronics and Communication Systems, Embedded Systems,
Power Electronics and Electric Drives & Engineering Design)
Date: 04 January, 2018 FN Time: 3 hours Max Marks: 70
Answer any FIVE Questions
Each Question carries equal marks

1. a) Explain the software engineering layers in detail. 7M

b) Many modern applications change frequently-before they are presented to the end 7M
user and then after the first version has been put into use. Suggest a few ways to build
software to stop deterioration due to change.
2. a) As you move outward along the spiral process flow, what can you say about the 6M
software that is being developed or maintained?
b) Most agile process models recommend face-to-face communication. Yet today, 8M
members of a software team and their customers may be geographically separated
from one another. Do you think this implies that geographical separation is something
to avoid? Can you think of ways to overcome this problem?
3. a) What does win-win mean in the context of negotiation during the requirements 7M
engineering activity?
b) What do you mean by software requirement management? Explain why it is 7M
important.
4. a) Explain why it may be necessary to design the system architecture before the 7M
specifications are written.
b) Explain the software design quality guidelines and its attributes. 7M
5. a) Provide a few examples that illustrate why response time variability can be an issue. 5M
b) What is a framework and how does it differ from a pattern? What is an idiom and how 9M
does it differ from a pattern?
6. a) How can project scheduling affect integration testing? Explain in detail. 7M
b) Using your own words, describe the difference between verification and validation. Do 7M
both make use of test-case design methods and testing strategies?
7. a) Explain the concept of path testing with suitable example. 7M
b) What is the difference between White Box Testing and Black Box Testing? Will 7M
exhaustive testing (even if it is possible for very small programs) guarantee that the
program is 100 percent correct?
8. a) Umbrella activities occur throughout the software process. Do you think they are 7M
applied evenly across the process, or are some concentrated in one or more framework
activities? Justify your answer.
b) What is an indirect measure and why are such measures common in software metrics 7M
work?
Hall Ticket No: Question Paper Code : B3451

(AUTONOMOUS)
M. Tech I Semester Regular Examinations, January - 2018
(Regulations: VCE-R15)
MOBILE SATELLITE COMMUNICATIONS
(Digital Electronics and Communication Systems)
Date: 06 January, 2018 FN Time: 3 hours Max Marks: 70
Answer any FIVE Questions
Each Question carries equal marks

1. a) Explain the architecture of satellite system in detail with a neat diagram. 10M
b) Discuss the limitations of MSS in brief. 4M

2. a) What the orbital parameters? Explain need of each in detail. 10M

b) Write a note on satellite coverage. 4M

3. a) Explain the polar constellation geometry with a neat diagram. 7M

b) Explain the need of spot beams. 7M

4. a) Write the schematic of methodology for estimating long term spectrum. 7M

b) Discuss the radio Propagation Characteristics in detail. 7M

5. a) Explain the working of tracking of satellite and mobile environment with a neat block 9M
diagram.
b) What are the biological effects of handheld devices in mobile and satellite 5M
communications? Discuss.

6. a) Discuss the Effect of Orbital Characteristics on Spacecraft Design. 9M

b) Explain the steps involved in launching satellite constellations in detail. 5M

7. a) Explain the working of Iridium system components of MSS systems. 7M

b) Explain MEO systems highlighting its features. 7M

8. a) What are the needed operational environments for Mobile satellite networks? Discuss. 9M
b) Write a short note on CDMA MSAT network. 5M
Hall Ticket No: Question Paper Code : B3455

(AUTONOMOUS)
M. Tech I Semester Regular Examinations, January - 2018
(Regulations: VCE-R15)
CPLD AND FPGA ARCHITECTURES AND APPLICATIONS
(Digital Electronics and Communication Systems)
Date: 08 January, 2018 FN Time: 3 hours Max Marks: 70
Answer any FIVE Questions
Each Question carries equal marks

1. a) Explain different types of don’t-cares used in combinational logic. 7M

b) Briefly discuss the characteristics of FPGA that distinguishes FPGA from PLD. 7M

2. a) Briefly discuss the relationship of irredundancy over minimality. 7M

b) Explain different components of Field-Programmable Gate Array (FPGA) with 7M
the help of architecture diagram.

3. a) Give the comparison among flash and SRAM-based FPGAs programming 7M

technology.
b) Explain the architecture of SRAM-controlled programmable switches. 7M

4. a) List and explain the functions of I/O pins on a fabric chip to connect to outside 7M
world.
b) Enumerate the organization of pass-transistor and three-state buffer-based 7M
programmable interconnection points.

5. a) Explain the methodology for evaluating FPGA fabrics. 7M

b) Illustrate the concept of routing delays for a number of different fabrics that 7M
have different proportions of segment lengths.

6. a) Briefly discuss rent’s rule for characterization of the relationship between logic 7M
and pins.
b) Explain different clocking discipline rules. 7M

7. a) Design a simple four-input, three-output PAL device by taking an example. 7M

b) Explain different elements of Altera FLEX 8000 with the help of block Diagram. 7M

8. a) Illustrate the relationship between logic expressions and gate networks. 7M

b) Illustrate different steps in implementing an even parity logic design. 7M
Hall Ticket No: Question Paper Code : B3601

(AUTONOMOUS)
M. Tech I Semester Regular/Supplementary Examinations, December - 2017
(Regulations: VCE-R15)
MICROCONTROLLERS FOR EMBEDDED SYSTEM DESIGN
(Embedded Systems)
Date: 27 December, 2017 FN Time: 3 hours Max Marks: 70
Answer any FIVE Questions
Each Question carries equal marks

1. a) Illustrate the memory organization of 8051 microcontroller with the help of a 7M

neat diagram.
b) Distinguish between Von Neumann and Harvard architecture with suitable 7M
sketches and relevant examples. Sketch a neat figure of PSW, explain its
structure and fields.

2. a) Explain the different types of CALL instructions available in 8051 with examples. 6M
b) Illustrate the dual role functionality of Port 2 in 8051 microcontroller. Write the 8M
following programs
i. Create a square wave of 50% duty cycle on bit 0 of port 1
ii. Create a square wave of 66% duty cycle on bit 3 of port 1

3. a) List and explain the different bit handling instructions with examples. 8M
b) Assuming the ROM space starting at 250H contains “America”, write a program 6M
to transfer the bytes into RAM locations starting at 40H.

4. a) Assume that register A has packed BCD. Write a program to convert packed BCD 5M
to two ASCII numbers and place them in R2 and R6.
b) I. Write an assembly language program to transfer the value 41H serially (one 9M
bit at a time) via pin P2.1. Put two highs at the start and end of the data.
Send the LSB first.
II. Define the checksum byte in ROM and its importance. Consider 4 bytes of
hex data 25h, 62h, 3fh and 52h
i. Find the checksum byte
ii. Perform the checksum operation for data integrating
iii. Change the value of second 62h to 22h, and show how the checksum
detect the error

5. a) List and compare the features of the three main design technologies. What are 7M
the benefits of using each of the three different design technologies?
b) Design a single purpose processor that outputs Fibonacci numbers up-to ‘n’ 7M
places. Start with function computing the desired result, translate into state
diagram and sketch a probable data-path.

6. a) Illustrate the operation of general purpose processor with the help of neat basic 7M
architecture and an example.
b) What is an Instruction-set simulator? Explain the testing and debugging phase of 7M
developing programs and the various tools needed for the same.

Cont…2
 ::2::

7. a) What is PWM? Illustrate the role of PWN in embedded applications and Explain 7M
how speed control of a DC motor is achieved using a PWM with suitable
example.
b) What is UART? Illustrate how the serial transmission is carried out using a 7M
universal asynchronous receiver/transmitter (UART) highlighting the role of
start bit, stop bit, baud rate and parity bit with relevant figure.

8. a) List and explain the various Cache mapping techniques with relevant diagrams. 7M
b) Given the following three cache designs, find the one with the best performance 7M
by calculating the average cost of access. Show all calculations.
i. 4 Kbyte, 8-way set associative cache with a 6% miss rate; cache hit costs one
cycle, cache miss costs 12 cycles
ii. 8 Kbyte, 4-way set-associative cache with a 4% miss rate; cache hit costs two
cycles, cache miss costs 12 cycles
iii. 16 Kbyte, 2-way set-associative cache with a 2% miss rate; cache hit costs
three cycles, cache miss costs 12 cycles
Hall Ticket No: Question Paper Code : B3602

(AUTONOMOUS)
M. Tech I Semester Regular Examinations, December - 2017
(Regulations: VCE-R15)
EMBEDDED REAL TIME OPERATING SYSTEMS
(Embedded Systems)
Date: 29 December, 2017 FN Time: 3 hours Max Marks: 70
Answer any FIVE Questions
Each Question carries equal marks

1. a) Illustrate the functionalities of any FIVE process control commands in UNIX with 7M
relevant examples.
b) What is shared memory? What are the problems associated with shared 7M
memory and explain how they can be overcome? Highlight the role of
semaphores in RTOS.
2. a) Differentiate between Hard and soft real time systems with relevant examples. 7M
Briefly explain the Periodic, aperiodic and sporadic tasks with examples.
b) Explain the following functional parameters of Real Time Systems: 7M
i. Pre-emptivity of Jobs
ii. Criticality of jobs
iii. Laxity type and Laxity function
3. a) Differentiate between the following with relevant examples Online versus 7M
Offline Scheduling Preemptive versus Non-Preemptive Scheduling algorithms.
b) Illustrate the weighted round robin approach used in Real time systems with an 7M
example and relevant figure.
4. a) Illustrate what is shared data problem and its causes with examples? Explain the 7M
different ways of handling the shared data problem and ways to overcome it
with example.
b) What is Priority Inversion problem in real time system? Illustrate the different 7M
causes for its occurrence and ways how it can be overcome with suitable
examples.
5. a) Interpret the need of RTOS in a Real Time System? List and explain the 7M
important features and services of real time operating systems.
b) What is an interrupt? Illustrate how Interrupts and ISR are handled in RTOS 7M
environment with an example.
6. a) List the salient features of VxWorks. Explain how memory management is 7M
implemented in Vxworks with relevant examples and figure.
b) What is context switching? Illustrate how the context switching is carried out in 7M
the case of Vxworks with relevant figure and an example.
7. Identify the different system requirements, multiple tasks, and their functions to 14M
implement the Automatic Chocolate Vending machine along with the figure showing
the system of ACVS and its ports. Also create a list of tasks, functions and IPCs to
implement the ACVS using μCOS-II and show the relevant pseudo code for this
implementation.
8. a) Illustrate how RTOS is used in Image processing applications with examples. 7M
b) Explain how RTOS can used for implementing the control system applications 7M
with examples.
Hall Ticket No: Question Paper Code : B3603

(AUTONOMOUS)
M. Tech I Semester Regular Examinations, January - 2018
(Regulations: VCE-R15)
DSP PROCESSORS AND ARCHITECTURES
(Embedded Systems)
Date: 02 January, 2018 FN Time: 3 hours Max Marks: 70
Answer any FIVE Questions
Each Question carries equal marks

1. a) Illustrate the need and working of Decimation and Interpolation in DSP applications 7M
with relevant figure and examples.
b) Obtain the transfer function of the IIR filter whose difference equation is given by 7M
y (n)= 0.9y(n-1)+0.1x(n) and Realize the IIR filter with the given difference equation
showing the filter structure.
2. a) Calculate the dynamic range and precision of each of the following number 7M
representation formats:
i. 24-bit, single-precision, fixed point format
ii. 48-bit, double-precision, fixed point format
iii. A floating-point format with a 16-bit mantissa and an 8-bit exponent
b) List the various sources of error in DSP implementations. Explain the various D/A 7M
conversion errors and how it can be overcome with relevant examples and sketches.
3. a) Illustrate the need and working of Address generation unit in DSP processors with a 7M
neat figure and example.
b) Explain the need and features of a program sequencer unit of a programmable DSP 7M
with a neat block diagram.
4. a) Illustrate the hardware looping and its advantages in DSP processors with relevant 7M
example.
b) What is pipelining? Illustrate the various pipelining programming models with relevant 7M
examples and figures.
5. a) Describe any 4 different data addressing modes of TMS320C54xx processor with 7M
examples.
b) Write an Assembly language program for computing the Multiply and Accumulate of 7M
the equation y(n)=h(0)x(n)+h(1)x(n-1)+h(2)x(n-2) for a TMS320C54xx processor using:
i. Direct addressing mode
ii. MAC instruction
Assume x(n), h(n) and y(n) are stored in the data memory and is of 16-bit
6. a) Explain the significance of Q-notation in DSP with examples. What values are 7M
represented by the 16-bit fixed point number N=4000h in the Q15, Q10 and Q7
notations.
b) Write and Assembly language Program to demonstrate the implementation of an FIR 7M
filter using TMS320C54xx processors with relevant comments. Assume the number of
filter coefficients is 30 and the input samples are 200.
7. a) An 8-point FFT is to be implemented using DIT FFT method on TMS320C54xx. Give the 7M
FFT Implementation structure and also explain the algorithm that computes the output
of each stage
b) Explain how the bit-reversed index generation can be done in 8-point FFT. Also write a 7M
TMS320C54xx program for 8-point DIT FFT bit reversed index generation

Cont…2
 :: 2 ::

8. a) Draw the block diagram for the PCM3002 CODEC and explain how the PCM3002 is 7M
interfaced to the TMS 320C5416 in the DSK using suitable block diagram.
b) Interpret the need and explain what is DMA. Explain how the DMA is configured and 7M
its operation on aTMS320C54xx processor. What is Register Subaddressing technique
in DMA operation?
 Hall Ticket No: Question Paper Code : B365151

(AUTONOMOUS)
M. Tech I Semester Regular Examinations, January - 2018
(Regulations: VCE-R15)
EMBEDDED LINUX
(Embedded Systems)
Date: 06 January, 2018 FN Time: 3 hours Max Marks: 70
Answer any FIVE Questions
Each Question carries equal marks

1. a) What is an embedded system? Write the differences between embedded 6M

system and real time system.
b) List and explain the steps to creating target linux system. 8M

2. a) Write a note on installing TFTP server and minicom. 8M

b) Explain the procedure for building a root file system. 6M

3. a) What are the local debugging requirements? Explain local debugging computer 7M
configuration.
b) Write a note on network mounting the root file system. 7M

4. a) List and explain any four linux timing sources. 8M

b) Define the functionalities of race timer? Explain the schematic of the race timer 6M
with a diagram.

5. a) Describe briefly different types of parallel port. 8M

b) Explain the Standard Parallel Port Control using ppdev. 6M

6. a) Explain in detail the hardware design process. 10M

b) Explain configuration of I/O port controller for the media engine. 4M

7. a) With a neat circuit diagram, explain the LM70 to X86 parallel printer ports 8M
connection.
b) Write a note on I2C Communication with the Philips Semiconductor SAA1064. 6M

8. a) Write down the system integration components. 8M

b) List and explain the collection and storage of temperature data requires two 6M
bash scripts.
Hall Ticket No: Question Paper Code : B3656

(AUTONOMOUS)
M. Tech I Semester Regular Examinations, January - 2018
(Regulations: VCE-R15)
SYSTEM MODELING AND SIMULATION
(Embedded Systems)
Date: 08 January, 2018 FN Time: 3 hours Max Marks: 70
Answer any FIVE Questions
Each Question carries equal marks

1. a) What is the need for simulation? With the advantages explain where the 8M
simulation is appropriate.
b) What is simulation of an inventory and how to do performance measure, how 6M
to avoid shortages in inventory system?

2. a) In detail explain and compare the simulation packages with programming 10M
languages with examples.
b) What is object oriented simulation? Explain with a suitable example. 4M

3. a) Explain guidelines for determining the level of detail in simulation model. 7M

b) Discuss the Techniques for increasing validity and credibility. 7M

4. a) What are the inevitable issues addressed by a good simulation study? Explain in 6M
detail.
b) Consider a single-stage distributed delay with constant delay A. Assuming a zero 8M
initial state at t = 0 and a unit-step input, derive an explicit solution for the output
y(t).

5. a) Discuss special cases of disturbance signals. 7M

b) Draw finite state machine for the following equations: 7M
i. y ( k + l ) = f ( x ( k ), d(k), y(k))
ii. z(k) = g(x(k), d(k), y(k))

6. a) Explain the Properties of the POISSON PROCESSES in detail. 10M

b) Discuss and differentiate elaborately about the continuous time and discrete 4M
time MARKOV PROCESSES.

7. a) What is queuing theory? Represent and explain the simulation of general 7M

queuing system.
b) Consider a data communications system(M/M/1) in which messages are transmitted as 7M
Poisson processes at the rate of 100 messages per hour. The messages are received at
a (single) front-end processor with virtual (essentially unlimited) memory. The
messages, which may be assumed to be of exponentially distributed length, are
processed by the central processor in an average time of 30 seconds. Describe the
behavior of this system.

8. a) What is golden ratio search? Differentiate with Thirds algorithm partitioning. 7M

b) Write a computer program to perform the golden ratio sequential search algorithm, 7M
thus finding a local minimum for each of the following objective functions:
f(C) = 3+ sin C + 2cos 2C, 0 ≤C ≤ 8.
Hall Ticket No: Question Paper Code : B3301

(AUTONOMOUS)
M. Tech I Semester Regular/Supplementary Examinations, December - 2017
(Regulations: VCE-R15)
PRINCIPLES OF MACHINE MODELING ANALYSIS
(Power Electronics and Electric Drives)
Date: 27 December, 2017 FN Time: 3 hours Max Marks: 70
Answer any FIVE Questions
Each Question carries equal marks

1. a) Explain the magnetically coupled circuits with neat sketch. 7M

b) Derive the power angle equation and explain the power angle characteristics 7M
of a synchronous machine.

2. a) What is generalized machine theory? What are the restrictions of generalized 5M

machine theory?
b) Draw and describe voltage equations of the basic two pole machine diagram 9M
and primitive machine diagrams for the following machines:
i. D.C compound machine
ii. Poly phase Induction machine
ii. Synchronous machine

3. a) Explain the steps involved in the computation of dc motor response under 7M

steady state.
b) Discuss how the linearization techniques are applied for small perturbations 7M
in the dc motor.

4. a) Explain the linear transformation technique with examples. 7M

b) Explain the phase transformation technique (a, b, c to α, β, 0). 7M

5. Draw the basic circuit model for a 3-phase induction motor for stator as well as 14M
rotor and obtain voltage equations in the form of matrices in terms of stator and
rotor currents?

6. a) What are the commonly used induction machine models? Explain the relative 7M
importance of them.
b) Explain the rotor reference frame model of a three phase induction machine. 7M

7. a) Explain induction motor dynamics during starting and braking. 7M

b) Explain acceleration, braking and reversing time with examples. 7M

8. a) Derive the voltage equations of a synchronous machine in rotor reference 7M

frame.
b) Derive the mathematical representation of a synchronous machine. 7M
Hall Ticket No: Question Paper Code : B3302

(AUTONOMOUS)
M. Tech I Semester Regular/Supplementary Examinations, December - 2017
(Regulations: VCE-R15)
POWER ELECTRONIC CONVERTERS-I
(Power Electronics and Electric Drives)
Date: 29 December, 2017 FN Time: 3 hours Max Marks: 70
Answer any FIVE Questions
Each Question carries equal marks

1. a) Briefly explain the operation of AC voltage controller with PWM control. 7M

b) A single phase A.C voltage controller with R-L load has the following details 7M
Suppy voltage = 230V, 50Hz; R=4Ω and ωL=3Ω, calculate:
i. The control range of firing angle
ii. The maximum value of RMS load current
iii. The maximum power and power factor
iv. The maximum values of average and RMS thyristor current
2. a) With a neat circuit and waveforms briefly explain the operation of three 7M
phase AC voltage controller with star connected RL load.
b) A three phase controller supplies a star connected R load of R=5Ω and line to 7M
line input voltage is 210V (RMS) 50Hz. The firing angle is α=π/3. Determine:
i. The RMS output phase voltage
ii. The input power factor
3. a) Explain the operation of three phase to three phase midpoint configuration 7M
of cycloconverter with near waveforms.
b) With neat circuit and waveforms explain the operation of Matrix converter. 7M
4. a) Explain the operation of single phase fully controlled converter with RL load 7M
and derive the necessary expressions for output voltage. Also explain the
performance measures of the converter.
b) Explain the process of symmetrical angle control and PWM control methods. 7M
5. a) Explain the operation of half controlled three phase converter and derive the 7M
expression for average output voltage.
b) Briefly explain the operation of twelve pulse converter. 7M
6. a) Briefly explain the analysis of Buck Boost converter. 7M
b) The buck regulator has input voltage of V=12V. The required average output 7M
voltage is Va=5V at R=500Ω and peak to peak output ripple voltage is 20mv. If
the peak to peak ripple current of inductor is limited to 0.8A determine:
i. Duty Cycle
ii. Filter inductance L & C
7. a) With neat circuit diagram and wave forms explain the operation of single 7M
phase full bridge inverter with RL load. Derive the expression for RMS value
of fundamental component of output voltage.
b) Explain single pulse width modulation technique for full bridge inverter. To 7M
eliminate the third order harmonics what should be the width of the pulse.
With that width of the pulse find the RMS output voltage. Also derive the
generalized expression for RMS output voltage.
Cont…2
 ::2::

8. a) With neat circuit diagram and waveforms explain the operation of 180 mode 7M
of operation of three phase inverter with RL load. Derive the expression for
RMS output voltage.
b) Explain space vector pulse width modulation technique for three phase 7M
voltage source inverter.
Hall Ticket No: Question Paper Code : B3303

(AUTONOMOUS)
M. Tech I Semester Regular/Supplementary Examinations, January - 2018
(Regulations: VCE-R15)
POWER ELECTRONIC CONTROL OF DC DRIVES
(Power Electronics and Electric Drives)
Date: 02 January, 2018 FN Time: 3 hours Max Marks: 70
Answer any FIVE Questions
Each Question carries equal marks

1. a) Explain in detail the operation of a single-phase full converter feeding a D.C 7M

separately motor with reference to voltage and current waveforms, assume motor
current is continuous.
b) The speed of a 20 HP, 200V, 1000 rpm motor is controlled by a single phase full 7M
converter. The armature circuit resistance is 0.25 ohms. Motor constant Kaf=0.03 N-
m/A2 The supply voltage is 230V. Assuming continuous and ripple free motor
current, determine motor torque, motor current and supply power factor for firing
angle α=30 degrees and speed N=1000rpm.
2. a) Draw and explain the speed-torque characteristics at different firing angles for a 7M
3-phase fully converter feeding a separately excited D.C motor.
b) A 220V, 1440rpm, 120A separately excited DC motor with armature resistance of 7M
0.7 ohms is fed from 3-phase fully controlled converter with an ac source line
voltage 440V, 50 Hz supply. A star connected transformer is used to feed the
armature so that motor terminal voltage equals rated voltage when converter firing
angle is zero. Calculate the value of firing angle when motor is running at 1200 rpm
at rated torque.
3. a) Analyze the effect of resistive load and inductive load connected to the three phase 7M
controlled bridge rectifier.
b) Explain the principle of operation of a three phase naturally commutated bridge 7M
Inverter.
4. Give the steady state analysis of three phase converter control the DC motor drive. 14M
5. What is meant by Sixth harmonic torque? Derive peak sixth harmonic torque and 14M
armature resistive loss expression under continuous current conduction mode.
6. Explain the principle of operation of the chopper for the first, second, third, fourth 14M
quadrant operations with all relevant diagrams.
7. a) Distinguish between speed and current closed loops fed to a dc motor drive. 7M
b) Explain the design aspects of a current controller associated with chopper fed DC 7M
drive.
8. a) Explain the dynamic simulation aspects of speed controlled DC motor drives. 7M
b) Discuss the operation of a speed feedback speed controller. 7M
Hall Ticket No: Question Paper Code : B3352

(AUTONOMOUS)
M. Tech I Semester Regular/Supplementary Examinations, January - 2018
(Regulations: VCE-R15)
POWER SEMI CONDUCTOR DEVICES
(Power Electronics and Electric Drives)
Date: 06 January, 2018 FN Time: 3 hours Max Marks: 70
Answer any FIVE Questions
Each Question carries equal marks

1. a) What are the different classes of power switching devices? Briefly explain 7M
about them.
b) Discuss about the characteristics of a real switching device. 7M

2. a) Briefly discuss about operation of Schotky diode and fast recovery diodes. 8M
b) Write the equation which helps to determine the v-i characteristics of a 6M
power diode under dc steady state operation. Also draw the v-i
characteristics and describe the different regions in it.

3. a) Draw the output characteristics and transfer characteristics of a power 6M

transistor. Also write short notes on it.
b) Explain about the turn-on and turn-off process of BJT. 8M

4. a) Discuss about secondary breakdown phenomenon in power MOSFETs. 7M

b) Using appropriate diagrams, explain the differences between enhancement 7M
type MOSFETs and depletion type MOSFETs.

5. a) Explain the principle of operation of IGBTs with the help of its equivalent 7M
circuit.
b) Discuss about the turn-on characteristics of an IGBT. 7M

6. a) Discuss about the effect of gate current on forward blocking voltage of a 7M

thyristor.
b) Suggest a circuit for protecting a thyristor from high di/dt during its 7M
operation.

7. a) Briefly explain the functions of a heat sink. Also mention the simplified 7M
expression which can be used to determine the approximate sizing of the
heat sink.
b) Write an expression for steady state temperature rise and explain the 7M
significance of each parameter.

8. a) What are the steps that should be followed while designing a line frequency 7M
transformer?
b) Write short notes on magnetic circuits and the factors that affect the 7M
magnetic field in the magnetic circuit.
Hall Ticket No: Question Paper Code : B3355

(AUTONOMOUS)
M. Tech I Semester Regular Examinations, January - 2018
(Regulations: VCE-R15)
ENERGY CONVERSION SYSTEMS
(Power Electronics and Electric Drives)
Date: 08 January, 2018 FN Time: 3 hours Max Marks: 70
Answer any FIVE Questions
Each Question carries equal marks

1. a) Explain photo current and load current with necessary equations. 7M

b) Briefly explain the performance of a practical solar cell. 7M

2. a) Explain the basic principle of MHD generation. 7M

b) An MHD duct has an inlet pressure of 10atm. and discharges into the 7M
atmosphere. Find its volume for a length of 20m and inlet diameter of 2m, if
the duct is of circular cross section throughout, as well as the outlet
diameter.

3. a) Explain the various properties of wind and air. 7M

b) Explain the types of wind turbine. 7M

4. a) Explain the characteristics of turbines for tidal power generation. 7M

b) A tidal power station has installed capacity of 2176MW in 64 units each of 7M
34MW rated output. The head at rated output is 5.52m. The embankment is
4 miles long=6.4km. Again assume 93% efficiency for both turbines and
generator. The generation is 5 hours twice a day. Calculate:
i. The quantity of water flowing through each turbine and the total flow out
of the tidal basin
ii. The surface area of the reservoir behind the embankment and the wash
iii. Energy produced in TW-h per year

5. a) Explain the principle of conversion of wave energy. Briefly explain open cycle 7M
and closed cycle OTEC system.
b) Discuss the power content in waves. 7M

6. a) Explain the energy conversion process from geothermal energy. 7M

b) Explain the principle of biomass conversion. 7M

7. a) Explain the environmental effect of energy conversion system. 7M

b) Discuss the global energy position. 7M

8. a) Discuss the pollution from coal and explain the preventive measures. 7M
b) What are the different classes of batteries? 7M
Hall Ticket No: Question Paper Code : B3703

(AUTONOMOUS)
M. Tech I Semester End Semester Regular Examinations, December - 2017
(Regulations: VCE-R15)
FINITE ELEMENT METHODS
(Engineering Design)
Date: 27 December, 2017 FN Time: 3 hours Max Marks: 70
Answer any FIVE Questions
Each Question carries equal marks

1. a) With suitable example explain boundary value problems. 4M

b) A simply supported beam is subjected to uniformly distributed load over the 10M
entire span as shown in Fig.1. Determine the bending moment and deflection
using Rayleigh ritz method.

Fig.1
2. Determine the displacement, stresses and reaction force induced in an axially 14M
loaded stepped bar as shown in Fig.2. Take E=2.1 X 105 N/mm2, A1=50mm2, A2=
30mm2.

Fig.2
3. The Fig.3 below shows a 2-Dimensional truss structure. Determine the 14M
displacement of all nodes and stresses in all the three bars using finite element
method. Take E=200GPa, A=200mm2.

Fig.3
4. For the beam shown in Fig.4, determine displacement and slopes at the nodes, 14M
forces and reactions for each element.

Fig.4
Cont…2
 ::2::

5. a) What are axisymmetric problem? How does it reduce the problem size? 4M
b) Derive the shape function for a 4 noded quadrilateral element using 10M
Lagrange’s method.

6. a) Explain one point formula in numerical integration. 7M

b) Compute -1ʃ1 ((3eξ + ξ2+ (1/ξ+2)) dξ using 2 point formula. 7M
7. a) Write down the expression for element mass matrix for quadrilateral 7M
element.
b) What is meant by a mode in dynamic analysis? Explain with an example. 7M
8. a) Explain h-refinement and P-refinement of mesh. 8M
b) Write short notes Pascal’s triangle. 6M
Hall Ticket No: Question Paper Code : B3701

(AUTONOMOUS)
M. Tech I Semester Regular Examinations, December - 2017
(Regulations: VCE-R15)
ADVANCED MECHANICS OF SOLIDS
(Engineering Design)
Date: 29 December, 2017 FN Time: 3 hours Max Marks: 70
Answer any FIVE Questions
Each Question carries equal marks

1. a) Write a short note on shear center. 4M

b) Show that the shear centre for the section shown in Fig.1 is at measured from 10M
point 0.

Fig.1

2. a) What are the importances of study of unsymmetrical bending? 4M

b) A horizontal cantilever 2m long is constructed from the Z section shown 10M
below Fig.2. A load of 10kN is applied to the end of cantilever at an angle of
60° to the horizontal as shown. Assuming that no twisting moment is applied
to the section, determine the stresses at points A & B. Take I xx= 48 x 10-6 m4
and IYY= 4.4 x 10-6 m4)

Fig.2

3. a) What do you mean by curved beam? Explain in detail the difference between 7M
symmetrical bending and unsymmetrical bending.
b) Explain Radial Stress in Curved Beams. 7M
4. a) What is Prandtl’s stress function? Derive the governing differential equation 9M
for a narrow rectangular cross section bar subjected to torsion in terms of the
Prandtl’s stress function.
b) Compare effects of torsional loading on thin walled open and closed sections. 5M
5. a) Derive the equilibrium equations for plane stress state. 7M
b) Derive an expression for bending of a cantilever beam loaded at the free end 7M
in rectangular co-ordinate system.
Cont…2
 ::2::

6. a) Derive the differential equilibrium equation in polar coordinates for two 9M

dimensional elastic bodies.
b) Obtain the compatibility expression for two dimensional problems in polar 5M
coordinates.

7. A steel beam of a rectangular cross section, 180mm wide and 280mm thick, is 14M
resting on an elastic foundation whose modulus of foundation is 6.5N/mm2. This
beam is subjected to a concentrated anti-clockwise moment of 0.5MNm at the
center. Determine the maximum deflection and the maximum bending stresses in
the beam. Assume Young’s modulus, E=200 GPa and the Poisson’s ratio,
µ=0.3. Also, plot:
i. The deflected shape of the beam
ii. The variation in the bending moment along the axis of the beam
iii. The variation in the shear force along the axis of the beam
8. a) What is contact stress? Explain the different methods of computing contact 7M
stresses.
b) Write a short note on Deflection of bodies in point contact. 7M
Hall Ticket No: Question Paper Code : B3702

(AUTONOMOUS)
M. Tech I Semester Regular Examinations, January - 2018
(Regulations: VCE-R15)
ADVANCED MECHANISMS
(Engineering Design)
Date: 02 January, 2018 FN Time: 3 hours Max Marks: 70
Answer any FIVE Questions
Each Question carries equal marks

1. a) Enumerate the specific advantages of spherical mechanisms over other spatial and 7M
planar mechanisms.
b) Explain briefly about the mobility criterion for Spatial mechanisms and manipulators 7M
with an example.
2. a) Explain term collineation axis and its use for finding inflection points. 7M
b) Explain with neat sketch about Hartmann’s Construction. 7M
3. a) Explain with neat sketch about circling point curve for the Coupler of a Four bar 7M
mechanism.
b) Derive displacement, velocity, acceleration analysis for four bar mechanism using 7M
freudenstein’s equation.
4. a) Explain in brief about Guiding a body though two and three distinct positions. 7M
b) Explain about synthesis of four bar mechanism for specified instantaneous 7M
condition.
5. a) Explain Number synthesis. 2M
b) Synthesize a function generator to solve the equation Y = log10 X in the interval. 12M
1  X  10 , with the range is divided into six intervals. Use Overlay method.
6. a) Explain Dimensional synthesis. 2M
b) Design and draw a four bar mechanism, such that the crank angles required will be
coordinates as follows: 12M
i.   0, 2 30, 3 60
ii.   20, 2 45, 3 85
7. a) Explain the synthesis of cam mechanism. Discuss the procedure how to construct 12M
cam profiles and the axis of cam is passing through the axis of the follower, when
the follower moves with uniform velocity.
b) What is the function of cam and follower system? 2M
8. a) What do you mean by Kinematic link? 2M
b) How Kinematic links are classified? Briefly explain flexible links with suitable 12M
examples.
Hall Ticket No: Question Paper Code : B3705

(AUTONOMOUS)
M. Tech I Semester Regular Examinations, January - 2018
(Regulations: VCE-R15)
FRACTURE, FATIGUE AND CREEP DEFORMATION
(Engineering Design)
Date: 06 January, 2018 FN Time: 3 hours Max Marks: 70
Answer any FIVE Questions
Each Question carries equal marks

1. a) Explain briefly the ductile/brittle fracture transition temperature for notched 7M

and unnotched components.
b) Differentiate clearly between intergranular and transgranular fracture. 7M

2. a) Explain Griffith theory of fracture for ideal brittle materials. 7M

b) A relatively large plate of a glass is subjected to a tensile stress of 40MPa. If 7M
the specific surface energy and modulus of elasticity are 0.3J/m 2 and 69GPa,
respectively, determine the maximum length of a surface crack that will
result in a fracture.

3. a) Define energy release rate. Derive an expression for energy release rate of 7M
cracked plate at fixed deflection.
b) Explain the differences between the plane stress fracture toughness and the 7M
plane strain fracture toughness. For a ductile metal, which fracture toughness
has a higher value and why?

4. a) Differentiate between: 7M
i. Stress Intensity Factor
ii. Plane stress fracture toughness
b) Derive plastic zone size as per Dugdale approach. 7M

5. a) Discuss about the J-integral approach in CTOD of elastic and plastic fracture. 7M
b) Path independence of J integral is not valid for elastic plastic materials. Why? 7M

6. a) What do you mean by plane strain fracture toughness? Explain the factors 7M
considered for improving fracture toughness.
b) Explain the effect of thickness on fracture toughness and also give examples 7M
as to how this value would be useful in industry scenario.

7. a) Explain the different stages of fatigue crack growth. 7M

b) How are constant fatigue life diagrams drawn? Using constant life diagrams 7M
superimposed with yield criterion, explain the effect of tensile and
compressive mean stress.

8. a) Explain the Effect of stress and temperature on the creep curve. 7M

b) Explain Larson-Miller parameter. 7M
Hall Ticket No: Question Paper Code : B3708

(AUTONOMOUS)
M. Tech I Semester Regular Examinations, January - 2018
(Regulations: VCE-R15)
DESIGN FOR MANUFACTURING
(Engineering Design)
Date: 08 January, 2018 FN Time: 3 hours Max Marks: 70
Answer any FIVE Questions
Each Question carries equal marks

1. a) Explain the material selection in detail with suitable example encountering a 8M

stack overflow.
b) Explain major design phases. 6M

2. a) Distinguish between Skewness and Kurtosis. 8M

b) With suitable examples, explain the geometric analysis of translational 6M
accuracy.

3. a) Differentiate between interchangeable assembly and selective assembly, with 8M

examples.
b) What is group technology? List out the advantages of group technology. 6M

4. a) Explain position and shape tolerance in brief. 8M

b) Discuss about different datum systems. 6M

5. a) What are general design considerations for casting process with respect to 8M
economic moulding, solidification, fettling and cleaning?
b) Discuss the general design guidelines for drilling. 6M

6. a) Explain the special machining considerations for production machining 8M

systems and hole making operation.
b) Discuss the economic and product design considerations in machining. 6M

7. a) Differentiate between co-ordinate and convention method of feature 8M

location.
b) Explain true position tolerance with an example. 6M

8. a) Explain the various processes of manufacturing gauges. 8M

b) Explain the common materials used for gauges. 6M