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A 2.45-Ghz Near-Field Rfid System With Passive On-Chip Antenna Tags

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A 2.45-Ghz Near-Field Rfid System With Passive On-Chip Antenna Tags

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IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 56, NO.

6, JUNE 2008 1397

A 2.45-GHz Near-Field RFID System


With Passive On-Chip Antenna Tags
Xuesong Chen, Wooi Gan Yeoh, Member, IEEE, Yeung Bun Choi, Hongyu Li, and Rajinder Singh, Member, IEEE

Abstract—The design of a 2.45-GHz near-field RF identifica- The big challenge for OCA design is to improve power cap-
tion (RFID) system with passive on-chip antenna (OCA) tags turing efficiency to have enough power to drive the tag chip. As
is very challenging as the efficiency of RF power conversion is we know, the antenna’s size is proportional to its operating wave
very low. It poses multidisciplinary research challenges such
as ultra-low-power circuits design, semiconductor process tech- length for achieving same efficiency. Therefore, a potential so-
nology, and integrated antenna design. This paper describes the lution to improve the antenna performance with reduced size is
designs of such an RFID system, the reader, and OCAs, as well as to design the system to operate at a higher frequency. In this
the passive tag integrated circuits in detail. The passive tag chip study, we chose the system to work at a 2.45-GHz frequency
with 128-bit nonvolatile memory has been realized using CMOS band. By thoroughly studying the system work principle, we
0.13- m technology. The OCA is fabricated on top of the chip
using post-processing technology. The complete RFID tag with optimized the reader antenna design, tag antenna design, and
an integrated OCA is smaller than 0.5-mm2 with a thickness of post-processing technology for tag antenna fabrication to im-
0.1 mm. With the reader generating an output power of 0.5 W, the prove power capturing efficiency. With innovative low-power
RFID system is able to perform with RF read/write functions at a tag chip design, we successfully demonstrated a 2.45-GHz near-
distance of 0.5 mm. field RFID system with read/write functions of passive OCA
Index Terms—Backscatter, CMOS, near field, nonvolatile tags.
memory, on-chip antenna (OCA), rectifier, RF identification There have been several reports on OCA RFID technology
(RFID).
[1]–[3]. At 13.56-MHz frequency, Abrial et al. [1] reported
an OCA was fabricated on a contactless smart card chip with
I. INTRODUCTION an area of 4 4 mm using 0.25- m CMOS technology, and
Hitachi–Maxell [2] reported an OCA designed on a chip area of
2.5 2.5 mm . Usami [3] also unveiled Hitachi’s -chip with

R F identification (RFID) technology has a history of


few decades. Near-field RFID applications operating
at low-frequency (LF) (30 300 kHz) and high-frequency
OCA (2.45 GHz) realized on an area of 0.4 0.4 mm using
a gold-plating method. There is very little description of OCA
technology in published reports, especially from the system
(HF) (3 30 MHz) bands have been deployed in the market point-of-view. We have announced our success on RFID OCA
for many commercial applications since 1990s. LF and HF technology at conferences [4], [5]. However, this paper gives a
RFID systems still dominate the market as the technology has complete description of RFID OCA technology from the gen-
matured over the time. However, the system cost limits further eral work principle and system design to the main challenges
widespread adoption of RFID technology in the commercial distinguished from RFID with off-chip antennas. Section II
market. A close look at the conventional RFID system reveals introduces the basic working principle and the near-field RFID
that the cost of tag antennas and substrates are the major system design, followed by Section III, which describes the
contributors to the cost of a tag. For an LF or HF tag, the tag designs of the reader antenna and tag OCA. Section IV will
chip is smaller in size, but the antenna is much bigger and de- then present the design of an ultra-low-power tag chip. Mea-
termines the overall tag size. In this study, we report the design surement results and conclusions are shown in Sections V and
of a tag with an on-chip antenna (OCA), which significantly VI, respectively.
reduces the size and cost of the tag simultaneously. In addition,
the OCA technique can be a promising and the best choice II. WORKING PRINCIPLE AND GENERAL SYSTEM DESIGN
for some niche applications such as currency authentication,
pharmaceutical labeling, document tagging, etc., which require Basically there are three types of RFID systems, mainly
a high level of miniaturization. differentiated according to operating frequency and range: the
close coupling system, remote coupling system, and long-range
Manuscript received May 23, 2007; revised February 5, 2008.
system (also called the backscatter system) [6]. A 2.45-GHz
X. Chen, W. G. Yeoh, Y. B. Choi, and H. Li are with the Institute of Micro- RFID system is usually known as backscatter systems due to
electronics, A*STAR, Singapore 117865 (e-mail: [email protected]; the physical operating principle of using electromagnetic (EM)
[email protected]; [email protected]; [email protected].
sg).
waves in the far field. However, for passive OCA RFID tags,
R. Singh was with the Institute of Microelectronics, A*STAR, Singapore the antenna is very small and the efficiency of converting RF
117865. He is now with Auxineon, Singapore 368324 (e-mail: rajinder@auxi- to dc power is very low. It is then not practical to achieve
neon.com). long distance (far field) given limited output power of the
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org. reader. Therefore, such an RFID system should be based on
Digital Object Identifier 10.1109/TMTT.2008.921746 the near-field system using a close coupling method such as a
0018-9480/$25.00 © 2008 IEEE

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1398 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 56, NO. 6, JUNE 2008

where is the carrier frequency at 2.45 GHz, is the coupling


coefficient, is the inductance of the reader antenna, is the
inductance of the tag antenna, and is the current flowing to the
reader antenna. From (1), it is found that and are the two
parameters that define the reader antenna’s efficiency of cou-
pling power to the OCA tag. Since the OCA is very small, it is
assumed that the OCA is much smaller than the reader antenna.
From [6], can be expressed as
Fig. 1. 2.45-GHz RFID close coupling system block diagram.
(2)

where is the distance to the reader antenna, is the radii of


the OCA coil, and is the radii of reader antenna coil. A
round coil’s inductance can be expressed as

Fig. 2. Schematic diagram of the equivalent circuit of the voltage coupling (3)
from the reader antenna to the tag antenna.

where is the number of windings, is the magnetic field


contactless smart card. Fig. 1 shows the general system block constant, is the radius of the round coil loop, and is the
diagram of the said method. distance to the coil loop. To simplify the analysis, let be equal
The working principle is very similar to LF and HF RFID sys- to 0 (in the center of the coil loop), it is then found that
tems. However, at 2.45 GHz, the load matching is more critical
than tuning to resonant frequency. To achieve a better isolation (4)
between the transmitter and the receiver, a circulator or bi-di-
rectional coupler is used to share one input port to an antenna, This formula tells that the converted voltage at the OCA tag
which again makes the analysis different from inductive RFID would be higher if the reader antenna’s coil is made smaller.
systems operating at LF and HF. Another parameter that is critical for the reader antenna de-
The reader transceiver employs a direct conversion architec- sign is the input impedance . The input impedance affects
ture, which converts the strong leakage signal from the trans- the system from two aspects: one is on the matching with the
mitter to dc and filters out with ac coupling. Built with discrete reader’s front-end to conduct maximum current to the coil an-
components, the impedance of both the transmitter’s output and tenna, and the other one is to make the reader more sensitive
the receiver’s input are 50 . The reader is designed to transmit to the tag’s response. The first aspect is governed by the max-
at 0.5 W, a power level that is sufficient to communicate with the imum power transfer theory, while the second aspect is derived
OCA tags according to our system design. At the receiver side, from the data communication principle between the reader and
down-converted signals are converted to digital signals with a the tag, which is illuminated below.
comparator, which are subsequently processed by a microcon- The OCA tag transmits data to the reader by modulating
troller. The proprietary protocol adopted in this system incor- the load, which alternates the tag’s load impedance between
porates bi-directional commands with data read/write functions, data “1” and “0.” When there is no data transmission (assume
and an anticollision algorithm for multiple tags up to 16. Since it “0”), both the reader’s antenna and the OCA are designed to be
is a cross-coupling system, both of the reader antenna and the tag matching well. From the feed point of the reader antenna, the
OCA should be an inductive coupling type. The detailed design reflection coefficient is
of the reader antenna and the OCA are described in Section III.
(5)
III. READER AND TAG ANTENNA DESIGN
where is the characteristic impedance, which is usually 50 .
A. Reader Antenna Design When the tag’s load impedance changes (data transmission “1”),
The reader antenna has to be co-designed with the tag an- it is reflected to the reader antenna as a transformed impedance
tenna, as they are working in a close coupling mode. The main change of . The reflection coefficient is now changed to
concern in the design is to improve the coupling coefficient to
transfer more power to the tag. Fig. 2 shows the equivalent cir- (6)
cuits of the voltage generation from the reader antenna to the
tag antenna. Since the size of the tag OCA is much smaller than that of the
The generated voltage at the tag antenna can be expressed as reader antenna, the coupling coefficient is very small, as can
be seen in (2), and since is proportional to the coefficient
(1) , it is, therefore, very small compared to the input impedance

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CHEN et al.: 2.45-GHz NEAR-FIELD RFID SYSTEM WITH PASSIVE OCA TAGS 1399

Fig. 3. Reader antenna structure including the coil shape on the front side and
the feed network on the back side.

. When it is matched well, is nearly equal to , and (6)


Fig. 4. Cross-sectional view of the RFID tag with OCA.
can be further approximated as

(7)
The equivalent circuit of the tag antenna to the chip is de-
scribed in Fig. 2. is the coil inductance of the tag antenna,
The term in the parentheses of (7) is the amplification of
is the conductive resistance of the coil, is the parasitic
to , which varies the amplitude of the reflected RF carrier
capacitance of the coil antenna, is the generated voltage by
between data “1” and “0” to generate ASK signals. The sig-
magnetic coupling from reader antenna , and is the equiv-
nals become stronger only when is very close to since
alent input impedance of the tag’s chip circuit. is given in (1).
is very small. Hence, the signals have to be larger than the
The voltage available to the chip circuit is deduced as
reader receiver’s sensitivity. This explains why the system re-
quires very good matching for the reader antenna. As verified in
(8)
our testing, the reader starts to read the OCA tag’s data properly
when the reader antenna is fine tuned to a good matching con-
dition with its measured to be less than 20 dB. This ob-
servation, on the other hand, proves that the system is working
through an inductive close coupling mode and not a far-field In practice, consists of a real part of and an imaginary
backscattering mode. part of . Let and replace in (8), the
A magnetic type of coil antenna based on an FR4 substrate magnitude of can be calculated as
is used for the reader antenna design. Taking into account the
precision of manufacturing and practical testing, the antennas
are designed with a strong magnetic field area of approximately
10 20 mm . A few antennas are designed with different
matching circuits and number of turns. Fig. 3 shows one antenna (9)
design with a square spiral shape and microstrip transmission By including the input impedance of the tag chip into (9), it
line matching. The front side is a three-turn coil with dimensions is found that, in simulation, the maximum voltage is generated
of 15 mm 12 mm. The feed network is a microstrip line at the to the chip only when and resonate at the operating fre-
back side, and is connected to the coil with a plated through quency.
hole. The reader antenna is designed to operate at 2.45 GHz From the above analysis, it indicates that the main concern
with a reflection coefficient of 25 dB and bandwidth of 1%. of the tag antenna design includes two parameters: and .
3-D EM simulation shows that the magnetic field is strong be- With the limited chip area, one effort is to make higher. The
side the coil lines, and degrades fast along the direction perpen- main challenge in the OCA design is to make the equivalent cir-
dicular the plane. The simulation results are in consistent with cuit to resonate at the operating frequency since matching with
the tested results. any passive components is not possible in the small area. It is
achieved by adjusting the parasitic capacitance , which de-
B. Tag OCA Design pends on the geometry of the antenna pattern, the dielectric con-
The tag antenna is implemented on post-processing layers stant, thickness of the substrate layer, and the shielding layer
on top of the chip, which is constrained mainly by area and pattern below the antenna layer. The geometry of the antenna
process technology. From (1)–(3), it discloses that the voltage also comprises the length of the coil, number of turns, trace
coupling efficiency is higher with larger tag antenna size. width, gap between the two adjacent traces, etc. The parasitic
Hence, the tag antenna is designed to occupy maximum area capacitance can be calculated with 3-D EM simulation software
possible within the chip’s dimension, which is slightly smaller and accomplish desired matching by changing the OCA geo-
than 1 0.5 mm . In addition, the tag antenna design is also metric patterns.
constrained by the electrical properties of the materials such Fig. 4 shows the cross-sectional view of the tag. On top of
as dielectric constant and sheet resistance, as well as physical the fabricated tag chip, a redistribution layer (AL) is deposited
design rules imposed. Next, we discuss the general tag antenna and patterned, which serves both as relocating the contact po-
design method before introducing the post-processing tech- sition for the OCA and to shield the interference from the un-
nology. derlying circuits. The antenna is fabricated on a thick undoped

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1400 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 56, NO. 6, JUNE 2008

Fig. 5. Variation of OCA quality factor with USG thickness.

Fig. 7. Cross-sectional view of deep via after Cu filling.

Fig. 6. Top view of the etched deep via (15 m) before Cu filling.
Fig. 8. One OCA designed with five turns on top of the chip.

silicon–glass (USG) layer (5 m), and connected with the un-


derlying circuits through vias etched in the USG layer [7].
The reason for choosing a thick USG layer is to achieve a
higher -factor coil antenna in the limited area. Fig. 5 shows
the simulated OCA factor versus the USG layer thickness.
However, there are two challenges to making a thick USG layer.
The first challenge is to avoid severe wafer warp with the thick
USG layer since the warp makes the post process impossible.
The second challenge is deep via etch through the thick USG
layer connecting the underlying chip and the top OCA. The
problem is that a tradeoff exists between requirements of main-
taining selectivity to a mask and avoiding formation of excessive Fig. 9. Architecture of the RFID OCA tag.
polymer on the bottom of vias, resulting in etch stop. A special
etching scheme with multiple steps is designed by dynamically
adjusting oxide/mask selectivity (from higher to lower in the
IV. LOW POWER TAG CHIP DESIGN
etching). Cu/USG single damascene technology is employed in
the fabrication. Figs. 6 and 7 describe the dimensions of the via Low power tag chip design is a big advantage for passive
at the top and bottom and the cross section of the completed via, RFID tags to achieve longer read/write range, which is more
respectively. critical for OCA tags since its coupling efficiency is very low
The Cu thickness of the OCA’s coil is another parameter that with an ultra small antenna size. In addition, it is a prerequisite
affects the OCA’s factor. The final OCA is optimally tuned to make the entire system work with an appropriate transmitting
to the input impedance of the tag chip at 2.45 GHz with 3- m power not exceeding local government’s regulation.
Cu thickness and 15- m USG layer. Reference [4] gives more Fig. 9 shows the basic block diagram of the microchip archi-
details on the OCA design and manufacturing. As mentioned be- tected to house full features of high-end RFID functions similar
fore, the bigger OCA generates higher coupling voltage. There- to it off-chip counterpart [8], which can partitioned into radio
fore, the OCA is occupying the allowed maximum area of the front-end, digital application-specific integrated circuit (ASIC),
chip. Fig. 8 presents one of the OCA designs. and analog subsystems. The radio front-end is responsible for

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CHEN et al.: 2.45-GHz NEAR-FIELD RFID SYSTEM WITH PASSIVE OCA TAGS 1401

TABLE I
POWER CONSUMPTION IN SUB-BLOCKS

power regeneration and establishing bi-directional communica- Fig. 10. Tag chip’s radio front-end schematic including rectifier, modulator,
tion with the reader. A digital state-machine is embedded for and demodulator.
handling communication protocol, anticollision, data integrity
check, and memory read/write control. The analog portion com-
plements the system by providing power-on-reset, current ref-
erence, and system clock. Without compromising its perfor-
mance, the dc power consumption of the microchip has been
minimized through: 1) prudent power management to prioritize
circuit activities by spreading power exhaustive events in time,
e.g., memory writing is delayed until there is no communica-
tion taking place; 2) operating analog circuits in subthreshold
mode with 0.13- m CMOS process technology; and 3) adopting
a low operating voltage (down to 0.6 V) by restricting logic gates
to less than three inputs with minimum transistor stacking. Re-
quirement of higher voltage ( 8 V) for memory operations is
accommodated by having a step-up dc/dc converter along with
a logic translator. Table I gives the power consumption of indi-
Fig. 11. Microphotograph of the RFID tag with OCA fabricated on top of the
vidual blocks of the tag chip. chip.
Fig. 10 shows the complete radio front-end for interfacing
with the OCA. It consists of a capacitive load modulator
for transmitting, an on–off-keying (OOK) demodulator for V. MEASUREMENT RESULTS
receiving and a rectifier for power regeneration. Concern of
excessive RF loading at the antenna port was addressed by Fig. 11 shows a micrograph of the RFID tag. Visibility of the
carefully sizing the modulator/demodulator. Junction capaci- underneath microchip is blocked due to the presence of the re-
tance is further minimized by sharing M1 among the rectifier distribution metal layer. The final RFID tag is a self-contained
and the demodulator. The rectifier is formed by a voltage system without any external connection pins. Therefore, it is es-
doubler consisting of diode-connected MOS devices M1 and sential to have a special test structure mimicking the microchip’s
M2. Dominating the input impedance of the microchip, M1 electrical performance during the course of the development
and M2 were strategically sized to trade off ON-resistive loss process.
versus transistor parasitic capacitance, thus allowing optimal
OCA-rectifier tuning. At steady state, the generated dc voltage A. OCA Impedance
is approximately equal to the input RF peak-to-peak voltage The impedance of the OCA is characterized through on-wafer
minus the voltage drop across M1 and M2. A MOS transistor one-port -parameter measurement. Two OCA samples are
with low threshold voltage VTH was employed to reduce fabricated on different silicon wafers: actual chip-wafer and
the drop. Leverage on 0.13- m CMOS technology, the RF dummy wafer. The dummy wafer is a control substrate with an
driving requirement has been greatly relaxed by operating identical OCA structure, but with the underneath tag circuits
the digital circuits down to 0.6 V. With all these strategies removed to simplify the full-wave antenna simulation. Fig. 12
in place, it is only now possible for the OCA rectifier to illustrates a good consistency of the OCA’s input impedance
acquire sufficient power for activating such a microchip with experimentally obtained on both sets of wafers versus simula-
high-end features. tion results. It can be safely assumed that interference from the

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1402 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 56, NO. 6, JUNE 2008

Fig. 14. Measured OCA-rectifier performance.

Fig. 12. S 11 (frequency = 1 GHz  3 GHz) of OCA plotted on a 200-

Smith chart.

Fig. 15. Measured spectrum of the tag chip with load modulation at 100 kHz.

Fig. 13. Measurement setup to characterize the OCA rectifier.


by a 2.45-GHz source until the rectified dc voltage reaches
the minimum operating voltage (0.6 V), as required by the
underneath tag circuits is effectively shielded with the insertion microchip. For modulator measurements, a circulator is inter-
of a redistribution layer (Al). posed between the signal source and the test chip to capture
the signal reflection due to capacitive load modulation. Fig. 15
B. OCA-Rectifier Characterization shows the measured load modulation spectrum in response to a
50-kHz square wave signal (emulating a string of 1’s or 0’s in
The challenge of the OCA-rectifier characterization is to mea-
Manchester code format running at 100 kb/s) as the TX_DATA.
sure the generated dc voltage without disturbing the excitation
The main lobe at 2.45 GHz represents leakage from the incident
magnetic field. Fig. 13 shows the measurement setup. A ded-
continuous wave (CW) source plus residual reflection at the
icated test chip consisting of the rectifier and the OCA is de-
circuit/circulator interface. The two backscattering sidebands
signed. The rectifier output is wire bonded to a printed circuit
are at 12 dB below the carrier, which allows sufficient margin
board (PCB) board, and extended to a far-end measurement port
for the reader to detect the return signal in close proximity.
through two 25-cm printed metal traces. The 3.8-k resistor em-
Fig. 16 shows various demodulator waveforms when the circuit
ulates the worst case dc consumption of the microchip. Fig. 14
is being excited by the OOK modulated RF signal. The rectified
shows the measured rectified dc voltage versus the available RF
voltage drops when the RF power is OFF, as shown in
power driving the reader antenna at 2.45 GHz. With 24-dBm
the figure. To minimize ripples, the OOK with 75% duty
input drive, 94.7 W of dc power is generated and the rectified
ratio is adopted in the current design to reduce the RF down
dc voltage exceeds the minimum requirement of 0.6 V.
time. Occurrence of consecutive binary “1” or “0” is avoided
by Manchester encoding scheme, which ensures a high-to-low
C. Radio Front-End Characterization
(representing “1”) or low-to-high (representing “0”) transition
Modulation and demodulation are characterized with ded- for each data bit. With the 0.5-nF on-chip MOS capacitor (
icated radio front-end test chip pre-matched to 50 for shown in Fig. 1) ripple subjected to 100-kb/s Manchester
conductive measurement. The radio front-end is energized encoded bit stream is suppressed to less than 10 mV.

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CHEN et al.: 2.45-GHz NEAR-FIELD RFID SYSTEM WITH PASSIVE OCA TAGS 1403

[4] W. G. Yeoh et al., “A 2.45-GHz RFID tag with on-chip antenna,” in


IEEE RFIC Symp. Dig., Jun. 2006, pp. 253–256.
[5] L. H. Guo et al., “Design and manufacturing of small area on-chip-
antenna (OCA) for RFID tags,” in IEEE ESSDERC, Sep. 2006, pp.
198–201.
[6] K. Finkenzeller, RFID Handbook: Fundamentals and Applications
in Contactless Smart Cards and Identification, 2nd ed. New York:
Wiley, 2003.
2
[7] L. H. Guo et al., “A small OCA on a 1 0.5 mm 2.45-GHz RFID tag
– Design and integration based on a CMOS-compatible manufacturing
technology,” IEEE Electron Device Lett., vol. 27, no. 2, pp. 96–98, Feb.
2006.
[8] W. G. Yeoh et al., “A CMOS 2.45-GHz radio frequency identification
tag IC with read/write memory,” in IEEE RFIC Symp. Dig., Jun. 2005,
pp. 365–368.
Fig. 16. Measured demodulator output waveforms.

D. System Function Test


Xuesong Chen was born in Hubei, China, in 1976.
The system function test was conducted with the system ele- He received the B.E. degree in electronic information
ments integrated together. The OCA tags were kept right above engineering from the University of Science of Tech-
the reader antenna at a short distance. With 0.5-W RF power nology of China, Hefei, China, in 1999, and the M.S.
degree in computer science from the National Uni-
delivered from the reader transmitter to the reader antenna, the versity of Singapore, Singapore, in 2002.
reader was able to read out the OCA tag’s data repeatedly and From 1999 to 2001, he was with the Institute for In-
consistently at a maximum read distance of 0.5 mm. Full func- focomm Research, where he was involved with 3-D
medical imaging modeling. From 2001 to 2004, he
tionality of the RFID tag including automatic anticollision was was with Singapore Technologies Electronics, where
verified through extensive over-the-air testing. he was involved with satellite and microwave trans-
ceivers design. In 2005, he joined the Institute of Microelectronics, A*STAR,
Singapore, where he is an RF Integrated Circuit (RFIC) Engineer, mainly in-
VI. CONCLUSION volved with CMOS transceiver architecture and circuit design.

Integration of an OCA for a CMOS-only RFID tag at


2.45 GHz has been demonstrated. Powered exclusively by a
0.5-mm OCA, the RFID tag requires zero external component Wooi Gan Yeoh (M’02) received the B.Eng. degree
(with honors) in electrical and electronic engineering
counts to form a complete system-on-chip solution offering from Nanyang Technological University, Singapore,
100-kb/s bi-directional communication with RF read/write in 1996, and the M.Eng. degree in electrical engi-
capabilities. neering from the National University of Singapore,
Singapore, in 2001.
It is verified that the OCA of the RFID tag should be designed Since 1996, he has been with the Institute of Mi-
in a magnetic coupling model in a near-field RFID system. A croelectronics, A*STAR, Singapore, where he was
0.5-mm OCA is able to couple enough power from a reader for involved with digital integrated circuit (IC) automatic
test equipment (ATE) testing, on-wafer dc parametric
the tag to work in full functions. The reader antenna designed testing, and analog IC design. He has also been in-
on an FR4 PCB is a very low-cost type, other types of reader volved with the process development and 2.5-GHz RFIC design using RF mul-
antennas can be designed to further improve the coupling effi- tichip module (RF-MCM) and GaAs technology. He then began to focus on de-
veloping various RF and HF analog circuits for wireless communications such
ciency. More applications could be explored to employ RFID as wireless code division multiple access (WCDMA) RF/IF and cordless phones
OCA technology. using the CMOS process. He was also involved in the development of low-power
low-voltage passive RFID tag ICs for UHF and 2.45-GHz operations. He cur-
rently manages a group of over 50 IC designers involved with various HF ICs
ACKNOWLEDGMENT such as ultra-wideband transceivers, RFID reader and tag ICs, low-power RF
transceivers for wireless sensors, optical communication ICs, and microelec-
The authors thank W. L. Lien, S. J. Wong, Y. Z. Xiong, tromechanical systems (MEMS) ASICs, as well as RF and noise modeling. He
has authored or coauthored over 25 publications. He holds five patents with two
L. H. Guo, A. Popov, and colleagues from the Institute of Mi- pending.
croelectronics, A*STAR, Signapore, for their contributions and Mr. Yeoh served as the chairman of the IEEE Solid-State Circuits Society,
assistance in this study. The authors also wish to thank K. S. Tan Singapore Chapter, from 2006 to 2007.
and D. L. Kwong, both with the Institute of Microelectronics,
A*STAR, for their extensive discussions and guidance.
Yeung Bun Choi received the B.Eng. and M.Phil.
degrees from the Chinese University of Hong Kong,
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[1] A. Abrial et al., “A new contactless smart card IC using an on-chip an- tively.
tenna and an asynchronous microcontroller,” IEEE J. Solid-State Cir- Since 2001, he has been with the Institute of Mi-
cuits, vol. 36, no. 7, pp. 1101–1107, Jul. 2001. croelectronics, A*STAR, Singapore, where he has
[2] “Coil-on-chip RFID tag,” Maxell, Fairlawn, NJ, 2004. [Online]. Avail- been engaged in RF/analog IC design for low-power
able: http://www.maxell-usa.com/index.aspx?id=4;41;432;0 communication devices.
[3] M. Usami, “An ultra small RFID chip: -chip,” in IEEE RFIC Symp.
Dig., Jun. 2004, pp. 241–244.

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1404 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 56, NO. 6, JUNE 2008

Hongyu Li received the Ph.D. degree (with a major 1995, during which time he was involved with standard analog cell designs,
in semiconductor physics and devices) from the delta–sigma convertors, and nonquasi-static modeling of MOSFETs. From
Changchun Institute of Physics, Chinese Academy 1995 to 2007, he was with the Institute of Microelectronics (IME), A*STAR,
of Science, Beijing, China, in 1999. Singapore where he was initially involved with GaAs-based RFIC designs, and
From October 2000 to October 2002, she was a in 1998, was entrusted with the management of the IC Design Group. The group
Yield Improvement Engineer with Chartered Silicon soon pioneered CMOS RFIC designs in Singapore, beginning with CMOS
Partner Pte Ltd. She is currently with the Institute of Bluetooth delivered in 2001, and followed by WCDMA blocks, 2.4-GHz
Microelectronics, A*STAR, Singapore, where she is RFID tags, and UHF RFID reader and ultra-wideband (UWB) designs, etc.,
involved with the integration and reliability improve- in subsequent years. In 2005, he also began building ultra low-power design
ment for Cu/low K interconnects and RF passive de- capability for bioelectronic and sensor interface applications at IME. From
vices. She has authored or coauthored 35 research pa- 1993 to 1995, he was seconded to BaseComm and FTD Tech as its CTO. He
pers. is currently Chief Strategic Operations Officer with Auxineon, Singapore. He
has coauthored approximately 20 publications. He holds five filed/issued U.S.
patents.

Rajinder Singh (M’97) received the M.Sc. degree


from the University of Delhi, Delhi, India, in 1978,
and the M.Tech. and Ph.D. degrees from the Indian
Institute of Technology (IIT), Delhi, India, in 1980
and 1989, respectively.
From 1981 to 1990, he was with IIT, where he
was involved with charge transfer devices, analog
designs, ratio-accurate capacitors, and field-effect
transistors (FETs). Following a short period of
teaching, in 1991 he joined ST Microelectronics
in both Grenoble, France, and Delhi, India, until

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