A 2.45-Ghz Near-Field Rfid System With Passive On-Chip Antenna Tags
A 2.45-Ghz Near-Field Rfid System With Passive On-Chip Antenna Tags
Abstract—The design of a 2.45-GHz near-field RF identifica- The big challenge for OCA design is to improve power cap-
tion (RFID) system with passive on-chip antenna (OCA) tags turing efficiency to have enough power to drive the tag chip. As
is very challenging as the efficiency of RF power conversion is we know, the antenna’s size is proportional to its operating wave
very low. It poses multidisciplinary research challenges such
as ultra-low-power circuits design, semiconductor process tech- length for achieving same efficiency. Therefore, a potential so-
nology, and integrated antenna design. This paper describes the lution to improve the antenna performance with reduced size is
designs of such an RFID system, the reader, and OCAs, as well as to design the system to operate at a higher frequency. In this
the passive tag integrated circuits in detail. The passive tag chip study, we chose the system to work at a 2.45-GHz frequency
with 128-bit nonvolatile memory has been realized using CMOS band. By thoroughly studying the system work principle, we
0.13- m technology. The OCA is fabricated on top of the chip
using post-processing technology. The complete RFID tag with optimized the reader antenna design, tag antenna design, and
an integrated OCA is smaller than 0.5-mm2 with a thickness of post-processing technology for tag antenna fabrication to im-
0.1 mm. With the reader generating an output power of 0.5 W, the prove power capturing efficiency. With innovative low-power
RFID system is able to perform with RF read/write functions at a tag chip design, we successfully demonstrated a 2.45-GHz near-
distance of 0.5 mm. field RFID system with read/write functions of passive OCA
Index Terms—Backscatter, CMOS, near field, nonvolatile tags.
memory, on-chip antenna (OCA), rectifier, RF identification There have been several reports on OCA RFID technology
(RFID).
[1]–[3]. At 13.56-MHz frequency, Abrial et al. [1] reported
an OCA was fabricated on a contactless smart card chip with
I. INTRODUCTION an area of 4 4 mm using 0.25- m CMOS technology, and
Hitachi–Maxell [2] reported an OCA designed on a chip area of
2.5 2.5 mm . Usami [3] also unveiled Hitachi’s -chip with
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1398 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 56, NO. 6, JUNE 2008
Fig. 2. Schematic diagram of the equivalent circuit of the voltage coupling (3)
from the reader antenna to the tag antenna.
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CHEN et al.: 2.45-GHz NEAR-FIELD RFID SYSTEM WITH PASSIVE OCA TAGS 1399
Fig. 3. Reader antenna structure including the coil shape on the front side and
the feed network on the back side.
(7)
The equivalent circuit of the tag antenna to the chip is de-
scribed in Fig. 2. is the coil inductance of the tag antenna,
The term in the parentheses of (7) is the amplification of
is the conductive resistance of the coil, is the parasitic
to , which varies the amplitude of the reflected RF carrier
capacitance of the coil antenna, is the generated voltage by
between data “1” and “0” to generate ASK signals. The sig-
magnetic coupling from reader antenna , and is the equiv-
nals become stronger only when is very close to since
alent input impedance of the tag’s chip circuit. is given in (1).
is very small. Hence, the signals have to be larger than the
The voltage available to the chip circuit is deduced as
reader receiver’s sensitivity. This explains why the system re-
quires very good matching for the reader antenna. As verified in
(8)
our testing, the reader starts to read the OCA tag’s data properly
when the reader antenna is fine tuned to a good matching con-
dition with its measured to be less than 20 dB. This ob-
servation, on the other hand, proves that the system is working
through an inductive close coupling mode and not a far-field In practice, consists of a real part of and an imaginary
backscattering mode. part of . Let and replace in (8), the
A magnetic type of coil antenna based on an FR4 substrate magnitude of can be calculated as
is used for the reader antenna design. Taking into account the
precision of manufacturing and practical testing, the antennas
are designed with a strong magnetic field area of approximately
10 20 mm . A few antennas are designed with different
matching circuits and number of turns. Fig. 3 shows one antenna (9)
design with a square spiral shape and microstrip transmission By including the input impedance of the tag chip into (9), it
line matching. The front side is a three-turn coil with dimensions is found that, in simulation, the maximum voltage is generated
of 15 mm 12 mm. The feed network is a microstrip line at the to the chip only when and resonate at the operating fre-
back side, and is connected to the coil with a plated through quency.
hole. The reader antenna is designed to operate at 2.45 GHz From the above analysis, it indicates that the main concern
with a reflection coefficient of 25 dB and bandwidth of 1%. of the tag antenna design includes two parameters: and .
3-D EM simulation shows that the magnetic field is strong be- With the limited chip area, one effort is to make higher. The
side the coil lines, and degrades fast along the direction perpen- main challenge in the OCA design is to make the equivalent cir-
dicular the plane. The simulation results are in consistent with cuit to resonate at the operating frequency since matching with
the tested results. any passive components is not possible in the small area. It is
achieved by adjusting the parasitic capacitance , which de-
B. Tag OCA Design pends on the geometry of the antenna pattern, the dielectric con-
The tag antenna is implemented on post-processing layers stant, thickness of the substrate layer, and the shielding layer
on top of the chip, which is constrained mainly by area and pattern below the antenna layer. The geometry of the antenna
process technology. From (1)–(3), it discloses that the voltage also comprises the length of the coil, number of turns, trace
coupling efficiency is higher with larger tag antenna size. width, gap between the two adjacent traces, etc. The parasitic
Hence, the tag antenna is designed to occupy maximum area capacitance can be calculated with 3-D EM simulation software
possible within the chip’s dimension, which is slightly smaller and accomplish desired matching by changing the OCA geo-
than 1 0.5 mm . In addition, the tag antenna design is also metric patterns.
constrained by the electrical properties of the materials such Fig. 4 shows the cross-sectional view of the tag. On top of
as dielectric constant and sheet resistance, as well as physical the fabricated tag chip, a redistribution layer (AL) is deposited
design rules imposed. Next, we discuss the general tag antenna and patterned, which serves both as relocating the contact po-
design method before introducing the post-processing tech- sition for the OCA and to shield the interference from the un-
nology. derlying circuits. The antenna is fabricated on a thick undoped
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1400 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 56, NO. 6, JUNE 2008
Fig. 6. Top view of the etched deep via (15 m) before Cu filling.
Fig. 8. One OCA designed with five turns on top of the chip.
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CHEN et al.: 2.45-GHz NEAR-FIELD RFID SYSTEM WITH PASSIVE OCA TAGS 1401
TABLE I
POWER CONSUMPTION IN SUB-BLOCKS
power regeneration and establishing bi-directional communica- Fig. 10. Tag chip’s radio front-end schematic including rectifier, modulator,
tion with the reader. A digital state-machine is embedded for and demodulator.
handling communication protocol, anticollision, data integrity
check, and memory read/write control. The analog portion com-
plements the system by providing power-on-reset, current ref-
erence, and system clock. Without compromising its perfor-
mance, the dc power consumption of the microchip has been
minimized through: 1) prudent power management to prioritize
circuit activities by spreading power exhaustive events in time,
e.g., memory writing is delayed until there is no communica-
tion taking place; 2) operating analog circuits in subthreshold
mode with 0.13- m CMOS process technology; and 3) adopting
a low operating voltage (down to 0.6 V) by restricting logic gates
to less than three inputs with minimum transistor stacking. Re-
quirement of higher voltage ( 8 V) for memory operations is
accommodated by having a step-up dc/dc converter along with
a logic translator. Table I gives the power consumption of indi-
Fig. 11. Microphotograph of the RFID tag with OCA fabricated on top of the
vidual blocks of the tag chip. chip.
Fig. 10 shows the complete radio front-end for interfacing
with the OCA. It consists of a capacitive load modulator
for transmitting, an on–off-keying (OOK) demodulator for V. MEASUREMENT RESULTS
receiving and a rectifier for power regeneration. Concern of
excessive RF loading at the antenna port was addressed by Fig. 11 shows a micrograph of the RFID tag. Visibility of the
carefully sizing the modulator/demodulator. Junction capaci- underneath microchip is blocked due to the presence of the re-
tance is further minimized by sharing M1 among the rectifier distribution metal layer. The final RFID tag is a self-contained
and the demodulator. The rectifier is formed by a voltage system without any external connection pins. Therefore, it is es-
doubler consisting of diode-connected MOS devices M1 and sential to have a special test structure mimicking the microchip’s
M2. Dominating the input impedance of the microchip, M1 electrical performance during the course of the development
and M2 were strategically sized to trade off ON-resistive loss process.
versus transistor parasitic capacitance, thus allowing optimal
OCA-rectifier tuning. At steady state, the generated dc voltage A. OCA Impedance
is approximately equal to the input RF peak-to-peak voltage The impedance of the OCA is characterized through on-wafer
minus the voltage drop across M1 and M2. A MOS transistor one-port -parameter measurement. Two OCA samples are
with low threshold voltage VTH was employed to reduce fabricated on different silicon wafers: actual chip-wafer and
the drop. Leverage on 0.13- m CMOS technology, the RF dummy wafer. The dummy wafer is a control substrate with an
driving requirement has been greatly relaxed by operating identical OCA structure, but with the underneath tag circuits
the digital circuits down to 0.6 V. With all these strategies removed to simplify the full-wave antenna simulation. Fig. 12
in place, it is only now possible for the OCA rectifier to illustrates a good consistency of the OCA’s input impedance
acquire sufficient power for activating such a microchip with experimentally obtained on both sets of wafers versus simula-
high-end features. tion results. It can be safely assumed that interference from the
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1402 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 56, NO. 6, JUNE 2008
Smith chart.
Fig. 15. Measured spectrum of the tag chip with load modulation at 100 kHz.
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1404 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 56, NO. 6, JUNE 2008
Hongyu Li received the Ph.D. degree (with a major 1995, during which time he was involved with standard analog cell designs,
in semiconductor physics and devices) from the delta–sigma convertors, and nonquasi-static modeling of MOSFETs. From
Changchun Institute of Physics, Chinese Academy 1995 to 2007, he was with the Institute of Microelectronics (IME), A*STAR,
of Science, Beijing, China, in 1999. Singapore where he was initially involved with GaAs-based RFIC designs, and
From October 2000 to October 2002, she was a in 1998, was entrusted with the management of the IC Design Group. The group
Yield Improvement Engineer with Chartered Silicon soon pioneered CMOS RFIC designs in Singapore, beginning with CMOS
Partner Pte Ltd. She is currently with the Institute of Bluetooth delivered in 2001, and followed by WCDMA blocks, 2.4-GHz
Microelectronics, A*STAR, Singapore, where she is RFID tags, and UHF RFID reader and ultra-wideband (UWB) designs, etc.,
involved with the integration and reliability improve- in subsequent years. In 2005, he also began building ultra low-power design
ment for Cu/low K interconnects and RF passive de- capability for bioelectronic and sensor interface applications at IME. From
vices. She has authored or coauthored 35 research pa- 1993 to 1995, he was seconded to BaseComm and FTD Tech as its CTO. He
pers. is currently Chief Strategic Operations Officer with Auxineon, Singapore. He
has coauthored approximately 20 publications. He holds five filed/issued U.S.
patents.
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