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The University of The South Pacific: EE326 Embedded Systems

This document contains a homework assignment with 4 questions regarding embedded systems and CPU performance. Question 1 asks to determine the effective CPI, MIPS rate, and execution time for a benchmark program with a given instruction mix and clock cycle counts. Question 2 asks to explain how various factors affect CPU performance. Question 3 asks to calculate average CPI and MIPS rate for a program with a given instruction mix and CPIs. Question 4 asks to calculate the total CPU cycles to repeatedly execute a given code segment 64 times on a single processor.

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0% found this document useful (0 votes)
79 views

The University of The South Pacific: EE326 Embedded Systems

This document contains a homework assignment with 4 questions regarding embedded systems and CPU performance. Question 1 asks to determine the effective CPI, MIPS rate, and execution time for a benchmark program with a given instruction mix and clock cycle counts. Question 2 asks to explain how various factors affect CPU performance. Question 3 asks to calculate average CPI and MIPS rate for a program with a given instruction mix and CPIs. Question 4 asks to calculate the total CPU cycles to repeatedly execute a given code segment 64 times on a single processor.

Uploaded by

Vijendra Pandey
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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The University of the South Pacific

EE326 Embedded Systems

HOMEWORK 1 Date: July 2018 Dr. Assaf M.

Question 1 A 40-MHz processor was used to execute a benchmark program with the
following instruction mix and clock cycle counts:

Instruction Type Instruction Count Clock Cycle Count


Integer Arithmetic 45000 1
Data Transfer 32000 2
Floating Point 15000 2
Control Transfer 8000 2

Determine the effective CPI, MIPS rate, and execution time for this program.

Question 2 Explain how instruction set, compiler technology, CPU implementation and
control, and cache and memory hierarchy affect the CPU performance and justify the effects in
terms of program length, clock rate, and effective CPI.

Question 3 Consider the execution of an object code with 200,000 instructions on a 40-MHz
processor. The program consists of four major types of instructions. The instruction mix and
the number of cycles (CPI) needed for each instruction type given below based on the result of
a program trace experiment:

Instruction Type CPI Instruction Mix


Arithmetic and Logic 1 60%
Load/store with cache hit 2 18%
Branch 4 12%
Memory reference with cache miss 8 10%

(a) Calculate the average CPI when the program is executed on a single processor with the
above trace results.
(b) Calculate the corresponding MIPS rate based on the CPI obtained in part (a).

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The University of the South Pacific

EE326 Embedded Systems

HOMEWORK 1 Date: July 2018 Dr. Assaf M.

Question 4 The following code segment, consisting of six instructions, needs to be execute
64 times for the evaluation of vector arithmetic expression: D(I) = A(I) + B(I) x C(I) for 0 < I < 63.

Load R1, B(I) /R1 Memory (α + I)/


Load R2, C(I) /R2 Memory (β + I)/
Multiply R1, R2 /R1 (R1) x (R2)/
Load R3, A(I) /R3 Memory (γ + I)/
Add R3, RI /R3 (R3) + (R1)/
Store D(I), R3 /Memory (θ + 1)  R3)/

where R1, R2, and R3 are CPU registers, (R1) is the content of R1, α, β, γ, and θ are the
starting memory addresses of arrays B(I), C(I), A(I), and D(I), respectively. Assume four clock
cycles for each Load or Store, two cycles for the Add, and eight cycles for the Multiply on either
a single processor machine. Calculate the total number of CPU cycles to execute the above
code segment repeatedly 64 times on a single processor computer sequentially, ignoring all
other time delays.

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