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Assignment4 3rd Edition

The document contains assignment problems from Chapter 4 of the digital design textbook. It includes problems on designing combinational circuits with various numbers of inputs and outputs, code conversion, implementing Boolean functions with decoders and gates, constructing a multiplexer using smaller multiplexers, and writing HDL descriptions for a 4-bit adder/subtractor circuit using conditional and behavioral modeling.

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0% found this document useful (0 votes)
37 views

Assignment4 3rd Edition

The document contains assignment problems from Chapter 4 of the digital design textbook. It includes problems on designing combinational circuits with various numbers of inputs and outputs, code conversion, implementing Boolean functions with decoders and gates, constructing a multiplexer using smaller multiplexers, and writing HDL descriptions for a 4-bit adder/subtractor circuit using conditional and behavioral modeling.

Uploaded by

RUBIO
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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ECE-223, Assignment #4

Chapter 4, Digital Design, M. Mano, 3rd Edition

4.4) Design a combinational circuit with three inputs and one output. The output is 1
when the binary value of the inputs is less than 3. The output is 0 otherwise.

4.5) Design a combinational circuit with three inputs, x, y, and z, and three outputs, A, B,
and C.
When the binary input is 0, 1, 2, or 3, the binary output is one greater than the input.
When the binary input is 4, 5, 6, or 7, the binary output is one less than the input.

4.8) Design a code converter that converts a decimal digit from "8 4 -2 -1" code to BCD
(See Table 1-5, Digital Design, M. Mano, pp.20)

4.27) A combination circuit is specified by the following three Boolean functions:


F1( A, B, C) = ∑ ( 2, 4, 7)
F2( A, B, C) = ∑ ( 0, 3)
F3( A, B, C) = ∑ ( 0, 2, 3, 4, 7)
Implement the circuit with a decoder construction with NAND gates (similar to Fig. 4-
19) and NAND or AND gates connected to the decoder outputs. Use block diagram for
the decoder.
Minimize the number of inputs in the external gates.

4.31) Construct a 16 x 1 multiplexer with two 8 x 1 and one 2 x 1 multiplexers. Use block
diagrams.

4.40) Write an HDL dataflow description of a 4-bit adder subtractor of unsigned


numbers. Use the conditional operator. (?)

4.41) Repeat problem 4-40 using behavioural modeling.

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