2012-09-03

Lecture 2
-

Getting to know embedded

systems hardware
-
Damir Isovic

Embedded system components

A processor and some software

•  Large variety of embedded processors Memory
•  Most rather simple Inputs Outputs
CPU
A place to store the data and the
executable code
•  Might be contained within the same chip as the
processor or reside in external memory chips

Some type of inputs and outputs

•  Example of inputs: sensors and probes, communication
signals, or control knobs and buttons
•  Example of outputs: displays, communication signals, or
actuators (for changes to the physical world)
•  Converters (Analog-Digital and Digital-Analog)

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Embedded system hardware

Computing platform I/O front-end Connect to

Volatile and non- external I/O
volatile memory such as
(e.g.,EPROM,Flash, Bus controller Analog I/O sensors,
SRAM,DRAM,…) (PCI) motors,
Digital I/O LEDs, etc.

Bus controller
Central (Ethernet) GPIO
Processing Unit
(e.g., ARM, AVR, Bus controller Audio/Video
PIC, x86, (USB)
PowerPC… UART

Custom devices
(e.g., ASIC, Bus controller
FPGA,…) (CAN) Counter/timer

Example ES HW: The VIPER-Lite PXA255 board

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Example of usage: printer server

Assume that we would like to use the VIPER-Lite

board as a printer server
•  Connect the board to a network using an Ethernet port
•  Connect to a printer using the parallel port

Example of usage: printer server

Data to be printed is
1.  accepted from the Ethernet
controller,
2.  held in RAM until the printer is
ready for more data, and
3.  delivered to the printer via the
parallel port.

Status information is fed back to

the various computers requesting
output on the printer

The software that makes

all of this happen is stored
in ROM

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Busses

Embedded system hardware

The connection between components in an embedded systems is
achieved through several communication busses

Memory

System bus
CPU

Basic I/O

Bridge

Peripheral busses

Peripheral Peripheral
device device

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System bus
Also referred as “main bus", "processor bus" or "local bus”
•  Connects the CPU with the memory and some basic I/O
•  Usually the fastest bus in the system
•  System buses transfer data in parallel. In a 32-bit bus, data are sent
over 32 wires simultaneously. A 64-bit bus uses 64 wires.
•  Split into three sub-busses

Device 1 Device 2

Control bus (R/W)

CPU
Address bus
Data bus

Memory

Peripheral busses
Also referred as “I/O bus“, expansion bus", "external bus",
"host bus"
•  Connecting various peripheral devices to the CPU
•  Connected to the system bus via a "bridge“, a device that connects
two similar or dissimilar buses together

Usually serial communication

•  Data sent in a sequence, bit by bit, over a communication line
•  asynchronous and synchronous communication
•  Half-duplex and full-duplex

Examples:
•  PCI bus for communicating with things like hard disks and sound cards
•  USB bus for connecting things like cameras, scanners and printers
•  Firewire bus, mostly for video cameras and external hard drives
•  CAN, TTP, FlexRay busses, provide real-time guarantees, mostly
used in automotive

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Processors

Processors

There exists a large variety of processor

platforms for embedded systems
•  Microprocessors
•  Microcontrollers
•  DSPs (digital signal processors)
•  Application-specific integrated circuits (ASICs)
•  Programmable hardware (FPGA)

Microprocessor
•  a chip containing a powerful central processing
unit (CPU) that has not been designed with any
particular computation in mind
•  The foundation of PCs and high-end
workstations, but can be used in embedded
systems as well
•  Examples: Intel Pentium, Freescale PowerPC,
AMD, …

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Processors

Microcontroller (MCU)
•  a specialized form of microprocessor, designed for
use in embedded systems
•  Typically include a CPU, memory, and other
peripherals in the same integrated circuit
•  Examples: Intel 8051, Motorola 6811, AVR32UC3
(used in labs of this course)

Digital Signal Processor (DSP)

•  specially designed to perform discrete time signal
processing calculations extremely fast
•  Suitable for audio and video communications
•  Often included in cell phones and other
telecommunications and multimedia equipment
•  Examples: Texas Instruments C6000, Freescale
MSC81xx, Analog Devices ADSP-BF53x, NXP
TriMedia,…

Processors

Application-Specific Integrated Circuit (ASIC)

•  A fully custom chip designed by for the needs of a
particular application, e.g., to solely run a cell phone
•  Expensive to design à Large volumes needed
•  Cheap to produce when designed

Field-Programmable Gate Arrays (FPGAs):

•  Hardware chips whose function can be changed by
updating the contents of configuration memories
•  Built from cells, i.e., small blocks implementing some logic
•  Drawbacks: Lower frequency and
more power hungry than ASICs
•  Benefits: Are reprogrammable and
without ASIC’s large setup cost

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Processors

Common metric for categorizing processors

•  Typically ranges from 4 to 64 bits
•  An N-bit architecture usually has registers, address buses, and
data buses all of N bit size
−  Gives the preferred size of integer arguments
−  Indirectly limits the size of the addressable memory

Embedded systems
•  most often use 4-, 8-, 16- and simpler 32-bit CPUs
•  High-bit CPUs usually more expensive, faster, more complex and
more energy consuming than low-bit CPUs

Memories

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Memories

A place to store data and instructions for

the CPU to operate upon CPU

There are many types of memory devices

available
•  Important for ES designer to understand
their differences and how to use each type FF..FF16
most effectively instructions

An embedded system often contain Memory"

several types of memory devices
data

00..0016

Memories

The CPU execute Registers are used

instructions. It needs to for holding
access data to perform
R1" R2" … R16" operands for most
type of CPU
operations upon CPU
L1 cache"
operations Faster
access
Caches store time
There can be
frequently used several caches
instructions and data L2 cache" between the CPU
(for faster access) and the main
memory

Main memory Larger

Main memory has storage
larger storage capacity capacity
but much longer
access time than
registers and caches

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Main memory types

CPUs store their programs and data in memory
•  This memory may reside on the same chip as the processor or
in external memory chips

Main memory

Common memory types

RAM – Random Access Memory

•  The data stored at each memory location can be
read or written, as desired
•  Stored data is lost if no power is supplied

ROM – Read-Only Memory

•  The data stored at each memory location can be
read at will, but never written
•  Stored data is kept even though no power is
supplied
•  Mainly used to distribute software that is very
closely tied to specific hardware, and unlikely to
require frequent updates

Hybrid
•  Offers ROM-like permanence, but under some
conditions it is possible to overwrite their data
•  Stored data is kept even though no power is
supplied

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Types of RAM

The main difference is the duration of the data stored

SRAM – Static RAM

•  retains its contents as long as electrical power is applied
•  If power is turned off or lost temporarily, its contents will be
lost
•  Used when access speed is crucial

DRAM – Dynamic RAM

•  short data lifetime (usually less than a quarter of a second)
•  A DRAM controller has to periodically refresh the stored
data (several times a second), thereby keeping the
contents of memory alive
•  Much cheaper but also slower than SRAM
•  Used when large amounts of RAM are required

Many embedded systems contain both types – a small

block of SRAM for critical code and data and a much
larger block of DRAM for everything else

Types of ROM

ROM memory types differs by the methods used to write

new data to them, called programming or burning, and the
number of times they can be rewritten

Masked ROM
•  ROM contents must be specified before chip production
•  Main advantage: Low production cost
•  No longer commonly used

PROM – Programmable ROM

•  Writing to the PROM involves a special piece of equipment
called a device programmer
•  Once a PROM has been programmed, its contents can
never be changed

EPROM – Erasable and programmable ROM

•  Can be erased and reprogrammed a large number of times
•  To erase an EPROM, expose the device to a strong source
of ultraviolet light – resets the chip to its initial
(unprogrammed) state

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Hybrid memories

Combines the best features of RAM and ROM memories

•  Can be read and written as desired, like RAM
•  Can maintain their contents without electrical
power, just like ROM

However, writes to hybrid memories take much longer time

than writes to a RAM
•  Thus, hybrid memories should not be used as
main system memory

Some hybrid memories types

•  EEPROM
•  NVRAM
•  Flash

Hybrid memories

EEPROM – Electrically erasable and

programmable ROM
•  Internally similar to an EPROM, but with the
erase operation accomplished electrically
•  Additionally, a single byte within an EEPROM
can be erased and rewritten (not just the whole
memory)
•  A high cost
•  Only good for a limited number of erase/write
cycles

NVRAM – Nonvolatile RAM

•  “A SRAM with a battery backup”
•  When the power is on, the NVRAM operates
just like any other SRAM
•  When the power is off, the NVRAM draws just
enough electrical power from the battery to
retain its current contents

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Hybrid memories

Flash memory
•  Increasingly popular
•  Combines all the best features of the
previously described memory devices
•  Similar to EEPROM in functionality, but a
Flash devices can be erased only one
sector 8-64 KB at a time, not byte by byte

Properties which makes Flash so popular:

•  High-density – much capacity in a small space
•  Low-cost – and the price is getting lower and lower
•  Non-volatile – keeps data even when power is lost
•  Fast – although not as fast as DRAM memory
•  Electrically reprogrammable
•  Durable – able to withstand high pressure, extremes of temperature
(when packed into a “memory card”)

Memory characteristics

Memory Volatile? Writable? Erase/rewrite Erase/rewrite Relative cost Relative speed

type (requires size cycles
power)
SRAM Yes Yes Byte Unlimited Expensive Fast

DRAM Yes Yes Byte Unlimited Moderate Moderate

Masked No No N/A N/A Inexpensive Slow

ROM (in quantity)
PROM No Once, with N/A N/A Moderate Slow
programmer
EPROM No Yes, with Entire chip Limited Moderate Slow
programmer (see specs)
EEPROM No Yes Byte Limited Expensive Moderate to read,
(see specs) slow to write
Flash No Yes Sector Limited Moderate Fast to read,
(see specs) slow to write
NVRAM No Yes Byte None Expensive Fast

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Cache memory

Small, but fast memories located close to

the CPU …
R1" R2" R16"

•  Caches can significantly improve average CPU

performance! L1 cache"
•  Cache access time is much less than access
time to main memory
L2 cache"

Cache keeps copies of the most recently

used instructions or data
•  Instead of accessing main memory for a data Main memory"
or instruction the processor can get it from the
cache
•  This reduces the access time for the data
or instruction

Caches hits and misses

Cache builds upon the principles of locality of reference:

•  A data / instruction recently accessed is very likely to be accessed
again in the near future, and so are the data / instructions in its
neighborhood

When the CPU wants to access an instruction / data it checks

if there is a copy in the cache:
•  YES – the operation can be processed quickly on the copy in the
cache. Called a cache hit
•  NO – the missing data / instructions has to be loaded from main
memory. Called a cache miss

Cache miss usually takes many more clock cycles than a

cache hit
•  At a cache miss, the missing data / instruction is loaded together
with its surrounding entities
•  The entities are stored together in the same cache line
•  Later accesses to these entities will thereby go quicker

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Cache and predictability

Caches increase the average speed, but give more variable

(and unpredictable) execution time
•  The same instruction might e.g., take in between 1 to 20
cycles to execute
•  Limited user control (cache behavior controlled by HW)

Due to unpredictable behavior, very difficult to exploit caches

in real-time systems!
•  Thus, in many embedded real-time applications caches are disabled

Some processors allow cache lines with critical data /

instructions to be locked
•  Called cache-locking
•  Guarantees that these entities will stay in the cache
•  Thereby, the access time to these entities are kept low

Scratchpad memories

A high-speed internal memory used for temporary storage of

data
•  Can be considered as a special type of L1 cache reserved for direct
and private usage by the CPU

Compared to a “normal” cache the CPU has much more

control of the data stored
•  Caches are used to temporarily store copies of data / instructions
that resides on slower main memory
•  Scratchpads can be used by the CPU for any purpose, e.g., storing
of critical instructions or intermediate values

Suited for embedded systems and gaming HW

•  Not so common in mainstream desktop processors

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Registers

Common component of most CPUs R1" R2" … R16"

•  Not exactly the same type of “registers” used CPU

to communicate with peripherals
•  Normal quantity for a CPU is e.g., 8, 16 or 32

A small set of fixed-length high-speed memory

locations to which program instructions can refer
directly
•  E.g., used in assembler language: add r0, r1, r2

Most often of the same size as addresses

•  E.g., on a system with 32-bit addresses, the
CPU registers are of 32 bits size

Direct Memory Access (DMA)

A technique for transferring data between two HW devices

with minimal CPU involvement
•  CPU sets up transfer.
•  DMA controller fetches, writes.

Bus request
DMA
Bus grant Controller Device 2

CPU
Control bus (R/W)
Address bus
Data bus

Memory

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Direct Memory Access (DMA)

If no DMA is present:
•  The processor must read the data from one device and write it to
the other, one byte or word at a time
•  For each byte or word transferred, the processor must fetch and
execute a sequence of instructions
•  If large amount of data should be transferred other applications
might never get a chance to run

If DMA is present:
•  The DMA controller can perform the entire transfer, with little or
no assistance from the processor

Peripherals
(Timers,
interfacing,..)

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Hardware timer
Used to measure elapsed time
•  Typically by counting down processor cycles or clocks
•  The timer normally counts the cycles of the processor's main clock
signal
•  Could also use a separate clock whose clock signal is fed
into the timer peripheral from an external processor pin

Crucial component of most embedded systems and included in

many microcontrollers – used in real-time systems!

Watchdog timer

Special HW mechanism that intervenes

if the SW stops functioning properly
•  The watchdog timer must be periodically reset
(called "kick the dog") by software
•  If the software crashes or hangs, the watchdog timer soon expires,
causing the entire system to be reset automatically

A timer type frequently used in embedded systems

•  Common way to deal with unexpected software hangs or crashes
that may occur after the system is deployed

Example, a product that will travel into space

•  Despite exhaustive testing, SW errors can still remain
•  If SW hangs, no communication is possible, and it is not possible to
remotely issue a reset command
•  A watchdog timer provides an automatic recovery mechanism

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Interfacing with peripherals

In addition to the processor and memory, most embedded

systems contain some peripherals
•  Specialized hardware devices (e.g., serial ports and timers)
•  Each peripheral coordinates interaction with the outside
world or performs a specific hardware function

Interfacing with outside hardware allows the microcontroller to:

•  Get digital data from outside sources
•  Query the state of pushbuttons and toggle switches
•  Get analog data from outside sources
•  Output digital data to displays and other devices
•  Turn LEDs on and off
•  Output analog data

There are many methods of interfacing with outside hardware,

but the simplest is through GPIO (General Purpose I/O).

GPIO – General Purpose I/O

Customizable input/output pins on a microcontroller.

Individual port pins under program control

•  Output – CPU can set a pin high or low at any time
•  Input – CPU can read the value on a pin at any time

Example: To output a square wave on a port:

•  Set port low
•  Pause
•  Set port high
•  Pause
•  Repeat

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GPIO – General Purpose I/O

By wiring the hardware appropriately and configuring the GPIO port in

software, one pin can be used as input to read a switch, another as an
output to control a status LED, and a pair to serve as clock and data for a
serial EEPROM.

Example: Assume two serial devices, A and B, that need to be connected

to a microcontroller. The devices use different communication protocols.

Basic thinking
•  “Since they use different protocols, I need one set of GPIO for
device A, and another set for device B”

Advanced thinking
•  “I will use the same GPIO pins for both devices, and re-configure
them in software based on whether the microcontroller is
communicating with device A or device B

ES hardware
used in this
course

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Hardware platform used in this course

AVR32 platform from Atmel
•  EVK1100 – a development board for the AT32UC3A microcontroller.
•  The Dragon – Joint Test Action Group (JTAG) debugger

EVK1100
•  Ethernet port
•  Sensors: Light, Temperature,
Potentiometer
•  4x20 Blue LCD
•  Connectors for JTAG, Nexus, USART,
USB 2.0, TWI, SPI
•  SD and MMC Card Reader

The Dragon
•  On-chip debug interface
•  Allows easy debugging of applications
(single stepping and breakpointing)

Lab hardware
EVK1100
board

USB External
port power
Ethernet Serial Serial port
The Dragon – JTAG port port 0 1
(USART)
debugger Power
switch
8 Mb Data
Flash 4x20
JTAG
connector Char
LCD
Expansion
connectors
6 LED diodes

Main clock Micro- Prototyping

oscillator controller area (for add-
Two Wire AT32UC3A
Interface on boards)
Reset button 32 MB SDRAM
Serial (back side)
Peripheral
Interface
Light Potentio- Temp
sensor meter 3 Push Buttons Joystick sensor

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Lab hardware
EVK1100
board

The Dragon – JTAG

debugger

Micro-
controller
AT32UC3A

Processor
AT32UC3A
microcontroller – memory
Schematic view
System
bus

Bridges

GPIO pins
Interface to
the external
components
Peripheral controllers/interfaces

Timers
Peripheral bus

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AT32UC3A – Simplified schematic view

GPIO on AVR32UC3A
There are four GPIO ports on AVR32UC3A microcontroller:
•  PA – Port A
•  PB – Port B
•  PC – Port C
•  PX – Port X

Each port has a number of physical pins attached, controlled by a

set of hardware registers :
•  PA •  PC
o  PA0 o  PC0
o  PA1 o  PC1
o  PA2 o  PC2
o  … o  …
•  PB •  PX
o  PB0 o  PX0
o  PB1 o  PX1
o  PB2 o  PX2
o  … o  …

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GPIOs on
AVR32UC3A

PB

PA
PX

PC

GPIO multiplexing

GPIO controller on AVR32UC3A

•  Manages the I/O pins of the microcontroller
•  Each I/O line may be dedicated as a general-purpose I/O or be
assigned to a function of an embedded peripheral.
•  The GPIO pins are multiplexed with other peripherals, e.g. the USART.
•  Multiplexing of up to four peripheral functions per I/O line.
•  This assures effective optimization of the pins of a product.

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The control logic associated with each pin:

Four other
peripherals
If a bit in the register
GPER is set, the pin
is controlled by the
GPER register GPIO.

If a bit is cleared, the

pin is controlled by a
peripheral function.

The selection of
peripherals
is performed by
accessing Peripheral
Mux Register 0 and 1

Example controlling LED via GPIO

In lab1, you will write the software that uses GPIO to blink a
LED diode

LED

Micro
controller

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Example controlling LED via GPIO

Assignment: to blink LED 1

First, we need to check which GPIO pin (on the microcontroller) is

connected to LED1 (on the board).

This information can be found either in:

•  The EVK1100 schematics

o  file EVK1100_SCHEMATICS_REVC.pdf in the lab package

•  The header-files of AVR32 Studio

o  evk1100.h
o  uc300152.h

(Note! The first LED is labeled as LED1 on the physical board, but it is
called LED0 in the schematics and in the AVR32 Studio!)

GPIO mapping – EVK1100 schematic

LED0 is
wired to
pin PB27
on the
micro-
controller

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GPIO mapping – Header files of AVR32 Studio

File: evk1100.h File: uc300152.h

GPIO addressing
The hardware register addresses of the PA, PB, PC and PX ports is calculated
from the numbering of the GPIO pins added to a base address of the
GPIO controller.

To find the corresponding pin from a GPIO number (i.e. the pin number of the
MCU as they are defined in the header files used by AVR32 Studio) the
following formula can be used:

GPIO_PIN = GPIO_number & 0x1f;

Example:

GPIO_PIN_LED0 = LED0_GPIO & 0x1f =

59 (dec) & 0x1f (hex) =
00000000000000000000000000111011 &
00000000000000000000000000011111 =
00000000000000000000000000011011 = 27

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Next lecture

Software for blinking LED on EVK1100

You will learn how to:

•  Configure GPIO to access LED

•  Write the blinking LED program

•  Get the blinking LED program to run on the EVK1100 board

(compilation, object code, linking, downloading, running)

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