0% found this document useful (0 votes)
53 views

Tutorial Sheet - 5 2020

This document contains a 10-question tutorial on the design of electronic circuits using operational amplifiers (OP-AMPs). The questions cover topics such as calculating noise amplitude given common mode rejection ratio, proving relationships for current-to-current converters and amplifier transfer functions, simulating inductance using OP-AMP circuits, designing multiple input OP-AMP circuits to achieve desired transfer functions, and analyzing offset voltages and currents in OP-AMP circuits.

Uploaded by

guddu gupta
Copyright
© © All Rights Reserved
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
53 views

Tutorial Sheet - 5 2020

This document contains a 10-question tutorial on the design of electronic circuits using operational amplifiers (OP-AMPs). The questions cover topics such as calculating noise amplitude given common mode rejection ratio, proving relationships for current-to-current converters and amplifier transfer functions, simulating inductance using OP-AMP circuits, designing multiple input OP-AMP circuits to achieve desired transfer functions, and analyzing offset voltages and currents in OP-AMP circuits.

Uploaded by

guddu gupta
Copyright
© © All Rights Reserved
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
You are on page 1/ 3

EEN-205 Design of Electronic Circuits

Tutorial Sheet No.5

1. In the circuit of Fig.1, R1= 100 ohm, Rf = 4.7 K and the CMRR of OPAMP used is
100db. If the amplitude of the 60 Hz noise at the output is 5 mV(rms) calculate the
amplitude of the common mode input voltage vCM.
+V cc
R 1 R f
-
+Vcc
vo
+
IL
- I1 -V c c R L
R 2= R 1 vo
+

v in -V c c R L R 1
R 3= R f
R 2

Fig.1 Fig.2

2. Prove that for the current to current converter shown in Fig.2,


 R 
I L   I1 1  1 
 R2 
3. Prove that the transfer function of the amplifier shown in Fig.3 is
V o −R 2+ R 3+ R 2 R3 / R 4
=
V¿ R1

Ii
R 1 R 2 R 3
+
R 4 Z 1
-
+V cc
Z 2

- Z 3
v in vo
+ Z 4
V i
-V c c

Z L

Fig.3 Fig.4

4. If the Op-Amps are ideal, shown that the circuit shown in Fig.4 can be used to
simulate an inductance on a chip, if Z4 = 1/sC4.

5. Design a 741 OP-AMP to have the following characteristics:


Vout = 5V1 + 2V2 +3V3 -4V4

The resistance to any of the input terminals will be at least 10 kΩ. Determine R in at
the non-inverting and inverting terminals, the output resistance and the bandwidth of
the OP-AMP.
6. Design an amplifier that is composed of multiple 741 OP-AMPs to obtain an output
of:
vout = 20 v1 – 40 v2 – 45 v3
The amplifier must respond to frequencies upto 50 kHz. Determine all resistor values,
the output resistance, the input resistance, and the bandwidth of the amplifier.

7. (a) Verify that the circuit shown in Fig.5 has an input impedance
vin R1 R 2

iin Z
(b) If Z is a capacitor, show that the system behaves as an inductor.
(c) Find the value of C in order to obtain a 1H inductance if R1 = R2 = 1K.

R 1

Z
R 1

v in
- 2R 2
i in -
+
+

R 3

R 3

Fig.5

8. Determine the output resistance and the input resistance at each of the inputs of a
multiple input 741 amplifier which has an output of
vout = 3 v1 + 4 v2 +2 v3 – 5 v4 – 6 v5
Assume that the value of the resistance at the non-inverting and inverting terminals is
10 kΩ.

9. In each of the op-amp of Fig.6, Vio = 10 mV, the input offset voltage temperature
coefficient is 10 μV/°C, the temperature is 50°C, and RI = 1 MΩ. Find the largest
possible offset in vout due to Vio.
10 k 10 k
T h e v e n in 's e q u iv a le n t
10 k +V cc c ir c u it fo r th e s ig n a l +V cc
s o u rc e s
- -
v out 30 k 10 k v out
+
v1 +

-V c c -V c c
v2
5 k 20 k 5 k 10 k

Fig.6(a) Fig.6(b)

10. For each of the circuits of Q.8, the op-amp input bias current is 800 nA, the bias offset
current is 20 nA, the input bias current temperature coefficient is -10 nA/°C, and the
input offset bias current temperature coefficient is -2 nA/°C. Find:
(a) The largest possible offset in vout due to average bias current effects.
(b) The largest possible offset in vout due to bias offset effects.
(c) The largest possible offset in vout due to voltage offset bias current and bias offset
combined.

You might also like