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JFET Operation & Characteristics

The document discusses the junction field effect transistor (JFET). It describes the basic N-channel and P-channel JFET configurations, with N-channel being more efficient due to electron mobility. It explains JFET operation in depletion mode, where applying a reverse gate voltage expands the depletion region and decreases the channel width/drain current. Finally, it outlines the linear and saturation regions of the JFET drain characteristics curve, noting that increasing reverse gate voltage causes pinch-off and saturation of the drain current.

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349 views5 pages

JFET Operation & Characteristics

The document discusses the junction field effect transistor (JFET). It describes the basic N-channel and P-channel JFET configurations, with N-channel being more efficient due to electron mobility. It explains JFET operation in depletion mode, where applying a reverse gate voltage expands the depletion region and decreases the channel width/drain current. Finally, it outlines the linear and saturation regions of the JFET drain characteristics curve, noting that increasing reverse gate voltage causes pinch-off and saturation of the drain current.

Uploaded by

Anusooya V
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Unit- II Transistors and Thyristors

Topic: Junction Field Effect Transistor


JFET Structure, Symbol & Configuration

Introduction
A field-effect transistor (FET) is a three terminal (namely drain, source and gate) semiconductor
device in which current conduction is by only one type of majority carriers (electrons in case of an N-
channel FET or holes in a P-channel FET). It is also sometimes called the uni-polar transistor.
JFET Configuration
There are two basic configurations of junction field effect transistor, the N-channel JFET and the
P-channel JFET. The N-channel JFET’s channel is doped with donor impurities meaning that the flow of
current through the channel is negative (hence the term N-channel) in the form of electrons.
Likewise, the P-channel JFET’s channel is doped with acceptor impurities meaning that the flow
of current through the channel is positive (hence the term P-channel) in the form of holes. N-channel
JFET’s have a greater channel conductivity (lower resistance) than their equivalent P-channel types,
since electrons have a higher mobility through a conductor compared to holes. This makes the N-
channel JFET’s a more efficient conductor compared to their P-channel counterparts.
In BJT transistors the output current is controlled by the input current which is applied to the
base, but in the FET transistors the output current is controlled by the input voltage applied to the gate
terminal.

Structure & Symbol of N channel JFET


Topic: Junction Field Effect Transistor
JFET Operation

Mode of Operation
1. Depletion mode- JFET
OPERATION OF N-CHANNEL FET
When VGG is reverse biased and VDD is not applied, the depletion regions between P and N
layers tend to expand. This happens as the negative voltage applied, attracts the holes from the p-type
layer towards the gate terminal.

When VDD is applied positive terminal to drain and negative terminal to source and VGG is not
applied, the electrons flow from source to drain which constitute the drain current ID. The supply at gate
terminal makes the depletion layer grow and the voltage at drain terminal allows the electrons flow from
source to drain terminal.
Suppose the point at source terminal is B and the point at drain terminal is A, then the resistance
of the channel will be such that the voltage drop at the terminal A is greater than the voltage drop at the
terminal B.

Hence the voltage drop is being progressive through the length of the channel (ie) from drain to source.
So, the reverse biasing effect is stronger at drain terminal than at the source terminal.
This is why the depletion layer tends to penetrate more into the channel at point A than at point B, when
both VGG and VDD are applied.
DEPLETION MODE OF OPERATION
First, no potential applied between gate and source terminals and a potential VDD is applied
between drain and source. Now, a current ID flows from drain to source terminal, at its maximum as the
channel width is more. Let the voltage applied between gate and source terminal VGG is reverse biased.
This increases the depletion width, As the layers grow, the cross-section of the channel decreases and
hence the drain current ID also decreases.

When this drain current is further increased, a stage occurs where both the depletion layers touch
each other (literally), and prevent the current ID flow. This voltage is called pinch off voltage.
Topic: Junction Field Effect Transistor
JFET Characteristics

Drain Characteristics of JFET


When the voltage between gate and source VGS is zero, the current ID from source to drain is
also nil as there is no VDS applied. As the voltage between drain and source VDS is increased, the
current flow ID from source to drain increases. This increase in current is linear up to a certain point A,
known as Knee Voltage.
The gate terminals will be under reverse biased condition and as ID increases, the depletion
regions tend to increases near the drain region, which leads to pinch off voltage. The pinch off voltage is
defined as the minimum drain to source voltage where the drain current approaches a constant value
saturation value.

The point at which this pinch off voltage occurs is called as Pinch off point, denoted as B. As
VDS is further increased, the channel resistance also increases in such a way that ID practically remains
constant. The region BC is known as saturation region or amplifier region.
As the negative gate voltage controls the drain current, FET is called as a Voltage controlled
device.

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