#820-1819 Backup - Battery Charger
#820-1819 Backup - Battery Charger
CK ENG
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. APPD APPD
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. REV ZONE ECN DESCRIPTION OF CHANGE
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. DATE DATE
02 384031ENGINEERING RELEASED06/01/05
?
SCHEM,SPRINT
D 06/01/2005 D
C PAGE CONTENTS C
B B
A X.XX
DRAFTER DESIGN CK NOTICE OF PROPRIETARY PROPERTY A
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
X.XXX PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
ENG APPD MFG APPD
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
ANGLES II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
QA APPD DESIGNER TITLE
DO NOT SCALE DRAWING
SCHEME,SPRINT,Q16
TABLE_5_HEAD
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PART # QTY DEVICE PACKAGE DESCRIPTION VALUE VOLT. WATT. TOL. REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION
TABLE_11_HEAD
PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS: CRITICAL
J2 Q4
CRITICAL PART NUMBER
Q5
FDC638P
TABLE_ALT_ITEM
53780-0370 FDC5614P
D M-RT-SM
4
<- From BB Output
23
SOT23-6-LF
376S0060 376S0272 Q4 ALTERNATE SOURCE
SM-LF D
OMIT 6
R16 R17 D4 6 +V_BBATT
To Boost/Output ->
23
XW1 2
SOD-123
To BB Charger -> 4
5 147 147 3 PBUS_SR2 1 2 PBUS_BB_IN 4
5
J4
JUMPER
1 14V_PBUS PBUS_BB_SW1 2 PBUS_SR1 1 2
OPEN
3 3 3
2 2 SM-2MT-LF
24V_PBUS2 3
2
1
1%
3/4W
1%
3/4W 1 1 C23 1 C14 1 C15 3
3
R13
1 FF-LF FF-LF B0530WXF 0.1UF 2.2UF 0.1UF R19
1
1
2010 2010 20%
680K
5% C18 20%
25V
2 CERM
20%
10V
2 CERM
25V
2 CERM 3 +V_BBATT_RAW 1 CRITICAL 470
5%
5 1/16W
MF-LF
3 0.001UF 3
805 805 805 2 1/16W
MF-LF
1 2 TO BACKUP BATTERY
2 402 2 402
330K
R21 3 BBATT_INPUT_DIV_L 20%
50V
CERM
4
C20
5% 402 0.1UF
1/16W
MF-LF
402 2
R41
270K 3 BBATT_VSS 1 2 BBATT_VDD
5%
1/16W
1 C19
0.1UF
1 DEVEL
DS1 CRITICAL
U3 20%
MF-LF 20% GREEN CRITICAL 3 2
25V
CERM
402 2 50V SM-3 FDW2503N 805
2 CERM
805 2 U5 TSSOP-LF
BBATT_ENABLE
MAX1879 1 C16 S 4 3 PROT_D0
3
1
IN
SOI-LF
GATE
2 BBATT_CHRG_ENABLE_L 0.22uF
20%
G
BBATT_INPUT_ENABLE 2 16V
D Q1
2N7002 C5
1
CHRG_LED 3
CHG
BAT
8
CERM
805 D
6 1 SOT23-LF 0.22uF
20%
4
TSEL 1
G S
25V
2 CERM
MAX1879_THRM 7 5 3 MAX1879_ADJ
D CRITICAL 2 805 THER ADJ BBATT_VSS_FILTER BBATT_VSS_SW
2
U6 1
R3 GND
3
VSS VDD
FDG6301N
6
BBATT_DISCHRG_ENABLE 2 G 470K 8
U4
3 2
S SC70-6-LF 5%
1/16W
1 CRITICAL 1
R20
21.5K 1 C17 S8241
C
MF-LF
2 402 R5 1 C22 1 C21 1% 0.22uF
CRITICAL
U3
D 4
DOSOT23-5-LF C
10KOHM 470pF 0.001UF
1 1/16W 20%
MF-LF CRITICAL
10%
50V
20%
50V 2 402 2 16V
CERM FDW2503N G 5 5
2 CERM 2 CERM 805 3 PROT_C0
0603-LF
805 402 TSSOP-LF S
CO
2 MAX1879_ADJ_SR VM
R18
1
7 6
1K
1
R21
249K
1
5%
2 PROT_VM
1% 1/16W
1/16W MF-LF
MF-LF 402
2 402
5
SOT23-5-LF
1
2 402 603
1 C12 1 C11
1 2 24V_PBUS 23
B
VIN SW 10UF 0.1uF
R15 B0530WXF
Non-inverting input R24
1
267K
7
V+ 3 4
CRITICAL
3 LT1613_FB 1
10K 2
3 LT1613_FB_RC 10%
2 10V
X5R
20%
16V
2 CERM
SHDN FB 3
1206 603
1%
1/16W
MF-LF U7 D CRITICAL GND 1%
1/16W
2 402 MAX933
MSOP-LF
U6 2 MF-LF
402 R14
1
8.66K
3 INA+ OUTA 1 3 BOOST_ENABLE 5 G FDG6301N 1%
S SC70-6-LF 1/16W
4 MF-LF
14V_PBUS INB- OUTB 8 3 2 BBATT_DISCHRG_ENABLE 2 402
3 2
CRITICAL 4
5 HYST REF 6 MAX933_REF
R22
1
475K V-
Inverting input 1%
1/16W 2 R281
48.7K
MF-LF 1%
2 402 1/16W
MF-LF
3 9_12V_DET 402 2
MAX933_HYST
R23
1
68.1K
1
R27
1%
1/16W
1.43M
1%
MF-LF 1/16W
2 402 MF-LF
2 402
BACK UP BATTERY
A NOTICE OF PROPRIETARY PROPERTY
A
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
2 OF
5
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REVISION HISTORY
02/21/05 - SCHEMATIC ORIGINATED FROM Q41B 051-6753-A
02/23/05 - CORRECTED THE NOTE
Power Signals
D
GROUP SIG_NAME
24V_PBUS
VOLTAGE
VOLTAGE=24V
MIN_LINE_WIDTH MIN_NECK_WIDTH
MIN_LINE_WIDTH=0.508MMMIN_NECK_WIDTH=0.254MM
2
D
14V_PBUS VOLTAGE=14V MIN_LINE_WIDTH=0.508MMMIN_NECK_WIDTH=0.254MM
2
PBUS_BB_IN VOLTAGE=14V MIN_LINE_WIDTH=0.508MMMIN_NECK_WIDTH=0.254MM
2
PBUS_SR2 VOLTAGE=14V MIN_LINE_WIDTH=0.508MMMIN_NECK_WIDTH=0.254MM
2
PBUS_SR1 VOLTAGE=14V MIN_LINE_WIDTH=0.508MMMIN_NECK_WIDTH=0.254MM
2
BATTERY PBUS_BB_SW VOLTAGE=14V MIN_LINE_WIDTH=0.508MMMIN_NECK_WIDTH=0.254MM
2
+V_BBATT VOLTAGE=4.2V MIN_LINE_WIDTH=0.508MMMIN_NECK_WIDTH=0.254MM
2
+V_BBATT_RAW VOLTAGE=4.2V MIN_LINE_WIDTH=0.508MMMIN_NECK_WIDTH=0.254MM
2
BBATT_VSS VOLTAGE=0V MIN_LINE_WIDTH=0.508MMMIN_NECK_WIDTH=0.254MM
2
BBATT_VSS_SW VOLTAGE=0V MIN_LINE_WIDTH=0.508MMMIN_NECK_WIDTH=0.254MM
2
B B
SIGNAL CONSTRAINTS
A NOTICE OF PROPRIETARY PROPERTY
A
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
D
BBATT_VSS_SW
BOOST_ENABLE
BOOST_ENABLE_L
2C2<> 3D6>
2B6<> 3C6>
2B6<>
D
BOOST_OUT 2B3<> 3C6>
CHRG_LED 2C5<
LT1613_FB 2B4<> 3C6>
LT1613_FB_RC 2B3< 3C6>
MAX933_HYST 2A7<
MAX933_REF 2A6<>
MAX1879_ADJ 2C4<> 3C6>
MAX1879_ADJ_SR 2C3<
MAX1879_THRM 2C5<>
PBUS_BB_IN 2D4<> 3D6>
PBUS_BB_SW 2D6<> 3D6>
PBUS_SR1 2D5< 3D6>
PBUS_SR2 2D5<> 3D6>
PROT_C0 2C2<> 3C6>
PROT_D0 2C2<> 3C6>
PROT_VM 2C2<
C C
B B
A A
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*** Part Cross-Reference for the entire design ***
C3 CAP 2
C4 CAP_P 2
C5 CAP 2
C11 CAP 2
C12 CAP 2
C13 CAP 2
C14 CAP 2
C15 CAP 2
C16 CAP 2
C17 CAP 2
C18 CAP 2
C19 CAP 2
C20 CAP 2
C21 CAP 2
C22 CAP 2
C23 CAP 2
D
C24
D1
D2
CAP 2
DIODE_SCHOT 2
DIODE_SCHOT 2
D
D3 DIODE_SCHOT 2
D4 DIODE_SCHOT 2
DS1 LED 2
J2 CON_3RTSM_125 2
J4 CON_2RTSM_125 2
L1 IND 2
Q1 TRA_2N7002 2
Q4 TRA_FDC5614P 2
Q5 TRA_FDC638P 2
Q6 TRA_FDC638P 2
R1 RES 2
R2 RES 2
R3 RES 2
R4 RES 2
R5 THERMISTER 2
R13 RES 2
R14 RES 2
R15 RES 2
R16 RES 2
R17 RES 2
R18 RES 2
R19 RES 2
R20 RES 2
R21 RES 2
R22 RES 2
R23 RES 2
R24 RES 2
R25 RES 2
R26 RES 2
R27 RES 2
R28 RES 2
U2 DCDC_LT1613 2
U3 TRA_FDW2503N 2
U4 BAT_PROT_S8241 2
U5 MAX1879 2
U6 TRA_FDG6301N 2
U7 MAX933 2
XW1 JUMPER 2
C C
B B
A A
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