EXPERIMENT 11

Implementation of Delta Modulation and Demodulation

OBJECTIVE: The objective of this lab is to convert the analogue signal to digital signal using
the technique of delta modulation.

THEORY AND PROCEDURE:

Delta modulation uses a single-bit PCM code to achieve digital transmission of analog signals by
oversampling (typically 4 times the Nyquist rate) the baseband signal. This increases the
correlation between adjacent samples, which results in a small prediction error that can be
encoded using only one bit.

At the transmitter, the sampled value is compared with a predicted value and the difference
is quantized into one of the two values. The output of the quantizer is encoded using one binary
digit per sample and sent to the receiver.

With delta modulation, rather than transmitting a coded representation of the sample, only a
single bit is transmitted which simply indicates whether that sample is larger or smaller than the
previous sample. The algorithm for delta modulation is very simple. Since there is one bit of
quantization, the differences are coded into only of the two levels.

- If the current sample is smaller than the previous sample, a logic 0 is transmitted.
- If the current sample is larger than the previous sample, a logic 1 is transmitted.

The receiver reconstructs the staircase approximation directly from the received binary
information:

- If a one is detected, the receiver increments with a positive step.

- If a zero is detected, a negative step occurs.

The system is in the form of a feedback loop (Figure 1). The sampler is clocked. The output from
the sampler is a bipolar signal, being either V volts. This is the data modulated signal, the
waveform of which is shown in Figure 2.

The integrator output is a sawtooth like waveform, also illustrated in Figure 13-2. The binary
waveform illustrated in Figure 13-2 is the signal transmitted.
This is delta modulation.
Intelligent selection of the following two parameters is important:
1) Step size
2) Sampling rate

Figure 1: 　 Delta modulator

Figure 2: Integrator output, superimposed on the

message (delta modulated signal below)
 PREPARATION

Module
DCS-6000-04: Incorporates DCS7-1 DM Modulation Circuit and DCS68-1 DM
Demodulation Circuit

Circuit Diagram

Function
Generator (I)
500Hz/2V

Function
Generator (II)
32 kHz/5V

OSC

Figure 3: (a) Delta modulator block diagram (b) DCS58-1 delta modulator circuit diagram

The comparator U1 compares the audio signal with the output of the integrator. The D-type flip-
flop samples the output square wave to obtain the delta modulated signal. U2 is the unipolar to
bipolar converter. The analogue switch is used to vary the gain of the integrator. This has the
effect of varying the modulator’s step size.
The unwanted products of the modulation process, observed in the receiver, are of two kinds.
These are due to “slope overload” and “granuality”.

MEASUREMENT
1. Jumper J2 and J3 on the DCS7-1 board.
2. Input 500 Hz/2V sine wave to audio input port Audio I/P, and input 32 kHz/5V TTL
signal to the clock input port CLK I/P.
3. Use an oscilloscope to observe the signals at TP1 (comparator input), TP2
(comparator output), TP3 (unipolar-bipolar convertor output), TP4, and TP5
(integrator output).
4. Finally, connect the oscilloscope to DM O/P, and observe the delta modulated
signal.
5. You may jumper J2 and J4, input 1 kHz/2V sine wave to Audio I/P, and 64kHz/5V
TTL signal to CLK I/P, and observe the changes in the shape of the waveforms at
TP1 through TP5 and at DM O/P.

Expected Measured Results

At some of the test points, the data reveals very little. It consists of many overlaid
digital words, all different. One would need more sophisticated equipment (a storage
oscilloscope, for example).
Figure 4a: Delta modulation with 32 kHz
clock
Figure 4b: Delta modulation with 64 kHz clock
Delta Demodulator

OBJECTIVE: The objective of performing this lab is to recover the original analogue signal
from the delta modulated digital signal.

THEORY AND PROCEDURE:

Figure 1. Delta demodulator principle

The delta demodulator performs the reverse of the process implemented at the modulator in the
vicinity of the Sampler and the Integrator. The Sampler uses a clock stolen from the delta
modulator (transmitter). The Sampler accepts TTL signals as input, but gives an analogue output
for further analogue processing. The sampler which is clocked at the same rate as the clock at the
modulator, outputs a bipolar signal (+/-V volts). The integrator generates a sawtooth-like
waveform from it. This is an approximation to the original message. The sawtooth waveform
contains information at the message frequency, plus obvious unwanted frequency components
(quantizing noise). The unwanted components which are beyond the bandwidth of the original
baseband message are removed by a lowpass filter. You will find that the quality/shape of the
message output by delta modulation is relatively poor.

Circuit Diagram

DM O/P of
DCS7-1

32 kHz/5V
Function
Generator Analog
(II) O/P

Figure 1: Block/circuit diagrams of DCS8-1 Delta demodulator

The bipolar square wave passes through the integrator to obtain a waveform, similar to the audio
signal. The low-pass filter at the output removes the high frequency components from the
integrator output.
MEASUREMENT
For this experiment you will supply your own delta modulated signal, using the modulator
examined in Experiment #13: Delta Modulator

1. Jumper J2 and J3 on DCS8-1 Delta Demodulation Circuit.

2. To generate a delta modulated signal for demodulation, perform Experiment
#13: Delta Modulator (audio signal 500 Hz/2V, and clock 32 kHz/5V TTL).
And patch the output port DM O/P of DCS7-1 to the input port DM I/P of
DCS8-1.
3. Observe the signals at TP1 (sampling), TP2 (unipolar-to-bipolar), TP3 (tunable
gain), TP4 (low-pass filter output) and the audio port Audio O/P.
4. Next jumper J2 and J4 on both DCS7-1 and DCS8-1 to vary the gain of the
integrator, in other words, varying the step size, for the 64 kHz clock and note
the changes occurred in the waveforms on the oscilloscope.

Expected Measured Results

At some of the test points, the data would reveal very little. It consists of many overlaid digital
words, all different. One would need more sophisticated equipment (a digital analyzer, a storage
oscilloscope, ability to capture a single frame, and so on) to deduce the coding and quantizing
scheme for such an input.
a. 32 kHz clock signal, refer to Figure 2a.
b. 64 kHz clock signal, refer to Figure 2b
Figure 2a Delta demodulation with 32 kHz clock
Figure 2b. Delta demodulation with 64 kHz clock
 Lab Task
clc;
clear all;
close all;
a=2;
t=0:2*pi/50:2*pi;
x=a*sin(t);
l=length(x);
plot(x,'ro-');
delta=0.2;
hold on
xn=0;
for i=1:l
if x(i)>xn(i)
d(i)=1;
xn(i+1)=xn(i)+delta;
else d(i)=0;
xn(i+1)=xn(i)-delta;
end
end
stairs(xn)

hold on
for i=1:d
if d(i)>xn(i)
d(i)=0;
xn(i+1)=xn(i)-delta;
else d(i)=1;
xn(i+1)=xn(i)+delta;
end
end
plot(xn,'b*-');
xlabel('Xaxis');
ylabel('yaxis');
title('Delta Modulation-017');
legend('Real Signal','Delta Modulated Signal',' Delta Demodulated Signal')
Conclusion: