Interrupts

PSP or MSP et LR
slide 13 PSR BASEPRI
The MSR instruction can be used to transfer a value
to the BASEPRI regist

slide 14 PRIMASK CPU register I-bit Use the “CPSID I” instruction

slide 16
For enabling (IRQ numbers 0-31)…
NVIC_ISER0
slide 19 The “I” flag in PRIMASK i

slide 21 PxIFG register PxIES register

Interrupts
Interrupt Request (IRQ)
 An event that stops normal program operation
 Performs a service routine (executes specific code)
 Returns the program to normal operation

MSP432
 The MSP432 provides a specific set of interrupts

Why have interrupts?

1) I/O handling – The CPU can execute the main program and then
react to incoming data—rather than periodically testing
for data (polling).

1
Interrupts
2) Software Errors
– A program encounters errors for many different reasons (HW, SW). We
need to handle these gracefully instead of letting the program run amuck.

3) Perform Periodic Tasks

- Anything that needs to occur at a pre-defined frequency is done with
an interrupt. This ensures more precise timing.
(ex, update a clock each second)

4) Multitasking
- We can time-share between multiple programs by using an interrupt
to indicate when to switch to the next program.

5) Waking the CPU from a Sleep State

- In low-power design, the uC will sleep when there is nothing to do and
wake up in response to events.
4

Interrupts
Interrupts can be classified as:
- Externally or Internally-Generated
- Maskable or Non-Maskable
- Edge or Level-Sensitive (Applies to Externally-Generated Interrupts)

External interrupts:
- interrupts generated by devices external from the MSP432
microcontroller: All of the ports pins, NMI, and RST input pins.
- External hardware asserts one of these inputs to interrupt the CPU.

Internal interrupts:
- interrupts generated by on-chip peripheral
devices: watchdog timer, flash memory access violation, timer, et cetera.
- On-chip peripheral devices can interrupt the CPU.

Interrupts
Maskable Interrupts
- Some interrupts can be ignored: “Maskable Interrupts”
- Some interrupts CANNOT: “Non-Maskable Interrupts” (NMI)

Notation (IRQ = Interrupt Request)

Pending
- When an interrupt occurs, but has not been serviced by the
CPU.
Service
- Executing the code to perform what the interrupt wants done.
Service Routine
- The code that executes when the interrupt is serviced.
(ISR = Interrupt Service Routine)

Priority
- Interrupts can occur simultaneously.
- Some interrupts are more important than others (i.e., a fire alarm).
- Higher priority interrupts are chosen over lower priority interrupts.

2
Flow of control in response to an interrupt request

Steps and states involved in

servicing an interrupt

Interrupts

(NVIC)
Nested
Vector
Interrupt
Controller

3
 NVIV :
Processing of an Interrupt - determines the
source of interrupt

An interrupt occurs

interruptif handling

NVIC :
calls the interrupt
service routine (ISR)

périphérie unit

pointer to ISR

Interrupt vector table

10

Interrupts Processing
The processor then takes the following actions in the order shown to provide an
orderly transition from normal program operation to the interrupt service routine and
back again.
1. Complete the current instruction.
2. . Store the contents of the Program Counter onto the stack.
3. Store the contents of the Status Register onto the stack.
4. Choose the highest priority interrupt if multiple interrupts are pending.
5. Reset the interrupt request flag.
6. Clear the Status Register to prevent additional interrupts from occurring.
7. Load the contents of the interrupt vector onto the Program Counter.
8. Execute the specified interrupt service routine.
9. Once the service routine is finished, restore the Status Register and the Program
Counter values from the stack.
10. Resume normal operation.
11

12

4
Interrupts
Interrupt Vector Table
- Table of predefined addresses that hold the ISR addresses.
- Each MSP432 interrupt (internal and external) has a spot in the interrupt vector table.
- When an interrupt source is detected, the corresponding vector address is loaded
into PC.
- This table lives in a memory range that maps to the non-volatile Flash memory.

How is LR modified after being pushed?

- The top 24 bits of LR are set to 0xFFFFFF. The bottom 8 bits indicate how to return.
- Bits 7:1 indicate the stack used (PSP or MSP), floating point state, thread or handler
mode.
- Bit 0 indicates the processor instruction state (ARM or Thumb).

To leave an ISR
- Use the same “BX LR” instruction we used to leave normal subroutines. This works
because of the LR encoding mentioned above. 13

Interrupts (BASEPRI)
The current “interrupt number” is held in the PSR. When this is > 0, the processor is
executing an interrupt service routine (handler mode). When outside of an ISR, it is
zero (thread mode).

The interrupt numbers are fixed by architecture (look at datasheets or the appendix
of your text book).

The BASEPRI CPU register holds a base interrupt priority number (0-7):
0 = highest priority
7 = lowest priority

When non-zero (1-7), only interrupts with higher priority (lower number) are allowed
to interrupt. Other lower-priority interrupts are held pending—they are not lost.
When zero (special case), all interrupts are allowed.

The MSR instruction can be used to transfer a value to the BASEPRI register.
14

Interrupts (PRIMASK and NVIC)

The PRIMASK CPU register provides a bit to globally enable or disable maskable
interrupts.

The least-significant bit is called the I-bit. When set, all maskable interrupts are
ignored. When clear, any locally-enabled interrupt is permitted.

Use the “CPSID I” instruction to disable maskable interrupts and “CPSIE I” to enable
maskable interrupts.

The Nested Vectored Interrupt Controller (NVIC) intercepts all hardware interrupts.
It allows us to establish an interrupt priority (0-7) for each interrupt source—as well
as enable or disable the interrupts locally. Important interrupts should be assigned
a lower interrupt number.

Some on-chip peripheral devices may require more steps to turn on their ability
to generate interrupts.

15

5
Interrupts (NVIC Registers – Setting Priority)
The NVIC registers are mapped into the memory space like everything else.

The NVIC registers can typically be referred to by their “friendly names” when
programming:

NVIC_IPR0
…
NVIC_IPR11

Each NVIC register is 32 bits wide. Each register is broken into 4, 8-bit fields. Within
each field, only the upper 3 bits are used (in our version of the ARM processor at least).

Each 8-bit field within each 32-bit NVIC register has an associated interrupt number.
You have to consult datasheets (or the appendix of the textbook) for this association.

This is how the priority number 0-7 is assigned to each interrupt source.

16

Interrupts (NVIC Registers – Enabling/Disabling)

To enable or disable a particular interrupt source, the following registers are used:

For enabling (IRQ numbers 0-31)…

NVIC_ISER0

For enabling (IRQ numbers 32-47)…

NVIC_ISER1

For disabling (IRQ numbers 0-31)…

NVIC_ICER0

For disabling (IRQ numbers 32-47)…

NVIC_ICER1

Writing zeros to either register has no effect! Writing a 1 to the bit causes either the
enable or disable action.
17

Interrupts
Interrupt Programming
There are 3 steps that must be done to use interrupts:

1) Initialize the “Interrupt Vector Table”

2) Write Service Routine
- This is the same as writing a subroutine.
- Except the hardware has automatically pushed some registers—so you don’t have to
unless you use others.
- Return using “BX LR”.
NOTE: It is perfectly acceptable (although typically not desirable)
for an interrupt service routine to call subroutines.

P1_IRQ BL Sub1
BX LR

18

6
Interrupts
3) Enable Interrupts
- There are several places to turn on/off interrupts:

Global = Will enable multiple interrupts

(the I bit in PRIMASK)
Local = Will enable individual interrupts. Set bits in peripheral
module control registers and in the NVIC.

- Some interrupts have global and local enable bits.

- Some interrupts have only a global enable bit.
- Some interrupts are always enabled.

(See the MSP432 datasheets for more information about any specific interrupt source)

19

Interrupts
Maskable Interrupts
The “I” flag in PRIMASK is a global enable for a group of interrupts called maskable interrupts

Non-Maskable Interrupts (NMI)

 Interrupts that are not classified as maskable are called non-maskable interrupts.
 Generally speaking, these are always enabled and cannot be ignored.
 Examples include reset conditions and the NMI external interrupt pin.
 Several fault handlers are also non-maskable.
Keep Them Short
Interrupt service routines (ISR) should do the minimum amount of work
required to eliminate the interrupt. Interrupt service routines
should be short. Spending too much time in interrupt service routines can severely
hurt the system performance
Data Passing
Global variables can be used to exchange data between the main
program and the ISR (or other ISRs).
20

Interrupts (External)
External interrupts can be edge sensitive or level sensitive.

Edge sensitive interrupts trigger on a rising or falling edge of the

interrupt pin. When the ISR is complete, another interrupt does not
fire until another edge is detected.

Level sensitive interrupts trigger on an active logic level. When the

ISR is complete, another interrupt will immediately fire if the
interrupt line is still asserted.

MSP432 specific:

RST: Level sensitive

NMI: Edge sensitive (programmable edge)
Port x: Edge sensitive (programmable edge).

RST is active-low.

21

7
 Interrupts (Ports)
Port x external interrupts:
 All port x pins (interrupt sources) on a common port share a common interrupt
vector.

 To distinguish from the 8 potential sources, the PxIFG register is consulted. Each
pin has a bit in this register. Priority can be assigned by software.

 Because port interrupts are classified as maskable, the I bit in the status register
must be set as well—along with the priority and enable bit in the NVIC.

 The PxIES register allows you to set the edge sensitivity for each pin
independently.

 To enable: The interrupt capability of each I/O pin can be controlled

independently through the PxIE register (bit 7-0).

 On interrupt (when interrupt is pending that is): The appropriate bit (7-0) in the
PxIFG register is set. The port vector is consulted.
 In the ISR, the appropriate flag in the PxIFG register must be cleared! If this is not
done, the ISR will immediately restart after the BX LR instruction
22

Interrupts Processing

clears
get the the
interrupt enable enable interrupt in globally allow /
interrupt
status of the status on interruption
thethe
interrupt dis-allow the
the selected
selected pin pin peripheral controller
unit processorto react23
to interrupts

Processing Example: Interrupt

 Port 1, pin 1 (which has a switch connected to it) is configured as an inputwith
interrupts enabled and port 1, pin 0 (which has an LED connected) is configured as
an output.
 When the switch is pressed, the LED output is toggled

clear interruptflag
and enableinterrupt intmain(void) {
in periphery •...
•GPIO_setAsOutputPin(GPIO_PORT_P1, GPIO_PIN0);
•GPIO_setAsInputPinWithPullUpResistor(GPIO_PORT_P1,GPIO_PIN1);
•GPIO_clearInterruptFlag(GPIO_PORT_P1, GPIO_PIN1);
enable interrupts •GPIO_enableInterrupt(GPIO_PORT_P1, GPIO_PIN1);
in the controller •Interrupt_enableInterrupt(INT_PORT1);
(NVIC) •Interrupt_enableMaster();
•while (1) PCM_gotoLPM3();
}
enter low
powermode
LPM3
24

8
Defining an Interrupt Service Routine (ISR)
The Interrupt Service Routine (ISR) is the part of code which is executed if
the processor detected the corresponding interrupt.
In general, a programmer has the flexibility to choose any arbitrary
function to be an ISR.
Restrictions on the function;
 cannot receive arguments or return values,
 it can only modify global variables.

The DriverLib provides predefined ISR’s that are already associated with an
interrupt source.

For example, the predefined interrupt handler for Port 1 is

void PORT1_IRQHandler(void).

25

Registers
R0-R3 parameters
R4-R11 must be saved

R14, R15 are important

SP (R13) refers to PSP or MSP

We will use just the MSP

PRIMASK has intr. enable (I) bit

BASEPRI has allowed intr. priority

26

INTERRUPT VECTORS

27

9
 Configuring an Interrupt (DriverLib)
By default, all interrupts are disabled. The following steps are necessary to
configure a GPIO interrupt on the MSP432
1. Configuring the GPIO pin as an input.
GPIO_setAsInputPinWithPullUpResistor()
2. Selecting the edge (clock signal) which will trigger the interrupt.
GPIO_interruptEdgeSelect()
3. Clearing the pin’s interrupt flag. This makes sure that no previous
interrupts are handled. (This step is not mandatory, but it’s good practice
to do so.) GPIO_clearInterruptFlag()
4. Setting the interrupt enable (IE) bit of the specific GPIO pin (enabling the
interrupt in the peripheral). GPIO_enableInterrupt()
5. Setting the interrupt enable (IE) bit of the corresponding interrupt source
(enabling the interrupt in the interrupt controller).
Interrupt_enableInterrupt()
6. Enabling interrupts globally (set global interrupt enable (GIE) bit).
Interrupt_enableMaster()
28

Example 1:
volatile bool buttonFlag = false ;
void main () {
configureGpioAndInterrupt ();
while (1) {
PCM_gotoLPM3 (); // Go to low power mode and wait for interrupt
if( buttonFlag == true ) {
togglePin ( LED_PORT , LED_PIN );
buttonFlag = false ;
}}}

void BUTTON_PORT_IRQHandler ( void ) {

status = getEnabledInterruptStatus (
BUTTON_PORT );
if( status & GPIO_PIN ) {
buttonFlag = true ;
clearInterrupt ( BUTTON_PORT );
}}
29

ENERGIA INTERRUPT SUPPORT

 Energia provides four functions to support interrupt operations including
(www.energia.nu).

 NoInterrupts: suspend interrupts during a portion of time-sensitive code.

The interrupts are then re-enabled using the interrupts function.

 Interrupts: enables interrupts after suspended by the noInterrupts

 AttachInterrupt: allows a pin driver interrupt event to be associated with a

specific interrupt routine.

 DetachInterrupt: this function allows a specific interrupt to be suspended.

the required argument is the corresponding interrupt pin used in the
attachInterrupt function.

30

10
Example 1:
 In this example the program normally executes instructions in
function void loop( ).
 When switch 2 (SW2) is pushed on the MSP432, an interrupt
is asserted, the green LED changes state, and an interrupt
counter is incremented. Printouts are provided on the serial
monitor to indicate when the program is in the main program
or in the interrupt.

 file:///C:/energia-1.8.7E21/reference/www.energia.nu/

31

Example 1:
//Interrupt1
volatile int state = HIGH;
volatile int flag = HIGH;
int count = 0;
void setup()
{
Serial.begin(9600);
pinMode(GREEN_LED, OUTPUT);
digitalWrite(GREEN_LED, state);
//Enable internal pullup.
Without the pin will float
//and the example will not work.
pinMode(PUSH2, INPUT_PULLUP);
// Interrupt is asserted when switch 2 is depressed
attachInterrupt(PUSH2, blink, FALLING);
} 32

Example 1:
void loop() {
digitalWrite(GREEN_LED, state); //LED starts ON
delay(1000);
Serial.println("In the main program\n");
if(flag) {
count++;
Serial.println(count);
flag = LOW;
} //blink interrupt service routine
} void blink()
{
state = !state;
flag = HIGH;
Serial.println("Inside interrupt
1\n\n\n");
} 33

11
 Example 2:
 Example 2:
In this example the program normally executes instructions in
function void loop( ). When switch 1 (SW1) is pushed on the
MSP432, an interrupt is asserted, the red LED changes state, and
an interrupt counter is incremented. Similarly, when switch 2
(SW2) is pushed on the MSP432, an interrupt is asserted, the
green LED changes state, and an interrupt counter is
incremented.
Printouts are provided on the serial monitor to indicate when the
program is in the main program or in the interrupts.

34

Example 2:
volatile int state1 = HIGH; //Enable internal pullup.
volatile int flag1 = HIGH; pinMode(PUSH1, INPUT_PULLUP);
int count1 = 0; // Interrupt is asserted when switch 1 is
volatile int state2 = HIGH; depressed
volatile int flag2 = HIGH; attachInterrupt(PUSH1, blink1, FALLING);
int count2 = 0; //Enable internal pullup.
void setup() pinMode(PUSH2, INPUT_PULLUP);
{ // Interrupt is asserted when switch 1 is
Serial.begin(9600); depressed
pinMode(RED_LED, OUTPUT); attachInterrupt(PUSH2, blink2, FALLING);
digitalWrite(RED_LED, state1); }
pinMode(GREEN_LED, OUTPUT);
digitalWrite(GREEN_LED, state2);

35

Example 2:
void loop()
{ if(flag2)
//LED starts ON {
digitalWrite(RED_LED, state1); count2++;
digitalWrite(GREEN_LED, state2); Serial.print("Count2:");
delay(500); Serial.println(count2);
Serial.println("In the main program\n"); Serial.println("");
if(flag1) flag2 = LOW;
{ }
count1++; }
Serial.print("Count1:");
Serial.println(count1);
Serial.println("");
flag1 = LOW;
} 36

12
Example 2:
//blink1 interrupt service routine

void blink1()
{
state1 = !state1;
flag1 = HIGH;
Serial.println("Inside interrupt 1\n\n\n");
}

//blink2 interrupt service routine

void blink2()
{
state2 = !state2;
flag2 = HIGH;
Serial.println("Inside interrupt 2\n\n\n");
}

p344 37

13