MANSOOR SULTAN LAB DATA

 In an unregulated power supply, if load current increases, the output

voltage ………..
1. Remains the same
2. Decreases
3. Increases
4. None of the above
Answer : 2
Q2. In an unregulated power supply, if input a.c. voltage increases, the
output voltage …….
1. Increases
2. Decreases
3. Remains the same
4. None of the above
Answer : 1
Q3. A power supply which has voltage regulation of ……….. is unregulated
power supply
1. 0 %
2. 5 %
3. 10 %
4. 8%
Answer : 3
Q4. Commercial power supplies have voltage regulation ………….
1. of 10%
2. of 15%
3. of 25%
4. within 1%
Answer : 4
Q5. An ideal regulated power supply is one which has voltage regulation of
…………
1. 0%
2. 5%
3. 10%
4. 1%
Answer : 1
Q6. A Zener diode utilises ………… characteristic for voltage regulation
1. Forward
2. Reverse
3. Both forward and reverse
 4. None of the above
Answer : 2
Q7. Zener diode can be used as …………
1. c. voltage regulator only
2. c. voltage regulator only
3. both d.c. and a.c. voltage regulator
4. none of the above
Answer : 3
Q8. A Zener diode is used as a …………… voltage regulating device
1. Shunt
2. Series
3. Series-shunt
4. None of the above
Answer : 1
Q9. As the junction temperature increases, the voltage breakdown point for
Zener mechanism …………
1. Is increased
2. Is decreased
3. Remains the same
4. None of the above
Answer : 2
Q10. The rupture of co-valent bonds will occur when the electric field is
………….
1. 100 V/cm
2. 6 V/cm
3. 1000 V/cm
4. More than 105 V/cm
Answer : 4
Q11. In a 15 V Zener diode , the breakdown mechanism will occur by
………….
1. Avalanche mechanism
2. Zener mechanism
3. Both Zener and avalanche mechanism
4. None of the above
Answer : 1
Q12. A Zener diode that has very narrow depletion layer will breakdown
by ……… mechanism
1. Avalanche
2. Zener
 3. Both avalanche and Zener
4. None of the above
Answer : 2
Q13. As the junction temperature increases, the voltage breakdown point
for avalanche mechanism ………….
1. Remains the same
2. Decrease
3. Increases
4. None of the above
Answer : 3
Q14. Another name for Zener diode is ………… diode
1. Breakdown
2. Voltage
3. Power
4. Current
Answer : 1
Q15. Zener diode are generally made of ……….
1. Germanium
2. Silicon
3. Carbon
4. None of the above
Answer : 2
Q16. For increasing the voltage rating, zeners are connected in …………..
1. Parallel
2. Series-parallel
3. Series
4. None of the above
Answer : 3
Q17. In a Zener voltage regulator, the changes in load current produce
changes in …………….
1. Zener current
2. Zener voltage
3. Zener voltage as well as Zener current
4. None of the above
Answer : 1
Q18. A Zener voltage regulator is used for …………… load currents
1. High
2. Very high
3. Moderate
 4. Small
Answer : 4
Q19. A Zener voltage regulator will cease to act as a voltage regulator if
Zener current becomes ……………
1. Less than load current
2. Zero
3. More than load current
4. None of the above
Answer : 2
Q20. If the doping level is increased, the breakdown voltage of the Zener
…………..
1. Remains the same
2. Is increased
3. Is decreased
4. None of the above
Answer : 3
Q21. A 30 V Zener will have depletion layer width …………. that of 10 V
Zener
1. More than
2. Less than
3. Equal to
4. None of the above
Answer : 1
Q22. The current in a Zener diode is limited by …………..
1. External resistance
2. Power dissipation
3. Both (1) and (2)
4. None of the above
Answer : 3
Q23. A 5 mA changes in Zener current produces a 50 mA change in Zener
voltage. What is the Zener impedance?
1. 1 Ω
2. 1 Ω
3. 100 Ω
4. 10 Ω
Answer : 4
Q24. A certain regulator has a no-load voltage of 6 V and a full-load output
of 5.82 V. What is the load regulation?
1. 09%
 2. 87 %
3. 72 %
4. None of the above
Answer : 1
Q25. What is true about the breakdown voltage in a Zener diode?
1. It decreases when load current increases
2. It destroys the diode
3. It equals current times the resistance
4. It is approximately constant
Answer : 4
Q26. Which of these is the best description for a Zener diode?
1. It is a diode
2. It is a constant current device
3. It is a constant-voltage device
4. It works in the forward region
Answer : 3
Q27. A Zener diode …………..
1. Is a battery
2. Acts like a battery in the breakdown region
3. Has a barrier potential of 1 V
4. Is forward biased
Answer : 2
Q28. The load voltage is approximately constant when a Zener diode is
……….
1. Forward biased
2. Unbiased
3. Reverse biased
4. Operating in the breakdown region
Answer : 4
Q29. In a loaded Zener regulator, which is the largest Zener current?
1. Series current
2. Zener current
3. Load current
4. None of the above
Answer : 1
Q30. If the load resistance decreases in a Zener regulator, then Zener
current …………….
1. Decreases
2. Stays the same
 3. Increases
4. None of the above
Answer : 1
Q31. If the input a.c. voltage to regulated or ordinary power supply
increases by 5% what will be the approximate change in d.c. output
voltage?
1. 10%
2. 20%
3. 15%
4. 5%
Answer : 4
Q32. If the load current drawn by unregulated power supply increases, the
d.c. output voltage ………..
1. Increases
2. Decreases
3. Stays the same
4. None of the above
Answer : 2
Q33. If the load current drawn by unregulated power supply increases, the
d.c. output voltage ………
1. Increases
2. Decreases
3. Stays the same
4. None of the above
Answer : 2
Q34. A power supply has a voltage regulation of 1%. If the no-load  voltage
is 20 V, what is the full-load voltage?
1. 8 V
2. 7 V
3. 6 V
4. 2 V
Answer : 1
Q35. Two similar 15 V Zeners are connected in series. What is the
regulated output voltage?
1. 15 V
2. 5 V
3. 30 V
4. 45 V
Answer : 3
Q36. A power supply can deliver a maximum rated current of 0.5 A at full-
load output voltage of 20 V. What is the minimum load resistance that you
can connect across the supply?
1. 10 Ω
2. 20 Ω
3. 15 Ω
4. 40 Ω
Answer : 4
Q37. In a regulated power supply, two similar 15 V zeners are connected in
series. The input voltage is 45 V d.c. If each Zener has a maximum current
rating of 300 mA, what should be the value of the series resistance?
1. 10 Ω
2. 50 Ω
3. 25 Ω
4. 40 Ω
Answer : 2
Q38. A Zener regulator …………… in the power supply
1. Increases the ripple
2. Decreases the ripple
3. Neither increases nor decreases the ripple
4. Data insufficient
Answer : 2
Q39. When load current is zero, the Zener current will be ………
1. Zero
2. Minimum
3. Maximum
4. None of the above
Answer : 3
Q40. The Zener current will be minimum when …………
1. Load current is maximum
2. Load current is minimum
3. Load current is zero
4. None of the above
Answer : 1

For full-wave rectified sine wave, rms value is

0.707 im

0.6036 im

0.5 im

0.318 im

Ripple factor of full wave rectifier

Ripple factor of full wave rectifier

It has dynamic resistance

. The value of the resistance is the inverse of the slope of the i-v characteristics of the Zener
diode

All of these

Which of the following eliminates fluctuation in the rectified voltage and produces smooth dc :

ransformer

rectifier

regulator

filter
Which of the items below describes an RF amplifier which will amplify a weak signal voltage in
relatively the same proportion as it will amplify a stronger signal voltage?

Class A amplifier

Linear amplifier

Non-linear amplifier

Ritarted amplifier

Inverting amplifier

How many AND gates are required to realize Y = CD + EF + G?

1

2
3
4

Both transistors either NPN or PNP, in the multivibrator are biased for linear ope

n and are operated as Common Emitter Amplifiers with…….. positive feedback.

80%

90%

100%

33%

Which of the following is provided by a CB transistor amplifier?

Voltage gain
Power gain

Current gain

Gain stability

Registration No *

bsf1701928

The output voltage waveform of the given circuit will be

Option 1

Option 2

Option 3
 Option 4

The voltage gain of a common collector configuration is

Unity
Zero

Very high

Moderate

OR and AND gates can have only inputs…….

All of these
Exclusive-OR (XOR) logic gates can be constructed from ………..logic gates.

OR gates only

AND gates and NOT gates

AND gates, OR gates, and NOT gates

OR gates and NOT gates

In an unregulated power supply, if input A.C. voltage increases, the output voltage …….

Increases
Decreases

Remains the same

 None of the above

In a transistor

Ic = Ie + Ib

Ib = Ic + Ie

Ie = Ic – Ib

Ie = Ic + Ib

Why zener diodes are provided in dc supply?

For forward conduction

For reverse currents

For reference voltage

For increasing amplitude

Ripple factor of full wave rectifier

0.48

48

.048

480

If the output of the transistor amplifier 5V rms and the input is 100mV rms, the voltage gain is

500

50

100

An ammeter’s ideal resistance should be

Zero

Unity

Infinite

The same with the circuits resistance

A heavily doped semiconductor has

 High resistance

No effect on the semiconductor characteristics

More heat dissipation

Zero resistance

Low resistance

Output waveform of the circuit given below is

b
 c

A power supply which has voltage regulation of ……….. is unregulated power supply

0%

5%

10 %

8%

A transistor converts

Dc power into ac power

Ac power into dc power

High resistance into low resistance

Low resistance into high resistance

The capacitors are considered in the dc equivalent circuit of a transistor amplifier.

Short
 Partially short

Open
Partially open

The bias condition for a transistor to be used as a linear amplifier is called

forward-reverse

reverse-reverse

forward-forward

collector bias

An LED

emits light when reverse biased

senses light when reverse biased

doest emit any light

emits light when forward biased

acts as a variable resistance

Which of the items below is not true for a transistor?

It is the current gain of a common-base configu

It is the ratio of the change in collector current to the change in emitter current

It is usually having a value of unity in some approximations

It is having a value Ic=zaro

It is the ratio of the change in collector current to the change in base current.

Refer to the figure given below if a load resistance of 600Ω is placed at the output the
maximum gain would be
 65.5

6.55

0.655

655

Program and shift (e.g MSc Physics Evening) *

BS Physics Morning

BS Physics Evening

MSc Physics Morning

MSc Physics Evening

If the load current drawn by unregulated power supply increases, the d.c. output voltage ………

Increases

Decreases
Stays the same

None of the above

Circuits which produce an output wave shape resembling that of a symmetrical or

asymmetrical square wave are called

Timing generator

Frequency generator

Multivibrator

Single vibrator

Which of the following can be source of supply in dc power supplies?

 Battery

Dry cell

Full wave rectifier

cell

All of these

A Multimeter is used to measure___________

Only AC current

Only DC voltage

Both AC and DC quantities

Resistance only

Capacitance

Student Name *

m zubair arshad

What diode has no depletion layer?

Varactor

Varistor

Schottky diode

Zener

Shockley diode

To increase current capacity, cells are connected in

parallel

series

series- parallel

parallel- series

vertically

Which of the applications filters used for?

a. Reducing ripples
 b. Increasing ripples
c. Increasing phase change
d. Increasing amplitude
e. Low ripple

Ripple factor of a half wave rectifier is_________Im is the peak current and RL is load
resistance)

1.21

0.48

1.414

1.4

When a transistor is fully saturated,

The emitter current is at its minimum value

The transistor alpha is at its maximum value

The current is zero at emitter

The beta of the transistor is at minimal value

The collector current is at its maximum value

In an unregulated power supply, if input A.C. voltage increases, the output voltage …….

Increases

Decreases

Remains the same

None of these

The Zener current will be minimum when …………

Load current is maximum

Load current is minimum

Load current is zero

None of the above

Ina common emitter amplifier, the capacitor from emitter to ground is called the

Coupling capacitor
 Bypass capacitor
Decoupling capacitor

Tuning capacitor

Refer to the figure given below the value of gain is

a. 170
b. 171
c. 100
d. 17

In a BJT, if the collector-base junction and the base-emitter junction are both reverse-biased,
which region is the BJT operating in?

Starting region

Saturation region

Active region

Cutoff region

None of the mentioned

A power supply can deliver a maximum rated current of 0.5 A at full-load output voltage of 20
V. What is the minimum load resistance that you can connect across the supply?
 10 Ω

20 Ω

15 Ω

40 Ω

The number of depletion region in transistor is_____ *

a. 1
b. 2
c. 3
d. 4

The collector of the transistor is____ doped? *

a. Heavily
b. Moderately

c. Lightly
d. None of these

To deflect electrons to desired positions on the screen of a television tube, we

use? *
a. Circuit breaker
b. Electric current
c. Electromagnets

d. Fuse

The emitter of the diode is____ doped? *

 a. Heavily

b. Moderately
c. Lightly
None of these

The output of an AND gate with three inputs, A, B, and C, is HIGH when ____. *
a. A = 1, B = 1, C = 0
b. A = 0, B = 0, C = 0
c. A = 1, B = 1, C = 1

d. A = 1, B = 0, C = 1

If a signal passing through a gate is inhibited by sending a LOW into one of the
inputs, and the output is HIGH, the gate is___ *
a. AND
b. NAND

c. NOR
d. OR

Which of the following logical operations is represented by the + sign in Boolean

algebra? *
a. inversion
b. AND
c. OR

d. complementation
Output will be a LOW for any case when one or more inputs are zero for an: *
a. OR gate
b. NOT gate
c. AND gate

d. NOR gate

The output of a NOR gate is HIGH if ____. *

a. all inputs are HIGH
b. any input is HIGH
c. any input is LOW
d. all inputs are LOW

The format used to present the logic output for the various combinations of
logic inputs to a gate is called an *
a. Boolean constant
b. Boolean variable
c. truth table

d. input logic function

The Boolean expression for a 3-input AND gate is ____. *

a. X = AB
b. X = ABC

c. X = A + B + C
d. X = AB + C
If the input to a NOT gate is A and the output is X, then ____. *
a. X = A
b. X= A~

c. X = 0
d. none of the above

Which of the following gates has the exact inverse output of the OR gate for all
possible input combinations? *
a. NOR

b. NOT
c. NAND
d. AND

2-input NOR gate is equivalent to a ____. *

a. negative-OR gate
b. negative-AND gate
c. negative-NAND gate

d. none of the above

Zener diodes are also known as

a. Voltage regulators
b. Breakdown diode

c. Forward bias diode

 d. None of these

Which of the following can be used in series with a Zener diode so that
combination has almost zero temperature coefficient? *
a. Diode

b. Resistor
c. Transistor
d. MOSFET

. Zener diodes can be effectively used in voltage regulator. However, they are
these days being replaced by more efficient *
a. Operational Amplifier
b. MOSFET
c. Integrated Circuits

d. None of the mentioned

Which of the following is true about the temperature coefficient or TC of the

Zener diode? *
a. For Zener voltage less than 5V, TC is negative
b. For Zener voltage around 5V, TC can be made zero
c. For higher values of Zener voltage, TC is positive
d. All of the these

Which of the following is true about the resistance of a Zener diode? *

a. It has an incremental resistance
b. It has dynamic resistance
 c. The value of the resistance is the inverse of the slope of the i-v
characteristics of the Zener diode
d. All of these

Amount of current drawn from output of an amplifier or other circuits through

load resistance is called. *
a. Clock
b. Load

c. Drain
d. Input

Gain of common emitter amplifier is to determine by ratio of AC output voltage

to.
a. Collector voltage
b. Emitter voltage
c. Base voltage
d. Drain voltage

In common emitter amplifier, amplified output with respect to input is. *

a. In phase
b. 90˚ out of phase
c. 180˚ out of phase

d. 360˚ out of phase

Measure of how well an amplifier maintains its design value over changes in
temperature or other factor is called. *
 a. measurement
b. maintenance
c. stability

d. loading

If AC emitter current of common amplifier is 3.80 m A then AC emitter resistance

will be. *
a. 5.3Ω
b. 2.45 Ω
c. 6.58 Ω

d. 8.32 Ω

If supply frequency of a transformer increases, the secondary output voltage of

the transformer *
a. Increase

b. Decrease
c. Remain the same
d. Any of the above

A transformer transform *
a. Current
b. power
c. all of these
d. Voltage
Transformer core are laminated in order to. *
a. Reduce hysteresis loss
b. Reduce hysteresis & eddy current loss
c. Maximize eddy current loss

d. none of these

The rating of transformer may be expressed in ____. *

a. KW
b. KVA
c. KVB
d. none of these

A Step Up transformer _____. *

a. Step Up the level of Voltage
b. Step down the level of current
c. Step up level the power
d. Both a and b

A zener diode has ……….. *

a. An amplifier
b. A voltage regulator

c. A rectifier
d. A multivibrator
The doping level in a zener diode is …………… that of a crystal diode
a. The same as
b. Less than
c. More than
d. None of the above

A zener diode is always ………… connected. *

a. Reverse

b. Forward
c. Either reverse or forward
d. None of the above

In the break down region zener diode behave like a ___ source. *
a. Constant voltage

b. Constant current
c. Constant resistance
d. None of the above

A zener diode is destroyed if it………….. *

a. Is forward biased
b. Is reverse biased
c. Carrier more than rated current

d. None of the above

When current is only forward biased *

 a. The only current is the hole current
b. The only current is electron current
c. The only current is majority charge carriers
d. The current is produced by both holes and electrons

When forward biased is a diode then *

a. Blocks current
b. Conduction current

c. Has a high resistance

d. Drops a large resistance

Battery is connected between Negative Terminal to N-region and Positive

Terminal to P-region is called. *
a. Forward biased

b. Reverse biased
c. Both a & b
d. None

The width of depletion region is increases in *

a. Forward bias
b. Reverse bias

c. Both A & B
d. None
If the battery voltage is above a particular limit (Reverse bias breakdown voltage)
this breakdown is called. *
a. Electrical break down
b. Vacuum breakdown
c. Avalanche Breakdown

d. None

If only one half cycle of input AC wave is converted into DC wave is called…… *
a. Half wave rectification

b. Full wave rectication

c. Both of these
d. None of these

Which circuit has been represented in the associated circuit diagram? *

a. Captionless Image
b. Half wave rectifier
c. Full wave rectifier
d. NOT gate
e. AND gate
This form was created inside of University of Education.
Google Forms

Q1. A JFET has three terminals, namely …………

1. cathode, anode, grid
2. emitter, base, collector
3. source, gate, drain
4. none of the above
Answer : 3
Q2. A JFET is similar in operation to …………. valve
1. diode
2. pentode
3. triode
4. tetrode
Answer : 2
Q3. A JFET is also called …………… transistor
1. unipolar
2. bipolar
3. unijunction
4. none of the above
Answer : 1
Q4. A JFET is a ………… driven device
1. current
2. voltage
3. both current and voltage
4. none of the above
Answer : 2
Q5. The gate of a JFET is ………… biased
1. reverse
2. forward
3. reverse as well as forward
4. none of the above
Answer : 1
Q6. The input impedance of a JFET is …………. that of an ordinary
transistor
1. equal to
2. less than
3. more than
4. none of the above
Answer : 3
Q7. In a p-channel JFET, the charge carriers are …………..
1. electrons
2. holes
3. both electrons and holes
4. none of the above
Answer : 2
Q8. When drain voltage equals the pinch-off-voltage, then drain current
…………. with the increase in drain voltage
 1. decreases
2. increases
3. remains constant
4. none of the above
Answer : 3
Q9. If the reverse bias on the gate of a JFET is increased, then width of the
conducting channel …………..
1. is decreased
2. is increased
3. remains the same
4. none of the above
Answer : 1
Q10. A MOSFET has …………… terminals
1. two
2. five
3. four
4. three
Answer : 4
Q11. A MOSFET can be operated with ……………..
1. negative gate voltage only
2. positive gate voltage only
3. positive as well as negative gate voltage
4. none of the above
Answer : 3
Q12. A JFET has ……….. power gain
1. small
2. very high
3. very small
4. none of the above
Answer : 2
Q13. The input control parameter of a JFET is ……………
1. gate voltage
2. source voltage
3. drain voltage
4. gate current
Answer : 1
Q14. A common base configuration of a pnp transistor is analogous to
………… of a JFET
1. common source configuration
 2. common drain configuration
3. common gate configuration
4. none of the above
Answer : 3
Q15. A JFET has high input impedance because …………
1. it is made of semiconductor material
2. input is reverse biased
3. of impurity atoms
4. none of the above
Answer : 2
Q16. In a JFET, when drain voltage is equal to pinch-off voltage, the
depletion layers ………
1. almost touch each other
2. have large gap
3. have moderate gap
4. none of the above
Answer : 1
Q17. In a JFET, IDSS is known as …………..
1. drain to source current
2. drain to source current with gate shorted
3. drain to source current with gate open
4. none of the above
Answer : 2
Q18. The two important advantages of a JFET are …………..
1. high input impedance and square-law property
2. inexpensive and high output impedance
3. low input impedance and high output impedance
4. none of the above
Answer : 1
Q19. …………. has the lowest noise-level
1. triode
2. ordinary trnsistor
3. tetrode
4. JFET
Answer : 4
Q20. A MOSFET is sometimes called ………. JFET
1. many gate
2. open gate
3. insulated gate
 4. shorted gate
Answer : 3
Q21. Which of the following devices has the highest input impedance?
1. JFET
2. MOSFET
3. Crystal diode
4. ordinary transistor
Answer : 2
Q22. A MOSFET uses the electric field of a ………. to control the channel
current
1. capacitor
2. battery
3. generator
4. none of the above
Answer : 1
Q23. The pinch-off voltage in a JFET is analogous to ………. voltage in a
vacuum tube
1. anode
2. cathode
3. grid cut off
4. none of the above
Answer : 3
Q24. This question will be available soon
 

Q25. In class A operation, the input circuit of a JFET is ………. biased

1. forward
2. reverse
3. not
4. none of the above
Answer : 2
Q26. If the gate of a JFET is made less negative, the width of the
conducting channel……….
1. remains the same
2. is decreased
3. is increased
4. none of the above
Answer : 3
Q27. The pinch-off voltage of a JFET is about ……….
 1. 5 V
2. 0.6 V
3. 15 V
4. 25 V
Answer : 1
Q28. The input impedance of a MOSFET is of the order of ………..
1. Ω
2. a few hundred Ω
3. kΩ
4. several MΩ
Answer : 4
Q29. The gate voltage in a JFET at which drain current becomes zero is
called ……….. voltage
1. saturation
2. pinch-off
3. active
4. cut-off
Answer : 2
Q30. This question will be available soon
 

Q31. In a FET, there are ……….. pn junctions at the sides

1. three
2. four
3. five
4. two
Answer : 4
Q32. The transconductance of a JFET ranges from ……………..
1. 100 to 500 mA/V
2. 500 to 1000 mA/V
3. 0.5 to 30 mA/V
4. above 1000 mA/V
Answer : 3
Q33. The source terminal of a JEFT corresponds to ………….. of a vacuum
tube
1. plate
2. cathode
3. grid
4. none of the above
Answer : 2
Q34. The output characteristics of a JFET closely resemble the output
characteristics of a ………. valve
1. pentode
2. tetrode
3. triode
4. diode
Answer : 1
Q35. If the cross-sectional area of the channel in n-channel JEFT increases,
the drain current ……….
1. is increased
2. is decreased
3. remains the same
4. none of the above
Answer : 1
Q36. The channel of a JFET is between the …………….
1. gate and drain
2. drain and source
3. gate and source
4. input and output
Answer : 2
Q37. For VGS = 0 V, the drain current becomes constant when VDS exceeds
………
1. cut off
2. VDD
3. VP
4. o V
Answer : 3
Q38. A certain JFET data sheet gives  VGS(off) = -4 V. The pinch-off voltage
Vp is ……..
1. +4 V
2. -4 V
3. dependent on VGS
4. data insufficient
Answer : 1
Q39. The constant-current region of a JFET lies between
1. cut off and saturation
2. cut off and pinch-off
3. o and IDSS
 4. pinch-off and breakdown
Answer : 4
Q40. At cut-off, the JFET channel is ……….
1. at its widest point
2. completely closed by the depletion region
3. extremely narrow
4. reverse baised
Answer : 2
Q41. A MOSFET differs from a JFET mainly because ………………
1. of power rating
2. the MOSFET has two gates
3. the JFET has a pn junction
4. none of the above
Answer : 3
Q42. A certain D-MOSFET is biased at VGS = 0 V. Its data sheet specifies
IDSS = 20mA and VGS(off)  = -5 V. The value of the drain current is …………
1. 20 mA
2. 0 mA
3. 40 mA
4. 10 mA
Answer : 1
Q43. A n-channel D-MOSFET with a positive VGS is operating in …………
1. the depletion-mode
2. the enhancement-mode
3. cut off
4. saturation
Answer : 2
Q44. A certain p-channel E-MOSFET has VGS(th)  = -2V. If VGS= 0V, the
drain current is ……….
1. 0 mA
2. ID(on)
3. maximum
4. IDSS
Answer : 1
Q45. In a common-source JFET amplifier, the output voltage is
…………………
1. 180o out of phase with the input
2. in phase with the input
3. 90o out of phase with the input
 4. taken at the source
Answer : 1
Q46. In a certain common-source D-MOSFET amplifier, Vds =3.2 V r.m.
and Vgs = 280 mV r.m.s. The voltage gain is …………
1. 1
2. 11.4
3. 8.75
4. 3.2
Answer : 2
Q47. In a certain CS JFET amplifier,  RD= 1kΩ , RS= 560 Ω , VDD=10V
and gm= 4500 μS. If the source resistor is completely bypassed, the voltage
gain is …………
1. 450
2. 45
3. 2.52
4. 4.5
Answer : 4
Q48. A certain common-source JFET has a voltage gain of 10. If the source
bypass capacitor is removed, ……………….
1. the voltage gain will increase
2. the transconductance will increase
3. the voltage gain will decrease
4. the Q-point will shift
Answer : 3
Q49. A CS JFET amplifier has a load resistance of 10 kΩ ,  RD= 820Ω .
If gm= 5mS and Vin= 500 mV, the output signal voltage is ………..
1. 2.05 V
2. 25 V
3. 0.5 V
4. 1.89 V
Answer : 4
Q50. If load resistance in the above question (Q.49) is removed, the output
voltage will …………
1. increase
2. decrease
3. stay the same
4. be zero
Answer : 1
Q.51. When not in use, MOSFET pins are kept at the same potential
through the use of …………
1. shipping foil
2. nonconductive foam
3. conductive foam
4. a wrist strap
Answer: 3
Q.52. D-MOSFETs are sometimes used in series to construct a cascode
high-frequency amplifier to overcome the loss of …………..
1. low output impedance
2. capacitive reactance
3. high input impedance
4. inductive reactance
Answer: 3
Q.53. A “U” shaped, opposite-polarity material built near a JFET-channel
center is called the ……….
1. gate
2. block
3. drain
4. heat sink
Answer: 1
Q.54. When testing an n-channel D-MOSFET, resistance G to D =  ,
resistance G to S =  , resistance D to SS =   and 500  , depending on the
polarity of the ohmmeter, and resistance D to S = 500  . What is wrong?
1. short D to S
2. open G to D
3. open D to SS
4. nothing
Answer: 4
Q.55. In the constant-current region, how will the IDS change in an n-
channel JFET?
1. As VGS decreases ID decreases.
2. As VGS increases ID increases
3. As VGS decreases ID remains constant.
4. As VGS increases ID remains constant.
Answer: 1
Q.56. IDSS can be defined as ………
1. the minimum possible drain current
2. the maximum possible current with VGS held at –4 V
 3. the maximum possible current with VGS held at 0 V
4. the maximum drain current with the source shorted
Answer: 3
Q.57. The input impedance of a common-gate configured JFET is …………
1. very low
2. low
3. high
4. very high
Answer: 1
Q.58. A very simple bias for a D-MOSFET is called ……..
1. self biasing
2. gate biasing
3. zero biasing
4. voltage-divider biasing
Answer: 3
Q.59. With the E-MOSFET, when gate input voltage is zero, drain current
is …..
1. at saturation
2. zero
3. IDSS
4. widening the channel
Answer: 2
Q.60. With a 30-volt VDD, and an 8-kilohm drain resistor, what is the E-
MOSFET Q point voltage, with ID = 3 mA?
1. 6 V
2. 10 V
3. 24 V
4. 30 V
Answer: 1
Q.61. When an input signal reduces the channel size, the process is called
…….
1. enhancement
2. substrate connecting
3. gate charge
4. depletion
Answer: 4
Q.62. Which JFET configuration would connect a high-resistance signal
source to a low-resistance load ?
1. source follower
 2. common-source
3. common-drain
4. common-gate
Answer: 1
Q.63. When VGS = 0 V, a JFET is……….
1. saturated
2. an analog device
3. an open switch
4. an open switch
Answer: 1
Q.64. The electrons flow through a p-channel JFET from ……….. to
…………..
1. from source to drain
2. from source to gate
3. from drain to gate
4. from drain to source
Answer: 4
Q.65. When applied input voltage varies the resistance of a channel, the
result is called…………..
1. saturization
2. polarization
3. cutoff
4. field effect
Answer: 4
Q.66. When is a vertical channel E-MOSFET used?
1. for high frequencies
2. for high voltages
3. for high currents
4. for high resistances
Answer: 3
Q.67. When the JFET is no longer able to control the current, this point is
called the …………
1. breakdown region
2. depletion region
3. saturation point
4. pinch-off region
Answer: 1
Q.68.  With a JFET, a ratio of output current change against an input
voltage change is called as ………..
 1. transconductance
2. siemens
3. resistivity
4. gain
Answer: 1
Q.69. Which type of JFET bias requires a negative supply voltage?
1. feedback
2. source
3. gate
4. voltage divider
Answer: 3
Q.70. How will a D-MOSFET input impedance change with signal
frequency?
1. As frequency increases input impedance increases.
2. As frequency increases input impedance is constant.’
3. As frequency decreases input impedance increases.
4. As frequency decreases input impedance is constant.
Answer: 3
Q.71. The type of bias most often used with E-MOSFET circuits
is………….
1. constant current
2. drain-feedback
3. voltage-divider
4. zero biasing
Answer: 2
Q.72. The transconductance curve of a JFET is a graph of …………… vs
……….
1. IS versus VDS
2. IC versus VCE
3. ID versus VGS
4. ID × RDS
Answer: 3
Q.73. The common-source JFET amplifier has ………..
1. a very high input impedance and a relatively low voltage gain
2. a high input impedance and a very high voltage gain
3. a high input impedance and a voltage gain less than 1
4. no voltage gain
Answer: 1
Q.74. The overall input capacitance of a dual-gate D-MOSFET is lower
because the devices are usually connected ………..
1. in parallel
2. with separate insulation
3. with separate inputs
4. in series
Answer: 4
Q.75. Which component is considered to be an “OFF” devic.
1. transistor
2. JFET
3. D-MOSFET
4. E-MOSFET
Answer: 4
Q.76.  In an n-channel JFET, what will happen at the pinch-off voltage?
1. the value of VDS at which further increases in VDS will cause no further
increase in ID
2. the value of VGS at which further decreases in VGS will cause no further
increases in ID
3. the value of VDG at which further decreases in VDG will cause no further
increases in ID
4. the value of VDS at which further increases in VGS will cause no further
increases in ID
Answer: 1

Q1. The universal gate is ………………

1. NAND gate
2. OR gate
3. AND gate
4. None of the above
Ans. 1
Q2. The inverter is ……………
1. NOT gate
2. OR gate
3. AND gate
4. None of the above
Ans. 1
Q3. The inputs of a NAND gate are connected together. The resulting
circuit is ………….
1. OR gate
2. AND gate
3. NOT gate
4. None of the above
Ans. 3
Q4. The NOR gate is OR gate followed by ………………
1. AND gate
2. NAND gate
3. NOT gate
4. None of the above
Ans. 3
Q5. The NAND gate is AND gate followed by …………………
1. NOT gate
2. OR gate
3. AND gate
4. None of the above
Ans. 1
Q6. Digital circuit can be made by the repeated use of ………………
1. OR gates
2. NOT gates
3. NAND gates
4. None of the above
Ans. 3
Q7. The only function of NOT gate is to ……………..
1. Stop signal
2. Invert input signal
3. Act as a universal gate
4. None of the above
Ans. 2
Q8. When an input signal 1 is applied to a NOT gate, the output is
………………
1. 0
2. 1
3. Either 0 & 1
4. None of the above
Ans. 1
Q9. In Boolean algebra, the bar sign (-) indicates ………………..
1. OR operation
2. AND operation
 3. NOT operation
4. None of the above
Ans. 3
Q10. An OR gate has 4 inputs. One input is high and the other three are
low. The output is …….
1. Low
2. High
3. alternately high and low
4. may be high or low depending on relative magnitude of inputs
Ans. 2
Q11. Both OR and AND gates can have only two inputs.
1. True
2. False
Ans. 2
Q12. The output will be a LOW for any case when one or more inputs are
zero in a/an …………
1. OR Gate
2. NOT Gate
3. AND Gate
4. NAND Gate
Ans. 3
Q13. A single transistor can be used to build ………….. gates .
1. OR Gate
2. NOT Gate
3. AND Gate
4. NAND Gate
Ans. 3
Q14. The logic gate that will have HIGH or “1” at its output when any one
of its inputs is HIGH is a/an …………… gate.
1. OR Gate
2. NOT Gate
3. AND Gate
4. NAND Gate
Ans. 1
Q15. …………. NAND circuits are contained in a 7400 NAND IC.
1. 1
2. 2
3. 4
4. 8
Ans. 3
Q16. Exclusive-OR (XOR) logic gates can be constructed from
………..logic gates.
1. OR gates only
2. AND gates and NOT gates
3. AND gates, OR gates, and NOT gates
4. OR gates and NOT gates
Ans. 3
Q17. ……….. truth table entries are necessary for a four-input circuit.
1. 4
2. 8
3. 12
4. 16
Ans. 4
Q18. A NAND gate has …….. inputs and ……. output.
1. LOW inputs and LOW outputs
2. HIGH inputs and HIGH outputs
3. LOW inputs and HIGH outputs
4. None of these
Ans. 3
Q19. The basic logic gate whose output is the complement of the input is
………….
1. OR gate
2. AND gate
3. INVERTER gate
4. Comparator
Ans. 3
Q20. ……….. input values will cause an AND logic gate to produce a HIGH
output.
1. At least one input is HIGH
2. At least one input is LOW
3. All inputs are HIGH
4. All inputs are LOW
Ans. 3

1
. Boolean Algebra can be used to
A. Simplify Any Algebraic Expressions
 B. Minimize the number of switches in a circuits
C. Solve the mathematical problem
D. Perform arithmetic calculation
A. Simplify any algebraic expressions
2
. An inverter gates can be developed using
A. Two diodes
B. A resistance and capacitance
C. A Transistor
D. An inductance and capacitance
C. A transistor
3
. if an input A is given to an inverter,the output will be
A. 1/A
B. 1
C. A
D. ‾A
D. ‾A
4
. The output of two input OR gate is high
A. . Only if both inputs are high
B. Only if both inputs are low
C. Only if one input is high and the other is low
D. If At Least One Of The Inputs Is Low
D. If at least one of the inputs is low
5
. the output of a two input AND gate is high
A. Only If Both The Inputs Are High
B. only if both the inputs are low
C. only if one inputs is high and other is low
D. if atleast one of the input is low
A. only if both the inputs are high
6
. NAND gate means
A. inversion followed by And Gates
B. AND Gates Followed By An Inverter
 C. AND gate followed by an or gate
D. None of these
B. AND gates followed by an inverter
7
. The out put of two input NAND gate is high
A. .only if both the inputs are high
B. only if both the inputs are low
C. only if one input is high and other input is low
D. If Atleast One The Inputs Is Low
D. if atleast one the inputs is low
8
. A NOT gate means
A. Inversion followed by an OR gate
B. OR Gate Followed By An An Inverter
C. Not gate followed by an OR gate
D. NAND gate followed by an OR gate
B. OR gate followed by an an inverter
9
. The output of two input NOR gate is high
A. Only if both the inputs are high
B. Only If Both The Inputs Are Low
C. only if one of the input is high and the other is low
D. if atleast one the inputs is high
B. only if both the inputs are low
10
. A Digital word has even parity
A. If It Has Even Number Of 1s
B. if it has even number of 0 s
C. if the decimal value of word is even
D. None of these
A. if it has even number of 1s
11
. An XOR gate gives a high output
A. If There Are Odd Number Of 1s In The Input
B. if these are even number of 1 s in the input
C. .if there are odd number of 0s in the input
 D. if there are even numbers of 1 s in the input
A. if there are odd number of 1s in the input
12
. An exclusive NOR gate is logically equal to
A. inverter followed by an XOR gate
B. NOT gate followed by an exclusive XOR gate
C. Exclusive OR Gate Followed By An Inverter
D. Complement of a NOR gate
C. Exclusive OR gate followed by an inverter
13
. De Morgan’s theorem states that
A. ¯(A+B) = ¯A.¯B AND ¯(A.B) = ¯A.¯B
B. ¯(A+B) = ¯A+¯B AND ¯(A.B) = ¯( A).¯B
C. ¯( A+B)=¯( A).¯B AND ¯(A.B) = ¯A+¯B
D. ¯( A+B) = ¯A+¯B AND ¯(A.B)= ¯A+¯B
C. ¯( A+B)=¯( A).¯B AND ¯(A.B) = ¯A+¯B
14
. The logic expression AB+ (A.B) can be implemented by given inputs  And B to two
input
A. NOR gate
B. Exclusive NOR gate
C. Exclusive OR Gate
D. NAND gate
C. Exclusive OR gate
15
. The logic expression AB+ ¯(A.B) can be implemented by given inputs A And B to
two input
A. NOR Gate
B. Exclusive NOR Gate
C. Exclusive OR gate
D. NAND Gate
B. Exclusive NOR gate
16
. The gate ideally suited for bit comparison is a
A. Two Input Exclusive NOR Gate
B. Two input exclusive OR gate
 C. Two input NAND date
D. Two input NOR gate
A. Two input exclusive NOR gate
17
. Two input Exclusive NOR gate gives high output
A. when one input is high and the other is low
B. only when the both the inputs are low
C. When The Both The Inputs Are Same
D. only when both the inputs are high
C. when the both the inputs are same

1. The output of a logic gate is 1 when all the input are at logic 0 as shown below:

INPUT OUTPUT

A B C

0 0 1

0 1 0

1 0 0

1 1 0

INPUT OUTPUT

A B C

0 0 1

0 1 0

1 0 0

1 1 1
The gate is either _________
a) A NAND or an EX-OR
b) An OR or an EX-NOR
c) An AND or an EX-OR
d) A NOR or an EX-NOR
View Answer
Answer: d
Explanation: The output of a logic gate is 1 when all inputs are at logic 0. The gate is NOR.
The output of a logic gate is 1 when all inputs are at logic 0 or all inputs are at logic 1, then it
is EX-NOR. (The truth tables for NOR and EX-NOR Gates are shown in above table).
2. The code where all successive numbers differ from their preceding number by single bit
is __________
a) Alphanumeric Code
b) BCD
c) Excess 3
d) Gray
View Answer
Answer: d
Explanation: The code where all successive numbers differ from their preceding number by
single bit is gray code. It is an unweighted code. The most important characteristic of this
code is that only a single bit change occurs when going from one code number to next.
BCD Code is one in which decimal digits are represented by a group of 4-bits each,
whereas, in Excess-3 Code, the decimal numbers are incremented by 3 and then written in
their BCD format.
3. The following switching functions are to be implemented using a decoder:
f1 = ∑m(1, 2, 4, 8, 10, 14) f2 = ∑m(2, 5, 9, 11) f3 = ∑m(2, 4, 5, 6, 7)
The minimum configuration of decoder will be __________
a) 2 to 4 line
b) 3 to 8 line
c) 4 to 16 line
d) 5 to 32 line
View Answer
Answer: c
Explanation: 4 to 16 line decoder as the minterms are ranging from 1 to 14.
4. How many AND gates are required to realize Y = CD + EF + G?
a) 4
b) 5
c) 3
d) 2
View Answer
Answer: d
Explanation: To realize Y = CD + EF + G, two AND gates are required and two OR gates
are required.
5. The NOR gate output will be high if the two inputs are __________
a) 00
b) 01
c) 10
d) 11
View Answer
Answer: a
Explanation: In 01, 10 or 11 output is low if any of the I/P is high. So, the correct option will
be 00.
6. How many two-input AND and OR gates are required to realize Y = CD+EF+G?
a) 2, 2
b) 2, 3
c) 3, 3
d) 3, 2
View Answer
7. A universal logic gate is one which can be used to generate any logic function. Which of
the following is a universal logic gate?
a) OR
b) AND
c) XOR
d) NAND
View Answer
Answer: d
Explanation: An Universal Logic Gate is one which can generate any logic function and also
the three basic gates: AND, OR and NOT. Thus, NOR and NAND can generate any logic
function and are thus Universal Logic Gates.
8. A full adder logic circuit will have __________
a) Two inputs and one output
b) Three inputs and three outputs
c) Two inputs and two outputs
d) Three inputs and two outputs
View Answer
Answer: d
Explanation: A full adder circuit will add two bits and it will also accounts the carry input
generated in the previous stage. Thus three inputs and two outputs (Sum and Carry) are
there. In case of half adder circuit, there are only two inputs bits and two outputs (SUM and
CARRY).
9. How many two input AND gates and two input OR gates are required to realize Y = BD +
CE + AB?
a) 3, 2
b) 4, 2
c) 1, 1
d) 2, 3
View Answer
Answer: a
Explanation: There are three product terms. So, three AND gates of two inputs are required.
As only two input OR gates are available, so two OR gates are required to get the logical
sum of three product terms.
10. Which of following are known as universal gates?
a) NAND & NOR
b) AND & OR
c) XOR & OR
d) EX-NOR & XOR
View Answer
Answer: a
Explanation: The NAND & NOR gates are known as universal gates because any digital
circuit can be realized completely by using either of these two gates, and also they can
generate the 3 basic gates AND, OR and NOT.
11. The gates required to build a half adder are __________
a) EX-OR gate and NOR gate
b) EX-OR gate and OR gate
c) EX-OR gate and AND gate
d) EX-NOR gate and AND gate
View Answer
Answer: c
Explanation: The gates required to build a half adder are EX-OR gate and AND gate. EX-
OR outputs the SUM of the two input bits whereas AND outputs the CARRY of the two input
bits.
1. A single transistor can be used to build which of the following digital logic gates?
a) AND gates
b) OR gates
c) NOT gates
d) NAND gates
View Answer
Answer: c
Explanation: A transistor can be used as a switch. That is, when base is low collector is high
(input zero, output one) and base is high collector is low (input 1, output 0).
2. How many truth table entries are necessary for a four-input circuit?
a) 4
b) 8
c) 12
d) 16
View Answer
Answer: d
Explanation: For 4 inputs: 24 = 16 truth table entries are necessary.
3. Which input values will cause an AND logic gate to produce a HIGH output?
a) At least one input is HIGH
b) At least one input is LOW
c) All inputs are HIGH
d) All inputs are LOW
View Answer
Answer: c
Explanation: For AND gate, the output is high only when both inputs are high. That’s why
the high output in AND will occurs only when all the inputs are high. However, in case of OR
gate, if atleast one input is high, the output will be high.
4. Exclusive-OR (XOR) logic gates can be constructed from what other logic gates?
a) OR gates only
b) AND gates and NOT gates
c) AND gates, OR gates, and NOT gates
d) OR gates and NOT gates
View Answer
Answer: c
Explanation: Expression for XOR is: A.(B’)+(A’).B
So in the above expression, the following logic gates are used: AND, OR, NOT.
Thus, 2 AND gates with two-inputs and 1 OR gate with two-inputs will be required for
constructing a XOR gate.
5. The basic logic gate whose output is the complement of the input is the ___________
a) OR gate
b) AND gate
c) INVERTER gate
d) XOR gate
View Answer
Answer: c
Explanation: It is also called NOT gate and it simply inverts the input, such that 1 becomes
0 and 0 becomes 1.
6. The AND function can be used to ___________ and the OR function can be used to
_____________
a) Enable, disable
b) Disable, enable
c) Synchronize, energize
d) Detect, invert
View Answer
Answer: a
Explanation: The AND gate and OR gate are used for enabling and disabling respectively
because of their multiplicity and additivity property. The AND gate outputs 1 when all inputs
are at logic 1, whereas the OR gate outputs 0 when all inputs are at logic 0.
7. The dependency notation “>=1” inside a block stands for which operation?
a) OR
b) XOR
c) AND
d) XNOR
View Answer
Answer: a
Explanation: The dependency notation “>=1” inside a block stands for OR operation.
8. If we use an AND gate to inhibit a signal from passing one of the inputs must be
___________
a) LOW
b) HIGH
c) Inverted
d) Floating
View Answer
Answer: a
Explanation: AND gate means A*B and OR gate means A+B and to inhibit means to get low
signal, one of the input must be low. It means (0*1=0 or 1*0=0) we will get low output signal.
Thus, AND gate outputs 1 only when all inputs are at logic level 1 else it outputs 0.
9. Logic gate circuits contain predictable gate functions that open theirs ____________
a) Outputs
b) Inputs
c) Pre-state
d) Impedance state
View Answer
Answer: b
Explanation: Logic gate circuits contain predictable gate functions that open their inputs
because we are free to give any types of inputs.
10. How many NAND circuits are contained in a 7400 NAND IC?
a) 1
b) 2
c) 4
d) 8
View Answer
Answer: c

1. Electronic circuits that operate on one or more input signals to produce standard output
_______
a) Series circuits
b) Parallel Circuits
c) Logic Signals
d) Logic Gates
View Answer
Answer: d
Explanation: The logic gates operate on one or more input signals to produce a standard
output.
Logic gates give the output in the form of 0 and 1.
The Boolean algebra can be applied to the logic gates.
2. Logic Gates are the building blocks of all circuits in a computer.
a) True
b) False
View Answer
Answer: a
Explanation: The statement is true.
Logic gates are idealized to implement a boolean function in all circuits of a computer.
The signals are directed as per the outputs of the logic gates in the form of 0 and 1.
3. A __________ gate gives the output as 1 only if all the inputs signals are 1.
a) AND
b) OR
c) EXOR
d) NOR
View Answer
Answer: a
Explanation: The AND gate gives a 1 only if all the input signals are 1.
The Boolean expression for evaluating an AND signal is: Y=A.B.
4. The boolean expression of an OR gate is _______
a) A.B
b) A’B+AB’
c) A+B
d) A’B’
View Answer
Answer: c
Explanation: An OR gate gives the result as 1 if any one of the inputs is one.
Its expression is A+B.
An OR gate gives a 0 only if both the inputs are 0.
5. The gate which is used to reverse the output obtained is _____
a) NOR
b) NAND
c) EXOR
d) NOT
View Answer
Answer: d
Explanation: NOT gate is used to reverse the output from 0 to 1 and vice-versa.
The Boolean expression for NOT gate is Y=A’.
Therefore, it gives the complement of the result obtained.
6. Which of the following gate will give a 0 when both of its inputs are 1?
a) AND
b) OR
c) NAND
d) EXOR
View Answer
Answer: c
Explanation: The NAND gate gives 0 as the output when both of its inputs are 1 or any one
of the input is 1.
It returns a 1 only if both the inputs are 0.
7. When logic gates are connected to form a gating/logic network it is called as a
______________ logic circuit.
a) combinational
b) sequential
c) systematic
d) hardwired
View Answer
Answer: a
Explanation: It is referred to as a combinational circuit as it comprises a number of gates.
It is connected to evaluate a result of a Boolean expression.
8. The universal gate that can be used to implement any Boolean expression is
__________
a) NAND
b) EXOR
c) OR
d) AND
View Answer
Answer: a
Explanation: NAND gate can be used to implement any Boolean expression.
It is a universal gate. A universal gate can be used to implement any other Boolean function
without using any other logic gate.
9. The gate which is called an inverter is called _________
a) NOR
b) NAND
c) EXOR
d) NOT
View Answer
Answer: d
Explanation: Inverter is used to reverse the output. A NOT gate is used to invert or change
the output from 0 to 1 and vice-versa.
10. The expression of an EXOR gate is ____________
a) A’B+AB’
b) AB+A’B’
c) A+A.B
d) A’+B’
View Answer
Answer: a

 A single stage transistor amplifier contains ……………. and associated

circuitry
1. Two transistors
2. One transistor
3. Three transistor
4. None of the above
Answer : 2
Q2. The phase difference between the output and input voltages of a CE
amplifier is ………………..
1. 180o
2. 0o
3. 90o
4. 270o
Answer : 1
Q3. It is generally desired that a transistor should have …………….. input
impedance
1. Low
2. Very low
3. High
 4. Very high
Answer : 3
Q4. When an a.c. signal is applied to an amplifier, ,the operating point
moves along …………….
1. d.c. load line
2. a.c. load line
3. both d.c. and a.c. load lines
4. none of the above
Answer : 2
Q5. If the collector supply is 10V, then collector cut off voltage under d.c.
conditions is ………….
1. 20 V
2. 5 V
3. 2 V
4. 10 V
Answer : 4
Q6. In the zero signal conditions, a transistor sees ……………….. load
1. d.c.
2. a.c.
3. both d.c. and a.c.
4. none of the above
Answer : 1
Q7. The input capacitor in an amplifier is the ……………….. capacitor
1. Coupling
2. Bypass
3. Leakage
4. None of the above
Answer : 1
Q8. The point of intersection of d.c.  and a.c. load lines is called
……………..
1. Saturation point
2. Cut off point
3. Operating point
4. None of the above
Answer : 3
Q9. The slope of a.c. load line is ……………… that of d.c. load line
1. The same as
2. More than
3. Less than
 4. None of the above
Answer : 2
Q10. If a transistor amplifier draws 2mA when input voltage is 10 V, then
its input impedance is ………..
1. 20 kΩ
2. 2 kΩ
3. 10 kΩ
4. 5 kΩ
Answer : 4
Q11. When a transistor amplifier is operating, the current in any branch is
……………
1. Sum of a.c. and d.c.
2. c. only
3. c. only
4. difference of a.c. and d.c.
Answer : 1
Q12. The purpose of capacitors in a transistor amplifier is to ………………
1. Protect the transistor
2. Cool the transistor
3. Couple or bypass a.c. component
4. Provide biasing
Answer : 3
Q13. In the d.c. equivalent circuit of a transistor amplifier, the capacitors
are considered ……………..
1. Short
2. Open
3. Partially short
4. None of the above
Answer  : 2
Q14. In a CE amplifier, voltage gain = ……………. x RAC/Rin
1. α
2. (1 + α)
3. (1+ β)
4. β
Answer : 4
Q15. In practice, the voltage gain of an amplifier is expressed ……………..
1. As volts
2. As a number
3. In db
 4. None of the above
Answer : 3
Q16. If the power and current gains of a transistor amplifier are 16500 and
100 respectively, then voltage gain is ………
1. 165
2. 165 x 104
3. 100
4. None of the above
Answer : 1
Q17. If RC and RL represent the collector resistance and load resistance
respectively in a single stage transistor amplifier, then a.c. load is ……..
1. RL + RC
2. RC || RL
3. RL – RC
4. RC
Answer : 2
Q18. In a CE amplifier, the phase difference between voltage across
collector load RC and signal voltage is ………..
1. 180o
2. 270o
3. 90o
4. 0o
Answer : 4
Q19. In the a.c. equivalent circuit of a transistor amplifier, the capacitors
are considered ………….
1. Short
2. Open
3. Partially open
4. None of the above
Answer : 1
Q20. In a single stage transistor amplifier, RC and RL represent collector
resistance and load resistance respectively. The transistor sees a d.c. load of
………..
1. RC + RL
2. RC || RL
3. RL
4. RC
Answer : 4
Q21. The purpose of d.c. conditions in a transistor is to …………..
 1. Reverse bias the emitter
2. Forward bias the collector
3. Set up operating point
4. None of the above
Answer : 3
Q22. An amplifier has a power gain of 100. Its db gain is ……………
1. 10 db
2. 20 db
3. 40 db
4. None of the above
Answer : 2
Q23. In order to get more voltage gain from a transistor amplifier, the
transistor used should have …………..
1. Thin base
2. Thin collector
3. Wide emitter
4. None of the above
Answer : 1
Q24. The purpose of a coupling capacitor in a transistor amplifier is to
……….
1. Increase the output impedance of transistor
2. Protect the transistor
3. Pass a.c. and block d.c.
4. Provide biasing
Answer : 3
Q25. The purpose of emitter capacitor (i.e. capacitor across R E) is to
……….
1. Avoid voltage gain drop
2. Forward bias the emitter
3. Reduce noise in the amplifier
4. None of the above
Answer : 1
Q26. The ratio of output impedance of a CE amplifier is ……………
1. About 1
2. Low
3. High
4. Moderate
Answer : 4
Q27. If a transistor amplifier feeds a load of low resistance (e.g. speaker),
then voltage gain will be ………….
1. High
2. Very high
3. Moderate
4. Low
Answer : 4
Q28. If the input capacitor of a transistor amplifier is short-circuited,
then………
1. Transistor will be destroyed
2. Biasing conditions will change
3. Signal will not reach the base
4. None of the above
Answer : 2
Q29. The radio wave picked up by the receiving antenna is amplified about
…….. times to have reasonable sound output
1. 1000
2. A million
3. 100
4. 10000
Answer : 2
Q30. A CE amplifier is also called ………….. circuit
1. Grounded emitter
2. Grounded base
3. Grounded collector
4. None of the above
Answer : 1
Q31. The d.c. load of a transistor amplifier is generally ………….. that of a
a.c. load
1. The same as
2. Less than
3. More than
4. None of the above
Answer : 3
Q32. The value of collector load RC in a transistor amplifier is ………… the
output impedance of the transistor.
1. The same as
2. Less than
3. More than
 4. None of the above
Answer : 2
Q33. A single stage transistor amplifier with collector load R C and emitter
resistance RE has a d.c. load of ……….
1. RC
2. RC || RE
3. RC – RE
4. RC + RE
Answer : 4
Q34. In transistor amplifiers, we generally use ………….. capacitors.
1. Electrolytic
2. Mica
3. Paper
4. Air
Answer : 1
Q35. A single stage transistor amplifier with no load sees an a.c. load of
……..
1. RC + RE
2. RC
3. RC || RE
4. RC/RE
Answer : 2
Q36. The output power of a transistor amplifier is more than the input
power because the additional power is supplied by …………
1. Transistor
2. Biasing circuit
3. Collector supply VCC
4. None of the above
Answer : 3
Q37. A transistor converts ……………
1. d.c. power into a.c. power
2. a.c. power into d.c. power
3. high resistance into low resistance
4. none of the above
Answer : 1
Q38.  A transistor amplifier has high output impedance because ………..
1. Emitter is heavily doped
2. Collector has reverse bias
3. Collector is wider than emitter or base
4. None of the above
Answer : 2
Q39. For highest power gain, one would use …………….. configuration
1. CC
2. CB
3. CE
4. none of the above
Answer : 3
Q40. CC configuration is used for impedance matching because its
……………..
1. Input impedance is very high
2. Input impedance is low
3. Output impedance is very low
4. None of the above
Answer : 1

. In amplifier circuit, biasing of transistor is necessary to

   A.Fix the value of current amplification

   B.Establish suitable D.C working conditions
   C.Ensure that transistor is saturated
   D.Ensure that transistor is cutoff

✔ View Answer

A.Fix the value of current amplification

✍ Your Comments

32. The configuration in which current gain of transistor amplifier is lowest is

   A.Common base
   B.Common collector
   C.Common emitter

✔ View Answer

A.Common base
✍ Your Comments
33. The configuration in which voltage gain of transistor amplifier is lowest is

   A.Common base
   B.Common collector
   C.Common emitter

✔ View Answer

B.Common collector
✍ Your Comments

34. The configuration in which input impedance of transistor amplifier is lowest

is

   A.Common base
   B.Common collector
   C.Common emitter

✔ View Answer

A.Common base
✍ Your Comments

35. The configuration in which output impedance of transistor amplifier is

highest is

   A.Common base
   B.Common collector
   C.Common emitter

✔ View Answer

A.Common base

36. The main disadvantage of the FET is its

   A.Low input impedance
   B.Low thermal stability
   C.High noise
   D.Low gain-band width product

✔ View Answer

D.Low gain-band width product

✍ Your Comments

37. The input gate current of a FET is

   A.A few micro-amperes

   B.A few mili-amperes
   C.A few amperes
   D.Negiligibly small

✔ View Answer

D.Negiligibly small
✍ Your Comments

38. A FET, for its operation, depends on the variation of

   A.Magnetic field
   B.Reversed-biased junction
   C.Forward-biased junction
   D.The depletion-layer width with reverse field

✔ View Answer

D.The depletion-layer width with reverse field

✍ Your Comments

39. Resistance of FET
   A.Increases with increase of temperature
   B.Is independent of temperature
   C.Increases with decrease of temperature
   D.None of the above

✔ View Answer

A.Increases with increase of temperature

✍ Your Comments

40. A FET differs from a bipolar transistor as it has

   A.Negative resistance
   B.Simpler fabrication
   C.High input impedance
   D.Any of the above

✔ View Answer

C.High input impedance

A CE amplifier is also called ___________ circuit

A. Grounded emitter

B. Grounded base

C. Grounded collector

D. None of the above

Answer & Solution   Discuss in Board  Save for Later

Answer & Solution

Answer: Option A

No explanation is given for this question Let's Discuss on Board

2.

A transistor amplifier has high output impedance because

___________

A. Emitter is heavily doped

B. Collector has reverse bias

C. Collector is wider than emitter or base

D. None of the above

Answer & Solution   Discuss in Board  Save for Later

Answer & Solution

Answer: Option B

No explanation is given for this question Let's Discuss on Board

3.

An amplifier has a power gain of 100. Its db gain is

___________

A. 10 db

B. 20 db
C. 40 db

D. None of the above

Answer & Solution   Discuss in Board  Save for Later

Answer & Solution

Answer: Option B

No explanation is given for this question Let's Discuss on Board

4.

In a single stage transistor amplifier, RC and RL represent

collector resistance and load resistance respectively. The
transistor sees a d.c. load of ___________

A. RC + RL

B. RC || RL

C. RL

D. RC

Answer & Solution   Discuss in Board  Save for Later

Answer & Solution

Answer: Option D

No explanation is given for this question Let's Discuss on Board

5.
 A single stage transistor amplifier with collector load RC and
emitter resistance RE has a d.c. load of ___________

A. RC

B. RC || RE

C. RC - RE

D. RC + RE

Answer & Solution   Discuss in Board  Save for Later

Answer & Solution

Answer: Option D

Q1. A differential amplifier ……………..

1. is a part of an Op-amp
2. has one input and one output
3. has two outputs
4. answers (1) and (2)
Answer : 4
Q 2. When a differential amplifier is operated single-ended, …………
1. the output is grounded
2. one input is grounded and signal is applied to the other
3. both inputs are connected together
4. the output is not inverted
Answer : 2
Q3. In differential-mode, …………….
1. opposite polarity signals are applied to the inputs
2. the gain is one
3. the outputs are of different amplitudes
4. only one supply voltage is used
Answer : 1
Q4. In the common mode, ……………
1. both inputs are grounded
2. the outputs are connected together
3. an identical signal appears on both the inputs
4. the output signal are in-phase
Answer : 3
Q5. The common-mode gain is ………..
1. very high
2. very low
3. always unity
4. unpredictable
Answer : 2
Q6. The differential gain is ………
1. very high
2. very low
3. dependent on input voltage
4. about 100
Answer : 1
Q7. If ADM = 3500 and ACM = 0.35, the CMRR is ……….
1. 1225
2. 10,000
3. 80 dB
4. answers (1) and (3)
Answer : 4
Q8. With zero volts on both inputs, an OP-amp ideally should have an
output ………..
1. equal to the positive supply voltage
2. equal to the negative supply voltage
3. equal to zero
4. equal to CMRR
Answer : 3
Q9. Of the values listed, the most realistic value for open-loop voltage gain
of an OP-amp is ……
1. 1
2. 2000
3. 80 dB
4. 100,000
Answer : 4
Q10. A certain OP-amp has bias currents of 50 μA. The input offset current
is ……..
1. 700 nA
2. 99.3 μA
3. 49.7 μA
4. none of these
Answer : 1
Q11. The output of a particular Op-amp increases 8V in 12μs. The slew
rate is …….
1. 90 V/μs
2. 0.67 V/μs
3. 1.5 V/μs
4. none of these
Answer : 2
Q12. For an Op-amp with negative feedback, the output is …….
1. equal to the input
2. increased
3. fed back to the inverting input
4. fed back to the noninverting input
Answer : 3
Q13. The use of negative feedback ………
1. reduces the voltage gain of an Op-amp
2. makes the Op-amp oscillate
3. makes linear operation possible
4. answers (1) and (2)
Answer : 4
Q14. Negative feedback ………..
1. increases the input and output impedances
2. increases the input impedance and bandwidth
3. decreases the output impedance and bandwidth
4. does not affect impedance or bandwidth
Answer : 2
Q15. A certain noninverting amplifier has Ri of 1 kΩ and Rf of 100 kΩ. The
closed-loop voltage gain is ………
1. 100,000
2. 1000
3. 101
4. 100
Answer : 3
Q16. If the feedback resistor in Q15 (above question) is open, the voltage
gain …….
1. increases
2. decreases
3. is not affected
4. depends on  Ri
Answer : 1
Q17. A certain inverting amplifier has a closed-loop voltage gain of 25. The
Op-amp has an open-loop voltage gain of 100,000. If an Op-amp with an
open-loop voltage gain of 200,000 is substituted in the arrangement, the
closed-loop gain ……..
1. doubles
2. drops to 12.5
3. remains at 25
4. increases slightly
Answer : 3
Q18. A voltage follower ……….
1. has a voltage gain of 1
2. is noninverting
3. has no feedback resistor
4. has all of these
Answer : 4
Q19. The Op-amp can amplify
1. a.c. signals only
2. d.c. signals only
3. both a.c. and d.c. signals
4. neither d.c. nor a.c. signals
Answer : 3
Q20. The input offset current equals the ……….
1. difference between two base currents
2. average of two base currents
3. collector current divided by current gain
4. none of these
Answer : 1
Q21. The tail current of a differential amplifier is …….
1. half of either collector current
2. equal to either collector current
3. two times either collector current
4. equal to the difference in base currents
Answer : 3
Q22. The node voltage at the top of the til resistor is closes to ……….
1. collector supply voltage
2. zero
3. emitter supply voltage
4. tail current times base resistance
Answer : 2
Q23. The tail current in a differential amplifier equals …….
1. difference between two emitter currents
2. sum of two emitter currents
3. collector current divided by current gain
4. collector voltage divided by collector resistance
Answer : 2
Q24. The differential voltage gain of a differential amplifier is equal to RC
divided by …….
1. r’e
2. r’e/2
3. 2r’e
4. RE
Answer : 3
Q25. The input impedance of a differential amplifier equals r’ e times ……
1. β
2. RE
3. RC
4. 2β
Answer : 4
Q26.  A common-mode signal is applied to ……….
1. the noninverting input
2. the inverting input
3. both iputs
4. top of the tail resistor
Answer : 3
Q27. The common-mode voltage gain is ………
1. smaller than differentail voltage gain
2. equal to differential voltage gain
3. greater than differential voltage gain
4. none of the above
Answer : 1
Q28. The input stage of an Op-amp is usually a ……….
1. differential amplifier
2. class B push-pull amplifier
3. CE amplifier
4. swamped amplifier
Answer : 1
Q29. The common-mode voltage gain of a differential amplifier is equal to
RC divided by ……..
1. r’e
2. 2r’e
3. r’e/2
4. 2RE
Answer : 4
Q30. Current cannot flow to ground through …….
1. a mechanical ground
2. an a.c. ground
3. a virtual ground
4. an ordinary ground
Answer : 3

1. Determine the output from the following circuit

a) 180o in phase with input signal

b) 180o out of phase with input signal
c) Same as that of input signal
d) Output signal cannot be determined
View Answer
Answer: b
Explanation: The input signal is given to the inverting input terminal. Therefore, the output
Vo is 180o out of phase with input signal V2.
2. Which of the following electrical characteristics is not exhibited by an ideal op-amp?
a) Infinite voltage gain
b) Infinite bandwidth
c) Infinite output resistance
d) Infinite slew rate
View Answer
Answer: c
Explanation: An ideal op-amp exhibits zero output resistance so that output can drive an
infinite number of other devices.
3. An ideal op-amp requires infinite bandwidth because
a) Signals can be amplified without attenuation
b) Output common-mode noise voltage is zero
c) Output voltage occurs simultaneously with input voltage changes
d) Output can drive infinite number of device
View Answer
Answer: a
Explanation: An ideal op-amp has infinite bandwidth. Therefore, any frequency signal from 0
to ∞ Hz can be amplified without attenuation.
4. Ideal op-amp has infinite voltage gain because
a) To control the output voltage
b) To obtain finite output voltage
c) To receive zero noise output voltage
d) None of the mentioned
View Answer
Answer: b
Explanation: As the voltage gain is infinite, the voltage between the inverting and non-
inverting terminal (i.e. differential input voltage) is essentially zero for finite output voltage.
5. Determine the output voltage from the following circuit diagram?
a) 

b)

c) 
d) None of the mentioned
View Answer
Answer: c
Explanation: In an ideal op-amp when the inverting terminal is zero. The output will be in-
phase with the input signal.
6. Find the output voltage of an ideal op-amp. If V 1 and V2 are the two input voltages
a) VO= V1-V2
b) VO= A×(V1-V2)
c) VO= A×(V1+V2)
d) VO= V1×V2
View Answer
Answer: b
Explanation: The output voltage of an ideal op-amp is the product of gain and algebraic
difference between the two input voltages.
7. How will be the output voltage obtained for an ideal op-amp?
a) Amplifies the difference between the two input voltages
b) Amplifies individual voltages input voltages
c) Amplifies products of two input voltage
d) None of the mentioned
View Answer
Answer: a
Explanation: Op-amp amplifies the difference between two input voltages and the polarity of
the output voltage depends on the polarity of the difference voltage.
8. The signal to an inverting terminal of an ideal op-amp is zero. Find the output voltage, if
the other input voltage is

a) 
b) 

c) 
d) Data provided is insufficient
View Answer
9. Which is not the ideal characteristic of an op-amp?
a) Input Resistance –> 0
b) Output impedance –> 0
c) Bandwidth –> ∞
d) Open loop voltage gain –> ∞
View Answer
Answer: a
Explanation: Input resistance is infinite so almost any signal source can drive it and there is
no loading of the preceding stage.
10. Find the ideal voltage transfer curve of a normal op-amp.

a) 

b) 

c) 
d) 
View Answer
11. Find the input voltage of an ideal op-amp. It’s one of the inputs and output voltages are
2v and 12v. (Gain=3)
a) 8v
b) 4v
c) -4v
d) -2v
View Answer
Answer: d
Explanation: The output voltage, VO = (Vin1– Vin2)
=> 12v=3×(2- Vin2)
=> Vin2= -2v.
12. Which factor determine the output voltage of an op-amp?
a) Positive saturation
b) Negative saturation
c) Both positive and negative saturation voltage
d) Supply voltage
View Answer
Answer: c

1)   Input offset current is basically defined as the algebraic ______ the base current of two transistors.

a. sum of
b. difference between
c. product of
d. division of
Answer    Explanation  

ANSWER: difference between

Explanation:
No explanation is available for this question!
2)   What is PSRR value of an ideal op-amp?

a. Zero
b. Unity
c. Infinite
d. Unpredictable
Answer    Explanation  

ANSWER: Zero
Explanation:
No explanation is available for this question!

3)   PSSR is an op-amp parameter which defines the degree of dependence on variations in _______.

a. temperature
b. pressure
c. power supply voltage
d. slew rate
Answer    Explanation  

ANSWER: power supply voltage

Explanation:
No explanation is available for this question!

4)   Which among the following is/are included in DC characteristics of op-amp?

a. Input bias current

b. Thermal drift
c. Both a and b
d. None of the above
Answer    Explanation  

ANSWER: Both a and b

Explanation:
No explanation is available for this question!
5)   Which concept states that if one input terminal of an op-amp is at zero potential, then the other one
be at zero potential?

a. Virtual short
b. Virtual ground
c. Zero input current
d. None of the above
Answer    Explanation  

ANSWER: Virtual ground

Explanation:
No explanation is available for this question!

6)   CMRR of a differential amplifier can be improved by decreasing ______.

a. Differential voltage gain

b. Common mode voltage gain
c. Both a and b
d. None of the above
Answer    Explanation  

ANSWER: Common mode voltage gain

Explanation:
No explanation is available for this question!

7)   In a differential amplifier, the configuration is said to be an 'unbalanced output', if  ________

a. Output voltage is measured between two collectors

b. Output is measured with respect to ground
c. Two input signals are used
d. All of the above
Answer    Explanation  

ANSWER: Output is measured with respect to ground

Explanation:
No explanation is available for this question!

8)   In differential mode of op-amp, if output voltage is equal to the difference between outputs of individ
transistors, its amplitude will be _______the amplitude of signal voltage yielded at collector to ground.

a. twice
b. thrice
c. four times
d. one-fourth times
Answer    Explanation  

ANSWER: twice
Explanation:
No explanation is available for this question!

9)   In a typical op-amp, which stage is supposed to be a dual-input unbalanced output or single-ended o
differential amplifier?

a. Input stage
b. Intermediate stage
c. Output stage
d. Level shifting stage
Answer    Explanation  

ANSWER: Intermediate stage

Explanation:
No explanation is available for this question!

10)   Which among the following is/are the feature/s characteristic/s of an integrated op-amp?

a. Small size
b. High reliability
c. Low cost & less power consumption
d. All of the above
Answer    Explanation  
ANSWER: All of the above
Explanation:
No explanation is available for this question!

9. If the peak voltage on a centre tapped full wave rectifier circuit is 5V and diode cut in
voltage is 0.7. The peak inverse voltage on diode is_________
a) 4.3V
b) 9.3V
c) 5.7V
d) 10.7V
View Answer
Answer: b
Explanation: PIV is the maximum reverse bias voltage that can be appeared across a diode
in the given circuit, if PIV rating is less than this value of breakdown of diode will occur. For
a rectifier, PIV=2Vm-Vd = 10-0.7 = 9.3V.
10. In a centre tapped full wave rectifier, the input sine wave is 250sin100t. The output
ripple frequency will be _________
a) 50Hz
b) 100Hz
c) 25Hz
d) 200Hz

. Efficiency of a centre tapped full wave rectifier is _________

a) 50%
b) 46%
c) 70%
d) 81.2%
View Answer
Answer: d
Explanation: Efficiency of a rectifier is the effectiveness to convert AC to DC. It’s obtained
by taking ratio of DC power output to maximum AC power delivered to load. It’s usually
expressed in percentage. For centre tapped full wave rectifier, it’s 81.2%.
2. A full wave rectifier supplies a load of 1KΩ. The AC voltage applied to diodes is 220V
(rms). If diode resistance is neglected, what is the ripple voltage?
a) 0.562V
b) 0.785V
c) 0.954V
d) 0.344V
View Answer
Answer: c
Explanation: The ripple voltage is (V ϒ)RMS=ϒVDC /100.
VDC=0.636*VRMS* √2=0.636*220* √2=198V and ripple factor ϒ for full wave rectifier is 0.482.
Hence, (Vϒ)RMS=0.482*198 /100=0.954V.
3. A full wave rectifier delivers 50W to a load of 200Ω. If the ripple factor is 2%, calculate the
AC ripple across the load.
a) 2V
b) 5V
c) 4V
d) 1V
View Answer
Answer: a
Explanation: We know that, PDC=VDC2/RL. So, VDC=(PDC*RL)1/2=100001/2=100V.
Here, ϒ=0.02
ϒ=VAC/VDC=VAC/100.So, VAC=0.02*100=2V.
4. A full wave rectifier uses load resistor of 1500Ω. Assume the diodes have R f=10Ω, Rr=∞.
The voltage applied to diode is 30V with a frequency of 50Hz. Calculate the AC power input.
a) 368.98mW
b) 275.2mW
c) 145.76mW
d) 456.78mW
View Answer
Answer: b
Explanation: The AC power input PIN=IRMS2(RF+Rr).
IRMS=Im/√2=Vm/(Rf+RL)√2=30/(1500+10)*1.414=13.5mA
So, PIN=(13.5*10-3)2*(1500+10)=275.2mW.
5. In a centre tapped full wave rectifier, R L=1KΩ and for diode Rf=10Ω. The primary voltage
is 800sinωt with transformer turns ratio=2. The ripple factor will be _________

a) 54%
b) 48%
c) 26%
d) 81%
View Answer
Answer: b
Explanation: The ripple factor ϒ= [(I RMS/IAVG)2 – 1]1/2. IRMS =Im /√2=Vm/(Rf+RL)√2=200/1.01=198.
(Secondary line to line voltage is 800/2=400. Due to centre tap V m=400/2=200)
IRMS=198/√2=140mA, IAVG=2*198/π=126mA. ϒ=[(140/126)2-1]1/2=0.48. So, ϒ=48%.
6. If input frequency is 50Hz for a full wave rectifier, the ripple frequency of it would be
_________
a) 100Hz
b) 50Hz
c) 25Hz
d) 500Hz
View Answer
Answer: a
Explanation: In the output of the centre tapped rectifier, one of the half cycle is repeated.
The frequency will be twice as that of input frequency. So, it’s 100Hz.
7. Transformer utilization factor of a centre tapped full wave rectifier is_________
a) 0.623
b) 0.678
c) 0.693
d) 0.625
View Answer
Answer: c

Ripple factor is the ratio of______________________?

October 14, 2019 – by Abdur Rehman0 

A. Rms value of the ac component of load voltage to the dc voltage

B. Average value of the ac component of load voltage to the peak value of voltage
C. Average value of the dc component of load voltage to the ac voltage
D. Peak value of the dc component of load voltage to the ac voltage

61.  The mean value of half wave rectified sine wave is

(A) 0.707 im
(B) 0.66 im
(C) 0.5 im
(D) 0.318 im.
 

Get Answer
D
 

62.  The form factor for half wave rectified sine wave is

(A) 1.0
(B) 1.11
(C) 1.44
(D) 1.57.
 

Get Answer
D
 

63.  For full-wave rectified sine wave, rms value is

 
 
(A) 0.707 im
(B) 0.6036 im
(C)0.5 im
(D) 0.318 im .
 

Get Answer
B
 

64.  For full-wave rectified sine wave, mean value is

(A) 0.70 im
(B) 0.636 im
(C) 0.5 im
(D) 0.318 lm.
 

Get Answer
B
 

65.  For full-wave rectified sine wave, form factor is

(A) 1.5
(B) 1.41
(C) 1.28
(D) 1.11.
 

Get Answer
D
 

66.  A half-wave rectifier circuit with a capacitive filter is connected to a 200 volts, 50 Hz ac line. The output
voltage across the capacitor should be approximately
(A) 300 volts
(B) 280 volts
(C) 180 volts
(D) 80 volts.
 

Get Answer
B
 

67.  The ripple factor of a full-wave rectifier circuit compared to that of a half wave rectifier circuit without filter is

(A) half of that for a half 'wave rectifier

(B) less than half that for a half-wave rectifier circuit
(C) equal to that of a half wave rectifier.
(D) none of the above.
 

Get Answer
B
 

MULTIPLE CHOICE QUESTIONS - AE

On Rectifiers and Filters:

1. In a half wave rectifier, the load current flows for what part of the cycle.
a. 400

b. 900
c. 1800
d. 3600

2. In a full wave rectifier, the current in each diode flows for

a. whole cycle of the input signal

b. half cycle of the input signal

c. more than half cycle of the input signal

d. none of these
3. in a full wave rectifier, if the input frequency is 50 Hz, then output frequency will
be a. 50 Hz

b. 75 Hz
c. 100 Hz
d. 200 Hz

4. In a center tap full wave rectifier, if Vm is the peak voltage between center tap and one end
of the secondary, the maximum voltage coming across the reverse bias diode is

a. Vm b.
2 Vm c.
Vm/2 d.
Vm/√2

5. The maximum efficiency of full wave rectification is

a. 40.6%

b. 100%

c. 81.2%

d. 85.6%

6. In a bridge type full wave rectifier, if Vm is the peak voltage across the secondary of the
transformer, the maximum voltage coming across each reverse biased diode is

a. Vm b.
2 Vm c.
Vm/2 d.
Vm/√2
7. To get a peak load voltage of 40V out of a bridge rectifier. What is the approximate rms
value of secondary voltage?

a. 0 V

b. 14.4 V
c. 28.3 V
d. 56.6 V

8. If the line frequency is 50 Hz, the output frequency of bridge rectifier is

a. 25 Hz

b. 50 Hz

c. 100 Hz

d. 200 Hz

9. The ripple factor of a bridge rectifier is

a. 0.482

b. 0.812
c. 1.11
d. 1.21

10. The bridge rectifier is preferred to an ordinary two diode full wave rectifier because
a. it needs much smaller transformer for the same output

b. no center tap required

c. less PIV rating per diode
d. all the above

11. The basic purpose of filter is to

a. minimize variations in ac input signal

b. suppress harmonics in rectified output

c. remove ripples from the rectified output

d. stabilize dc output voltage

12. The use of a capacitor filter in a rectifier circuit gives satisfactory performance only when the
load

a. current is high
b. current is low
c. voltage is high
d. voltage is low

13. A half wave rectifier is equivalent to

a. clamper circuit

b. a clipper circuit
c. a clamper circuit with negative bias

d. a clamper circuit with positive bias

14. The basic reason why a full wave rectifier has a twice the efficiency of a half wave rectifier is
that

a. it makes use of transformer

b. its ripple factor is much less

c. it utilizes both half-cycle of the input

d. its output frequency is double the line frequency

15. In a rectifier, larger the value of shunt capacitor filter

a. larger the peak-to-peak value of ripple voltage

b. larger the peak current in the rectifying diode

c. longer the time that current pulse flows through the diode

d. smaller the dc voltage across the load

16. In a LC filter, the ripple factor, a.

Increases with the load current b.
increases with the load resistance

c. remains constant with the load

current
d. has the lowest value

17. The main reason why a bleeder resistor is used in a dc power supply is that
it a. keeps the supply ON

b. improves voltage regulation

c. improves filtering action d.
both (b) and (c)

18. Which rectifier requires four diodes?

a. half-wave voltage doubler

b. full-wave voltage doubler

c. full-wave bridge circuit

d. voltage quadrupler

Answers

1. (c) 2. (b) 3. (c) 4. (b) 5. (c) 6. (a) 7. (c) 8. (c) 9. (a) 10. (d) 11. (c) 12. (b) 13. (b) 14. (c) 15. (b) 16. (c)
17. (d) 18. (c)
ON BJT:

1. In CE configuration the output V- I characteristics are drawn by taking

(a) VCE vs. IC for constant value of IE

(b) VCE vs. IC for constant value of IB

(c) VCE vs. IC for constant value of VCB

(d) None of these

2. In CE configuration the input V-I characteristics are drawn by taking

(a) VCE vs. IC for constant value of IE

(b) VBE vs. IE for constant value of VCE

(c) VBE vs. IB for constant value of IC

(d) VBE vs. IB for constant value of VCB

3. The transistor is said to be in quiescent state when

(a) it is unbiased

(b) no current flows through it

(c) no signal is applied to the input

(d) emitter junction is just biased equal to collector junction

4. In CB configuration, the output V- I characteristics of the transistor are drawn by taking

(a) VCB vs. IC for constant IE

(b) VCB vs. IB for constant IE

(c) VCB vs. IC for constant IE

(d) VCB vs. IB for constant IE

5. When the collector junction in a transistor is biased in reverse direction and the emitter junction in
the forward direction, the transistor is said to be is the

(a) active region

(b) cutoff region

(c) saturation

(d) none of them

6. To avoid thermal runaway in the design of analog circuits, the operating point of the BJT
should be such that it satisfies the condition

(a)

(b)

(c)

(d)
7. Thermal runaway will take place if the quiescent point is such that

(a)

(b)

(c)

(d)

(UPSC Engg. Service 1999)

8. The power dissipated by a transistor approximately equals the collector current times

(a) base emitter voltage

(b) collector emitter voltage

(c) base supply voltage

(d) 0.7V

9. Leakage current in CE configuration is

(a) very high

(b) very small

(c) normal

(d) not present

10. The dc current gain in common collector configuration is given by

(a) α

(b) β

(c) β + 1

(d) α + 1
11. The leakage current ICBO flows in

(a) The emitter, base and collector leads

(b) The emitter and base leads.

(c) The emitter and collector leads.

(d) The base and collector leads.

12. Early effect in BJT refers to

(a) avalanche breakdown

(b) thermal breakdown

(c) base narrowing

(d) Zener breakdown

13. The emitter of the transistor is generally doped the heaviest because it

(a) has to dissipate maximum power

(b) has to supply the charge carriers

(c) is the first region of transistor

(d) must possess low resistance

14. In a properly Biased NPN transistor most of the electrons from the emitter

(a) recombine with holes in the base

(b) recombine in the emitter its self

(c) pass through the base to the collector

(d) are stopped by the junction barrier

15. In a transistor amplifier, the reverse saturation current I CO

(a) double for every 100 rise in temperature
(b) doubles for every 10 rise in temperature
(c) increase linearly with the temperature
(d) doubles for every 50 rise in temperature

16. The collector characteristics of a common- emitter connected transistor may be used to find its
(a) input resistance

(b) base current

(c) output resistance
(d) voltage gain

17. Which of the following transistor configuration circuit is much less temperature dependent

(a) common base

(b) common emitter

(c) common collector

(d) none of the above

18. The CE amplifier circuit are preferred over CB amplifier circuit because they have

(a) lower amplification factor

(b) larger amplification factor

(c) high input resistance and low output resistance

(d) none of these

19. A transistor when connected in CE mode has

(a) a low input resistance and a low output resistance

(b) a high input resistance and high output resistance

(c) a high input resistance and low output resistance

(d) a medium input resistance and high output resistance

20. A transistor connected in common base configuration has

(a) a high input resistance and low output resistance

(b) a low input resistance and high output resistance

(c) a low input resistance and low output resistance

(d) a high input resistance and a high output resistance

Answers
1. (b) 2. (d) 3. (c) 4. (a) 5. (a) 6. (c) 7. (d) 8. (b) 9. (a) 10. (c) 11. (d) 12. (c) 13. (b) 14. (c)
15. (a) 16. (c) 17. (c) 18. (b) 19. (d) 20. (b)

Diode Clippers, Clampers & Voltage Multipliers

1. A circuit that removes positive or negative parts of waveform is

called a. clamper
b. clipper

c. diode clamp
d. limiter

2. A circuit that adds positive or negative dc voltage to an input sine wave is

called a. clamper
b. clipper

c. diode clamp
d. limiter

3. Voltage multipliers are circuits best used to produce

a. low voltage and low current

b. low voltage and high current

c. high voltage and low current
d. high voltage and high current

4. Half wave voltage multiplier can provide any degree of voltage multiplication by
cascading diodes and capacitors.
a. only doubler
b. only tripler

c. any
multiplication d.
none of the above

5. Consider the following statements:A clamper circuit

1. adds or subtracts a dc voltage to a waveform
2. does not change the waveform
3. amplifies the waveform
Which are correct?
a. 1, 2

b. 1, 3
c. 1, 2, 3
d. 2, 3

7. In the above figure D1 turns on when

a. Vi is more positive than V1
b. Vi is less than V1

c. Vi is between V1 and V2
d. none of the above

8. In the given Figure D2 turns on

when a. Vi is more positive than V1
b. Vi is less positive than v1 c.
Vi is more negative than V2
d. Vi is less negative than V2

9. A voltage tripler circuit uses

a. 2 diodes and 2 capacitors
b. 3 diodes and 3 capacitors

c. 2 diodes and 3 capacitors

d. 3 diodes and 2 capacitors

10. A voltage doubler circuit is fed by a voltage Vm Sin ωt. The output voltage will be nearly 2
Vm only if
a. load resistance is small
b. load resistance is
large

c. load resistance neither small nor large

d. either (a) or (c)

Answers
1. (b) 2. (a) 3. (c) 4. (c) 5. (a) 7. (a) 8. (c) 9. (b) 10. (b)

FET-AMPLIFIER

1. A field effect transistor (FET)

a. Uses a forward bias p-n junction

b. Uses a high concentration emitter junction

c. Has a very high input resistance

d. Depends on flow of minority carrier

2. As compared to transistor amplifier JFET amplifier

has a. Higher voltage gain, less input impedance

b. Less voltage gain, less input impedance c.

Less voltage gain, higher input
impedance

d. Higher voltage gain, higher input impedance

3. The best location for setting a Q-point on dc load line of an FET Amplifier is
at a. Saturation point

b. Cutoff poin
Mid- point

c. None of these

4. The pinch off voltage is the voltage

a. At which gate source junction breaks down

b. Which causes depletion regions to meet

c. The voltage applied between drain & source

d. Neither of these

5. If properly biased JFET acts as a.

Current controlled current source b.
Voltage controlled voltage source
c. Voltage controlled current
source d. Current controlled voltage
source

6. The voltage gain of a common source JFET amplifier depends upon

its a. Transconductance (gm)

b. Amplification factor (μ)

c. External load resistance
d. Both (a) and (c)

7. A common gate amplifier has

a. High input resistance and high output resistance

b. Low input resistance and high output resistance

c. Low input resistance and low output resistance

d. High input resistance and low output resistance

9. A transconductance amplifier has

a. High input impedance and low output
impedance b. Low input impedance and high
output impedance c. High input and output
impedances d. Low input and output impedances

10. A JFET is similar is operation

to a. Diode

b.
Pentode
c. Triode
d. Tetrode

11. In a common source JFET amplifier the output voltage

is a. 1800 out of phase with input
b. In phase with input
c. 900 out of phase with input
d. None of the above

12. A common source (CS) amplifier has a voltage

gain of a. gm rd

b. gm rs

c. gm rs /
(1+gm rs) d. gm
rd / (1+gm rd)

13. A source follower has a voltage gain of

a. gm rd

b. gm rs

c. gm rs / (1+gm rs)

d. gm rd / (1+gm rd)

14. A cascode amplifier has the

advantage of a. Large voltage gain

b. Low input
capacitance c. Low
input impedance d.
Higher gm

15. If a JFET has IDSS=8mA and VP=4V, then RDS

equals a. 200Ω

b.
320
Ω c.
500
Ω d.
5K
Ω

Answers
1. (c) 2. (c) 3. (c) 4. (b) 5. (c) 6. (d) 7. (b) 9. (a) 10. (b) 11. (a) 12. (a) 13. (c) 14 (b) 15. (c)
 l. In a half – wave
rectifier, the load current flows
for                                                               
(a)    Complete cycle of the input signal
(b)   Less than half-cycle of the input signal,
(c)    More than half-cycle but less than complete cycle of the
input signal.
(d)   Only for the positive half-cycle of the input signal.
                           ANS-d
2.     
In a full-wave
rectifier, the current in each of the diodes
flows for                                        
                       (a)    Complete cycle of the
input signal.      (b) Half cycle of the input signal.

(c)  Less than half

of the input signal.        (d) None of
the above.
                      ANS-b 
3.  The ripple
factor of a bridge rectifier is                                                                                      
(a)
0.482                        (b) 0.8l2            (c) l.ll            (d)
l.2l
ANS-a
4.   A bridge rectifier
is preferable to an ordinary two-diode full-wave rectifier because              
(a)    It needs much smaller transformer for the same output.
(b)   It uses four diodes.
(c)    Its transformer does not require center-tap.
      (d)   None of the above.
                            ANS-a
5. The basic purpose of
a filter is to                                                                                           
(a)    Minimize variations in a.c. input signal.
      (b)   Suppress harmonics in rectified output.
(c)    Remove ripples from the rectified output.
(d)   Stabilize d.c. output
voltage.
                           ANS-c
6. The use of a capacitor filter
in a rectifier circuit gives satisfactory performance only when the load

(a) Current is high                    (b)

current is low
(c) Voltage is high                    (d)
voltage is low
ANS-b

7. A half-wave rectifier is equivalent to a

(a) a clamper circuit                             (b)
 a clipper circuit
(c)
a clamper circuit with negative bias  (d) a clamper circuit with positive bias
ANS-b

8. Bridge rectifiers are preferred because

(a)  they require small transformer
(b)  they have less peak-inverse voltage
(c)  they need small transformer and also have
less peak-inverse voltage
                            (d)   
They have low ripple
factor.
ANS-c
9. If Vm is the
peak value of an applied voltage in a half-wave rectifier with a large
capacitor across the load, then the
peak-inverse voltage will be                                                                          
(a)v                  (b)Vm              (c) 1     (d) 2
               ANS-a
l0.
A voltage of is applied
to a half-wave rectifier with a load resistance of 5K. The rectifier is represent by an ideal diode in
series with a
resistance of l K. The maximum value of current, d.c.
component of current and r.m.s.
value of current
will be respectively                                                  
(a)
33.33 mA, l0.6l
mA and l6.67mA                 (b) 22.22
mA, 8.6l mA and l2.38
mA
(c) 
28.33 mA, l4.6l mA and l3.33 mA              (d) 40 mA, 20 mA and 25 mA
                ANS-a 
 ll. The basic reason
why a full-wave rectifier has a twice the efficiency of a half-wave rectifier
is that
(a)    it makes use of transformer                                                                                        
(b)   its ripple factor is much less
(c)    it utilizes both half-cycle of the input
(d)   its output frequency is double the line frequency.
                           ANS-c
  
l2.  The output of
a half-wave rectifier is suitable only for                                                           
(a) running car radios               (b)
running a.c. motors
(c) 
charging batteries                (d)
running tape recorders.
                ANS-b
l3. The ripple factor of a bridge rectifier is                                                                                     

  (a) 0.406               (b) 0.8l2           (c) l.2l                                       (d) l.ll

  ANS-c
l4.  The ripple
factor of a power supply is given by (symbols have the usual meaning).              

(a) √FF²-1        (b)Irm/Idc        (c)Idc/Irm    (d) FF²-1

            ANS-a
l5.  The PIV of a Full-wave
center tap  rectifier circuit is                                                               (a)V            (b)Vm             
(c)2Vm            (d)
3

 ANS-c
The
l6. primary function of a rectifier filter is to
(a)  minimise a.c. input variations
(b)  suppress odd harmonics in the rectifier
output
(c)  stabilise d.c, level of the output voltage
(d)  remove ripples from the rectified output
                      ANS-d

 l7.  In a
rectifier, larger the value of shunt capacitor filter                                                            
a.      
larger the
peak-to-peak value of ripple voltage
b.     
larger the peak
current in the rectifying diode
c.      
longer the time that
current pulse flows through the diode
d.     
Smaller the d.c.
voltage across the load.
                           ANS-b
l8.
In a LC filter, the ripple factor                                                                                                 

(a) Increases with the

load current                   (b) increases with the load resistance
(c) Remains constant with the load current        (d) has the lowest value.
                 ANS-c
 l9.
The main reason why a bleeder resistor
is used in a d.c. power supply is that it                          

(a) Keeps the supply ON                     (b)

improves voltage regulation
(c) Improves filtering action                  (d)
both (b) and (c).
         ANS-d
20. 
Which rectifier
requires four diodes?                                                                                      
(a) 
half-wave voltage
doubler  (b) full-wave voltage doubler
(c) full-wave bridge circuit      (d)
voltage quadrupler.
                ANS-b
2l. If, by
mistake, a.c source in a bridge rectifier, is connected across the d.c.
terminals, it will burn out and hence
short                        diodes.                                                                                          
(a) one             (b) two             (c) three           (d) four
               ANS-d
22.  The d.c. output polarity from a half-wave rectifier can
be reversed by reversing                    
(a) 
The diode                           (b)
transformer primary
(c) Transformer
secondary       (d) both (b) and (c).
               ANS-a
23.  In a half-wave rectifier if a resistance equal to load resistance is connected in parallel with
the diode,
then
(a) 
Output voltage would be halved     (b) output voltage would be doubled                          
(c) Circuit will stop rectifying              (d) output voltage will remain unchanged,
               ANS-c
24.  If the input supply frequency is 50 Hz, the output ripple
frequency of a bridge rectifier is                                 Hz.
(a)  l00         (b)
75   (c) 50   (d) 25.
                ANS-a

10) If the gate-to-source voltage in an n-channel E-MOSFET is made more positive, the drain current
will A (A) increase (C) decrease (B) remain unchanged

1) Every known element has C (A) the same type of atoms (C) a unique type of atom (B) the same
number of atoms (D) several different types of atoms
2) In an intrinsic semiconductor, D (A) there are no free electrons (C) there are only holes (B) there
are only electrons (D) there are as many electrons as there are holes

3) Holes in an n-type semiconductor are A (A) minority carriers that are thermally produced (C)
majority carriers that are thermally produced (B) minority carriers that are produced by doping (D)
majority carriers that are produced by doping

4) The cathode of a zener diode in a voltage regulator is normally A (A) more positive than the
anode (C) at+0.7 V (B) more negative than the anode (D) grounded

5) When operated in cutoff and saturation, the transistor acts like a B (A) linear amplifier (C) variable
capacitor (B) switch (D) variable resistor 6) In saturation, VCE is C (A) 0.7 V (C) minimum (B) equal to
VCC (D) maximum

7) A certain common-emitter amplifier has a voltage gain of 100. If the emitter bypass capacitor is
removed, B (A) the circuit will become unstable (C) the voltage gain will increase (B) the voltage gain
will decrease (D) the Q-point will shift

8) A differential amplifier D (A) is used in op-amps (C) has two outputs (B) has one input and one
output (D) answers (a) and (c)

9) The peak current a class A power amplifier can deliver to a load depends on the B (A) maximum
rating of the power supply (C) current in the bias resistors (B) quiescent current (D) size of the heat
sink

1) The process of adding an impurity to an intrinsic semiconductor is called A (A) doping (C) atomic
modification (B) recombination (D) ionization

2) When the rms output voltage of a bridge full-wave rectifier is 20 V, the peak inverse voltage
across the diodes is (neglecting the diode drop) B (A) 20 V (C) 40 V (B) 28.3 V (D) 56.6 V

3) A silicon Zener diode having Vz = 5 V. How much voltage appears across it when it is forward-
biased? A (A) 0.7 V (C) 5 V (B) 4.3 V (D) 5.7V

4) The overall voltage gain of three identical cascaded voltage amplifiers each has a no load voltage
gain AV = -10, Zi = 1 kΩ, and Zo = 1 kΩ is: C (A) 1000 (C) -250 (B) -1000 (D) -125

5) What are the bias conditions of the base-emitter and base-collector junctions for a transistor to
operate as an amplifier? B (A) Both are forward biased (C) Both are reverse biased (B) The base-
emitter is forward and the base-collector is reverse (D) The base-collector is forward and the base-
emitter is reverse

6) What characteristic of the common-collector amplifier makes it a useful circuit? A (A) it has a
high input resistance (C) it has a high voltage gain (B) its output is in-phase with the input (D) it has a
high power gain

7) The Q-point for a class AB amplifier is D (A) at the middle of the load line (C) near saturation (B) at
cut-off (D) near cut-off

8) A certain D-MOSFET is biased at VGS = 0 V. Its datasheet specifies IDSS = 20 mA and VGS(off) = -5
V. The value of the drain current C (A) is 0 A (C) is 20 mA (B) is 10 mA (D) cannot be determined

9) If the gate-to-source voltage in an n-channel E-MOSFET is made more positive, the drain current
will A (A) increase (C) decrease (B) remain unchanged
 10) In a JFET, IDSS is C (A) the drain current with the source shorted (C) the maximum possible drain
current (B) the drain current at cutoff (D) the midpoint drain current

1) A positive ion is formed when D (A) an atom gains an extra valence electron (C) two atoms bond
together (B) there are more holes than electrons in the outer orbit (D) a valence electron breaks
away from the atom

2) Recombination is when A (A) an electron falls into a hole (C) a crystal is formed (B) a positive and a
negative ion bond together (D) a valence electron becomes a conduction electron

3) Holes in an n-type semiconductor are A (A) minority carriers that are thermally produced (C)
majority carriers that are thermally produced (B) minority carriers that are produced by doping (D)
majority carriersthat are produced by doping

4) When a diode is forward-biased, D (A) the only current is hole current (C) the only current is
electron current (B) the only current is produced by majority carriers (D) the current is produced by
both holes and electrons

5) The average value of a half-wave rectified voltage with a peak value of 200 V is A (A) 63.7 V (C)
141 V (B) 127.2 V (D) 0 V

6) The ideal dc output voltage of a capacitor-input filter is equal to A (A) the peak value of the
rectified voltage (C) the rms value of the rectified voltage (B) the average value of the rectified
voltage

7) The internal resistance of a photodiode B (A) increases with light intensity when reverse-biased
(C) increases with light intensity when forward-biased (B) decreases with light intensity when
reverse-biased (D) decreases with light intensity when forward-biased

8) For operation as an amplifier, the base of an npn transistor must be A (A) positive with respect to
the emitter (C) positive with respect to the collector (B) negative with respect to the emitter (D) 0 V

9) In a JFET, IDSS is C (A) the drain current with the source shorted (C) the maximum possible drain
current (B) the drain current at cutoff (D) the midpoint drain current

10) In an E-MOSFET, there is no drain current until VGS A (A) reaches VGS(th) (C) is negative (B) is
positive (D) equals 0 V

SECTION 1
1. A small-signal amplifier (a) uses only a small portion
of its load line (b) always has an output signal in the mV
range (c) goes into saturation once on each input cycle
(d) is always a common-emitter amplifier
SECTION 2
2. The parameter hfe corresponds to (a) βDC (b) βac (c)
r’e (d) r’c
3. If the dc emitter current in a certain transistor amplifier
is 3 mA, the approximate value of r’e is (a) 3-kΩ (b) 3-Ω
(c) 8.33-Ω (d) 0.33 k-Ω
SECTION 3
4. A certain common-emitter amplifier has a voltage gain
of 100. If the emitter bypass capacitor is removed, (a) the
circuit will become unstable (b) the voltage gain will
decrease (c) the voltage gain will increase (d) the Q-point
will shift
5. For a common-emitter amplifier, RC = 1.0 k Ω, RE =
390 Ω, r’e = 15-Ω, and βac = 75.
Assuming that RE is completely bypassed at the
operating frequency, the voltage gain is (a) 66.7 (b) 2.56
(c) 2.47 (d) 75
6. In the circuit of Question 5, if the frequency is reduced
to the point where XC(bypass)=RE, the voltage gain (a)
remains the same (b) is less (c) is greater
7. In a common-emitter amplifier with voltage-divider bias,
Rin(base) = 68 k Ω, R1 = 33 k Ω,
R2 = 15 k Ω.
The total ac input resistance is:
(a) (b) (c) (d)
8. A CE amplifier is driving a load. If the voltage gain is
approximately (a) 220 (b) 1000 (c) 10 (d) 180
SECTION 4
9. For a common-collector amplifier, The ac input
resistance at the base is (a) (b) (c) (d)
10. If a 10 mV signal is applied to the base of the emitter-
follower circuit in Question 9, the output signal is
approximately (a) 100 mV (b) 150 mV (c) 1.5 V (d) 10 mV
11. In a certain emitter-follower circuit, the current gain is
50. The power gain is approximately (a) 50Av (b) 50 (c) 1
(d) answers (a) and (b)
12. In a Darlington pair configuration, each transistor has
an ac beta of 125. If RE is the input resistance is (a) (b)
(c) (d) SECTION 5
13. The input resistance of a common-base amplifier is (a)
very low (b) very high (c) the same as a CE (d) the same
as a CC SECTION 6
14. Each stage of a four-stage amplifier has a voltage
gain of 15. The overall voltage gain is (a) 60 (b) 15 (c)
50,625 (d) 3078
15. The overall gain found in Question 14 can be
expressed in decibels as (a) 94.1 dB (b) 47.0 dB (c) 35.6
dB (d) 69.8 dB SECTION 7
16. A differential amplifier (a) is used in op-amps (b) has
one input and one output (c) has two outputs (d) answers
(a) and (c)
17. When a differential amplifier is operated single-ended,
(a) the output is grounded (b) one input is grounded and
a signal is applied to the other (c) both inputs are
connected together (d) the output is not inverted
18. In the double-ended differential mode, (a) opposite
polarity signals are applied to the inputs (b) the gain is
1 (c) the outputs are different amplitudes (d) only one
supply voltage is used
19. In the common mode, (a) both inputs are grounded (b)
the outputs are connected together (c) an identical
signal appears on both inputs (d) the output signals are
in-phase