IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, VOL. 6, NO.

4, DECEMBER 2018 2287

Investigating Switching Transformers for Common

Mode EMI Reduction to Remove Common Mode
EMI Filters and Y-Capacitors in Flyback Converters
Yiming Li, Student Member, IEEE, Huan Zhang, Student Member, IEEE, Shuo Wang , Senior Member, IEEE,
Honggang Sheng, Choon Ping Chng, and Srikanth Lakshmikanthan

Abstract— This paper investigated the common mode (CM)

noise model for multiwinding switching transformers. Based
on the proposed model, a Flyback transformer is investigated.
A measurement technique is used to characterize and evaluate
a switching transformer’s CM noise performance. Only a signal
generator and an oscilloscope are needed in this measurement
technique. Because there is no any in-circuit tests are needed,
the technique can help quickly design and evaluate transformers
in mass testing. CM noise reduction techniques, including the
balance capacitor technique, core shielding technique, balance
winding technique, and winding design technique, are investi-
gated based on the developed two-capacitance model and mea-
surement technique without introducing extra power loss. The
near-field capacitive coupling due to transformer magnetic cores Fig. 1. CM current path including single-phase power line, a power adapter,
is analyzed, and a core shielding technique is applied to reduce a touchscreen enabled device, and a user.
the coupling. Experimental results validated the proposed model
and the developed CM noise reduction techniques. The Flyback
converter can finally meet electromagnetic interference (EMI)
standards without using CM EMI filters and Y-capacitors. size, and small number of components. Cochrane et al. [1],
Index Terms— AC/DC power adapter, balance, common Kong et al. [2], Meng et al. [3], and Chu and Wang [9] ana-
mode (CM), electromagnetic interference (EMI), transformer, lyzed the CM noise paths of Flyback converters: one path is
winding capacitance. from the drain of MOSFET to the earth ground, and the other
path is from the noise source through the parasitic capacitances
I. I NTRODUCTION of the transformer to the secondary side and then to the earth

H IGH power density ac/dc power converters are popularly

used in power adapters/chargers of portable electronics
such as laptops, smart phones, and tablets. Electromagnetic
ground, as shown in Fig. 1. In order to reduce the CM noise,
CM inductors and Y-capacitors are usually used in an adapter.
If Cq represents the parasitic capacitance from MOSFET
interference (EMI) noise, such as common-mode (CM) noise drain to MOSFET heatsink and then from the heatsink to
leads to big EMI filters. To reduce EMI filter size, EMI the earth ground, the CM noise can flow from the MOSFET
such as CM EMI should be reduced. Various techniques drain through Cq to the earth [1]. This CM noise can be
have been developed to reduce CM noise for power convert- eliminated by connecting the heatsink of MOSFET to primary
ers [1], [2], [6], [7], [9], [11]–[13], [15]–[17]. ground (Pri GND) [4]. Based on the semiconductor structure
AC/DC Flyback converters are popularly used in ac/dc of a diode, the major parasitic capacitance between a diode
power adapters/chargers because of their low cost, small and its heatsink is Cd from its cathode to the heatsink. In
Fig. 1, because the voltage potential of cathode is constant,
Manuscript received September 25, 2017; revised December 25, 2017 and
January 29, 2018; accepted April 8, 2018. Date of publication April 16, 2018; the parasitic capacitance between the diode and the heatsink
date of current version October 30, 2018. This work was supported by in part will not generate CM noise. The secondary heatsink can be
by Google Inc and in part by the National Science Foundation under Grant grounded to secondary ground (Sec GND) so the parasitic
1611048. Recommended for publication by Associate Editor Juan M. Rivas
Davila. (Corresponding author: Shuo Wang.) capacitance between two heatsinks works as a Y-capacitor
Y. Li, H. Zhang, and S. Wang are with the University of Florida, and it will not generate CM noise. In some applications,
Gainesville, FL 32611 USA (e-mail: [email protected]; [email protected]; the MOSFET and the diode share the same heatsink. The
[email protected]).
H. Sheng, C. P. Chng, and S. Lakshmikanthan are with Google heatsink can be equivalently grounded to Pri GND via a small
Inc., Mountain View, CA 94043 USA (e-mail: [email protected]; capacitor; then, the CM noise can still be eliminated.
[email protected]; [email protected]). If the CM noise via heatsinks to the earth ground can
Color versions of one or more of the figures in this paper are available
online at http://ieeexplore.ieee.org. be eliminated, the CM noise flowing through the parasitic
Digital Object Identifier 10.1109/JESTPE.2018.2827041 winding capacitances between the transformer windings on
2168-6777 © 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.

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2288 IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, VOL. 6, NO. 4, DECEMBER 2018

Fig. 2. Two-winding transformer (a) circuit, (b) six-capacitance model, and

(c) four-capacitance CM model.

the primary side and on the secondary side will be a major

Fig. 3. Flyback transformer (a) circuit and (b) winding structure of one
contributor to the CM noise. Therefore, a CM transformer winding window.
winding capacitance model should be developed for CM noise
analysis.
There are many studies discussing the modeling of parasitic first category, the most common technique is to add balance
capacitances of two-winding transformers with turn ratio n, capacitors [3], [4] between the terminals of the windings
as shown in Fig. 2. In Fig. 2, VSw is the switching volt- across the primary and secondary sides. In the second category,
age on the primary winding and VSw /n is the voltage on the techniques include optimizing winding terminal connec-
the secondary winding. From energy conservation point of tions [2], applying shielding layers [5], or using cancelation
view, as shown in Fig. 2(b), a two-winding transformer’s windings [6]. These techniques require extracting winding
parasitic capacitance can be modeled with six capacitances capacitance and implementing balance techniques. In this
including four interwinding capacitances C1 –C4 and two paper, an efficient balance design technique will be intro-
intrawinding capacitances C5 –C6 [18]. However, when the duced to reduce the CM noise without using shielding layers
nonlinear switching devices are substituted with noise volt- between windings. The technique can achieve both CM noise
age sources based on the substitution theory for CM noise reduction and small leakage inductance as using shielding
analysis [9], [11], if a noise voltage source is equivalently layers increase the space between windings, therefore, lead to
in parallel with transformer windings, the two intrawinding increased leakage inductance. (It will be addressed in detail in
capacitors can be removed. Therefore, the winding capaci- Section V.) Transformer core shielding technique will also be
tance model can be reduced to four lumped capacitances, introduced to reduce the capacitive couplings due to the high
as shown in Fig. 2(b). Furthermore, based on the linear passive permittivity of magnetic cores. Transformer prototypes were
network theory, three independent capacitances are actually developed based on the developed techniques. Experiments
enough to characterize a linear two-port network. Based on were conducted to validate the developed techniques.
this, Chu and Wang [9] used three independent capacitances This paper is organized as follows. In Section II, a two-
to characterize a transformer’s winding capacitance. Finally, capacitance transformer winding capacitance model for multi-
in many power electronics applications, when the transformer winding transformer is first introduced for CM noise analysis.
windings are equivalently connected to at least one noise Based on the model, a CM noise reduction methodology which
voltage sources, two capacitances are enough to characterize includes several transformer CM noise reduction and design
the interwinding parasitic capacitances of a two-winding trans- techniques is developed in Sections III–V. In Section III, a con-
former [10]. venient technique to extract transformer’s parasitic capacitance
Flyback transformers typically use several auxiliary wind- and evaluate transformer’s CM noise performance without any
ings to achieve multiple outputs. Based on the conventional in-circuit tests is introduced. An external capacitance balance
winding capacitance models of two-winding transformers technique is discussed. In Section IV, a transformer core
in Fig. 2(c), it is difficult to analyze CM noise as there are shielding technique is analyzed to eliminate the capacitive cou-
too many capacitances. Theoretically, a transformer with n pling between the transformer core and heatsinks. In Section V,
windings has 4·Cn2 = 2n(n −1) parasitic capacitances. A more a design technique with an adjustable auxiliary winding is
general and simpler model should be developed to analyze introduced to achieve CM noise balance and small leakage
and reduce the CM noise flowing through the transformers. inductance without any in-circuit tests and complicated calcu-
Moreover, if the CM performance of a transformer can be eval- lations. A transformer prototype is designed based on all the
uated and balanced without doing any in-circuit tests, it will be techniques above and the experimental results validated the
very convenient for transformer design and evaluation in mass developed techniques.
testing in industry applications as requested by the sponsor
of this research. This paper will also introduce a technique to II. T WO -C APACITANCE T RANSFORMER M ODEL FOR
achieve this goal. M ULTIWINDING T RANSFORMERS
Balance techniques have been introduced in studies to
reduce the CM noise due to transformer winding capaci- A. Two-Capacitance Model for Multiwinding Transformers
tances and they have two categories: 1) balancing transformers A Flyback transformer in Fig. 3(a) usually has several
externally and 2) balancing transformers internally. In the windings and may have shielding layers. Fig. 3(b) shows a

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LI et al.: INVESTIGATING SWITCHING TRANSFORMERS FOR COMMON MODE EMI REDUCTION 2289

Fig. 5. Measure CTotal between the primary side and the secondary side.

Fig. 4. Three-winding transformer (a) circuit and (b) its conventional

CM model.

transformer using RM cores. Its typical winding structure in

a cross-sectional view is shown in Fig. 3(b). The transformer
uses interleaved windings to reduce the leakage inductance so
as to reduce parasitic ringings during switching transitions,
to reduce semiconductor device voltage stress and to improve
converter efficiency. There are also two auxiliary windings
used to supply power to the control chip. Two shielding layers Fig. 6. Two-capacitance CM model of a multiwinding transformer.
(a) Voltage source is on the primary side. (b) Voltage source is on the
are connected to the primary to bypass the CM noise flowing secondary side.
from the primary side. The air gap of the core is on the center
leg.
If the winding turns in a winding layer are sparse (for circuit analysis in Fig. 4: Cap1 –Cap4 are either parallel with
example, an auxiliary winding layer), the parasitic capacitance voltage source or shorted.
between the two layers adjacent to this layer cannot be ignored The CM noise source VEq and impedance Z Eq of the
[for example, the capacitance between two secondary winding Thevenin equivalence between primary GND and secondary
layers in Fig. 3(b)]. The theoretical capacitance calculation GND are given by (1)–(3), respectively.CTotalis the total capac-
would be difficult, and it is also very difficult to directly itance between all the windings on the primary side and all
measure these capacitances. Furthermore, the capacitances the windings on the secondary side. It can be measured using
between windings and the core cannot be ignored unless an impedance analyzer as shown in Fig. 5 and derived using
they are much smaller than those between two windings and (1)–(6), as shown at the bottom of the next page.
they are complicated to calculate [23] or measure [5] too. A In (1)–(3), the Thevenin equivalent voltage source VEq
simplified model and a convenient technique to extract the between the Pri GND and Sec GND is equivalently the output
parasitic capacitance are demanded by industry sponsors. of a voltage divider composed of two series capacitances
In the transformer’s conventional CM noise model shown across the voltage source VSW . Of these two capacitances,
in Fig. 2(c), the winding capacitances C1 , C2 , C3 , and C4 one capacitance is connected between transformer terminal A
represent the effects of the capacitances directly between two (one terminal of VSw ) and D (Sec GND) and the other is
windings and those between the two windings through the connected between terminal B (another terminal of VSw ) and
core. D (Sec GND). These two lumped capacitances are, therefore,
When the conventional modeling technique in Fig. 2(b) is CBD and CAD , and their total is equal to CTotal as shown in
applied to a three-winding transformer in Fig. 4(a), the CM (4)–(6) and Fig. 6.
model is very complicated with 12 capacitances, as shown Mathematically, CBD and CAD could be either posi-
in Fig. 4(b). The turn ratios between the primary and the tive or negative depending on winding structure and turns
secondary and between the primary and the auxiliary are ratios. Based on (2), (5), and (6), only two independent
n and n a , respectively. Since the impedance of the dc bus capacitances and one voltage source are enough to describe the
capacitor is very small in the concerned frequency range, CM behavior of a multiwinding transformer. The model shown
primary and auxiliary winding are shorted by the dc capacitor. in Fig. 6(a) can be used to characterize transformer’s CM
So, terminal A of the primary winding is shorted to primary model. Fig. 6(b) shows another model based on the secondary
GND in Fig. 4(b). voltage VSw /n.
In this paper, a two-capacitance model will be developed  , C  , and V  are
In Fig. 6(b), CAC AD Eq
to characterize the winding capacitance of transformers with
 n
multiple windings. The model in Fig. 4(b) can be reduced CAC = n(C2 + C4 ) + (Cas2 + Cas4 )
by removing capacitances Cap1 –Cap4 because they are fully na
located on primary side and they do not contribute to CM −(C2 + C3 + Cas2 + Cas3 ) (7)

noise [2]. The same conclusion can be drawn based on the CAD = CTotal − C AC (8)

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2290 IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, VOL. 6, NO. 4, DECEMBER 2018

  
1 1 1 1
+ − · Ca12 + · Ca14 − · Ca13
n n n a1 n
 a1  
1 1 1 1
+ · Ca21 + + − · Ca22
n a1 n a1 n a2 n
    
1 1 1 1
+ − · Ca23 + + · Ca24
n a1 n n a1 n a2
  
1 1 1 1
+ − · Csh2 + · Csh4 − · Csh3
n sh n n sh n
CAD = CTotal − CBD . (13)
The model in Fig. 7(b) and (c) was derived based on two
conditions.
1) The effect of leakage inductance of a transformer is
insignificant, so the transformer’s winding voltages are
linearly dependent. This means the impedance of the
Fig. 7. Lumped CM parasitic capacitance model for a Flyback transformer. leakage inductance of the transformer should be much
(a) Conventional model. (b) Thevenin equivalence. (c) Two-capacitance smaller than the impedance of the total parasitic winding
model.
capacitance Ctotal between the primary and secondary
windings.
 C AC VSW 2) One of the transformer windings is connected to an
VEq = . (9)
C AC + CAD n independent equivalent voltage source as the VSW shown
in Fig. 7(a). As long as the two conditions are satisfied,
Similarly, the voltage source can be normalized to the the model is valid. For example, the modeling technique
auxiliary winding side for the third CM model. Based on a can be applied to transformers with multiwindings on the
similar derivation to the above, the CM model of the Flyback secondary side or to other converter topologies. An LLC
transformer in Fig. 3 with a primary, a secondary, two series converter and a push–pull converter with more than one
auxiliary windings, and one shielding layer can be developed secondary windings will be discussed in Section III-C.
in Fig. 7. The turn ratios of primary to secondary, primary to When the two conditions above cannot be met, the model
auxiliary 1, primary to auxiliary 2, and primary to shielding will be inaccurate. This happens when frequency increases
layers are n, n a1 , n a2 , and n sh , respectively. The transformer and the impedance of leakage inductance L lk becomes higher
is first modeled with the conventional technique in Fig. 7(a). than that of Ctotal . The boundary frequency below which the
The four parasitic capacitances between any two windings are model is considered valid can be approximately given by
shown and labeled in Fig. 7(a) correspondingly. Equations (10) 1/(2π(L lk · Ctotal)1/2 ). Also, above this frequency, the CM
and (11) are Thevenin CM equivalent voltage source VEq and noise spikes caused by the resonance between the leakage
impedance Z Eq between Pri GND and Sec GND. CAD and inductance and parasitic capacitance of MOSFET [21] should
CBD in the final two-capacitance CM model in Fig. 7(c) can not be analyzed with this model.
be directly solved based on Fig. 7(a) and (b) and the results
are shown in (12) and (13)
B. Common Mode Noise Model for a Flyback Converter
CBD CBD An actual CM noise measurement setup for a commercial
VEq = · VSW = · VSW (10)
CBD + CAD CTotal ac/dc adapter is shown in Fig. 8. The transformer is the same
1 1 one as in Fig. 3.
Z Eq = = (11)
j ω(CBD + CAD ) j ωCTotal In this commercial Flyback converter, the primary heatsink
  
1 1 is connected to the Pri GND and the secondary diode heatsink
CBD = 1− · C2 + C4 − · C3 (12)
n n is connected to Sec GND. Cq1 is the drain to heatsink parasitic

(C2 + C4 ) + (Cas2 + Cas4 )/n a − (C2 + C3 + Cas2 + Cas3 )/n

VEq = · VSW (1)
CTotal
1
Z Eq = (2)
j ωCTotal
CTotal = (C1 + C2 + C3 + C4 ) + (Cas1 + Cas2 + Cas3 + Cas4 ) (3)
1 1
CBD = (C2 + C4 ) + (Cas2 + Cas4 ) − (C2 + C3 + Cas2 + Cas3 ) (4)
na n
CAD = CTotal − CBD (5)
CBD
VEq = VSW (6)
CAD + CBD

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LI et al.: INVESTIGATING SWITCHING TRANSFORMERS FOR COMMON MODE EMI REDUCTION 2291

Fig. 8. CM noise measurement setup for a Flyback ac/dc adapter.

Fig. 10. CM models of a Flyback converter with the superposition theory
applied. Effect of (a) IDCL , (b) IDout , and (c) VSw .

Fig. 9. Circuit topology of a Flyback converter with the substitution theory

applied.
Fig. 11. Final CM model of a Flyback converter.
capacitance. There is a metal shielding box enclosing the
whole Flyback adapter and it is connected to the Sec GND.
Because of this, there is parasitic capacitance between primary VSW which has the same voltage waveforms as the drain to
heatsink and the metal shielding box which is connected to Sec source voltage. The snubber diode is replaced with a current
GND; and parasitic capacitance between the primary heatsink source IDCL which has the same current waveforms as the
and the secondary heatsink. These two parasitic capacitances diode current and the rectifying diode on the secondary side
are in parallel and the total is Cq2 in Fig. 8. There is no is replaced with a current source IDout which has the same
parasitic capacitance from heatsink to the measurement ground current waveforms as the diode current. Based on the network
due to the metal shielding box. C y is the Y-capacitor connected theory, the components in parallel with voltage sources or in
between Pri GND and Sec GND. Cq2 is, therefore, in paral- series with current sources can be removed since they do not
lel with C y . Because the metal shielding box has parasitic contribute to the voltages or currents of the network. Because
capacitance to the measurement ground and the dc output of this, in Fig. 9, CCL , RCL , and Cq1 can be removed. Based
including both Vout line and Sec GND is connected to the on the superposition theory, the effects of IDCL , IDout , and VSw
metal shielding box, there is a parasitic capacitance between can be analyzed in Fig. 10(a)–(c) separately.
the dc output and the measurement ground. Z SG represents In Fig. 10(a) and (b), it is obvious that IDCL and IDout do not
this impedance. In Fig. 8, when high-frequency CM noise is generate CM noise as they are shorted. Only VSw in Fig. 10(c)
analyzed, the dc capacitor can be treated as short circuit, and generates CM noise. CM current flows through the transformer
the LISNs can be characterized as a 25- resistor. When a parasitic capacitance to the secondary side, and then flows
pair of diodes in the diode bridge conducts currents, the diode back to the input of converter through Z SG , Z LISNs , and Z ED .
bridge impedance is very small so the CM noise is the highest. If the transformer and its parasitic capacitance are replaced
The CM EMI filter of the adapter under investigation has with a two-capacitance model developed in Fig. 7(c), the final
a CM inductor only. The CM inductor’s impedance is Z ED. CM model can be shown in Fig. 11. Based on Fig. 11, the
The transformer, including primary, secondary, and auxiliary CM noise voltage on LISNs is
windings, is represented with a block in Fig. 9 and it will Z LISN
be replaced with a two-capacitance model later. Based on VCM =
j ω(CTotal + C y + Cq2 ) + Z LISN + Z ED + Z SG
the substitution theorem, all the voltages and currents of a
CBD
network will not change if the nonlinear switching devices in · · VSW . (14)
the network are replaced with voltage or current sources which CTotal + C y + Cq2
have the exact the same voltage or current waveforms as the The techniques can be developed to reduce CM noise based
original components to be replaced [9], [11]. The CM noise on Fig. 11 and (14). For example, CBD should be reduced as
model of the Flyback converter can, therefore, be represented much as possible by improving transformer winding struc-
by Fig. 9. ture or by adding external capacitor across primary and sec-
Based on the techniques developed in [9] and [11], ondary windings. Using a large Y-cap C y also helps to reduce
the MOSFET in Fig. 8 can be substituted with a voltage source CM noise. However, it increases the total capacitance between

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2292 IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, VOL. 6, NO. 4, DECEMBER 2018

third step, an oscilloscope is used to measure VBA between

terminals B and A, and VDA between terminals D and A
as shown in Fig. 12(b). Based on the ratio of VDB /VAB and
VDA /VBA , CBD and CAD can be calculated based on (15) and
(16). In (15) and (16), Cprobe is oscilloscope probe’s input
capacitance which is in parallel with the CBD or CAD . Cprobe
can be obtained from datasheet or measured via an impedance
analyzer. The probe’s input resistance can be ignored as it is
much higher than the impedances of capacitances at the signal
frequency
VDB CAD
= (15)
VAB Ctotal + Cprobe
VDA CBD
= . (16)
VBA Ctotal + Cprobe
It should be pointed that as shown in (14), if CBD equals to
zero, the CM noise flowing through the transformer is zero.
In other words, if the measured VDA in (16) is zero, the CM
noise flowing through the transformer will be zero. This would
be a very convenient technique to check if a transformer is well
balanced.
Fig. 12. Extract parasitic capacitance. Extract (a) CAD and (b) CBD . Since CBD and CAD can be measured, respectively, if CTotal
equals to the sum of CAD and CBD , the measurement results
are validated. The precision of the method will be discussed
primary and secondary side, which will in turn increase the in Section III-B based on experimental data.
leakage current from the primary side to the secondary side Since CAD or CBD are just equivalent capacitances,
and might cause safety concerns [19]; thus, it may not be the value of CAD and CBD can be positive or negative. From
desired. Using a big CM inductor to increase Z ED also helps (15) and (16), if VDB or VDA is in phase of VAB or VBA ,
to reduce CM noise but it will increase the size and the cost CAD or CBD is positive. If VDB or VDA is out phase of
of the converter; therefore, it may not be a perfect solution VAB or VBA , CAD or CBD is negative.
either. Because of these, the best solution is to reduce CBD of The advantages of the proposed parasitic capacitance extrac-
the transformer. In this paper, it will be shown that the CM tion technique are as follows.
noise of a Flyback adapter can meet the EMI standard with the 1) A transformer’s CM performance can be evaluated with
proposed technique without using any CM chokes (Z ED = 0) a signal generator and an oscilloscope without any
and Y-caps. in-circuit tests. Therefore, it is convenient to test the
transformer’s CM performance during design and man-
III. T ECHNIQUE OF E VALUATING T RANSFORMER ’ S ufacturing process.
CM N OISE P ERFORMANCE 2) The two capacitances can be easily extracted without the
A. Technique to Extract Parasitic Capacitance and Evaluate knowledge of transformer winding structures.
Transformer’s CM Noise Performance 3) Unlike many studies, in which transformer’s winding
structure must be investigated, the proposed measure-
In (3) and (5), the total capacitance CTotal is the sum of ment technique can efficiently identify the unbalanced
the CBD and CAD and it can be directly measured similar to capacitance.
that shown in Fig. 5. To extract CBD and CAD , a sinusoidal
signal at switching frequency from a signal generator is first
added between terminals A and B in Fig. 12. Since both B. CM Noise Reduction With a Balance Capacitor
the terminal A of the primary winding and one terminal of A commercial 45 W, 120-V ac/20-V dc, Flyback converter
auxiliary windings are connected to input dc bus, the two with a multiwinding transformer as shown in Fig. 3(b) is used
terminals are equivalently connected to each other through a dc to verify the developed model. The load is a 15- resistor.
bus capacitor on primary side within the concerned frequency Both CM EMI filter and Y-cap are removed. The number
range. The measurement setup in Fig. 12 is to emulate this of turns of primary, secondary, two auxiliary windings, and
actual condition. Similarly, if a transformer has more than shielding layer is 40, 8, 8, 16, and 1, respectively. Therefore,
one secondary windings, the winding terminals which are n, n a1 , n a2 , and n sh in (12) are equal to 5, 5, 2.5, and 40,
efficiently shorted via dc capacitors within the concerned respectively. CTotal of the transformer is measured as 105 pF.
frequency range should be connected in the measurement. The capacitance of oscilloscope voltage probe is 15 pF.
In the second step, an oscilloscope is used to measure both Fig. 13(a) shows the measured voltage waveforms of VBA
the signal VAB between terminals A and B, and the signal VDB and VDA . Since VDA is in phase of VBA , CBD is positive. CBD
between terminals D and B as shown in Fig. 12(a). In the is calculated from (16) as 9.5 pF. Similarly, CAD is derived

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LI et al.: INVESTIGATING SWITCHING TRANSFORMERS FOR COMMON MODE EMI REDUCTION 2293

Fig. 13. Waveforms of VBA and VDA (a) before balance and (b) after adding
a 47-pF balance capacitor Cext based on (12) and (17).

Fig. 14. Measured CM noise of the power adapter before and after adding
from (15) by measuring VAB and VDB and it is found as 91 pF. a balance capacitor.
Since the sum of CAD and CBD is very close to CTotal (the
error is 4.3%), the measured results are verified.
Although many studies discussed the technique of adding a
balance capacitor to reduce CM noise, this paper proposes a
simple but efficient technique to determine balance capacitor’s
value and position. In (12), each capacitance has a coefficient
which could be either positive or negative mostly depending on
the turn ratios. To balance a positive/negative CBD , increasing
the sum of negative/positive terms by paralleling an external Fig. 15. Circuit of a full-bridge LLC resonant converter.
capacitor to any capacitance with negative/positive coefficient
can cancel the sum of all positive/negative terms in CBD .
The capacitance of this external capacitor should be equal
to the absolute value of the product of CBD and the inverse
of the coefficient of the capacitance with which the external
capacitor to be paralleled with. For example, a positive CBD
can be balanced to zero by paralleling a capacitor equal
to nCBD with C3 , Ca13 , or Csh3 , across terminals A and
C between the secondary and primary sides because their
coefficient is 1/n. For the transformer under investigation, Fig. 16. Circuit of a full-bridge LLC resonant converter with the substitution
theory applied.
nCBD = 47 pF. As another example, if CBD is negative, based
on (12), an external balance capacitor equal to 1 × |CBD | can
be paralleled with C4 across terminals B and D because C4 ’s in some cases, it may not be desired to use external balance
coefficient is 1. In summary, the external balance capacitor capacitor. A better technique will be discussed in Section V.
should have a capacitance Cext meeting condition
 
1  C. Extend the Technique to Other Topologies
Cext =  CBD  (17)
k The transformer model derived in Section II is valid if
where k is the coefficient of the capacitance with which the the two conditions defined in Section II-A are satisfied. The
external capacitor to be paralleled with in (12). k must have transformer model can be applied to many power converters
a polarity reverse to that of CBD . such as LLC, forward and push–pull converters. Figs. 15–17
The measured VDA after CBD is balanced which is shown show the example of a full-bridge LLC resonant converter.
in Fig. 13(b). It is almost zero which indicates the transformer In Fig. 15, based on the substitution theory, nonlinear
is well balanced. The EMI measurement was conducted on a switches can be replaced with voltage or current sources for
Flyback converter as shown in Fig. 1 but with the EMI filter EMI analysis [9], [11]. The CM noise model can, therefore, be
removed. The comparison of the measured CM noise before derived in Fig. 16. Similar to the analysis in Section II, i Q5 and
and after balance is shown in Fig. 14. The external balance i Q6 do not contribute to CM noise and the final CM model
capacitor reduced the CM EMI noise by up to 10 dB from is derived in Fig. 17. Based on full-bridge LLC converter’s
150 kHz to 18 MHz. characteristics, VQ1 = −VQ2 . Since the switching frequency
The balance capacitor increases the total capacitances is very close to the resonant frequency, the total voltage drop
between the primary and the secondary side. It therefore on L r and Cr is close to zero, so V p ≈ VQ1 − VQ2 . The
increases 50-/60-Hz leakage current from primary to sec- Thevenin CM equivalent voltage source VEq and impedance
ondary and results in safety concerns. Under some faulty Z Eq between Pri GND and Sec GND are
conditions, the balance capacitor could be shorted, so the CBD − CAD
primary and secondary will lose galvanic isolation. Therefore, VEq = · VQ2 (18)
CBD + CAD

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2294 IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, VOL. 6, NO. 4, DECEMBER 2018

Fig. 20. CM noise model of a forward converter (a) topology and (b) final
Fig. 17. Final CM noise model of a full-bridge LLC resonant converter. CM model.

Fig. 18. Measured voltage waveforms to extract CAD and CBD .

Fig. 21. CM noise model of a push–pull converter (a) topology and (b) final
CM model.

Fig. 22. Capacitive coupling due to a transformer core. (a) Transformer

prototype with an RM core. (b) Capacitive couplings due to the magnetic
core.

Fig. 19. Measured CM noise of the full-bridge LLC resonant converter

without and with the balance capacitor.
and between transformer magnetic cores and the heatsinks.
They play an important role on CM EMI because the couplings
1 1 cause CM noise flow between the primary and secondary sides.
Z Eq = = . (19)
j ω(CBD + CAD ) j ωCTotal This is especially important when the transformer is physically
close to the heatsinks of the primary and the secondary sides.
Based on (18), the condition for CM noise balance is,
The capacitive coupling between transformer windings and
therefore, CAD = CBD . The value of CAD and CBD can be
heatsinks is due to the fact that part of the transformer wind-
measured similar to those in Section III-A. CTotal is measured
ings on the two openings of the transformer cores are exposed
as 4.2 nF. As shown in Fig. 18, CBD can be extracted with VBA
to the free space, as shown in Fig. 22(a). The transformer
and VDA ; CAD can be extracted with VAB and VDB . Based on
winding has high dv/dt, so any capacitive couplings between
(15) and (16), the values of CAD and CBD are 1.68 and 2.52 nF,
the transformer windings and other circuits can leads to
respectively. In this case, Cprobe can be ignored since it is much
induced displacement EMI currents. The capacitive coupling
smaller than CAD and CBD . By connecting a 0.84-nF balance
between transformer magnetic cores and the heatsinks is due to
capacitor between A and D in Fig. 17, the balance condition is
the fact that the magnetic cores such as ferrite cores have not
achieved. Fig. 19 shows the measured CM noise and it verifies
only high permeability but also high permittivity, so they have
the model and the CM reduction technique in this section.
a low impedance to electrical field. The stray near electric field
Figs. 20 and 21 show the circuit topologies and final CM
generated by the high dv/dt nodes in the circuit can be easily
models of forward and push–pull converters.
coupled through the transformer cores to other components
nearby. Fig. 22(b) shows the capacitive couplings among
IV. CM N OISE R EDUCTION BY R EDUCING THE the transformer core, heatsinks, and transformer windings.
T RANSFORMER C APACITIVE C OUPLINGS In Fig. 22(b), since the transformer is the primary research
It is found that in some commercial products, the capacitive object, the diode bridge, EMI filter, and ac source are omitted
couplings exist between transformer windings and heatsinks, to highlight the transformer and save space.

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LI et al.: INVESTIGATING SWITCHING TRANSFORMERS FOR COMMON MODE EMI REDUCTION 2295

Fig. 24. Grounding the magnetic core and shielding the windings can
Fig. 23. Grounding the magnetic core can eliminate part of CM noise due eliminate most of CM noise. (a) Prototype with core grounded and winding
to transformer capacitive couplings. (a) Prototype with core grounded and shielded and (b) CM noise paths.
(b) CM noise paths.

In Fig. 22(b), there are parasitic capacitance CPHS_Core

between the heatsink, which is connected to the Pri GND,
of MOSFET and the core, CPWd_Core between the primary
winding and the core, CSWd_Core between the secondary wind-
ing and the core, and CSHS_Core between the heatsink, which
is connected to the Sec GND, of the diode and the core. There
are also parasitic capacitance CPWd_SHS between the exposed
primary winding part and the heatsink of the diode, CSWd_PHS
between the exposed secondary winding part and the heatsink
of MOSFET. The parasitic capacitances between the exposed
primary winding part and the heatsink of MOSFET, between
the exposed secondary winding part and the heatsink of diode Fig. 25. Further optimize winding structure can eliminate all of CM noise.
are ignored as they do not generate CM noise. The CM noise
can flow between primary side and secondary sides through
these parasitic capacitances because of the dv/dt across these
parasitic capacitances. Fig. 22(b) shows the CM noise flowing
from the primary winding to the heatsink of the diode, from
the primary winding to the core and then to the secondary
winding, to the heatsink of the diode or to the heatsink of the
MOSFET. The CM noise can also flow from the secondary
winding to the primary side similarly. The auxiliary winding
on primary side has a similar story to the primary winding
and will not be discussed in detail here. Fig. 26. Balance comparison before and after adding core shielding with
Because the CM noise due to the parasitic capacitance different secondary winding positions.
between transformer windings has been greatly reduced with
the balance technique in Section III, the CM noise due to the
capacitive couplings in Fig. 22 will become significant. capacitance between the shielding and windings. Parasitic
One of the solutions is to ground the transformer core to the capacitance can be re-extracted to achieve a new balance with
Pri GND, as shown in Fig. 23. A small copper foil is attached the technique discussed in Section III.
to the core and connected to the primary dc bus, as shown An alternative is to adjust the secondary winding to be
in Fig. 23(a) and (b). The CM noise flowing from primary in the middle of the windings after applying the second
windings to the core can be shorted back to the primary side, solution above. As a result, the parasitic capacitance between
as shown in Fig. 23(b). However, the CM noise can still flow the secondary winding and the core is very small, and the
from the primary winding to the heatsink of the diode and the parasitic capacitance between the secondary winding and the
CM noise generated by the secondary winding can still flow heatsink of the MOSFET is also very small so they can be
to the primary side. ignored, as shown in Fig. 25. With this solution, a rebalance
A better solution is to shield both transformer windings is not required. The comparison of the balance before and after
and the core using a copper foil connected to the dc bus adding the core shielding is shown in Fig. 26. It is shown that
on primary side, as shown in Fig. 24. All CM noise flowing after adding the shielding, when the secondary winding is in
from primary winding can be shorted back to the primary the middle, the balance condition does not change. On the
side through the shielding. However, the CM noise generated other hand, when the secondary winding is at outer layer,
by the secondary winding can still flow to the primary side, the balance condition is slightly changed.
as shown in Fig. 24(b). The introduction of shielding may In order to verify the developed theory and technique, five
slightly change the balance condition because of the parasitic measured CM noise curves are compared in Fig. 27: CM

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2296 IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, VOL. 6, NO. 4, DECEMBER 2018

Fig. 28. Step 1: apply interleaving winding structure to reduce the leakage
Fig. 27. Comparison of the measured CM noise with and without core copper inductance.
shielding for the transformer.

An alternative technique is to add an auxiliary winding on

noise without any measures taken, CM noise with a balanced primary side and make it adjacent to the secondary windings.
transformer, CM noise with a balanced transformer and a The voltage on the auxiliary winding can be adjusted to
floating core copper shielding, CM noise with a balanced achieve CM noise balance by adjusting its number of turns.
transformer and a grounded core shielding, and CM noise This technique was introduced in [13], but there is no discus-
with a balanced transformer, a grounded core and winding sion on its design and the analysis of additional power loss
shielding. It is obvious that a floating copper shielding cannot due to this winding.
shield capacitive coupling [14]; therefore, the CM noise is In this section, a design technique is introduced to achieve
not reduced. By connecting the copper shielding to Pri GND, CM balance and reduced leakage inductance without any in-
the CM noise is reduced. And by shielding the winding, circuit tests and complicated calculations. The power loss due
the noise is further reduced and the CM noise can be reduced to this auxiliary winding is also analyzed.
by 35 dB. The measurement results verified the analysis above.
Since the copper shielding is attached to the core, it also B. Flyback Transformer Design
works as a heatsink of the transformer. Also, if the airgap
The Flyback transformer in Fig. 3(b) is to be redesigned to
of the core is at the center leg, the core shielding will not
achieve both CM balance and small leakage inductance.
cause additional eddy current power loss. The analysis will be
Windings interleaving technique is applied in the first step
conducted in Section V.
to reduce leakage inductance. A winding structure of Sec1-
Pri1-Sec2-Aux-Pri2-Pri3 is employed in Fig. 28. Pri n, n =
V. T RANSFORMER D ESIGN W ITH S MALL L EAKAGE
1, 2, and 3, is the layer of primary winding. Sec n, n = 1
I NDUCTANCE AND CM N OISE BALANCE
and 2, is the layer of secondary winding and Aux is auxiliary
A. Flyback Transformer With Small Leakage Inductance and winding layer. The reason of not using a more interleaving
CM Noise Balance structure: Pri1-Sec1-Pri2-Sec2-Aux-Pri3 will be explained in
The leakage inductance of the transformer causes the following.
high-frequency ringing with the intrinsic capacitance of the In the second step, the winding terminal connections should
MOSFET during turning-OFF process [21], which results in be designed to achieve the smallest CM noise based on the
extra power loss and high frequency spikes in EMI spectrum. circuit connections in Fig. 3(a). As shown in Figs. 29 and 30,
Winding interleaving is a common technique to reduce the to achieve the lowest CM noise, the adjacent layers between
leakage inductance. Although a Flyback transformer is more the primary and secondary sides should have the smallest
like a coupled inductor rather than a transformer because the voltage difference. It is assumed that the voltage is linearly
currents will not flow in primary and secondary windings at the distributed along the winding, so the voltage distribution of
same time, as discussed in [12], with interleaving technique, the primary and secondary windings is shown in Fig. 30. VSW
leakage inductance will be reduced. is the voltage added to the primary winding. NP1 , NP2 , and
Unfortunately, interleaving may not be good for CM noise N P represent the number of turns of layer Pri1, layer Pri2,
reduction as it may increase the parasitic capacitances between and the total number of turns of primary winding. N S , Na1 ,
windings. In order to solve this problem, shielding layers and Na2 are the number of turns of the secondary winding,
were added between the primary and secondary windings in auxiliary winding 1, and auxiliary winding 2. The y-axis is
commercial products. For example, the transformer in Fig. 3(b) the height of the winding layers.
has two shielding layers connected to a primary node with It is assumed that the parasitic capacitance is evenly
constant voltage potential to reduce CM noise. However, this distributed between two adjacent layers; the displacement
increases the leakage inductance between two windings as it current between two adjacent layers can be theoretically
increases the distance between windings. The shielding layers calculated [5]. For example, the total displacement current
also increase the cost and size of the transformer. Therefore, i CM_Pri_Sec1 between Pri1 and Sec1 is calculated by integrating
a better technique needs to be developed. the displacement current along the y-axis in (20), where C P_S

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LI et al.: INVESTIGATING SWITCHING TRANSFORMERS FOR COMMON MODE EMI REDUCTION 2297

Fig. 29. Step 2: optimize winding terminal connections to reduce CM noise.

Fig. 31. Step 3: add an extra auxiliary winding AdAux to cancel CM noise.

Fig. 30. Voltage distribution along windings.

is the total parasitic capacitance between the two layers and Fig. 32. AdAux winding for CM noise cancellation. (a) Transformer circuit.
(b) Voltage distribution along AdAux and Sec1 windings.
h W is the height of the winding layer. It is obvious that the
displacement current is propositional to the difference of the measured or calculated based on the physical winding struc-
average voltages, NP1 VSW /(2N P ) and VS VSW /(2N P ), of the ture. However, for multiwinding or multilayer winding struc-
two terminal voltages across the Pri1 and Sec1 layers tures, the accurate measurement of these capacitances is
 hW  
C P_S d NP1 y NP1 difficult, and the calculation is very complicated. It will be
i CM Pri_Sec1 = · VSW − · VSW difficult to implement conventional technique. The parasitic
hW dt NP hW NP
0
  capacitance extraction technique developed in Section III can
y NS
− · VSW dy solve this problem.
hW NP
  In the third step in Fig. 31, a cancelation auxiliary winding
d NP1 VSW N S VSW AdAux is added to the outer layer to cancel the CM noise.
= C P_S − . (20)
dt 2N P 2N P As shown in Fig. 32, when the AdAux winding starts from
As shown in Figs. 29 and 30, to achieve the lowest CM the top of the winding layers, the voltage difference between
noise, the adjacent layers between the primary and secondary AdAux and Sec1 layers is the highest, which means fewer
winding layers should have the lowest average voltage dif- number of turns can have the same cancelation effect as more
ference. It is shown that the net voltage difference between number turns when AdAux winding is located on the bottom of
Pri1 and Sec1 or Sec2 is the smallest with the terminal con- the layer. The number of turns, which can cancel the CM noise,
nections shown in Fig. 29. Therefore, Pri1 is placed adjacent of AdAux winding can be calculated based on the following
to two parallel secondary layers Sec1 and Sec2, as shown process.
in Fig. 29. Similarly, Aux is placed adjacent to Sec2 layer The displacement current i CM_AdAux_Sec1 from AdAux to
because their voltage difference is smaller than that between Sec1 is given by (21), where h Ad is the height of AdAux wind-
Sec2 and Pri2 or Pri3. The voltage difference between Aux and ing and C A_S is the parasitic capacitance between Sec1 and
Pri2 does not generate CM noise as both windings are on the AdAux

primary side. On the other hand, if full interleaving winding d NAd 2h W − h Ad
structure Pri1-Sec1-Pri2-Sec2-Aux-Pri3 is used, the CM noise i CM AdAux_Sec1 = C A_S · · − VSW −
dt 2N P 2h W
may greatly increase because of the higher voltage differences 
NS
between Sec1 and Pri2, between Pri2 and Sec2, and between · VSW . (21)
NP
Sec2 and Aux layers.
In conventional techniques [2], the parasitic capaci- Under cylindrical coordinate, C A_S can be calculated
tance between two adjacent layers such as CP_S can be from (22), where r is the radius of Sec1 coil and dw is the

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2298 IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, VOL. 6, NO. 4, DECEMBER 2018

Fig. 33. Cancelation winding AdAux does not generate winding power loss Fig. 34. Step 4: use a copper shielding to cover the core and windings to
because the H -field is zero. (a) H -field analysis and (b) simulated current reduce CM noise. (a) Circuit and (b) balanced VDA is almost equal to zero.
distributions within winding layers.
due to the eddy currents induced by the H -field in the AdAux
winding. Fig. 33(b) shows the simulated current distributions
distance between Sec1 and AdAux layers. Equation (22) is within winding layers at 60-kHz switching frequency. It is
valid based on two assumptions: 1) the fringing capacitance shown that the AdAux layer has almost zero-induced currents
between two layers can be ignored and 2) r is much larger as predicted
than dw . Besides, h Ad can be obtained from (23), where DAd 
is the distance of two adjacent turns of the AdAux winding.

i = Hdl = Hclc + Hgaplgap ≈ Hgaplgap (26)

By substituting (22) and (23) into (20), NAd becomes the only lc


unknown
i = Hdl ≈ h W Ha1 + Hgaplgap ⇒ Ha1 = 0 (27)
2πεh Ad r l1
C A_S ≈ ≈ 2πεh Ad · (22)

ln (r + dw ) − ln r dw
i = Hdl ≈ h W Ha2 + Hgaplgap ⇒ Ha2 = 0. (28)
h Ad = NAd · DAd . (23) l2

Based on the two-capacitance model of the transformer as On the other hand, if the AdAux winding is located between
shown in Fig. 7(c), the original displacement current i CM_Origin other winding layers, the H -field will not be zero; eddy
before adding the AdAux winding is given in (24), where current power loss will be induced in AdAux winding. The
CBD can be directly measured. If the sum of i CM_AdAux_Sec1 conventional shielding layers in Fig. 3(b) have eddy current
and i CM_Origin equals to zero, the transformer achieves CM power loss too because the H -field on the shielding layers is
balance. Therefore, NAd can be directly solved in (25). Based not zero.
on the technique introduced in Section III, the balance can be Similarly, the power loss of core copper shielding intro-
examined with a signal generator and an oscilloscope duced in Fig. 24 can also be analyzed. When the airgap is
at center leg of the core, the H -field outside the transformer
i CM Origin
windings is very small; thus, there is no power loss in the core
dVSW
= CBD (24) copper shielding.
dt The last step is to apply a copper shielding to transformer
NAd
 core to eliminate the capacitive couplings due to the core.
C BD dw
N S2 h 2W + N P h W · (h W − DAd · N S ) · πεr DAd − NS h W The copper shielding is tied to terminal 6, Pri GND, of the
= . transformer as shown in Fig. 34(a). Based on previous analysis
h W − DAd · N S
(25) in Section IV, using a copper shielding to cover the core will
slightly change the CM balance of the transformer because
In the analysis above, the auxiliary winding AdAux is the secondary winding in Fig. 31 is not fully in the middle
located at the outer layer of the windings so it is convenient of the windings. So, the number of turns of AdAux winding
to adjust NAD . In Fig. 33(a), the H -field is analyzed for one should be slightly adjusted with a signal generator and an
winding window of the transformer. As shown in Fig. 33(a), oscilloscope in the last step to achieve a new balance. The
because the transformer core has a much higher permeability measured VDA after the fourth step is almost equal to zero,
than the air gap lgap in the center leg, the H -field Hgap in the air as shown in Fig. 34(b). A good CM noise balance is achieved.
gap is much higher than that of the H -field Hc , which is almost Using the AdAux winding at outer winding layer can
zero, inside the core. h W is the height of the winding layer. also reduce the leakage inductance of the transformer. The
Based on Ampere’s law in (26), Hgaplgap is almost equal to leakage inductance of transformers is equivalently determined
the total magnetic motive force i generated by transformer by the magnetic energy stored in the space between winding
windings. When the AdAux winding is at the outer layer of the layers [21]. In a 2-D system, as shown in Fig. 31, the magnetic
winding, based on Ampere’s law in (27) and (28), the H -field energy stored in the space between winding layers is equal to
Ha1 and Ha2 on the surfaces of AdAux winding is zero because the magnetic energy density μH 2/2 times the space volume
Hgaplgap = i . Because of this, there is almost no power loss h W dW , where dW is the distance between two-winding layers.

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LI et al.: INVESTIGATING SWITCHING TRANSFORMERS FOR COMMON MODE EMI REDUCTION 2299

TABLE I
PARAMETERS U SED IN A DAUX W INDING D ESIGN

design steps above. The designed parameters are shown

in Table I. Auxiliary winding turn NAd is calculated as around
Fig. 35. Comparison of the measured CM noise. 15.5. A transformer is made and its CM performance is
examined based on the technique developed in Section III.
Based on Ampere’s law, the H -field in the space between The CM performance of the transformer is the best after
two winding layers is determined by the winding currents, adjusting AdAux winding number to 14, when VDA is close
so it is independent of space volume. The magnetic energy to zero as shown in Fig. 34(b). CM noise is well balanced
stored in the space between two winding layers is, therefore, inside the transformer windings. The transformer was used in
proportional to the distance between two winding layers. a commercial Flyback converter for CM noise measurement
Because adding a shielding layer between two winding layers after its CM EMI filter and Y-capacitor were removed. The
as shown in Fig. 3(b) can increase the distance between measured CM noise is shown in Fig. 35 and compared with the
two winding layers, the magnetic energy stored in the space measured noise with the original commercial transformer, and
between two winding layers, and therefore the leakage induc- with the original commercial transformer having core copper
tance will increase. The AdAux winding will not increase shielding and the balance capacitor.
the space between winding layers, so the transformer has The CM noise of the original commercial adapter exceeds
smaller leakage inductance than that of the transformer with EMI standard EN55022 class B from 500 kHz if its CM filter
conventional shielding layers in Fig. 3(b). and Y-Cap were removed. After adding a balance capacitor and
The advantages of the proposed design steps above are a core shielding, the CM noise is reduced by up to 35 dB at low
summarized in the following. frequencies. However, at 22 MHz, the CM noise still cannot
1) Since the voltage on the AdAux winding can be negative fully meet the standard. With the redesigned transformer based
and it grows rapidly as the number of turns increases, on the proposed steps above, the CM noise meets the EMI
the balance capability of the adjustable auxiliary wind- standard in whole frequency range with 4–30-dB margin.
ing is better than conventional shielding layers which The leakage inductance between the primary and other
can only shield two adjacent layers. windings of the transformers is measured using an impedance
2) Although the proposed technique adds one AdAux layer, analyzer. In the measurement, the leakage inductance of the
it removes two shielding layers. Therefore, it simplifies primary winding is measured with all other windings shorted.
transformer winding structure and achieves both the size Compared with the original transformer with conventional
and cost reduction for the transformer. shielding layers in Fig. 3, the measured leakage inductance
3) Because there are no shielding layers between winding of the redesigned transformer is reduced from 6 to 5 μH.
layers, the mutual coupling between windings is higher (The magnetizing inductance of the Flyback transformer is
than that with shielding layers; this leads to smaller 630 μH.)
leakage inductance. Because no Y-capacitors or balance capacitors are used
4) Since there is no eddy current power loss in AdAux across primary and secondary sides with the redesigned trans-
winding, the ac winding loss of the transformer is former, there is no safety issue too. With the redesigned
smaller than that with shielding layers between the transformer, the original CM EMI filter and Y-cap have been
primary and secondary winding layers. successfully removed from the power adapter.
5) Because no balance capacitor is used, there is no safety
issue introduced by the capacitor and there is no extra VI. C ONCLUSION
50-/60-Hz leakage current between primary and sec-
This paper first developed a two-capacitance transformer
ondary too.
winding capacitance model for a multiwinding Flyback trans-
Most importantly, with the help of the transformer balance former without investigating complicated transformer winding
measurement technique proposed in Section III, the AdAux structures. A measurement technique using a signal generator
winding layer can be designed quickly and conveniently and an oscilloscope to extract parasitic capacitance and evalu-
without any in-circuit tests. ate the CM noise performance of a transformer was proposed.
The technique is very convenient for mass testing because
C. Experimental Verification no in-circuit tests are needed. This has been verified by
To verify the proposed transformer design technique, a pro- transformer manufacturers. The near electric field coupling due
totype was developed in Fig. 34(a) based on the proposed to transformer cores was investigated and the core shielding

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2300 IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, VOL. 6, NO. 4, DECEMBER 2018

technique is investigated to reduce this coupling. Balance [19] Y. Bai, X. Yang, D. Zhang, X. Li, W. Chen, and W. Hu, “Conducted EMI
capacitor and winding design techniques are investigated based mitigation schemes in isolated switching-mode power supply without
the need of a Y-capacitor,” IEEE Trans. Power Electron., vol. 32, no. 4,
on the developed two-capacitance model to achieve small CM pp. 2687–2703, Apr. 2017.
noise and small leakage inductance. Experiments verified all [20] P. Meng, X. Wu, J. Yang, H. Chen, and Z. Qian, “Analysis and design
of the proposed techniques. The CM noise of the Flyback considerations for EMI and losses of RCD snubber in flyback converter,”
in Proc. 25th Annu. IEEE Appl. Power Electron. Conf. Expo. (APEC),
adapter prototype can meet the EMI standards without using Palm Springs, CA, USA, Feb. 2010, pp. 642–647.
CM EMI filters and Y-capacitors. [21] R. W. Erickson and D. Maksimovic, Fundamentals of Power Electronics,
2nd ed. Norwell, MA, USA: Klewer, 2001.
[22] P. Kong, S. Wang, and F. C. Lee, “Common mode EMI noise sup-
R EFERENCES pression in bridgeless boost PFC converter,” in Proc. 22nd Annu.
IEEE Appl. Power Electron. Conf. Expo. (APEC), Anaheim, CA, USA,
[1] D. Cochrane, D. Y. Chen, and D. Boroyevic, “Passive cancellation of Feb./Mar. 2007, pp. 929–935.
common-mode noise in power electronic circuits,” IEEE Trans. Power [23] L. Dalessandro, F. da Silveira Cavalcante, and J. W. Kolar, “Self-
Electron., vol. 18, no. 3, pp. 756–763, May 2003. capacitance of high-voltage transformers,” IEEE Trans. Power Electron.,
[2] P. Kong, S. Wang, and F. C. Lee, “Reducing common mode EMI noise vol. 22, no. 5, pp. 2081–2092, Sep. 2007.
in two-switch forward converter,” in Proc. IEEE Energy Convers. Congr.
Expo., San Jose, CA, USA, Sep. 2009, pp. 3622–3629.
[3] P. Meng, J. Zhang, H. Chen, Z. Qian, and Y. Shen, “Characterizing
noise source and coupling path in Flyback converter for common-mode
noise prediction,” in Proc. 26th Annu. IEEE Appl. Power Electron. Conf.
Expo. (APEC), Fort Worth, TX, USA, Mar. 2011, pp. 1704–1709.
Yiming Li (S’16) received the B.S.E.E. degree
[4] Q. Chen, W. Chen, Q. Song, and Z. Yongfa, “An evaluation method of
in electrical engineering from Zhejiang University,
transformer behaviors on common-mode conduction noise in SMPS,”
Zhejiang, China, in 2015. He is currently pursuing
in Proc. IEEE 9th Int. Conf. Power Electron. Drive Syst., Singapore,
the Ph.D. degree with the University of Florida,
Dec. 2011, pp. 782–786.
Gainesville, FL, USA.
[5] P. Kong and F. C. Lee, “Transformer structure and its effects on common
He focuses on transformer and electromagnetic
mode EMI noise in isolated power converters,” in Proc. 25th Annu. IEEE
interference (EMI) filter design and optimization for
Appl. Power Electron. Conf. Expo. (APEC), Palm Springs, CA, USA,
switching mode power supplies. His current research
Feb. 2010, pp. 1424–1429.
interests include EMI/compatibility in power elec-
[6] S. Wang and F. C. Lee, “Analysis and applications of parasitic capac-
tronic systems.
itance cancellation techniques for EMI suppression,” IEEE Trans. Ind.
Electron., vol. 57, no. 9, pp. 3109–3117, Sep. 2010.
[7] B.-G. Kang, S.-K. Chung, J.-S. Won, and H.-S. Kim, “EMI reduction
technique of flyback converter based on capacitance model of trans-
former with wire shield,” in Proc. 9th Int. Conf. Power Electron. ECCE
Asia (ICPE-ECCE Asia), Seoul, South Korea, Jun. 2015, pp. 163–169.
[8] S. Wang, F. C. Lee, and W. G. Odendaal, “Using scattering parameters Huan Zhang (S’17) received the B.S. and
to characterize EMI filters,” in Proc. IEEE 35th Annu. Power Electron. M.S. degrees in electrical engineering from the
Specialists Conf., vol. 1. Jun. 2004, pp. 297–303. Huazhong University of Science and Technology,
[9] Y. Chu and S. Wang, “A generalized common-mode current cancelation Wuhan, China, in 2008 and 2011, respectively. He
approach for power converters,” IEEE Trans. Ind. Electron., vol. 62, is currently pursuing the Ph.D. degree with the
no. 7, pp. 4130–4140, Jul. 2015. Electrical and Computer Engineering Department,
[10] H. Zhang, S. Wang, Y. Li, Q. Wang, and D. Fu, “Two-capacitor University of Florida, Gainesville, FL, USA.
transformer winding capacitance models for common-mode EMI noise From 2011 to 2014, he was an Electrical Engineer
analysis in isolated DC–DC converters,” IEEE Trans. Power Electron., with the Guangdong Electric Power Design Institute,
vol. 32, no. 11, pp. 8458–8469, Nov. 2017. Guangzhou, China. His current research interests
[11] S. Wang, P. Kong, and F. C. Lee, “Common mode noise reduction for include power conversion systems, electromagnetic
boost converters using general balance technique,” IEEE Trans. Power interference, and magnetic components.
Electron., vol. 22, no. 4, pp. 1410–1416, Jul. 2007.
[12] R. Prieto, J. A. Cobos, O. Garcia, R. Asensi, and J. Uceda, “Optimizing
the winding strategy of the transformer in a flyback converter,” in Proc.
27th Annu. IEEE Power Electron. Specialists Conf. (PESC Rec.), vol. 2.
Baveno, Italy, Jun. 1996, pp. 1456–1462.
[13] J.-H. Choi, M. Madafshar, and K. Parmenter, “Designing common- Shuo Wang (S’03–M’06–SM’07) received the
mode (CM) EMI noise cancellation without Y-capacitor,” in Proc. 22nd Ph.D. degree from Virginia Tech, Blacksburg, VA,
Annu. IEEE Appl. Power Electron. Conf. Expo. (APEC), Anaheim, CA, USA, in 2005.
USA, Feb./Mar. 2007, pp. 936–940. From 2010 to 2014, he was with The Univer-
[14] J. Xu and S. Wang, “Investigating a guard trace ring to suppress sity of Texas at San Antonio, San Antonio, TX,
the crosstalk due to a clock trace on a power electronics DSP USA, first as an Assistant Professor and later as an
control board,” IEEE Trans. Electromagn. Compat., vol. 57, no. 3, Associate professor. From 2009 to 2010, he was a
pp. 546–554, Jun. 2015. Senior Design Engineer with GE Aviation Systems,
[15] D. Fu, S. Wang, P. Kong, F. C. Lee, and D. Huang, “Novel techniques to Vandalia, OH, USA. From 2005 to 2009, he was
suppress the common-mode EMI noise caused by transformer parasitic a Research Assistant Professor with Virginia Tech,
capacitances in DC–DC converters,” IEEE Trans. Ind. Electron., vol. 60, Blacksburg, VA, USA. Since 2015, he has been
no. 11, pp. 4968–4977, Nov. 2013. an Associate Professor with the Department of Electrical and Computer
[16] P. Kong, S. Wang, and F. C. Lee, “Common mode EMI noise suppression Engineering, University of Florida, Gainesville, FL, USA. He has authored or
for bridgeless PFC converters,” IEEE Trans. Power Electron., vol. 23, co-authored over 150 IEEE journal and conference papers and holds eight
no. 1, pp. 291–297, Jan. 2008. U.S. patents.
[17] S. Wang, R. Chen, J. D. van Wyk, F. C. Lee, and W. G. Odendaal, Dr. Wang received the Best Transaction Paper Award from the IEEE
“Developing parasitic cancellation technologies to improve EMI filter Power Electronics Society in 2006, two William M. Portnoy Awards for
performance for switching mode power supplies,” IEEE Trans. Electro- the papers published in the IEEE Industry Applications Society in 2004 and
magn. Compat., vol. 47, no. 4, pp. 921–929, Nov. 2005. 2012, respectively, and the prestigious National Science Foundation CAREER
[18] T. Duerbaum and G. Sauerlaender, “Energy based capacitance model Award. He is an Associate Editor of the IEEE T RANSACTIONS ON I NDUSTRY
for magnetic devices,” in Proc. IEEE Appl. Power Electron. Conf., A PPLICATIONS and the Technical Program Co-Chair of the IEEE 2014 Inter-
Mar. 2001, pp. 109–115. national Electric Vehicle Conference.

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LI et al.: INVESTIGATING SWITCHING TRANSFORMERS FOR COMMON MODE EMI REDUCTION 2301

Honggang Sheng received the B.S. degree in elec- Srikanth Lakshmikanthan has been the Techni-
trical engineering from Xi’an Jiaotong University, cal Power Team Manager with Google Hardware,
Xi’an, China, in 1998, the M.S. degree in electri- Mountain View, CA, USA, since 2016. He has been
cal engineering from the South China University a Staff Hardware Engineer with Google, Mountain
of Technology, Guangzhou, China, in 2003, and View, CA, USA, and led power design solutions
the Ph.D. degree in electrical engineering from the in multiple product areas, including data center and
Virginia Polytechnic Institute and State University Chrome Hardware, since 2006.
(Virginia Tech), Blacksburg, VA, USA, in 2009.
Since 2011, he has been a Power Engineer of the
data center and consumer hardware with Google,
Inc., Mountain View, CA, USA.

Choon Ping Chng received the B.S.E.E. degree in

electrical engineering (very large-scale integration
design) from the University of Denver, Denver,
CO, USA, in 1997, and the M.S.E.E. degree in
electrical engineering (very large-scale integration
design) from Stanford University, Stanford, CA,
USA, in 1999.
He has been a Staff Hardware Engineer with
Google, Inc., Mountain View, CA, USA, since 2010,
where he was involved in the creation of Chrome-
books and is currently in charge of Hangouts Meet
hardware development.

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