2/17/2021 Logic Gates and their Static CMOS Implementations | Digital circuits | Electronics and Communication Engineering | ECE

ring | ECE | GATE Sy…

 What is the Weightage of Logic Gates and their Static CMOS Implementations in GATE Exam?

Total 9 Questions have been asked from Logic Gates and their Static CMOS Implementations topic of Digital circuits subject in
previous GATE papers. Average marks 1.22.

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GATE - 2016 (../../../../GATE2016) 01

Question No. 126 (../../../ECE-GATE-2016-Question-126)

Transistor geometries in a CMOS inverter have been adjusted to meet the requirement for worst case charge and discharge times
for driving a load capacitor C. This design is to be converted to that of a NOR circuit in the same technology, so that its worst case
charge and discharge times while driving the same capacitor are similar. The channel lengths of all transistors are to be kept
unchanged. Which one of the following statements is correct?

 (A) Widths of PMOS transistors should be doubled, while widths of NMOS transistors should be halved.

 (B) Widths of PMOS transistors should be doubled, while widths of NMOS transistors should not be changed.

 (C) Widths of PMOS transistors should be halved, while widths of NMOS transistors should not be changed.

 (D) Widths of PMOS transistors should be unchanged, while widths of NMOS transistors should be halved.

Show Answer

Answer : (B) Widths of PMOS transistors should be doubled, while widths of NMOS transistors should not be changed.
Subject : Digital circuits      Topic : Logic Gates and their Static CMOS Implementations

GATE - 2016 (../../../../GATE2016) 01

Question No. 227 (../../../ECE-GATE-2016-Question-227)

The logic functionality realized by the circuit shown below is

 (A) OR  (B) XOR  (C) NAND  (D) AND

Show Answer


Answer : (D) AND
Subject : Digital circuits      Topic : Logic Gates and their Static CMOS Implementations

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2/17/2021 Logic Gates and their Static CMOS Implementations | Digital circuits | Electronics and Communication Engineering | ECE | GATE Sy…

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GATE - 2014 (../../../../GATE2014) 02

Question No. 50 (../../../ECE-GATE-2014-Question-50)

The output F in the digital logic circuit shown in the gure is

 (A) F ¯¯
¯ ¯¯
¯
= X Y Z + XY Z  (B) F ¯¯
¯ ¯¯
¯ ¯¯
¯ ¯¯
= X Y Z + XY Z
¯
 (C) F ¯¯
¯ ¯¯
¯
= X Y Z + XY Z  (D) F ¯¯
¯ ¯¯
¯ ¯¯
¯
= X Y Z + XY Z

Show Answer

Answer : (A) F ¯¯Y Z + XȲ

= X̄ ¯¯Z

Subject : Digital circuits      Topic : Logic Gates and their Static CMOS Implementations

Question No. 325 (../../../ECE-GATE-2014-Question-325) GATE - 2014 (../../../../GATE2014) 01

In the circuit shown in the gure, if C=0, the expression for Y is

 (A) Y ¯¯
¯ + ¯¯
= AB ¯
AB  (B) Y = A + B  (C) Y ¯¯
¯ + ¯¯
= A ¯
B  (D) Y = AB

Show Answer

Answer : (A) Y ¯¯
¯ ¯¯
¯
= AB + A B

Subject : Digital circuits      Topic : Logic Gates and their Static CMOS Implementations

Question No. 1 (../../../ECE-GATE-2013-Question-1) GATE - 2013 (../../../../GATE2013) 01

A bulb in a staircase has two switches, one switch being at the ground oor and the other one at the rst oor. The bulb can be
turned ON and also can be turned OFF by any one of the switches irrespective of the state of the other switch. The logic of switching
of the bulb resembles

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2/5
2/17/2021 Logic Gates and their Static CMOS Implementations | Digital circuits | Electronics and Communication Engineering | ECE | GATE Sy…
 (A) an AND gate  (B) an OR gate  (C) an XOR gate  (D) a NAND gate

Show Answer

Answer : (C) an XOR gate

Subject : Digital circuits      Topic : Logic Gates and their Static CMOS Implementations

GATE - 2011 (../../../../GATE2011) 01

Question No. 19 (../../../ECE-GATE-2011-Question-19)

The output Y in the circuit below is always "1" when

 (A) two or more of the inputs P, Q, R are "0"’  (B) two or more of the inputs P, Q, R are "1"

 (C) any odd number of the inputs P, Q, R is "0"’  (D) any odd number of the inputs P, Q, R is "1"

Show Answer

Answer : (B) two or more of the inputs P, Q, R are "1"

Subject : Digital circuits      Topic : Logic Gates and their Static CMOS Implementations

GATE - 2010 (../../../../GATE2010) 01

Question No. 11 (../../../ECE-GATE-2010-Question-11)

Match the logic gates in Column A with their equivalents in Column B.

 (A) P–2, Q-4, R-1, S-3  (B) P-4, Q-2, R-1, S-3  (C) P–2, Q-4, R-3, S-1  (D) P-4, Q-2, R-3, S-1

Show Answer

Answer : (D) P-4, Q-2, R-3, S-1

Subject : Digital circuits      Topic : Logic Gates and their Static CMOS Implementations

Question No. 12 (../../../ECE-GATE-2010-Question-12) GATE - 2010 (../../../../GATE2010)

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2/17/2021 Logic Gates and their Static CMOS Implementations | Digital circuits | Electronics and Communication Engineering | ECE | GATE Sy…

For the output F to be 1 in the logic circuit shown, the input combination should be

 (A) A = 1, B= 1. C = 0  (B) A = 1, B= 0,C = 0  (C) A = 0, B= 1. C = 0  (D) A = 0, B= 0, C = 1

Show Answer

Answer : (D) A = 0, B= 0, C = 1
Subject : Digital circuits      Topic : Logic Gates and their Static CMOS Implementations

GATE - 2008 (../../../../GATE2008) 02

Question No. 57 (../../../ECE-GATE-2008-Question-57)

Which of the following Boolean Expression correctly represents the relation between P, Q, R and M1?

 (A) M1 = (P OR Q) XOR R  (B) M1 = (P AND Q) XOR R  (C) M1 = (P NOR Q) XOR R  (D) M1 = (P XOR Q) XOR R

Show Answer

Answer : (D) M1 = (P XOR Q) XOR R

Subject : Digital circuits      Topic : Logic Gates and their Static CMOS Implementations

Topics of Digital circuits

Number Systems

Combinational Circuits (Combinational-circuits)

Boolean Algebra (Boolean-algebra)

Minimization of Functions using Boolean Identities and Karnaugh Map

Logic Gates and their Static CMOS Implementations (Logic-Gates-their-Static-CMOS-Implementations)

Arithmetic Circuits

Code Converters


Multiplexers

Decoders and PLAs

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2/17/2021 Logic Gates and their Static CMOS Implementations | Digital circuits | Electronics and Communication Engineering | ECE | GATE Sy…

Sequential Circuits: Latches and Flip-Flops, Counters, Shift-Registers and Finite State Machines (Sequential-circuits-Latches-and-
Flip-Flops)

Data Converters: Sample and Hold Circuits, ADCs and DACs (Data-Converters-Sample-Hold-Circuits-ADC-DAC)

Semiconductor Memories: ROM, SRAM, DRAM

8-bit Microprocessor (8085): Architecture, Programming, Memory and I/O Interfacing (8-bit-Microprocessor-8085-Architecture-
Programming-Memory-IO-Interfacing)

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