Chapter1 Microchip Fabrication
Chapter1 Microchip Fabrication
半導體製程
材料科學與工程研究所
張翼 教授
Chapter 1
The Semiconductor Industry
Figure 1.1 Eniac statistics. (Foundations of Computector
Technology, J. G. Giarratano, Howard W. Sams & Co.,
Indianapolis, Ind., 1983) (First electronic computer,1947)
Figure 1.2 Vacuum tube
Bell Labs
John Bardeen, Walter
Brattin, William Shockley
1956 Nobel Prize
(Physicist)
Si-Ge, bandgap increase,
low terminal noise
Figure 1.4 Solid-state discrete devices.
Planar Technology
Figure 1.7 Growth of Dram Density (After Campbell, The
Science of Engineering and Microelectronics fabrication,
Oxford Press.)
class 1
1 Particle/ft3
Particle size < 0.1µm
Figure 1.12 Cross section of typical planarized two-level metal
VLI structure showing range of via depths after planarization.
(Courtesy of Solid State Technology)
Use multilayer
interconnect level to
increase traffic
Figure 1.13 Wafer fabrication (and electrical test).
Figure 1.14 Price of chips per bit of memory.
→ semiconductor
→ motor vehicle parts
Figure 1.17 Future DRAM capacity. (Source: Business Week,
July, 1994)
Figure 1.18 Growth of semiconductor industry-capital
spending (Courtesy of Semiconductor Industry Association)
→ semiconductors
Figure 1.18
Wafer Fabrication
Vertical Integration
IDM:Integrated Device Manufacturer-include IC design and
manufacture
Fab
Fabless company
Foundry
Packaging technology
becomes important as CPU
speed approaching 1 Gb/Sec
Figure 1.24 P-N and N-P junctions.
Figure 1.25 Basics of silicon planar processing.
Figure 1.26 Double diffused bipolar transistor formed in
epitaxial layer.
Figure 1.27 DRAM growth design rule and number of process
steps. (SEMI 1995 ISS Conference)