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INSTRUCTION MANUAL

DIRECTIONAL OVERCURRENT PROTECTION RELAY

GRE140

©Toshiba Energy Systems & Solutions Corporation 2020

All Rights Reserved.

(Ver. 6)
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Safety Precautions
Before using this product, please read this chapter carefully.
This chapter describes the safety precautions recommended when using the GRE140. Before
installing and using the equipment, this chapter must be thoroughly read and understood.

Explanation of symbols used

Signal words such as DANGER, WARNING, and two kinds of CAUTION, will be followed by
important safety information that must be carefully reviewed.

DANGER Indicates an imminently hazardous situation which will result in death or

serious injury if you do not follow the instructions.

WARNING Indicates a potentially hazardous situation which could result in death or

serious injury if you do not follow the instructions.
CAUTION Indicates a potentially hazardous situation which if not avoided, may result in
minor injury or moderate injury.
CAUTION Indicates a potentially hazardous situation which if not avoided, may result in
property damage.

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DANGER
• Current transformer circuit
Never allow the current transformer (CT) secondary circuit connected to this equipment to be
opened while the primary system is live. Opening the CT circuit will produce a dangerously high
voltage.

WARNING
• Exposed terminals
Do not touch the terminals of this equipment while the power is on, as the high voltage generated
is dangerous.

• Residual voltage
Hazardous voltage can be present in the DC circuit just after switching off the DC power supply. It
takes approximately 30 seconds for the voltage to discharge.

• Fiber optic (option)

When connecting this equipment via an optical fiber, do not look directly at the optical signal.

CAUTION

• Earth
The earthing terminal of the equipment must be securely earthed.

CAUTION

• Operating environment
The equipment must only be used within the range of ambient temperature, humidity and dust
detailed in the specification and in an environment free of abnormal vibration.

• Ratings
Before applying AC voltage and current or the power supply to the equipment, check that they
conform to the equipment ratings.

• Printed circuit board

Do not attach and remove printed circuit boards when the power supply to the equipment is on,
as this may cause the equipment to malfunction.

• External circuit
When connecting the output contacts of the equipment to an external circuit, carefully check the
supply voltage used in order to prevent the connected circuit from overheating.
• Power supply

If power has not been supplied to the relay for two days or more, then all fault, event and
disturbance records and the internal clock may be cleared soon after restoring the power. This is
because the back-up RAM may have discharged and may contain uncertain data.

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• Connection cable
Carefully handle the connection cable without applying excessive force.

• Modification

Do not modify this equipment, as this may cause the equipment to malfunction.

• Disposal
This product does not contain expendable supplies nor parts that can be recycled. When disposing
of this equipment, do so in a safe manner according to local regulations as an industrial waste. If
any points are unclear, please contact our sales representatives.

• Plastics material
This product contains the following plastics material.
- Polycarbonate + ABS

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Contents
Safety Precautions 1
1. Introduction 8
2. Application Notes 10
2.1 Overcurrent and Undercurrent Protection 10
2.1.1 Non-directional Overcurrent Protection 10
2.1.2 Directional Overcurrent Protection 17
2.1.3 Scheme Logic 21
2.1.4 Phase Undercurrent Protection 48
2.1.5 Thermal Overload Protection 50
2.1.6 Broken Conductor Protection 53
2.1.7 Breaker Failure Protection 56
2.1.8 Countermeasures for Magnetising Inrush 59
2.1.9 Power Protection 63
2.1.10 Current-change detector element 68
2.1.11 CT Requirements 69
2.2 Overvoltage and Undervoltage Protection 71
2.2.1 Phase Overvoltage Protection 71
2.2.2 Phase Undervoltage Protection 75
2.2.3 Zero Phase Sequence Overvoltage Protection 79
2.2.4 Negative Phase Sequence Overvoltage Protection 83
2.3 Frequency Protection 86
2.3.1 Frequency element 86
2.3.2 Frequency rate-of-change element 88
2.3.3 Trip Circuit 89
2.4 Trip, Alarm and Pick-up Signal Output 90
2.5 Autoreclose 94
2.5.1 Scheme Logic 94
2.5.2 Voltage and synchronism check 98
2.5.3 Sequence Coordination 103
2.5.4 Setting 104
2.6 Motor Protection 107
2.6.1 Motor status monitoring 107
2.6.2 Overcurrent Protection according to motor status 108
2.6.2.1 Instantaneous and definite time Overcurrent Protection
during motor start-up 108
2.6.2.2 Inverse Time and Definite time Overcurrent Protection
during motor running 109
2.6.3 Motor Protection functions 109
3. Technical Description 117
3.1 Hardware Description 117
3.1.1 Outline of Hardware Modules 117

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3.2 Input and Output Signals 119

3.2.1 AC Input Signals 119
3.2.2 Binary Input Signals 119
3.2.3 Binary Output Signals 121
3.2.4 Frequency 122
3.2.5 PLC (Programmable Logic Controller) Function 123
3.3 Automatic Supervision 124
3.3.1 Basic Concept of Supervision 124
3.3.2 Relay Monitoring 124
3.3.3 CT Failure Supervision 125
3.3.4 VT Failure Supervision 126
3.3.5 Trip Circuit Supervision 127
3.3.6 Circuit Breaker Monitoring 128
3.3.7 PLC Data and IEC61850 Monitoring Data Monitoring 129
3.3.8 IEC61850 Communication Monitoring 130
3.3.9 Failure Alarms 130
3.3.10 Trip Blocking 131
3.3.11 Setting 131
3.4 Recording Function 132
3.4.1 Fault Recording 132
3.4.2 Event Recording 133
3.4.3 Disturbance Recording 134
3.5 Metering Function 136
3.6 Fault locator 138
3.6.1 Application 138
3.6.2 Distance to Fault Calculation 138
3.6.3 Starting Calculation 139
3.6.4 Displaying Location 139
3.6.5 Setting 140
4. User Interface 141
4.1 Outline of User Interface 141
4.1.1 Front Panel 141
4.1.2 Communication Ports 143
4.2 Operation of the User Interface 144
4.2.1 LCD and LED Displays 144
4.2.2 Relay Menu 147
4.2.3 Displaying Records 150
4.2.4 Displaying the Status 158
4.2.5 Viewing the Settings 167
4.2.6 Changing the Settings 169
4.2.7 Control 231
4.2.8 Testing 233
4.3 Personal Computer Interface 237
4.4 MODBUS Interface 237
4.5 IEC 60870-5-103 Interface 237

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4.6 IEC 61850 Communication _ Option 238

4.7 Clock Function 238
4.8 Special Mode 239
5. Installation 241
5.1 Receipt of Relays 241
5.2 Relay Mounting 241
5.2.1 Flush Mounting 241
5.2.2 Dimensions 243
5.3 Electrostatic Discharge 244
5.4 Handling Precautions 244
5.5 External Connections 244
6. Commissioning and Maintenance 245
6.1 Outline of Commissioning Tests 245
6.2 Cautions 245
6.2.1 Safety Precautions 245
6.2.2 Precautions for Testing 246
6.3 Preparations 246
6.4 Hardware Tests 247
6.4.1 User Interfaces 247
6.4.2 Binary Input Circuit 247
6.4.3 Binary Output Circuit 249
6.4.4 AC Input Circuits 250
6.5 Function Test 251
6.5.1 Measuring Element 251
6.5.2 Protection Scheme 265
6.5.3 Metering and Recording 265
6.6 Conjunctive Tests 266
6.6.1 On Load Test 266
6.6.2 Tripping and Reclosing Circuit Test 267
6.7 Maintenance 270
6.7.1 Regular Testing 270
6.7.2 Failure Tracing and Repair 270
6.7.3 Replacing Failed Relay Unit 271
6.7.4 Resumption of Service 271
6.7.5 Storage 271
7. Putting the Relay into Service 272

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Appendix A 273
Programmable Reset Characteristics and Implementation of Thermal Model 273
Appendix B 277
Directional Earth Fault Protection and Power System Earthing 277
Appendix C 282
Signal List 282
Appendix D 339
Binary Output Default Setting list 339
Appendix E 342
Details of Relay Menu and LCD & Keypad Operation 342
Appendix F 356
Case Outline 356
Appendix G 358
Typical External Connections 358
Appendix H 363
Relay Setting Sheet 363
Appendix I 392
Commissioning Test Sheet (sample) 392
Appendix J 397
Return Repair Form 397
Appendix K 401
Technical Data 401
Appendix L 409
Symbols Used in Scheme Logic 409
Appendix M 412
IEC60870-5-103: Interoperability 412
Appendix N 422
Modbus: Interoperability 422
Appendix O 469
Inverse Time Characteristics 469
Appendix P 475
IEC61850: Interoperability 475
Appendix Q 526
IEC 61850 MICS & MIPS 526
Appendix R 554
Signal list for IEC 61850 554
Appendix S 559
Ordering 559
 The data given in this manual are subject to change without notice. (Ver.6.0)

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1. Introduction
GRE140 series relays provide four stage non-directional and directional overcurrent protection for
distribution networks, and back-up protection for transmission and distribution networks.

The GRE140 series has 12 models and provides the following protection schemes.
• Directional overcurrent protection and directional zero phase sequence overcurrent
protection for earth faults with definite time or inverse time characteristics
• Instantaneous directional overcurrent protection and instantaneous directional zero phase
sequence overcurrent protection for earth faults
• Thermal overload protection, locked rotor protection and restart inhibit for motor
protection. (models 700, 701, 702, 720, 721 and 722 only)
Models 400, 401, 402, 700, 701 and 702 provide three-phase directional phase fault protection and
directional earth fault protection.
Models 420, 421, 422, 720, 721 and 722 provide three-phase directional phase fault protection,
and directional earth and sensitive earth fault protection.
All models include multiple, high accuracy, overcurrent protection elements (for phase and/or
earth fault) with inverse time and definite time delay functions. All phase, earth and sensitive earth
fault overcurrent elements can be set independently subject to directional control.
In addition, GRE140 provides multi-shot, three phase auto-reclose, with independent sequences
for phase fault, and earth fault and sensitive earth fault. Auto-reclosing can also be triggered by
external protection devices.
Other protection functions are available according to model type, including thermal protection to
IEC60255-8, negative sequence overcurrent protection, under/overvoltage and under/over-
frequency protections. See Table 1.1.1 for details of the protection functions available in each
model.
All models provide continuous monitoring of internal circuits and of software. External circuits
are also monitored, by trip circuit supervision, CT and VT supervision, and CB condition
monitoring features.
A user-friendly HMI is provided through a backlit LCD, programmable LEDs, keypad and
menu-based operating system. PC access is also provided, either for local connection via a
front-mounted USB port. The communication system allows the user to read and modify the relay
settings, and to access data gathered by the relay’s metering and recording functions.
Data available either via the relay HMI or communications ports includes the following functions.

The GRE140 series provides the following functions for all models.
• Metering
• Fault recording
• Event recording
• Disturbance recording (available via communications ports)

Table 1.1.1 shows the members of the GRE140 series and identifies the functions to be provided
by each member.

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Table 1.1.1 Series Members and Functions

Model Number GRE140 -

40_A 42_A 70_A 72_A
Directional Phase Fault O/C OC(67/50P, 67/51P): stage to stage
1st 4th    
Directional Earth Fault O/C EF(67/50N, 67/51N): 1st stage to 4th stage    
Directional Sensitive Earth Fault O/C SEF(67/50N, 67/51N): 1st stage to 4th stage  
Phase Undercurrent UC(37P): 1st and 2nd stage    
Thermal Overload THM (49)    
Directional Negative Phase Sequence Overcurrent NOC(67/46): 1st and 2nd stage    
Phase Overvoltage OV(59): 1st stage to 4th stage    
Phase Undervoltage UV(27): 1st stage to 4th stage    
Zero Phase Sequence Overvoltage ZOV(59N): 1st and 2nd stage    
Negative Phase Sequence Overvoltage NOV(47): 1st and 2nd stage    
Under/Overfrequency FRQ(81U/81O): 1st stage to 4th stage    
Frequency rate-of-change DFRQ: 1st stage to 4th stage    
Broken Conductor BCD    
Circuit Breaker Fail CBF(50BF)    
Locked rotor protection (51LR)  
Start Protection (50S)  
Stalled motor protection  
Restart Inhibit (66)  
Cold Load Protection    
Inrush Current Detector    
Reverse Power / Reverse Reactive power (32P / 32Q)    
Auto-reclose (79)    
Synchronism Check (25)    
Fault Locator    
CT Supervision    
VT Supervision    
Trip circuit supervision    
Self supervision    
CB State Monitoring    
Trip Counter Alarm    
∑Iy Alarm    
CB Operate Time Alarm    
Metering    
Fault records    
Event records    
Disturbance records    
MODBUS Communication    
IEC60870-5-103 Communication    
IEC61850 communication () () () ()
Note: The 4th stage of OC, EF, SEF, OV and UV, and the 2nd stage of UC, NOC, ZOV and NOV are for alarm.
The model of “ _ “ is 0, 1or 2 for number of BO and BI.

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2. Application Notes
2.1 Overcurrent and Undercurrent Protection
2.1.1 Non-directional Overcurrent Protection

GRE140 provides distribution network protection with four-stage phase fault and earth fault
overcurrent elements OC1 to OC4, EF1 to EF4*, sensitive earth fault elements SEF1 to SEF4**,
and two-stage negative sequence overcurrent elements NOC1 and NOC2 which can be enabled or
disabled by scheme switch setting. The OC1, OC2, EF1, EF2, SEF1, SEF2, NOC1 and NOC2
elements have selective inverse time and definite time characteristics. The protection of local and
downstream terminals is coordinated with the current setting, time setting, or both.
The characteristic for the overcurrent elements is as follows:

Stage 4

Stage 1
0 I

Note: NOC provides two stage overcurrent elements.

Figure 2.1.1 Characteristic of Overcurrent Elements

*On models 400, 401, 402, 700, 701 and 702 where scheme switch [APPLCT] is set to “3P” the
earth fault current input may be connected either in the residual circuit of the phase CTs, or
alternatively a dedicated earth fault CT may be used. In the case of connection in the residual
circuit of the phase CTs, the settings of the phase CT ratio OCCT and the earth fault CT ratio
EFCT should be equal. On the other hand, where a dedicated earth fault CT is applied, then the
settings of OCCT and EFCT may NOT be equal, and in this case the measuring range of earth fault
current is limited to 20A maximum (see section 2.1.3.3).
**On models 420, 421, 422, 720, 721 and 722, the earth fault current, NOT sensitive earth fault
current, is calculated. To display the correct earth fault current on the relay, the setting of OCCT
and EFCT should be equal.
2.1.1.1 Inverse Time Overcurrent Protection

In a system for which the fault current is practically determined by the fault location, without
being substantially affected by changes in the power source impedance, it is advantageous to use
inverse definite minimum time (IDMT) overcurrent protection. This protection provides
reasonably fast tripping, even at a terminal close to the power source where the most severe faults
can occur.
Where ZS (the impedance between the relay and the power source) is small compared with that of
the protected section ZL, there is an appreciable difference between the current for a fault at the far
end of the section (ES/(ZS+ZL), ES: source voltage), and the current for a fault at the near end
(ES/ZS). When operating time is inversely proportional to the current, the relay operates faster for
a fault at the end of the section nearer the power source, and the operating time ratio for a fault
close to the end remote from the power source is ZS/(ZS + ZL).

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The resultant time-distance characteristics are shown in Figure 2.1.2 for radial networks with
several feeder sections. With the same selective time coordination margin TC as the download
section, the operating time can be further reduced by using a more inverse characteristic.

Operate time

TC
TC

A B C

Figure 2.1.2 Time-distance Characteristics of Inverse Time Protection

The inverse time overcurrent protection elements have the IDMT characteristics defined by
equation (1) in accordance with IEC 60255-151:
  
 k  + c
t (G ) =
TMS ×    
( )
α
 I (1)
− 1 
  Is  
where:
t = operating time for constant current I (seconds),
I = energising current (amperes),
Is = overcurrent setting (amperes),
TMS = time multiplier setting,
k, ,α, c = constants defining curve.

Nine curve types are available as defined in Table 2.1.1. They are illustrated in Figure 2.1.3.
Any one curve can be selected for each IDMT element by scheme switch [M∗∗∗C].

Table 2.1.1 Specification of IDMT Curves

Curve Type (IEC 60255-151) Curve Description k α c tr β

A IEC Normal Inverse (NI) 0.14 0.02 0 - -
B IEC Very Inverse (VI) 13.5 1 0 - -
C IEC Extremely Inverse (EI) 80 2 0 - -
- UK Long Time Inverse (LTI) 120 1 0 - -
D IEEE Moderately Inverse (MI) 0.0515 0.02 0.114 4.85 2
E IEEE Very Inverse (VI) 19.61 2 0.491 21.6 2
F IEEE Extremely Inverse (EI) 28.2 2 0.1217 29.1 2
- US CO8 Inverse 5.95 2 0.18 5.95 2
- US CO2 Short Time Inverse 0.02394 0.02 0.01694 2.261 2
Note: tr and β are used to define the reset characteristic. Refer to equation (2).

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In addition to above nine curve types, GRE140 can provide a user configurable IDMT curve. If
required, set the scheme switch [M∗∗∗C] to “C” and set the curve defining constants k, a, c. The
following table shows the setting ranges of the curve defining constants.
Curve defining constants Range Step
k 0.000 – 300.00 0.01
α 0.00 – 5.00 0.01
c 0.000 – 5.000 0.001
tr 0.000 – 30.000 0.001
β 0.00 – 5.00 0.01

IEC/UK Inverse Curves IEEE/US Inverse Curves

(Time Multiplier = 1) (Time Multiplier = 1)
1000 100

100

10
Operating Time (s)

Operating Time (s)

10
LTI

NI
1
MI
1 VI
VI
CO2
CO8
EI
EI
0.1 0.1
1 10 100 1 10 100
Current (Multiple of Setting) Current (Multiple of Setting)

Figure 2.1.3 IDMT Characteristics

Programmable Reset Characteristics

OC1, OC2, EF1, EF2, SEF1, SEF2, NOC1 and NOC2 have a programmable reset feature:
instantaneous, definite time delayed, or dependent time delayed reset. (Refer to Appendix A for a
more detailed description.)
Instantaneous resetting is normally applied in multi-shot auto-reclosing schemes, to ensure correct
grading between relays at various points in the scheme.
The inverse reset characteristic is particularly useful for providing correct coordination with an
upstream induction disc type overcurrent relay.
The definite time delayed reset characteristic may be used to provide faster clearance of
intermittent (‘pecking’ or ‘flashing’) fault conditions.

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Definite time reset

The definite time resetting characteristic can be applied to the IEC/IEEE/US operating
characteristics.
If definite time resetting is selected, and the delay period is set to instantaneous, then no
intentional delay is added. As soon as the energising current falls below the reset threshold, the
element returns to its reset condition.
If the delay period is set to some value in seconds, then an intentional delay is added to the reset
period. If the energising current exceeds the setting for a transient period without causing tripping,
then resetting is delayed for a user-definable period. When the energising current falls below the
reset threshold, the integral state (the point towards operation that it has travelled) of the timing
function (IDMT) is held for that period.
This does not apply following a trip operation, in which case resetting is always instantaneous.

Dependent time reset

The dependent time resetting characteristic complies with the dependent time reset characteristics
described in IEC 60255-151 which are specific only to the IEEE/US operate characteristics, and
are defined by the following equation:
 
 tr 
t (G ) RTMS × 
=  (2)
β
  I  
1 −  I S  

where:
t = time required for the element to reset fully after complete operation (seconds),
I = energising current (amperes),
Is = overcurrent setting (amperes),
tr = time required to reset fully after complete operation when the energising current is zero
(see Table 2.1.1),
RTMS = reset time multiplier setting.
β = constants defining curve.

Figure 2.1.4 illustrates the dependent time reset characteristics.

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IEEE Reset Curves

(Time Multiplier = 1)
1000.00

100.00

Time (s)
EI
VI

10.00
CO8
MI

CO2

1.00
0.1 1
Current (Multiple of Setting)

Figure 2.1.4 Dependent Time Reset Characteristics

2.1.1.2 Definite Time Overcurrent Protection

In a system in which the fault current does not vary a great deal in relation to the position of the
fault, that is, the impedance between the relay and the power source is large, the advantages of the
IDMT characteristics are not fully utilised. In this case, definite time overcurrent protection is
applied. The operating time can be constant irrespective of the magnitude of the fault current.
The definite time overcurrent protection consists of instantaneous overcurrent measuring elements
and delayed pick-up timers started by the elements, and provides selective protection with graded
setting of the delayed pick-up timers. Thus, the constant time coordination with the downstream
section can be maintained as shown in Figure 2.1.5. As is clear in the figure, the nearer to the
power source a section is, the greater the delay in the tripping time of the section. This is
undesirable particularly where there are many sections in the series.
Operate time

TC

TC

A B C

Figure 2.1.5 Definite Time Overcurrent Protection

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2.1.1.3 Instantaneous Overcurrent Protection

In conjunction with inverse time overcurrent protection, additional overcurrent elements provide
instantaneous or definite time overcurrent protection.
OC1 to OC4 and EF1 to EF4 are phase fault and earth fault protection elements, respectively. Each
element is programmable for instantaneous or definite time delayed operation. (In case of
instantaneous operation, the delayed pick-up timer is set to 0.00.) The phase fault elements operate
on a phase segregated basis, although tripping is for three phase only.

Selective Instantaneous Overcurrent Protection

When applied to radial networks with several feeder sections where ZL (impedance of the
protected line) is large enough compared with ZS (the impedance between the relay and the power
source), and the magnitude of the fault current for a local end fault is much greater (3 times or
more, or (ZL+ZS)/ZS≧3, for example) than that for a remote end fault under the condition that ZS
is maximum, the pick-up current can be set sufficiently high so that the operating zone of the
elements do not reach the remote end of the feeder, and thus instantaneous and selective protection
can be applied.
This high-set overcurrent protection is applicable and effective particularly for feeders near the
power source where the setting is feasible, whereas longer tripping times would otherwise have to
be accepted.
As long as the associated inverse time overcurrent protection is correctly coordinated, the
instantaneous protection does not require setting coordination with the downstream section.
Figure 2.1.6 shows operating times for instantaneous overcurrent protection in conjunction with
inverse time overcurrent protection. The shaded area shows the reduction in operating time by
applying the instantaneous overcurrent protection. The instantaneous protection zone decreases as
ZS increases.

Figure 2.1.6 Conjunction of Inverse and Instantaneous Overcurrent Protection

The current setting is set 1.3 to 1.5 times higher than the probable maximum fault current in the
event of a fault at the remote end. The maximum fault current for elements OC1 to OC4 is
obtained in case of three-phase faults, while the maximum fault current for elements EF1 to EF4 is
obtained in the event of single phase earth faults.

2.1.1.4 Staged Definite Time Overcurrent Protection

When applying inverse time overcurrent protection for a feeder system as shown in Figure 2.1.7,
well coordinated protection can be achieved with the fuses covering branch circuit faults and
high-speed protection for the feeder faults being provided by adding staged definite time
overcurrent protection with time-graded OC2 and OC3 or EF2 and EF3 elements.

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Fuse

GRE140

Figure 2.1.7 Feeder Protection Coordinated with Fuses

Configuring the inverse time element OC1 (and EF1) and time graded elements OC2 and OC3 (or
EF2 and EF3) as shown in Figure 2.1.8, the characteristic of overcurrent protection can be
improved to coordinate with the fuse characteristic.
Time (s)
OC1
OC2

OC3

Fuse

Current (amps)

Figure 2.1.8 Staged Definite Time Protection

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2.1.2 Directional Overcurrent Protection

In a system including parallel feeder circuits, ring main circuits or sources at both line terminals,
the fault current at the relay location can flow in either direction. In such a case, directional control
should be added to overcurrent elements.
GRE140 provides directional control for phase fault and earth fault overcurrent elements OC1 to
OC4, EF1 to EF4, SEF1 to SEF4, NOC1 and NOC2 which can be enabled or disabled by scheme
switch setting. The directional characteristic can be selected to “Forward” or “Reverse” or “Non”
by scheme switch setting [∗∗∗-DIR]. The OC1, OC2, EF1, EF2, SEF1, SEF2, NOC1 and NOC2
elements have selective inverse time and definite time characteristics.

2.1.2.1 Application of Directional Overcurrent Protection

Parallel Feeder Circuits

If non-directional protection were applied to the circuit shown in Figure 2.1.9, then a fault at F
would result in both feeders being tripped at points A and B, and total loss of supply to the load.
Directional relays can be applied to look back into the feeder, thereby ensuring that only the faulty
feeder is disconnected. The relays at A and B would normally be set to operate at 50% of the full
load current of the circuit, via their inverse time elements OC1 and EF1, with a directional
characteristic looking in the direction shown by the arrows.
The various overcurrent elements of GRE140 are independently programmable for directional
operation. Therefore, elements OC2 and EF2 could be set for non-directional operation to provide
time-delayed back-up protection for the load.

F A

Load
GRE140 GRE140
Non-directional Directional

GRE140 GRE140
Non-directional Directional

Figure 2.1.9 Application of GRE140 to Parallel Feeders

Ring Main Circuits

A ring main circuit is commonly protected by directional overcurrent relays, since current may
flow in either direction past the relaying points. The normal grading procedure is applied
separately in both the clockwise and anti-clockwise directions. Conventionally, two directional
relays would be required at each load connection point, one for each direction.
A simple system is illustrated in Figure 2.1.10 showing definite time grading, although inverse
time can also be applied. Non-directional relays are applied at the in-feeds to the ring. All other
protections are directional relays. It can be seen that a fault at F is cleared by tripping at A in 1.0s
and at B in 0.4s.
Alternatively, since GRE140 provides multiple, independent bi-directional overcurrent stages, a
scheme could be implemented in which a single relay can perform the necessary protection
functions in both directions at each load connection point. Each GRE140 overcurrent element can
be programmed with different settings for forward and reverse direction, thus allowing correct
grading to be achieved in both the clockwise and anti-clockwise directions.

 17 
 6 F 2 T 0 1 7 7

GRD140

GRD140

GRD140

GRD140
0.1s 1.0s 0.4s 0.7s

GRD140
1.3s
Non-directional

GRD140
1.3s 0.1s
GRD140

GRD140

GRD140

GRD140
Non-directional
1.0s 0.4s 0.7s

A B

Figure 2.1.10 Protection of a Ring Main Circuit

Power Systems with Sources at both Line Terminals

In power systems with sources at both line terminals as shown in Figure 2.1.11, the fault current
flows in from both terminals.

G1 G2

c 1 b 2 a 3
F2 F1

Figure 2.1.11 Protection of a power system with sources at both line terminals

The protection is performed by setting the directional element at points 1, 2 and 3 to operate only
when the fault current (F1: solid lines) flows in from source G1 and at points a, b and c to operate only
when the fault current (F2: dotted lines) flows in from source G2, with grading provided by time
delays.

 18 
 6 F 2 T 0 1 7 7

2.1.2.2 Directional Characteristics

Figure 2.1.12 illustrates the directional characteristic, with the forward operate zone shaded. The
reverse zone is simply a mirror image of the forward zone. The forward operate zone or reverse
operate zone is selectable by the scheme switch [OC-DIR], [EF-DIR], [SE-DIR] and [NC-DIR].
As shown in Figure 2.1.13, each directional characteristic is composed of a forward directional
characteristic, reverse directional characteristic and overcurrent thresholds.
Boundary of Operation Boundary of Operation
(leading) +87.5° (leading)
CA + 90 CA + 90

CA + 60 CA + 60

CA + 30 CA + 30

10 x Is 10 x Is
5 x Is 5 x Is
CA - 180 CA CA - 180 CA

Reverse Forward Reverse Forward

Operate Operate Operate Operate
CA - 30 CA - 30
Zone Zone Zone Zone

CA - 60 CA - 60
CA - 90 CA - 90
Boundary of Operation Boundary of Operation
(lagging) - 87.5° (lagging)
CA: Characteristic angle CA: Characteristic angle

(a) Characteristic of OC, EF and NOC (b) Characteristic of SEF

Figure 2.1.12 Directional Operate Characteristic

Directional (Forward)
& ∗∗1-4
Forward

Directional (Reverse)
& ∗∗1-4
Reverse

Overcurrent (1-4 stage)

(Note) NOC provides stage 1 and 2 only.

Figure 2.1.13 Directional element

Polarising signals for directional elements are shown in Figure 2.1.14. Polarisation for directional
phase overcurrent element OC is achieved by the 90° quadrature method, whereby the phase angle
of each current is compared with the phase to phase voltage between the other two phases. Since
the voltage inputs to the relay will normally be connected phase to neutral, the polarising phase to
phase voltages are derived internally. The polarizing negative sequence voltage is also derived
internally. The polarizing zero sequence voltage is derived from a residual voltage or internally
depending on the model. Direction is determined in each case by measuring the phase angle of the
current with respect to a suitable polarising quantity. Table 2.1.2 summarises the current inputs
and their respective polarising signals. For details of the relationship between directional earth
fault protection and power system earthing, see Appendix B.

 19 
 6 F 2 T 0 1 7 7

(a) Vbc∠90° (b) −V2 (c) −Ve

Va Va Va

Ie
Ia I2

Vc Vb Vc Vb Vc Vb
Vbc
2
aVc a Vb

V2 Ve

Figure 2.1.14 Relationship between Current Input and Polarising signal

Table 2.1.2 Directional polarising signals

Directional element Current Input Polarising Signal Comment

OC-A Ia Vbc∠90° (*1) Refer to Fig. 2.1.14 (a)
OC-B Ib Vca∠90° (*1)
OC-C Ic Vab∠90° (*1)
EF Ie -Ve (*2) Refer to Fig. 2.1.14 (c)
SEF Ise -Ve
NOC I2 -V2 Refer to Fig. 2.1.14 (b)
Note (*1): The quadrature voltages used for polarization of the phase fault elements are automatically
phase-shifted by +90°, such that they are in phase with the faulted phase voltage under
normal conditions. Therefore the faulted phase current will normally lag its polarizing
voltage under fault conditions and should be set with a negative characteristic angle. Refer to
section 2.1.3.3 for guidance on choice of settings.
Note (*2): When the [APPLVE]setting is “On”, Ve is mesured directly in the form of system residual
voltage. When the setting is “Off”, Ve is calcurated from the three phase voltages.

In the event of a close up three phase fault, all three polarising signals will collapse below the
minimum threshold. Voltage memory provides a temporary polarising signal in these
circumstances. GRE140 maintains the polarising signal for a short period by reconstructing the
pre-fault voltages and judges the fault direction. After the voltage memory has disappeared, the
direction judgement is effective while the fault current flows as shown in Figure 2.1.15.

Phase difference calculation

|V|•|I|cos(θ−ϕ) ≥0 &
≥1 Output of
directional element
Amplitude calculation F/F &
1 1
|l|≥OCset

Amplitude calculation
|Vpol|≥Vset

(Note) OCset: Current setting

Vset : Voltage setting. In the case of OC and NOC, Vset = 1V fixed.

Figure 2.1.15 Direction Judgement after Disappearance of Voltage Memory

 20 
 6 F 2 T 0 1 7 7

2.1.3 Scheme Logic

2.1.3.1 Phase overcurrent protection

Figures 2.1.16 to 2.1.19 show the scheme logic of the non-directional and directional phase
overcurrent protection OC1 to OC4.
On models 700, 701, 702, 720, 721 and 722, the phase overcurrent protection elements OC1 to
OC4 are suitable for motor protection. For details of overcurrent protection for motor protection,
see section 2.6.
Note: For the symbols used in the scheme logic, see Appendix L.
The directional control characteristic can be selected to “Forward (FWD)” or “Reverse (REV)” or
“Non-directional (Non)” by scheme switch setting [OC∗-DIR] (not shown in Figures 2.1.16 to
2.1.19). If instantaneous tripping is required, signal OC∗_INST_TP is assigned using the PLC
function.
OC1 protection provides selective definite time or inverse time characteristic as shown in Figure
2.1.16. The definite time protection is selected by setting [MOC1] to “D” and trip signal OC1
TRIP is given through the delayed pick-up timer TOC1. The inverse time protection is selected by
setting [MOC1] to any one of “IEC”, “IEEE”, “US” or “C” and then setting [MOC1C] according
to the required IDMT characteristic, and trip signal OC1_TRIP is given.
The OC2 protection also provides selective definite time or inverse time characteristic as shown in
Figure 2.1.17. The scheme logic of OC2 is the same as that of the OC1.
Figure 2.1.18 and Figure 2.1.19 show the scheme logic of the definite time phase overcurrent
protection OC3 and OC4. The OC3 and OC4 give trip and alarm signals OC3_TRIP and
OC4_ALARM through the delayed pick-up timers TOC3 and TOC4 respectively.
ICD is the inrush current detector ICD, which detects second harmonic inrush current during
transformer energisation, and can block the OC1 to OC4 protection with the scheme switches
[OC1-2F] to [OC4-2F] respectively. See Section 2.1.8.1.
The trip mode of OC1 TRIP to OC4 ALARM can be selected by setting [OCTP] to “3POR”(any
one of 3 phases) or “2OUTOF3”(2 out of 3 phases) gate. With “2OUTOF3” selected, the trip
signal is not issued during a single-phase fault. The switch [OCTP] is common for OC1 to OC4
protection.
The OC1 to OC4 protection provide the delayed trip control function (instantaneous trip or
delayed trip) according to the trip shot number for a fault such as a reclose-on-to-fault in
multi-shot reclosing (see Section 2.5.). If a permanent fault occurs, the following tripping (Trip)
and reclose initiating (ARC) is executed:
Trip (1st) → ARC (1st) → Trip (2nd) → ARC (2nd) → Trip (3rd) → ARC (3rd) → Trip (4th) →
ARC (4th) → Trip (5th) → ARC (5th) → Trip (6th)
Each tripping is selected by setting [OC∗-TP∗] to any one of “Inst”(instantaneous trip),
“Set”(delayed trip by TOC∗ and [MOC1] setting) or “Off”(blocked).
The OC1HS (high speed) element is used for blocked overcurrent protection. See Section 2.1.3.6.
GRE140 incorporates a VT failure supervision function (VTFS). (See Section 3.3.4.) When the
VTFS detects a VT failure, it can alarm and block the OC1 to OC4 protection by the scheme
switch [VTF-OC1BLK] to [VTF-OC4BLK] respectively.
The OC1 to OC4 protection can be disabled by the scheme switches [OC1EN] to [OC4EN] or the
PLC signals OC1_BLOCK to OC4_BLOCK respectively.

 21 
 6 F 2 T 0 1 7 7

TOC1
101
A ≥1 & t 0 262
102 & ≥1 OC1-A TRIP
OC1 B 263
103 ≥1 & t 0 OC1-B TRIP
C & ≥1
264
≥1 t 0 OC1-C TRIP
[OC1-2F] & & ≥1
261
+ "Block" 0.00 - 300.00s OC1 TRIP
&
ICD
104 ≥1
&
A & ≥1
OC1 105 &
B
(INST) &
& ≥1 &
C 106
& & &

[OCTP] "3POR" 3POR

&
OC1-INST + 2OUTOF3
≥1 ≥1 "2OUTOF3"
1696 OC1_INST_TP &
[MOC1]
+
"IEC" [OC1-EN]
+ "ON" Delayed trip control:
"IEEE"
SHOT NUM1
OC1 ON &
"US" • •
•
≥1 OC1-INST
• •
From Figure • • •
"C" 2.5.1. • • •
•
SHOT NUM6
"D" &
"Inst" OC1 OFF
1536 OC1_BLOCK 1 "Set"
& [OC1-TP1]
"OFF" &
Non VTF + • • ≥1 1 OC1 ON
• • •
• • •
[VTF OC1-BLK] ≥1 • • •
+ "OFF" "Inst" •

119 "Set"
A OC1-A HS [OC1-TP6]
"OFF" &
+
120
OC1HS B OC1-B HS
121
C OC1-C HS

Figure 2.1.16 OC1 Phase Fault Overcurrent Protection

 22 
 6 F 2 T 0 1 7 7

TOC2
107
A ≥1 & t 0 266
108 & ≥1 OC2-A TRIP
OC2 B 267
109 ≥1 & t 0 OC2-B TRIP
C & ≥1
268
≥1 t 0 OC2-C TRIP
[OC2-2F] & & ≥1
265
+ "Block" 0.00 - 300.00s OC2 TRIP
&
ICD
110 ≥1
&
A & ≥1
OC2 111 &
B
(INST) &
& ≥1 &
C 112
& & &

[OCTP] "3POR" 3POR

&
OC2-INST + 2OUTOF3
≥1 ≥1 "2OUTOF3"
1697 OC2_INST_TP &
[MOC2]
Delayed trip control:
+
"IEC" [OC2-EN] SHOT NUM1
&
+ "ON" • • ≥1 OC2-INST
"IEEE" • • •
From Figure • • •
2.5.1. • • •
OC2 ON •
"US"
SHOT NUM6
&
"C" "Inst" OC2 OFF
"Set"
[OC2-TP1]
"D" "OFF" &
+ • • ≥1 1 OC2 ON
1537 OC2_BLOCK 1 • • •
• • •
• • •
"Inst" •

"Set"
[OC2-TP6]
"OFF" &
+

Figure 2.1.17 OC2 Phase Fault Overcurrent Protection

113 TOC3
A t 0 270
& OC3-A TRIP
≥1
114
OC3 B t 0 271
& OC3-B TRIP
C 115 ≥1
t 0 272
OC3-C TRIP
&
[OC3-2F] ≥1
0.00 - 300.00s 269
+ "Block" OC3 TRIP
&
ICD
[OC3-EN] ≥1
&
+ "ON" ≥1
OC3 ON &
1538 OC3_BLOCK 1 &
& ≥1 &

& &

[OCTP] "3POR" 3POR

&
OC3-INST + 2OUTOF3
≥1 "2OUTOF3"
Delayed trip control:
1698 OC3_INST_TP SHOT NUM1
&
• •
•
≥1 OC3-INST
• •
From Figure • • •
2.5.1. • • •
•
SHOT NUM6
&
"Inst" OC3 OFF
"Set"
[OC3-TP1]
"OFF" &
+ • • ≥1 1 OC3 ON
• • •
• • •
• • •
"Inst" •

"Set"
[OC3-TP6]
"OFF" &
+

Figure 2.1.18 OC3 Definite Time Phase Overcurrent Protection

 23 
 6 F 2 T 0 1 7 7

116 TOC4
A t 0 274
& OC4-A_ALARM
≥1
117
OC4 B t 0 275
& OC4-B_ALARM
C 118 ≥1
t 0 276
OC4-C_ALARM
&
[OC4-2F] ≥1
0.00 - 300.00s 273
+ "Block" OC4_ALARM
&
ICD
[OC4-EN] ≥1
&
+ "ON" ≥1
OC4 ON &
1539 OC4_BLOCK 1 &
& ≥1 &

& &

[OCTP] "3POR" 3POR

&
OC4-INST + 2OUTOF3
≥1 "2OUTOF3"
Delayed trip control:
1699 OC4_INST_TP SHOT NUM1
&
• •
•
≥1 OC4-INST
• •
From Figure • • •
2.5.1. • • •
•
SHOT NUM6
&
"Inst" OC4 OFF
"Set"
[OC4-TP1]
"OFF" &
+ • • ≥1 1 OC4 ON
• • •
• • •
• • •
"Inst" •

"Set"
[OC4-TP6]
"OFF" &
+

Figure 2.1.19 OC4 Definite Time Phase Overcurrent Protection

2.1.3.2 Earth fault protection

Figure 2.1.20 to Figure 2.1.23 show the scheme logic for the non-directional and directional earth
fault protection EF1 to EF4.
The directional control characteristic can be selected to “FWD” or “REV” or “Non” by scheme
switch setting [EF∗-DIR] (not shown in Figures 2.1.20 to 2.1.23). If instantaneous tripping is
required, the signal EF∗_INST_TP is assigned using the PLC function.

The EF1 protection provides selective definite time or inverse time characteristic as shown in
Figure 2.1.20. The definite time protection is selected by setting [MEF1] to “D”, and the trip signal
EF1 TRIP is given through the delayed pick-up timer TEF1. The inverse time protection is
selected by setting [MEF1] to any one of “IEC”, “IEEE”, “US” or “C” and then setting [MEF1C]
according to the required IDMT characteristic, and the trip signal EF1_TRIP is given.
The EF2 protection also provides selective definite time or inverse time characteristic as shown in
Figure 2.1.21. The scheme logic of EF2 is the same as that of the EF1.
Figure 2.1.22 and Figure 2.1.23 show the scheme logic of the definite time earth fault protection
EF3 and EF4. The EF3 and EF4 give trip and alarm signals EF3_TRIP and EF4_ALARM through
the delayed pick-up timers TEF3 and TEF4 respectively.
ICD is the inrush current detector ICD, which detects second harmonic inrush current during
transformer energisation, and can block the EF1 to EF4 protection by the scheme switches
[EF1-2F] to [EF4-2F] respectively. See Section 2.1.8.1.
The EF1 to EF4 protection provide the delayed trip control function (instantaneous trip or delayed
trip) according to the trip shot number for a fault such as a reclose-on-to-fault in multi-shot
reclosing (see Section 2.5). If a permanent fault occurs, the following tripping (Trip) and reclose
initiating (ARC) is executed:

 24 
 6 F 2 T 0 1 7 7

Trip (1st) → ARC (1st) → Trip (2nd) → ARC (2nd) → Trip (3rd) → ARC (3rd) → Trip (4th) →
ARC (4th) → Trip (5th) → ARC (5th) → Trip (6th)
Each tripping is selected by setting [EF∗-TP∗] to any one of “Inst”(instantaneous trip),
“Set”(delayed trip by TEF∗ and [MEF1] setting) or “Off”(blocked).
EF1HS (high speed) element is used for blocked overcurrent protection. See Section 2.1.3.6.
GRE140 incorporates a VT failure supervision function (VTFS) and a CT failure supervision
function (CTFS). When the VTFS or CTFS detects a VT failure or a CT failure, it can alarm and
block the EF1 to EF4 protection by the scheme switch [VTF-EF1BLK] to [VTF-EF4BLK] or
[CTF-EF1BLK] to [CTF-EF4BLK] respectively.
The EF1 to EF4 protection can be disabled by the scheme switches [EF1EN] to [EF4EN] or the
PLC signals EF1_BLOCK to EF4_BLOCK respectively.

131 EF1-REV CURREV-EF1 285

TEF1 EF1_CARRIER
EF1
≥1 t 0 & 281
& EF1_TRIP
& ≥1 &
[EF1-2F]
0.00 - 300.00s
+ "Block"
&
ICD
EF1 132
(INST) &

&
EF1-INST
≥1 ≥1 1548 EF1_PERMIT
1700 EF1_INST_TP ≥1
[EF1-EN]
[MEF1]
+ "ON"
+
"IEC" [EF1-EN]
+ "OFF" 1
"IEEE" Delayed trip control:
EF1 ON SHOT NUM1
"US" &
• •
•
≥1 EF1-INST
• •
"C" From Figure • • •
2.5.1. • • •
•
"D" SHOT NUM6
&
"Inst" EF1 OFF
1544 EF1_BLOCK 1
& "Set"
[EF1-TP1]
Non VTF "OFF" &
+ • • ≥1 1 EF1 ON
•
[VTF-EF1BLK] ≥1 •
•
•
• •
+ "OFF" • • •
•
Non CTF "Inst"
"Set"
[EF1-TP6]
[CTF-EF1BLK] ≥1 +
"OFF" &
+ "OFF"
138
EF1HS EF1 HS

Figure 2.1.20 EF1 Earth Fault Protection

 25 
 6 F 2 T 0 1 7 7

133 EF2-REV CURREV-EF2 286

TEF2 EF2_CARRIER
EF2
≥1 t 0 & 282
& EF2_TRIP
& ≥1 &
[EF2-2F]
0.00 - 300.00s
+ "Block"
&
ICD
EF2 134
(INST) &

&
EF2-INST
≥1 ≥1 1549 EF2_PERMIT
1701 EF2_INST_TP ≥1
[EF2-EN]
[MEF2]
+ "ON"
+
"IEC" [EF2-EN]
+ "OFF" 1
"IEEE" Delayed trip control:
EF2 ON SHOT NUM1
"US" &
• •
•
≥1 EF2-INST
• •
"C" From Figure • • •
2.5.1. • • •
•
"D" SHOT NUM6
&
"Inst" EF2 OFF
1545 EF2_BLOCK 1
& "Set"
[EF2-TP1]
Non VTF "OFF" &
+ • • ≥1 1 EF2 ON
•
[VTF-EF2BLK] ≥1 •
•
•
• •
+ "OFF" • • •
"Inst" •
Non CTF
"Set"
[EF2-TP6]
[CTF-EF2BLK] ≥1 +
"OFF" &
+ "OFF"

Figure 2.1.21 EF2 Earth Fault Protection

EF3-REV CURREV-EF3 287

135 TEF3 EF3_CARRIER
EF3 t 0 & 283
& EF3_TRIP
≥1 &
[EF3-2F] 0.00 - 300.00s
+ "Block"
&
ICD &
[EF3-EN] 1550 EF3_PERMIT
+ "OFF" 1 ≥1
[EF3-EN]
EF3 ON + "ON"
EF3-INST
≥1 Delayed trip control:
1702 EF3_INST_TP SHOT NUM1
&
• •
•
≥1 EF3-INST
• •
1546 EF3_BLOCK 1 From Figure • • •
& 2.5.1. • • •
•
Non VTF SHOT NUM6
&
[VTF-EF3BLK] ≥1 "Inst" EF3 OFF
+ "OFF" "Set"
[EF3-TP1]
Non CTF
"OFF" &
+ • • ≥1 1 EF3 ON
• • •
[CTF-EF3BLK] ≥1 • • •
+ "OFF" • • •
"Inst" •

"Set"
[EF3-TP6]
"OFF" &
+

Figure 2.1.22 EF3 Definite Time Earth Fault Protection

 26 
 6 F 2 T 0 1 7 7

EF4-REV CURREV-EF4 288

135 TEF4 EF4_CARRIER
EF4 t 0 & 284
& ≥1 & EF4_ALARM
[EF4-2F] 0.00 - 300.00s
+ "Block"
&
ICD &
[EF4-EN] 1551 EF4_PERMIT
+ "OFF" 1 ≥1
[EF4-EN]
EF4 ON + "ON"
EF4-INST
≥1 Delayed trip control:
1703 EF4_INST_TP SHOT NUM1
&
• •
•
≥1 EF4-INST
• •
1547 EF4_BLOCK 1 From Figure • • •
& 2.5.1. • • •
•
Non VTF SHOT NUM6
&
[VTF-EF4BLK] ≥1 "Inst" EF4 OFF
+ "OFF" "Set"
[EF4-TP1]
Non CTF
"OFF" &
+ • • ≥1 1 EF4 ON
• • •
[CTF-EF4BLK] ≥1 • • •
+ "OFF" • • •
"Inst" •

"Set"
[EF4-TP6]
"OFF" &
+

Figure 2.1.23 EF4 Definite Time Earth Fault Protection

Earth fault command protection

GRE140 can provide command protection. These protections require two stage EF elements, one
is for tripping and the other is for blocking or for current reverse detection.
Current reverse detection logic is provided with all stages EF1 to EF4 for command protection as
shown in Figure 2.1.24. In response to power system faults on parallel lines, sequential opening of
the circuit breaker may cause a fault current reversal on healthy lines. This logic is provided to
prevent false operation in the worst case. When EF reverse zone operates and EF∗-REV outputs
for 20ms or more, then even if the EF forward zone subsequently operates, CURREV-EF∗
becomes 0 to block tripping of the local terminal relay or transmission of the trip permission
signal, for a time set by the TREBK setting.
The stage used for current reverse detection should be selected by the scheme switch [CURREV].
The selected stage should have scheme switch [EF∗-DIR] set to “REV”.
TREBK
EF1-REV
& & t 0 0 t
≥1 137
≥1
EF2-REV 0.02 s 0.00 - 10.00s & 1 CURREV-EF1
& &

EF3-REV & 1 CURREV-EF2

& &

EF4-REV & 1 CURREV-EF3

& &
[EF1-DIR] "REV" [EF1-DIR] "FWD"
& 1 CURREV-EF4
+ +
[EF2-DIR] "REV" [EF2-DIR] "FWD"
+ +
[EF3-DIR] "REV" [EF3-DIR] "FWD"
+ +
"1" [EF4-DIR] "FWD"
[EF4-DIR] "REV"
"2" +
+
"3"
CURREV "4"
+

Figure 2.1.24 Current Reverse Detection

2.1.3.3 Setting for OC and EF protection

The table shows the setting elements necessary for the phase overcurrent and earth fault protection

 27 
 6 F 2 T 0 1 7 7

and their setting ranges.

Element Range Step Default Remarks
OCCT 1 - 20000 1 400 CT ratio for 3-phase current
EFCT 1 - 20000 1 200 CT ratio for earth fault current
OCθ −95 – 95° 1° −45° OC characteristic angle
OC1 0.10 – 25.00 A 0.01 A 1.00 A OC1 threshold setting
TOC1 0.00 – 300.00 s 0.01 s 0.00 s OC1 definite time setting. Required if
[MOC1] = D.
TOC1M 0.010 – 1.500 0.001 1.000 OC1 time multiplier setting. Required if
[MOC1] = IEC, IEEE or US.
TOC1R 0.0 – 300.0 s 0.1 s 0.0 s OC1 definite time delayed reset. Required if
[OC1R] = DEF.
TOC1RM 0.010 – 1.5000 0.001 1.000 OC1 dependent time delayed reset time
multiplier. Required if [OC1R] = DEP.
OC2 0.10 – 25.00 A 0.01 A 5.00 A OC2 threshold setting
TOC2 0.00 – 300.00 s 0.01 s 0.00 s OC2 definite time setting. Required if
[MOC2] = D.
TOC2M 0.010 – 1.5000 0.001 1.000 OC2 time multiplier setting. Required if
[MOC2] = IEC, IEEE or US.
TOC2R 0.0 – 300.0 s 0.1 s 0.0 s OC2 definite time delayed reset. Required if
[OC2R] = DEF.
TOC2RM 0.010 – 1.5000 0.001 1.000 OC1 dependent time delayed reset time
multiplier. Required if [OC2R] = DEP.
OC3 0.1 – 150.0 A 0.01 A 10.00 A OC3 threshold setting
TOC3 0.00 – 300.0 s 0.01 s 0.00 s OC3 definite time setting
OC4 0.1 – 150.0 A 0.01 A 20.00 A OC4 threshold setting
TOC4 0.0 – 300.0 s 0.01 s 0.00 s OC4 definite time setting
EFθ −95 – 95 ° 1° −45 ° EF characteristic angle
EFV 0.5 – 100.0 V 0.1 V 3.0 V EF ZPS voltage level
EF1 0.05– 25.0 A 0.01 A 0.30 A EF1 threshold setting
TEF1 0.00 – 300.00 s 0.01 s 0.00 s EF1 definite time setting. Required if [MEF1]
= D.
TEF1M 0.010 – 1.5000 0.001 1.000 EF1 time multiplier setting. Required if
[MEF1] = IEC, IEEE or US.
TEF1R 0.0 – 300.0 s 0.1 s 0.0 s EF1 definite time delayed reset. Required if
[EF1R] = DEF.
TEF1RM 0.010 – 1.5000 0.001 1.000 EF1 dependent time delayed reset time
multiplier. Required if [EF1R] = DEP.
EF2 0.05 – 25.0 A 0.01 A 3.00 A EF2 threshold setting
TEF2 0.00 – 300.00 s 0.01 s 0.00 s EF2 definite time setting. Required if [MEF2]
= D.
TEF2M 0.010 – 1.5000 0.001 1.000 EF2 time multiplier setting. Required if
[MEF2] = IEC, IEEE or US.
TEF2R 0.0 – 300.0 s 0.1 s 0.0 s EF2 definite time delayed reset. Required if
[EF2R] = DEF.
TEF2RM 0.010 – 1.5000 0.001 1.000 EF2 dependent time delayed reset time
multiplier. Required if [EF2R] = DEP.

 28 
 6 F 2 T 0 1 7 7

Element Range Step Default Remarks

EF3 0.05 – 100.0 A 0.01 A 5.00 A EF3 threshold setting
TEF3 0.00 – 300.00 s 0.01 s 0.00 s EF3 definite time setting
EF4 0.05 – 100.0 A 0.01 A 5.00 A EF4 threshold setting
TEF4 0.00 – 300.00 s 0.01 s 0.00 s EF4 definite time setting
TREBK 0.00 – 10.00 s 0.01 s 0.10 Current reverse blocking time
[OC1EN] Off / On On OC1 Enable
[OC1-DIR] FWD/REV/NON FWD OC1 directional characteristic
[MOC1] D/IEC/IEEE/US/C D OC1 time characteristic
[MOC1C] OC1 inverse curve type.
MOC1C-IEC NI / VI / EI / LTI NI Required if [MOC1] = IEC.
MOC1C-IEEE MI / VI / EI MI Required if [MOC1] = IEEE.
MOC1C-US CO2 / CO8 CO2 Required if [MOC1] = US.
[OC1R] DEF / DEP DEF OC1 reset characteristic. Required if
[MOC1] = IEEE or US.
[VTF-OC1BLK] Off / On Off VTF block enable
[OC2EN] Off / On Off OC2 Enable
[OC2-DIR] FWD/REV/NON FWD OC2 directional characteristic
[MOC2] D/IEC/IEEE/US/C D OC2 time characteristic
[MOC2C] OC2 inverse curve type.
MOC2C-IEC NI / VI / EI / LTI NI Required if [MOC2] = IEC.
MOC2C-IEEE MI / VI / EI MI Required if [MOC2] = IEEE.
MOC2C-US CO2 / CO8 CO2 Required if [MOC2] = US.
[OC2R] DEF / DEP DEF OC2 reset characteristic. Required if
[MOC2] = IEEE or US.
[VTF-OC2BLK] Off / On Off VTF block enable
[OC3EN] Off / On Off OC3 Enable
[OC3-DIR] FWD/REV/NON FWD OC3 directional characteristic
[VTF-OC3BLK] Off / On Off VTF block enable
[OC4EN] Off / On ON OC4 Enable
[OC4-DIR] FWD/REV/NON FWD OC4 directional characteristic
[VTF-OC4BLK] Off / On Off VTF block enable
[OCTP] 3POR / 2OUTOF3 3POR OC trip mode
[EF1EN] Off / On / POP On EF1 Enable
[EF1-DIR] FWD/REV/NON FWD EF1 directional characteristic
[MEF1] D/IEC/IEEE/US/C D EF1 time characteristic
[MEF1C] EF1 inverse curve type.
MEF1C-IEC NI / VI / EI / LTI NI Required if [MEF1] = IEC.
MEF1C-IEEE MI / VI / EI MI Required if [MEF1] = IEEE.
MEF1C-US CO2 / CO8 CO2 Required if [MEF1] = US.
[EF1R] DEF / DEP DEF EF1 reset characteristic. Required if [MEF1]
= IEEE or US.
[VTF-EF1BLK] Off / On Off VTF block enable
[CTF-EF1BLK] Off / On Off CTF block enable
[EF2EN] Off / On / POP Off EF2 Enable

 29 
 6 F 2 T 0 1 7 7

Element Range Step Default Remarks

[EF2-DIR] FWD/REV/NON FWD EF2 directional characteristic
[MEF2] D/IEC/IEEE/US/C D EF2 time characteristic
[MEF2C] EF2 inverse curve type.
MEF2C-IEC NI / VI / EI / LTI NI Required if [MEF2] = IEC.
MEF2C-IEEE MI / VI / EI MI Required if [MEF2] = IEEE.
MEF2C-US CO2 / CO8 CO2 Required if [MEF2] = US.
[EF2R] DEF / DEP DEF EF2 reset characteristic. Required if [MEF2]
= IEEE or US.
[VTF-EF2BLK] Off / On Off VTF block enable
[CTF-EF2BLK] Off / On Off CTF block enable
[EF3EN] Off / On / POP Off EF3 Enable
[EF3-DIR] FWD/REV/NON FWD EF3 directional characteristic
[VTF-EF3BLK] Off / On Off VTF block enable
[CTF-EF3BLK] Off / On Off CTF block enable
[EF4EN] Off / On / POP ON EF4 Enable
[EF4-DIR] FWD/REV/NON FWD EF4 directional characteristic
[VTF-EF4BLK] Off / On Off VTF block enable
[CTF-EF4BLK] Off / On Off CTF block enable
CURREV Off / 1 / 2 / 3 / 4 Off Current reverse detection

[Setting Example of Command Protection]

The following shows a setting example of command protection when the EF1 is applied for
forward fault detection and the EF2 is applied for reverse fault detection.
(1) POP (Permissive overreach protection)
(a) Setting of EF element
EF1: ∗∗ --- depends on power system condition
TEF1: ∗∗ --- for time delayed trip
EF1EN: POP
EF1-DIR: FWR
EF2: ∗∗ --- depends on power system condition
TEF2: 0.00s
EF2EN: POP
EF2-DIR: REV
CURREV: 2
(b) Setting of BO (Binary Output)
The signal “EF1-CR (No.285)” is assigned to BOn. --- carrier signal send BO
(c) Setting of BI (Binary Input)
The “EF1 protection permission” is assigned to BIn. --- carrier signal receive BI
BIn SNS: Norm
(2) BOP (Blocking overreach protection)
(a) Setting of EF element
EF1: ∗∗ --- depends on power system condition
TEF1: ∗∗ --- for time delayed trip
EF1EN: POP
EF1-DIR: FWR
EF2: ∗∗ --- depends on power system condition

 30 
 6 F 2 T 0 1 7 7

TEF2: 0.30s (minimum) --- coordination time for blocking carrier signal receiving
EF2EN: POP
EF2-DIR: REV
CURREV: 2
(b) Setting of BO (Binary Output)
The signal “EF2-CR (No.286)” is assigned to BOn. --- carrier signal send BO
(c) Setting of BI (Binary Input)
The “EF1 protection permission” is assigned to BIn. --- carrier signal receive BI
BIn SNS: Inv
[Time Overcurrent Protection Setting]

(1) Settings for Inverse Time Overcurrent Protection

Current setting
In Figure 2.1.25, the current setting at terminal A is set lower than the minimum fault current in the
event of a fault at remote end F1. Furthermore, when also considering backup protection for a fault
on the next feeder section, it is set lower than the minimum fault current in the event of a fault at
remote end F3.
To calculate the minimum fault current, phase-to-phase faults are assumed for the phase
overcurrent element, and phase to earth faults for the residual overcurrent element, assuming the
probable maximum source impedance. When considering the fault at F3, the remote end of the
next section is assumed to be open.
The higher the current setting, the more effective the inverse characteristic. On the other hand, the
lower the setting, the more dependable the operation. For positive and dependable operation a
setting should be chosen that is lower than the minimum fault current; typical settings of around 1
to 1.5 times less than the minimum fault current are usual in order to ensure the most effective use
of the inverse characteristic.
For grading of the current settings, the terminal furthest from the power source is set to the lowest
value and the terminals closer to the power source are set to a higher value.
The minimum setting of the phase overcurrent element is restricted so as not to operate for the
maximum load current, and that of the residual overcurrent element is restricted so as to not
operate on false zero-sequence current caused by an unbalance in the load current, errors in the
current transformer circuits, or zero-sequence mutual coupling of parallel lines.
A B C

F1 F2 F3

Figure 2.1.25 Current Settings in Radial Feeder

Time setting
Time setting is performed to provide selectivity in relation to relays on adjacent feeders. Consider
the minimum source impedance when the current flowing through the relay reaches a maximum.
In Figure 2.1.25, in the event of a fault at F2, the operating time is set so that terminal A may
operate by time grading Tc behind terminal B. The current flowing in the relays may sometimes be
greater when the remote end of the adjacent line is open. At this time, time coordination must also
be kept.
The reason why the operating time is set when the fault current reaches a maximum is that if time
coordination is obtained for a large fault current, then time coordination can also be obtained for
the small fault current as long as relays with the same operating characteristic are used for each

 31 
 6 F 2 T 0 1 7 7

terminal.
The grading margin Tc of terminal A and terminal B is given by the following expression for a
fault at point F2 in Figure 2.1.25.
Tc = T 1 + T 2 + T m
where, T1: circuit breaker clearance time at B
T2: relay reset time at A
Tm: time margin

(2) Settings of Definite Time Overcurrent Protection

Current setting
The current setting is set lower than the minimum fault current in the event of a fault at the remote
end of the protected feeder section. Furthermore, when also considering backup protection for a
fault in a next feeder section, it is set lower than the minimum fault current, in the event of a fault
at the remote end of the next feeder section.
Identical current values can be set for terminals, but graded settings are better than identical
settings, in order to provide a margin for current sensitivity. The farther from the power source the
terminal is located, the higher the sensitivity (i.e. the lower setting) that is required.
The minimum setting of the phase overcurrent element is restricted so as not to operate for the
maximum load current, and that of the residual overcurrent element is restricted so as to not
operate on false zero-sequence current caused by an unbalance in the load current, errors in the
current transformer circuits, or zero-sequence mutual coupling of parallel lines. Taking the
selection of instantaneous operation into consideration, the settings must be high enough not to
operate for large motor starting currents or transformer inrush currents.

Time setting
When setting the delayed pick-up timers, the time grading margin Tc is obtained in the same way
as explained in “Settings for Inverse Time Overcurrent Protection”.

(3) Directional Characteristic Angle Setting

OC Characteristic Angle
The quadrature voltages used for polarization of the phase fault directional elements are
automatically phase-shifted in GRE140 by +90˚, such that they are in phase with the
corresponding phase voltages under normal conditions. Under fault conditions, the faulted phase
current will lag its phase voltage (and hence its polarising voltage) by an angle dependent on the
system X/R ratio. Therefore, it is necessary to apply a negative characteristic angle to the phase
fault directional elements in order to obtain maximum sensitivity.
The characteristic angle is determined by the [OCθ] setting. The actual value chosen will depend
on the application, but recommended settings for the majority of typical applications are as
follows:
• -60°, for protection of plain feeders, or applications with an earthing point behind the relay
location.
• -45°, for protection of transformer feeders, or applications with an earthing point in front of
the relay location.

EF Characteristic Angle
When determining the characteristic angle for directional earth fault protection, the method of

 32 
 6 F 2 T 0 1 7 7

system earthing must be considered. In solidly earthed systems, the earth fault current tends to lag
the faulted phase voltage (and hence the inverted residual voltage used for polarising) by a
considerable angle, due to the reactance of the source. In resistance earthed systems the angle will
be much smaller.
Commonly applied settings are as follows:
• -60°, for protection of solidly earthed transmission systems.
• -45°, for protection of solidly earthed distribution systems.
• 0° or -15°, for protection of resistance earthed systems.
Further guidance on application of directional earth fault protection is given in appendix B.

Wiring and setting of earth fault detection

On models 400, 401, 402, 700, 701 and 702 where scheme switch [APPLCT] is set to “3P” setting,
the earth fault current input may be connected either in the residual circuit of the phase CTs, or
alternatively a dedicated earth fault CT may be used. In the case of connection in the residual
circuit of the phase CTs, the settings of the phase CT ratio OCCT and the earth fault CT ratio EFCT
should be equal. On the other hand, where a dedicated earth fault CT or only earth fault CT are
applied, then the settings of OCCT and EFCT may NOT be equal. The connection methods are
illustrated in figure 2.1.a.
The maximum setting value of the earth fault protection is 20.00A in case of elements EF1 and
EF2, and 100.00A for EF3 and EF4. However, it should be noted that, in the case that a dedicated
earth fault CT connection is used, the measuring and protection range of earth fault current is
limited to 20A maximum. At the [APPLCT] “1P” or “2P” and ∗2∗ model, the measuring and
protection range of earth fault current is limited to 20A maximum too.

TB4 TB4
Ia 1 Ia 1
2 Ia 2 Ia
Ib 3 Ib 3
4 Ib 4 Ib
Ic 5 Ic 5
6 Ic 6 Ic
Ie 7 Ie Ie 7 Ie
8 from 8
Residual
current Zero-phase
current
transformer

(a)for Residual current (b)for Zero-phase current

detection wiring transformer wiring

Figure 2.1.a Earth fault current detection wiring

2.1.3.4 Sensitive Earth Fault Protection

The sensitive earth fault (SEF) protection is applied for distribution systems earthed through high
impedance, where very low levels of fault current are expected for earth faults. Furthermore, the
SEF elements of GRE140 are also applicable to the “standby earth fault protection” and the “high
impedance restricted earth fault protection of transformers”.
GRE140 provides directional earth fault protection with more sensitive settings for use in
applications where the fault current magnitude may be very low. A 4-stage directional overcurrent
function is provided, with the first stage programmable for inverse time or definite time operation.
The second, third and fourth stages provide definite time operation.
The sensitive earth fault element includes a digital filter which rejects all harmonics other than the

 33 
 6 F 2 T 0 1 7 7

fundamental power system frequency.

The sensitive earth fault quantity is measured directly, using a dedicated core balance earth fault
CT.
This input can also be used in transformer restricted earth fault applications, by the use of external
metrosils (varistors) and setting resistors.
The directional sensitive earth fault elements can be configured for directional operation in the
same way as the standard earth fault pole, by polarising against the residual voltage. An additional
restraint on operation can be provided by a Zero phase sequence Power element ZP, for use in
protection of power systems which utilise resonant (Petersen coil) earthing methods.
The SEF elements provide 50 times more sensitive setting ranges (1mA to 1.00A) than the regular
earth fault protection.
Since very low levels of current setting may be applied, there is a danger of unwanted operation
due to harmonics of the power system frequency, which can appear as residual current. Therefore
the SEF elements operate only on the fundamental component, rejecting all higher harmonics.
The SEF protection is provided in Model 420, 421, 422, 720, 721 and 722 which have a dedicated
sensitive earth fault input circuit.
The element SEF1 and SEF2 provide inverse time or definite time selective two-stage overcurrent
protection. Stage 2 of the two-stage overcurrent protection is used only for the standby earth fault
protection. The SEF3 and SEF4 provide definite time overcurrent protection.
When SEF employs IEEE or US inverse time characteristics, two reset modes are available:
definite time or dependent time resetting. If the IEC inverse time characteristic is employed,
definite time resetting is provided. For other characteristics, refer to Section 2.1.1.1.
In applications of SEF protection, it must be ensured that any erroneous zero-phase current is
sufficiently low compared to the fault current, so that a highly sensitive setting is available.
The erroneous current may be caused with load current due to an unbalanced configuration of the
distribution lines, or mutual coupling from adjacent lines. The value of the erroneous current
during normal conditions can be acquired on the metering screen of the relay front panel.
The earth fault current for SEF may be fed from a core balance CT, but if it is derived from three
phase CTs, the erroneous current may also be caused by CT errors that may occur during phase
faults. Transient false functioning may be prevented by a relatively long time delay.

Standby earth fault protection

The SEF is energised from a CT connected in the power transformer low voltage neutral, and the
standby earth fault protection trips the transformer to backup the low voltage feeder protection,
and ensures that the neutral earthing resistor is not loaded beyond its rating. Stage 1 trips the
transformer low voltage circuit breaker, then stage 2 trips the high voltage circuit breaker(s) with a
time delay after stage 1 operates.
The time graded tripping is valid for transformers connected to a ring bus, banked transformers
and feeder transformers.

Restricted earth fault protection

The SEF elements can be applied in a high impedance restricted earth fault scheme (REF), for
protection of a star-connected transformer winding whose neutral is earthed directly or through an
impedance.
As shown in Figure 2.1.26, the differential current between the residual current derived from the
three-phase feeder currents and the neutral current in the neutral conductor is introduced into the
SEF elements. Two external components, a stabilising resistor and a varistor, are connected as

 34 
 6 F 2 T 0 1 7 7

shown in the figure. The former increases the overall impedance of the relay circuit and stabilises
the differential voltage, and the latter suppresses any overvoltage in the differential circuit.
F

Power
Transformer

Varistor

Stabilising GRE140
Resistor SEF input

Figure 2.1.26 High Impedance REF

Scheme Logic
Figures 2.1.27 to 2.1.30 show the scheme logic for the directional sensitive earth fault protection.
The directional control characteristic can be selected to “FWD” or “REV” or “Non” by scheme
switch setting [SE∗-DIR].

Figure 2.1.27 shows the scheme logic of directional sensitive earth fault protection SEF1 with
inverse time or definite time selective two-stage overcurrent protection. The definite time
protection is selected by setting [MSE1] to “D”. The element SEF1 is enabled for sensitive earth
fault protection and stage 1 trip signal SEF1 TRIP is given through the delayed pick-up timer
TSE1. The inverse time protection is selected by setting [MSE1] to either “IEC”, “IEEE”, “US” or
“C” and then setting [MSE1C] according to the required IDMT characteristic. The element SEF1
is enabled and stage 1 trip signal SEF1_TRIP is given.
Both protections provide stage 2 trip signal SEF1-S2 through a delayed pick-up timer TSE12.
When the standby earth fault protection is applied by introducing earth current from the
transformer low voltage neutral circuit, stage 1 trip signals are used to trip the transformer low
voltage circuit breaker. If SEF1 continues operating after stage 1 has operated, the stage 2 trip
signal can be used to trip the transformer high voltage circuit breaker(s).
SEF1HS (high speed) element is used for blocked overcurrent protection. See Section 2.1.3.6.
The SEF2 protection also provides selective definite time or inverse time characteristic as shown
in Figure 2.1.28. The scheme logic of SEF2 is the same as that of SEF1 except for SEF1-S2_TRIP.
Figure 2.1.29 and Figure 2.1.30 show the scheme logic of the definite time sensitive earth fault
protection SEF3 and SEF4. SEF3 and SEF4 give trip and alarm signals SEF3_TRIP and
SEF4_ALARM through delayed pick-up timers TSE3 and TSE4 respectively.
ICD is the inrush current detector ICD, which detects second harmonic inrush current during
transformer energisation, and can block the SEF1 to SEF4 protection by the scheme switches
[SE1-2F] to [SE4-2F] respectively. See Section 2.1.8.1.
The SEF1 to SEF4 protection provide a delayed trip control function (instantaneous trip or
delayed trip) according to the trip shot number for a fault such as a reclose-on-to-fault in
multi-shot reclosing (see Section 2.5). If a permanent fault occurs, the following tripping (Trip)
and reclose initiating (ARC) is executed:

 35 
 6 F 2 T 0 1 7 7

Trip (1st) → ARC (1st) → Trip (2nd) → ARC (2nd) → Trip (3rd) → ARC (3rd) → Trip (4th) →
ARC (4th) → Trip (5th) → ARC (5th) → Trip (6th)
Each tripping is selected by setting [SE∗-TP∗] to any one of “Inst”(instantaneous trip),
“Set”(delayed trip by TSE∗ and [MSE1] setting) or “Off”(blocked).
The SEF1 to SEF4 protections can be disabled by the scheme switches [SE1EN] to [SE4EN] or
PLC signals SEF1_BLOCK to SEF4_BLOCK. The SEF1 stage 2 trip of standby earth fault
protection can be disabled by the scheme switch [SE1S2].
141 TSE1
SEF1 t 0
≥1 & &
& 0.00 - 300.00s ≥1 291
SEF1-S1
[SE1-2F] _TRIP
[SE1EN]
+ "Block" +
& "ON" &
ICD
SEF1 142
INST & TSE12
[SE1S2] t 0 292
& SEF1-S2_
+
SEF1-INST "ON" TRIP
≥1 ≥1 0.00 - 300.00s
1704 SEF1_INST_TP
[MSE1] 1552 SEF1_BLOCK 1
+ &
"IEC" Non VTF

"IEEE"
VTF_SE1BLK ≥1
+ "OFF" SEF1 ON

"US" Delayed trip control:

"C" SHOT NUM1
•
&
•
•
• ≥1 SEF1-INST
"D" •
From Figure • • •
• • •
2.5.1. •
ZPF & ≥1 & SHOT NUM6
&
≥1 "Inst" SE1 OFF
ZPR
& ≥1 & "Set"
[SE1-TP1]
"OFF" &
"ON" + • • ≥1 1 SEF1 ON
[ZPEN] • •
"OFF" •
+ • • •
• • •
"FWD" •
"Inst"
[SE1 DIR] "REV"
"Set"
"NON" [SE1-TP6]
+ "OFF" &
+
SEF1HS SEF1 HS

Figure 2.1.27 SEF1 Sensitive Earth Fault Protection Scheme Logic

 36 
 6 F 2 T 0 1 7 7

143 TSE2
SEF2 t 0
≥1 & &
& 0.00 - 300.00s ≥1 293
SEF2_TRIP
[SE2-2F]
[SE2EN]
+ "Block" +
& "ON" &
ICD
SEF2 144
INST &

SEF2-INST
≥1 ≥1
1705 SEF2_INST_TP
[MSE2] 1553 SEF2_BLOCK 1
+ &
"IEC" Non VTF

"IEEE"
VTF_SE2BLK ≥1
+ "OFF" SEF2 ON

"US" Delayed trip control:

"C" SHOT NUM1
•
&
•
•
• ≥1 SEF2-INST
"D" •
From Figure • • •
• • •
2.5.1. •
ZPF & ≥1 & SHOT NUM6
&
≥1 "Inst" SE2 OFF
ZPR
& ≥1 & "Set"
[SE2-TP1]
"OFF" &
"ON" + • • ≥1 1 SEF2 ON
[ZPEN] • •
"OFF" •
+ • • •
• • •
"FWD" •
"Inst"
[SE2 DIR] "REV"
"Set"
"NON" [SE2-TP6]
+ "OFF" &
+

Figure 2.1.28 SEF2 Sensitive Earth Fault Protection Scheme Logic

145 TSE3
SEF3 & t 0
& 294
≥1 SEF3 TRIP
0.00 - 300.00s
[SE3-2F]
[SE3EN]
+ "Block" +
& "ON" &
ICD SEF3-INST
≥1
1706 SEF3_INST_TP

ZPF 1554 SEF3_BLOCK 1

& ≥1 & &
Non VTF
ZPR ≥1
& ≥1 & VTF_SE3BLK ≥1
+ "OFF" SEF3 ON
"ON"
[ZPEN]
"OFF" Delayed trip control:
+
"FWD" SHOT NUM1
[SE3 DIR] •
&
"REV" •
•
• ≥1 SEF3-INST
•
From Figure • • •
"NON" • •
+ 2.5.1. •
•
SHOT NUM6
&
"Inst" SE3 OFF
"Set"
[SE3-TP1]
"OFF" &
+ • • ≥1 1 SEF3 ON
• • •
• • •
• • •
"Inst" •

"Set"
[SE3-TP6]
"OFF" &
+

Figure 2.1.29 SEF3 Sensitive Earth Fault Protection Scheme Logic

 37 
 6 F 2 T 0 1 7 7

146 TSE4
SEF4 & t 0
& 295
≥1 SEF4_ALARM
0.00 - 300.00s
[SE4-2F]
[SE4EN]
+ "Block" +
& "ON" &
ICD SEF4-INST
≥1
1707 SEF4_INST_TP

ZPF 1555 SEF4_BLOCK 1

& ≥1 & &
Non VTF
ZPR ≥1
& ≥1 & VTF_SE4BLK ≥1
+ "OFF" SEF4 ON
"ON"
[ZPEN]
"OFF" Delayed trip control:
+
"FWD" SHOT NUM1
[SE4 DIR] •
&
"REV" •
•
• ≥1 SEF4-INST
•
From Figure • • •
"NON" • •
+ 2.5.1. •
•
SHOT NUM6
&
"Inst" SE4 OFF
"Set"
[SE4-TP1]
"OFF" &
+ • • ≥1 1 SEF4 ON
• • •
• • •
• • •
"Inst" •

"Set"
[SE4-TP6]
"OFF" &
+

Figure 2.1.30 SEF4 Sensitive Definite Earth Fault Protection Scheme Logic

Setting
The table below shows the setting elements necessary for the sensitive earth fault protection and
their setting ranges.
Element Range Step Default Remarks
SEFCT 1 - 20000 1 150 CT ratio for SEFCT
SEθ −95° – 95° 1° 0° SEF characteristic angle
SEV 0.5 – 100.0 0.1 V 3.0V SEF ZPS voltage level
SE1 0.001 – 1.000 A 0.001 A 0.005 A SEF1 threshold setting
TSE1 0.00 – 300.00 s 0.01 s 0.00 s SEF1 definite time setting. Required if
[MSE1] = D.
TSE1M 0.010 – 1.500 0.001 1.000 SEF1 inverse time multiplier setting.
Required if [MSE1] = IEC, IEEE or US.
TSE1R 0.0 – 300.0 s 0.1 s 0.0 s SEF1 definite time delayed reset. Required
if [MSE1] = IEC or [SE1R] = DEF.
TSE1RM 0.010 – 1.500 0.001 1.000 SEF1 dependent time delayed reset time
multiplier. Required if [SE1R] = DEP.
TS1S2 0.00 – 300.00 s 0.01 s 0.00 s SEF1 stage 2 definite time setting
SE2 0.001 – 1.000 A 0.001 A 0.010 A SEF2 threshold setting
TSE2 0.00 – 300.00 s 0.01 s 0.00 s SEF2 definite time setting. Required if
[MSE2] = D.
TSE2M 0.010 – 1.500 0.001 1.000 SEF2 inverse time multiplier setting.
Required if [MSE2] = IEC, IEEE or US.
TSE2R 0.0 – 300.0 s 0.1 s 0.0 s SEF2 definite time delayed reset. Required
if [MSE2] = IEC or [SE1R] = DEF.

 38 
 6 F 2 T 0 1 7 7

Element Range Step Default Remarks

TSE2RM 0.010 – 1.500 0.001 1.000 SEF2 dependent time delayed reset time
multiplier. Required if [SE2R] = DEP.
SE3 0.001 – 1.000 A 0.001 A 0.100 A SEF3 threshold setting
TSE3 0.00 – 300.00 s 0.01 s 0.00 s SEF3 definite time setting.
SE4 0.001 – 1.000 A 0.001 A 0.500 A SEF4 threshold setting
TSE4 0.00 – 300.00 s 0.01 s 0.00 s SEF4 definite time setting.
ZP 0.00 – 100.00 W 0.01 W 0.00 W Zero phase sequence power sensitivity
[SE1EN] Off / On Off SEF1 Enable
[SE1-DIR] FWD / REV / NON FWD SEF1 directional characteristic
[MSE1] D/IEC/IEEE/US/C D SEF1 characteristic
[MSE1C] SEF1 inverse curve type.
MSE1C-IEC NI / VI / EI / LTI NI Required if [MSE1] = IEC.
MSE1C-IEEE MI / VI / EI MI Required if [MSE1] = IEEE.
MSE1C-US CO2 / CO8 CO2 Required if [MSE1] = US.
[SE1R] DEF / DEP DEF SEF1 reset characteristic. Required if
[MSE1] = IEEE or US.
[SE1S2] Off / On Off SEF1 stage 2 timer enable
[VTF-SE1BLK] Off / On Off VTF block enable
[SE2EN] Off / On Off SEF2 Enable
[SE2-DIR] FWD / REV /NON FWD SEF2 directional characteristic
[MSE2] D/IEC/IEEE/US/C D SEF2 characteristic
[MSE2C] SEF2 inverse curve type.
MSE2C-IEC NI / VI / EI / LTI NI Required if [MSE2] = IEC.
MSE2C-IEEE MI / VI / EI MI Required if [MSE2] = IEEE.
MSE2C-US CO2 / CO8 CO2 Required if [MSE2] = US.
[SE2R] DEF / DEP DEF SEF2 reset characteristic. Required if
[MSE2] = IEEE or US.
[VTF-SE2BLK] Off / On Off VTF block enable
[SE3EN] Off / On Off SEF3 Enable
[SE3-DIR] FWD / REV / NON FWD SEF3 directional characteristic
[VTF-SE3BLK] Off / On Off VTF block enable
[SE4EN] Off / On Off SEF4 Enable
[SE4-DIR] FWD / REV / NON FWD SEF4 directional characteristic
[VTF-SE4BLK] Off / On Off VTF block enable
[ZPEN] Off / On Off Zero phase sequence power block enable

SEF
SEF is set lower than the available earth fault current and higher than the erroneous zero-phase
current. The erroneous zero-phase current exists under normal conditions due to an unbalanced
feeder configuration. The zero-phase current is normally fed from a core balance CT on the feeder,
but if it is derived from three phase CTs, the erroneous current may also be caused by CT errors
that may occur during phase faults.
The erroneous steady state zero-phase current can be acquired on the metering screen of the relay
front panel.

 39 
 6 F 2 T 0 1 7 7

Directional SEF
Directional SEF protection is commonly applied to unearthed systems, and to systems earthed by
an inductance (Peterson Coil). Refer to appendix B for application guidance.

High impedance REF protection

CT saturation under through fault conditions results in a voltage appearing across the relay circuit.
The voltage setting of the relay circuit must be arranged such that it is greater than the maximum
voltage that can occur under through fault conditions. The worst case is considered whereby one
CT of the balancing group becomes completely saturated, while the others maintain linear
operation. The excitation impedance of the saturated CT is considered to approximate a
short-circuit.
Healthy CT Saturated CT
Transformer
Circuit

IF
Varistor ZM≈0
RCT
VS

Stabilising
Resistor RS GRE140
Rsec RL

Figure 2.1.31 Maximum Voltage under Through Fault Condition

The voltage across the relay circuit under these conditions is given by the equation:
VS = IF×(RCT + RL)
where:
VS = critical setting voltage (rms)
IF = maximum prospective secondary through fault current (rms)
RCT = CT secondary winding resistance
RL = Lead resistance (total resistance of the loop from the saturated CT to the relaying
point)
A series stabilising resistor is used to raise the voltage setting of the relay circuit to VS. No safety
margin is needed since the extreme assumption of unbalanced CT saturation does not occur in
practice. The series resistor value, RS, is selected as follows:
RS = VS / IS
IS is the current setting (in secondary amps) applied to the GRE140 relay. However, the actual
fault setting of the scheme includes the total current flowing in all parallel paths. That is to say that
the actual primary current for operation, after being referred to the secondary circuit, is the sum of
the relay operating current, the current flowing in the varistor, and the excitation current of all the
parallel connected CTs at the setting voltage. In practice, the varistor current is normally small
enough that it can be neglected. Hence:
IS ≦ IP / N – 4Imag
where:
IS = setting applied to GRE140 relay (secondary amps)
IP = minimum primary current for operation (earth fault sensitivity)
N = CT ratio

 40 
 6 F 2 T 0 1 7 7

Imag = CT magnetising (excitation) current at voltage VS

More sensitive settings for IS allow for greater coverage of the transformer winding, but they also
require larger values of RS to ensure stability, and the increased impedance of the differential
circuit can result in high voltages being developed during internal faults. The peak voltage, Vpk,
developed may be approximated by the equation:

Vpk = 2× 2 × Vk × (I F R S − Vk )

where:
Vk = CT knee point voltage
IF = maximum prospective secondary current for an internal fault
When a Metrosil is used for the varistor, it should be selected with the following characteristics:
V = CIβ
where:
V = instantaneous voltage
I = instantaneous current
β = constant, normally in the range 0.20 - 0.25
C = constant.
The C value defines the characteristics of the metrosil, and should be chosen according to the
following requirements:
1. The current through the metrosil at the relay voltage setting should be as low as possible,
preferably less than 30mA for a 1Amp CT and less than 100mA for a 5Amp CT.
2. The voltage at the maximum secondary current should be limited, preferably to 1500Vrms.
Restricted earth fault schemes should be applied with high accuracy CTs whose knee point voltage
Vk is chosen according to the equation:
Vk ≧ 2×VS
where VS is the differential stability voltage setting for the scheme.

2.1.3.5 Negative Sequence Overcurrent Protection

The negative sequence overcurrent protection (NOC) is used to detect asymmetrical faults
(phase-to-phase and phase-to-earth faults) with high sensitivity in conjunction with phase
overcurrent protection and residual overcurrent protection. It also used to detect load unbalance
conditions.
Phase overcurrent protection must be set to a lower sensitivity when the load current is large but
NOC sensitivity is not affected by the magnitude of the load current except in the case of the
erroneous negative sequence current experienced due to the unbalanced configuration of the
distribution lines.
For some earth faults, only a small zero sequence current is fed while the negative sequence
current is comparatively large. This is more likely the case for a fault occurring at the remote end
of a feeder having a small reverse zero sequence impedance and most of the zero sequence current
flows to the remote end.
In these cases, NOC backs up the phase overcurrent and residual overcurrent protection. The NOC
can also be used to protect the rotor of a rotating machine from over heating by detecting a load
unbalance. Unbalanced voltage supply to a rotating machine due to the loss of a phase can also

 41 
 6 F 2 T 0 1 7 7

lead to increases in negative sequence current and in machine heating.

GRE140 provides directional negative sequence overcurrent protection with definite time
characteristics.
Two independent elements NOC1 and NOC2 are provided for tripping and alarm purposes. These
elements can be directionalised by polarising against the negative sequence voltage.
The NOC protection is enabled when three-phase current is introduced and the scheme switch
[APPLCT] is set to “3P”.
Scheme Logic
Figure 2.1.32 and 2.1.33 show the scheme logic of directional negative sequence overcurrent
protection NOC1 and NOC2. The directional control characteristic can be selected to “Forward”
or “Reverse” or “Non” by scheme switch setting [NC1-DIR] and [NC2-DIR] (not shown in
Figures 2.1.32 and 2.1.33).
Figure 2.1.32 shows the scheme logic of directional negative sequence overcurrent protection
NOC1 with inverse time or definite time selective two-stage overcurrent protection. The definite
time protection is selected by setting [MNC1] to “D”, and the trip signal NOC1 TRIP is given via
delayed pick-up timer TNC1. The inverse time protection is selected by setting [MNC1] to any
one of “IEC”, “IEEE”, “US” or “C” and then setting [MNC1C] according to the required IDMT
characteristic, and the trip signal NOC1_TRIP is given.
The NOC2 protection also provides selective definite time or inverse time characteristic as shown
in Figure 2.1.33. The scheme logic of NOC2 is the same as that of the NOC1.
When the VTFS or CTFS detects a VT failure or a CT failure, it can alarm and block the NOC1
and NOC2 protection by the scheme switch [VTF-NC1BLK] and [VTF-NC2BLK] or
[CTF-NC1BLK] and [CTF- NC2BLK] respectively.
The NOC1 and NOC2 protection can be disabled by the scheme switches [NC1EN], [NC2EN] and
[APPLCT] or the PLC signals NOC1_BLOCK and NOC2_BLOCK respectively.
The scheme switch [APPLCT] is available in which three-phase overcurrent protection can be
selected. The NOC protection is enabled when three-phase current is introduced and [APPL-CT]
is set to “3P”.
169 TNC1
NOC1 t 0 311
& NOC1_TRIP
& ≥1
[NC1-2F 0.00 - 300.00s
+ "Block"
&
ICD
NOC1 170
(INST)
&
[NOC1]
+
"IEC" [NC1-EN]
+ "OFF" 1
"IEEE"

"US"

"C"

"D"

1560 NOC1_BLOCK 1
&
Non VTF
[VTF-NC1BLK] ≥1
+ "OFF"
Non CTF
[CTF-NC1BLK] ≥1
+ "OFF"

Figure 2.1.32 Negative Sequence Overcurrent Protection NOC1 Scheme Logic

 42 
 6 F 2 T 0 1 7 7

171 TNC2
NOC2 t 0 312
& NOC2_ALARM
& ≥1
[NC2-2F 0.00 - 300.00s
+ "Block"
&
ICD
NOC2 185
(INST)
&
[NOC1]
+
"IEC" [NC2-EN]
+ "OFF" 1
"IEEE"

"US"

"C"
"D"

1561 NOC2_BLOCK 1
&
Non VTF
[VTF-NC2BLK] ≥1
+ "OFF"
Non CTF
[CTF-NC2BLK] ≥1
+ "OFF"

Figure 2.1.33 Negative Sequence Overcurrent Protection NOC2 Scheme Logic

Setting
The table below shows the setting elements necessary for the NOC protection and their setting
ranges.
Element Range Step Default Remarks
NCθ −95° – 95° 1° −45° NOC characteristic angle
NCV 0.5 – 25.0 V 0.1 V 3.0 V NOC NPS voltage level
NC1 0.10 – 10.0 A 0.01 A 0.40 A NOC1 threshold setting.
TNC1 0.00 – 300.00 s 0.01 s 1.00 s NOC1 definite time setting. Required if [MNC1] = D.
TNC1M 0.010 – 1.5000 0.001 1.000 NOC1 time multiplier setting. Required if [MNC1] =
IEC, IEEE or US.
TNC1R 0.0 – 300.0 s 0.1 s 0.0 s NOC1 definite time delayed reset. Required if [NC1R]
= DEF.
TNC1RM 0.010 – 1.5000 0.001 1.000 NC1 dependent time delayed reset time multiplier.
Required if [NC1R] = DEP.
NC2 0.10 - 10.0 A 0.01 A 0.20 A NOC2 threshold setting.
TNC2 0.00 – 300.00 s 0.01 s 0.00 s NOC2 definite time setting
TNC2M 0.010 – 1.500 0.001 1.000 NOC2 time multiplier setting. Required if [MNC2] =
IEC, IEEE or US.
TNC2R 0.0 – 300.0 s 0.1 s 0.0 s NOC2 definite time delayed reset. Required if [NC2R]
= DEF.
TNC2RM 0.010 – 1.5000 0.001 1.000 NC2 dependent time delayed reset time multiplier.
Required if [NC2R] = DEP.
[NC1EN] Off / On Off NOC1 Enable
[MNC1C] NOC1 inverse curve type.
MNC1C-IEC NI / VI / EI / LTI NI Required if [MNC1] = IEC.
MNC1C-IEEE MI / VI / EI MI Required if [MNC1] = IEEE.
MNC1C-US CO2 / CO8 CO2 Required if [MNC1] = US.

 43 
 6 F 2 T 0 1 7 7

Element Range Step Default Remarks

[NC1R] DEF / DEP DEF NOC1 reset characteristic. Required if [MNC1] = IEEE
or US.
[CTF-NC1BLK] Off / On Off CTF block enable for NOC1
[VTF-NC1BLK] Off / On Off VTF block enable for NOC1
[NC2EN] Off / On Off NOC2 Enable
[MNC2C] NOC2 inverse curve type.
MNC2C-IEC NI / VI / EI / LTI NI Required if [MNC2] = IEC.
MNC2C-IEEE MI / VI / EI MI Required if [MNC2] = IEEE.
MNC2C-US CO2 / CO8 CO2 Required if [MNC2] = US.
[NC2R] DEF / DEP DEF NOC2 reset characteristic. Required if [MNC2] = IEEE
or US.
[CTF-NC2BLK] Off / On Off CTF block enable for NOC2
[VTF-NC2BLK] Off / On Off VTF block enable for NOC2
[APPLCT] Off / 3P / 2P / 1P 3P Three-phase current input

Sensitive setting of NOC1 and NOC2 thresholds is restricted by the negative phase sequence
current normally present on the system. The negative phase sequence current is measured in the
relay continuously and displayed on the metering screen of the relay front panel along with the
maximum value. It is recommended to check the display at the commissioning stage and to set
NOC1 and NOC2 to 130 to 150% of the maximum value displayed.
The delay time setting TNC1 and TNC2 is added to the inherent delay of the measuring elements
NOC1 and NOC2. The minimum operating time of the NOC elements is around 200ms.
Under fault conditions, the negative sequence current lags the negative sequence voltage by an
angle dependent upon the negative sequence source impedance of the system. This should be
accounted for by setting the NOC characteristic angle setting [NCθ] when the negative sequence
protection is used in directional mode. Typical settings are as follows:
• −60° for transmission systems
• +45° for distribution systems

2.1.3.6 Application of Protection Inhibits

All GRE140 protection elements can be blocked by a binary input signal. This feature is useful in
a number of applications.

Blocked Overcurrent Protection

Conventional time-graded definite time overcurrent protection can lead to excessive fault
clearance times being experienced for faults closest to the source. The implementation of a
blocked overcurrent scheme can eliminate the need for grading margins and thereby greatly
reduce fault clearance times. Such schemes are suited to radial feeder circuits, particularly where
substations are close together and pilot cables can be economically run between switchboards.
Figure 2.1.34 shows the operation of the scheme.
Instantaneous phase fault and earth fault pick-up signals OC1HS, EF1HS and SEF1HS of OC1,
EF1 and SEF1 elements are allocated to any of the binary output relays and used as a blocking
signal. OC2, EF2 and SEF2 protections are set with a short delay time. (For pick-up signals, refer
to Figure 2.1.16, 2.1.20 and 2.1.27.)
For a fault at F as shown, each relay sends the blocking signal to its upstream neighbor. The signal

 44 
 6 F 2 T 0 1 7 7

is input as a binary input signal OC2 BLOCK, EF2 BLOCK and SEF2 BLOCK at the receiving
end, and blocks the OC2, EF2 and SEF2 protection. Minimum protection delays of 50ms are
recommended for the OC2, EF2 and SEF2 protection, to ensure that the blocking signal has time
to arrive before protection operation.
Inverse time graded operation with elements OC1, EF1 and SEF1 are available with the scheme
switch [MOC1], [MEF1] and [MSE1] setting, thus providing back-up protection in the event of a
failure of the blocked scheme.

Trip
GRE140 GRE140 GRE140

OC2/EF2/SEF2 OC2/EF2/SEF2 OC2/EF2/SEF2

OCHS/EFHS/ OCHS/EFHS/
High SEFHS High SEFHS
Speed Speed
Block Block

Figure 2.1.34 Blocked Overcurrent Protection

Blocked Busbar Protection

Non-directional overcurrent protection can be applied to provide a busbar zone scheme for a
simple radial system where a substation has only one source, as illustrated in Figure 2.1.35.
For a fault on an outgoing feeder F1, the feeder protection sends a hardwired blocking signal to
inhibit operation of the incomer, the signal OCHS, EFHS and SEFHS being generated by the
instantaneous phase fault, and earth fault pick-up outputs of OC1, EF1 and SEF1 allocated to any
of the binary output relays. Meanwhile, the feeder is tripped by the OC1, EF1 and SEF1 elements,
programmed with inverse time or definite time delays and set to grade with downstream
protections.
The incomer protection is programmed to trip via its instantaneous elements OC2, EF2 and SEF2
set with short definite time delay settings (minimum 50ms to provide a margin to allow for safe
receipt of feeder protection blocking signals for faults occurring on the outgoing feeders), thus
providing rapid isolation for faults in the busbar zone F2.
At the incomer, inverse time graded operation with elements OC1, EF1 and SEF1 are available
with the scheme switch [MOC1], [MEF1] and [MSE1] setting, thus providing back-up protection
in the event of failure of the blocked scheme.
GRE140 integrated circuit breaker failure protection can be used to provide additional back-trips
from the feeder protection to the incomer, and from the incomer to the HV side of the power
transformer, in the event of the first trip failing to clear the earth fault.
In the case of more complex systems where the substation has two incomers, or where power can
flow into the substation from the feeders, then directional protection must be applied.

 45 
 6 F 2 T 0 1 7 7

GRD140 Delayed Back-up Trip

OC1/EF1/SEF1
High Speed Block to Incomer for Feeder Fault
OC2/ EF2/SEF2

Fast Trip

F2
Feeder Trip Feeder Trip Feeder Trip
GRD140 GRD140 GRD140

OC1/EF1/SEF1 OC1/EF1/SEF1 OC1/EF1/SEF1

OCHS/EFHS/ OCHS/EFHS/ OCHS/EFHS/
SEFHS SEFHS SEFHS
F1

Figure 2.1.35 Blocked Busbar Protection Scheme 1

Figure 2.1.36 shows one half of a two-incomer station. A directional overcurrent relay protects the
incomer, with non-directional overcurrent units on the feeders.

GRD140
Directional
(IDMTL) Delayed Back-up Trip
OC1/EF1/SEF1
(50ms) Trip Bus Section and Bus Coupler
OC2/EF2/SEF2
(250ms)
OC3/EF3/SEF3

High Speed Block

Trip Incomer

Bus Section

Bus Coupler

Feeder Trip Feeder Trip

GRD140 GRD140
Non-directional Non-directional

OC1/EF1/SEF1 OC1/EF1/SEF1

OCHS/EFHS/ OCHS/EFHS/
SEFHS SEFHS

Figure 2.1.36 Blocked Busbar Protection Scheme 2

For a fault on an outgoing feeder, the non-directional feeder protection sends a hardwired blocking
signal to inhibit operation of both incomers, the signal OCHS, EFHS and SEFHS being generated
by the instantaneous phase fault and earth fault pick-up outputs. Meanwhile, the feeder is tripped
by the OC1, EF1 and SEF1 elements, programmed with inverse time delays and set to grade with
downstream protections.

 46 
 6 F 2 T 0 1 7 7

The incomer protection is programmed for directional operation such that it will only trip for
faults on the busbar side of its CTs. Hence, although a fault on the HV side may be back-fed from
the busbars, the relay does not trip.
For a fault in the busbar zone, the GRE140 is programmed to trip the bus section and bus coupler
circuit breakers via its instantaneous elements OC2, EF2 and SEF2 set with short definite time
delay settings (minimum 50ms to provide a margin to allow for safe receipt of feeder protection
blocking signals for faults occurring on the outgoing feeders). This first stage trip maintains
operation of half the substation in the event of a busbar fault or incomer fault in the other half.
If the first stage trip fails to clear the fault, a second stage trip is given to the local incomer circuit
breaker via instantaneous elements OC3, EF3 and SEF3 after a longer delay, thus isolating a fault
on the local busbar.
GRE140 integrated circuit breaker fail protection can be used to provide additional back-trips
from the feeder protection to the incomer, and from the incomer to the HV side of the power
transformer, in the event of the main trip failing to clear the fault.
A further development of this scheme might see directional relays being applied directly to the bus
section and bus coupler circuit breakers, to speed up operation of the scheme.
This scheme assumes that a busbar fault cannot be fed from the outgoing feeder circuits. In the
case of an interconnected system, where a remote power source may provide a back-feed into the
substation, directional relays must also be applied to protect the feeders.

 47 
 6 F 2 T 0 1 7 7

2.1.4 Phase Undercurrent Protection

The phase undercurrent protection is used to detect a decrease in current caused by a loss of load,
typically motor load. Two stage undercurrent protection UC1 and UC2 are available.
The undercurrent element operates for current falling through the threshold level. But the
operation is blocked when the current falls below 0.04A of CT secondary current to discriminate
the loss of load from the feeder tripping by other protection. Figure 2.1.37 shows the undercurrent
element characteristic.

Setting value
|I| ≤ UC1 setting
Operating zone & UC1

0.04
|I| ≤ UC2 setting
0 & UC2
I

|I| ≥ 0.04

Figure 2.1.37 Undercurrent Element Characteristic

Each phase has two independent undercurrent elements for tripping and alarm purposes. The
elements are programmable for instantaneous or definite time delayed operation.
The undercurrent element operates on a per phase basis, although tripping and alarming is three-
phase only.

Scheme Logic
Figure 2.1.38 shows the scheme logic of the phase undercurrent protection.
The undercurrent elements UC1 and UC2 output UC1 TRIP and UC2 ALARM through delayed
pick-up timers TUC1 and TUC2.
This protection can be disabled by the scheme switch [UC1EN] and [UC2EN] or PLC signals UC1
BLOCK and UC2 BLOCK.
Further, this protection can be blocked when CT failure (CTF) is detected.

 48 
 6 F 2 T 0 1 7 7

TUC1
161 t 0 302
A & & & UC1-A_TRIP
162 t 0 303
UC1 B & & & UC1-B_TRIP
163 t 0 304
C UC1-C_TRIP
& & &
0.00 - 300.00s 301
[UC1EN] ≥1 UC1_TRIP
+
"ON"
TUC2
164 t 0 306
A & & UC2-A_ALARM
&
165 t 0 307
UC2 B & & & UC2-B_ALARM
166 t 0 308
C UC2-C_ALARM
& & &
0.00 - 300.00s 305
[UC2EN] ≥1 UC2_ALARM
A +
"ON"
I≥
0.04A B
C

NON CTF

[CTF_UC1BLK] ≥1 &
+
"OFF"

1568 UC1_BLOCK 1

[CTF_UC2BLK] ≥1 &
+
"OFF"

1569 UC2_BLOCK 1 In : Rated current

Figure 2.1.38 Undercurrent Protection Scheme Logic

Setting
The table below shows the setting elements necessary for the undercurrent protection and their
setting ranges.
Element Range Step Default Remarks
UC1 0.10 – 10.0 A 0.01 A 0.40 A UC1 threshold setting
TUC1 0.00 – 300.00 s 0.01 s 0.00 s UC1 definite time setting
UC2 0.10 – 10.0 A 0.01 A 0.20 A UC2 threshold setting
TUC2 0.00 – 300.00 s 0.01 s 0.00 s UC2 definite time setting
[UC1EN] Off / On Off UC1 Enable
[UC2EN] Off / On Off UC2 Enable
[CTF-UC1BLK] Off / On Off UC1 CTF block
[CTF-UC2BLK] Off / On Off UC2 CTF block

 49 
 6 F 2 T 0 1 7 7

2.1.5 Thermal Overload Protection

The temperature of electrical plant rises according to an I2t function and the thermal overload
protection in GRE140 provides good protection against damage caused by sustained overloading.
The protection simulates the changing thermal state in the plant using a thermal model.
The thermal state of the electrical system can be shown by equation (1).
I2  −t 
θ = 1 − e τ  × 100% (1)
I 2AOL 

where:
θ = thermal state of the system as a percentage of allowable thermal capacity,
I = applied load current,
IAOL = allowable overload current of the system,
τ = thermal time constant of the system.
The thermal state 0% represents the cold state and 100% represents the thermal limit, which is the
point at which no further temperature rise can be safely tolerated and the system should be
disconnected. The thermal limit for any given system is fixed by the thermal setting IAOL. The relay
gives a trip output when θ= 100%.
The thermal overload protection measures the largest of the three phase currents and operates
according to the characteristics defined in IEC60255-8. (Refer to Appendix A for the
implementation of the thermal model for IEC60255-8.)
Time to trip depends not only on the level of overload, but also on the level of load current prior to
the overload - that is, on whether the overload was applied from ‘cold’ or from ‘hot’.
Independent thresholds for trip and alarm are available.
The characteristic of the thermal overload element is defined by equation (2) and equation (3) for
‘cold’ and ‘hot’. The cold curve is a special case of the hot curve where prior load current Ip is
zero, catering for the situation where a cold system is switched on to an immediate overload.
 I2 
t =τ·Ln  2 2  (2)
 I − I AOL 

 I2 − I 2 
t =τ·Ln  2 2P  (3)
 I − I AOL 
where:
t = time to trip for constant overload current I (seconds)
I = overload current (largest phase current) (amps)
IAOL = allowable overload current (amps)
IP = previous load current (amps)
τ= thermal time constant (seconds)
Ln = natural logarithm
Figure 2.1.39 illustrates the IEC60255-8 curves for a range of time constant settings. The left-hand
chart shows the ‘cold’ condition where an overload has been switched onto a previously un-loaded
system. The right-hand chart shows the ‘hot’ condition where an overload is switched onto a
system that has previously been loaded to 90% of its capacity.

 50 
 6 F 2 T 0 1 7 7

Thermal Curves (Cold Curve - Thermal Curves (Hot Curve -

no prior load) 90% prior load)
1000 1000

100
100
Operate Time (minutes)

Operate Time (minutes)

10
10

1
τ
τ
1 100
100
50 0.1 50
20 20
0.1 10 10
0.01 5
5
2
2
1
0.01 1 0.001
1 10 1 10
Overload Current (Multiple of IAOL) Overload Current (Multiple of
IAOL)

Figure 2.1.39 Thermal Curves

Scheme Logic
Figure 2.1.40 shows the scheme logic of the thermal overload protection.
The thermal overload element THM has independent thresholds for alarm and trip, and outputs
alarm signal THM_ALARM and trip signal THM_TRIP. The alarm threshold level is set as a
percentage of the tripping threshold.
The alarming and tripping can be disabled by the scheme switches [THMAEN] and [THMEN]
respectively or PLC signals THMA_BLOCK and THM_BLOCK.
167
309
A & THM_ALARM
&
THM
168
T 310
& THM_TRIP
&
[THMAEN]
+
"ON"
[THMEN]
+
"ON"

1573 THMA_BLOCK 1

1572 THM_BLOCK 1

Figure 2.1.40 Thermal Overload Protection Scheme Logic

 51 
 6 F 2 T 0 1 7 7

Setting
The table below shows the setting elements necessary for the thermal overload protection and their
setting ranges.
Element Range Step Default Remarks
THM 0.40 – 10.0 A 0.01 A 1.00 A Thermal overload setting.
(THM = IAOL: allowable overload current)
THMIP 0.0 – 5.0 A 0.01 A 0.00 A Previous load current
TTHM 0.5 - 500.0 min 0.1 min 10.0 min Thermal time constant
THMA 50 – 99 % 1% 80 % Thermal alarm setting.
(Percentage of THM setting.)
[THMEN] Off / On Off Thermal OL enable
[THMAEN] Off / On Off Thermal alarm enable

Note: THMIP sets a minimum level of previous load current to be used by the thermal
element, and is only active when testing ([THMRST] = “ON”).

 52 
 6 F 2 T 0 1 7 7

2.1.6 Broken Conductor Protection

Series faults or open circuit faults which do not accompany any earth faults or phase faults are
caused by broken conductors, breaker contact failure, operation of fuses, or false operation of
single-phase switchgear.
Figure 2.1.41 shows the sequence network connection diagram in the case of a single-phase series
fault assuming that the positive, negative and zero sequence impedance of the left and right side
system of the fault location is in the ratio of k1 to (1 – k1), k2 to (1 – k2) and k0 to (1 – k0).

E1A
Single-phase series fault
E1B

k1 1– k1

k1Z1 I1F I1F (1-k1)Z1

E E1B

Positive phase sequence

k2Z2 I2F I2F (1-k2)Z2

Negative phase sequence

k0Z0 I0F I0F (1-k0)Z0

Zero phase sequence

I1F k2Z2 (1-k2)Z2 I1F

k1Z1 (1-k1)Z1
K0Z0 (1-k0)Z0
E1A E1B

I1F Z2
Z1
Z0
E1A E1B

Figure 2.1.41 Equivalent Circuit for a Single-phase Series Fault

Positive phase sequence current I1F, negative phase sequence current I2F and zero phase sequence

 53 
 6 F 2 T 0 1 7 7

current I0F at the fault location for a single-phase series fault are given by:

I1F + I2F + I0F =0 (1)

Z2FI2F − Z0FI0F = 0 (2)
E1A − E1B = Z1FI1F − Z2FI2F (3)
where,
E1A, E1B: power source voltage
Z1: positive sequence impedance
Z2: negative sequence impedance
Z0: zero sequence impedance

From the equations (1), (2) and (3), the following equations are derived.

Z2 + Z 0
I1F = Z Z + Z Z + Z Z (E1A − E1B)
1 2 1 0 2 0

−Z0
I2F = Z Z + Z Z + Z Z (E1A − E1B)
E

1 2 1 0 2 0

−Z2
I0F = Z Z + Z Z + Z Z (E1A − E1B)
1 2 1 0 2 0

The magnitude of the fault current depends on the overall system impedance, difference in phase
angle and magnitude between the power source voltages behind both ends.
Broken conductor protection element BCD detects series faults by measuring the ratio of negative
to positive phase sequence currents (I2F / I1F). This ratio is given by the negative and zero sequence
impedance of the system:

I2F |I2F| Z0
I1F = |I1F| = Z2 + Z0

The ratio is higher than 0.5 in a system when the zero sequence impedance is larger than the
negative sequence impedance. It will approach 1.0 in a high-impedance earthed or a one-end
earthed system.
The characteristic of the BCD element is shown in Figure 2.1.42 for stable operation.

I2

|I2|/|I1| ≥ BCD
setting & BCD

|I1| ≥ 0.04×In

|I2| ≥ 0.01×In

0.01×In
0 I1
0.04×In In: rated current

Figure 2.1.42 BCD Element Characteristic

 54 
 6 F 2 T 0 1 7 7

Scheme Logic

Figure 2.1.43 shows the scheme logic of the broken conductor protection. The BCD element
outputs trip signals BCD TRIP through a delayed pick-up timer TBCD.
The tripping can be disabled by the scheme switch [BCDEN], [APPL] or PLC signal BCD
BLOCK. The scheme switch [APPL-CT] is available in Model 400 and 420 in which three-phase
or two-phase phase overcurrent protection can be selected. The broken conductor protection is
enabled when three-phase current is introduced and [APPL-CT] is set to “3P” in those models.

172
TBCD
BCD t 0 313
& BCD TRIP

0.00 - 300.00s
[BCDEN]
+
"ON"

[APPL-CT
+
"3P"

1574 BCD_BLOCK 1

Figure 2.1.43 Broken Conductor Protection Scheme Logic

Settings

The table below shows the setting elements necessary for the broken conductor protection and
their setting ranges.
Element Range Step Default Remarks
BCD 0.10 – 1.00 0.01 0.20 I2 / I1
TBCD 0.00 – 300.00s 0.01s 0.00 s BCD definite time setting
[BCDEN] Off / On Off BCD Enable
[APPL-CT] Off / 3P / 2P / 1P 3P Three-phase current input.

Minimum setting of the BC threshold is restricted by the negative phase sequence current
normally present in the system. The ratio I2 / I1 of the system is measured in the relay continuously
and displayed on the metering screen of the relay front panel, along with the maximum value of
the last 15 minutes I21 max. It is recommended to check the display at the commissioning stage.
The BCD setting should be 130 to 150% of I2 / I1 displayed.
Note: It must be noted that I2 / I1 is displayed only when the positive phase sequence current
(or load current ) in the secondary circuit is larger than 2 % of the rated secondary circuit
current.
TBCD should be set to more than 1 cycle to prevent unwanted operation caused by a transient
operation such as CB closing.

 55 
 6 F 2 T 0 1 7 7

2.1.7 Breaker Failure Protection

When fault clearance fails due to a breaker failure, the breaker failure protection (BFP) clears the
fault by backtripping adjacent circuit breakers.
If the current continues to flow even after a trip command is output, the BFP judges it as a breaker
failure. The existence of the current is detected by an overcurrent element CBF provided for each
phase. For high-speed operation of the BFP, a high-speed reset overcurrent element (less than
20ms) is used. The CBF element resets when the current falls below 80% of the operating value as
shown in Figure 2.1.44.

Pick-up

Drop-off

0 I

Drop-off/Pick-up=0.8

Figure 2.1.44 CBF element Characteristic

In order to prevent the BFP from starting by accident during maintenance work and testing, and
thus tripping adjacent breakers, the BFP has the optional function of retripping the original
breaker. To make sure that the breaker has actually failed, a trip command is made to the original
breaker again before tripping the adjacent breakers to prevent unnecessary tripping of the adjacent
breakers following the erroneous start-up of the BFP. It is possible to choose not to use retripping
at all, or use retripping with trip command plus delayed pick-up timer, or retripping with trip
command plus overcurrent detection plus delayed pick-up timer.
An overcurrent element and delayed pick-up timer are provided for each phase which also operate
correctly during the breaker failure routine in the event of an evolving fault.

Scheme logic
BFP initiation is performed on a per-phase basis. Figure 2.1.45 shows the scheme logic for the
BFP. The BFP is started by single phase reclose initiation signals CBF_INIT-A to CBF_INIT-C or
three-phase reclose initiation signal CBF_INIT. (These signals are assigned by the PLC default
setting). These signals must continuously exist as long as the fault is present.
The backtripping signal to the adjacent breakers CBF TRIP is output if the overcurrent element
CBF operates continuously for the setting time of the delayed pick-up timer TBTC after initiation.
Tripping of adjacent breakers can be blocked with scheme switch [BTC].
There are two kinds of modes for the retrip signal to the original breaker CBF RETRIP, the mode
in which retrip is controlled by the overcurrent element CBF, and the direct trip mode in which
retrip is not controlled. The retrip mode together with the trip block can be selected with the
scheme switch [RTC]. In the scheme switch [RTC], “DIR” is the direct trip mode, and “OC” is the
trip mode controlled by the overcurrent element CBF.
Figure 2.1.46 shows a sequence diagram for the BFP when a retrip and backup trip are used. If the
circuit breaker trips normally, the CBF is reset before timer TRTC or TBTC is picked up and the
BFP is reset. As TRTC and TBTC start at the same time, the setting value of TBTC should include
that of TRTC.
If the CBF continues to operate, a retrip command is given to the original breaker after the setting
time of TRTC. Unless the breaker fails, the CBF is reset by retrip. TBTC does not time-out and the
BFP is reset. This sequence of events may happen if the BFP is initiated by mistake and

 56 
 6 F 2 T 0 1 7 7

unnecessary tripping of the original breaker is unavoidable.

If the original breaker fails, retrip has no effect and the CBF continues operating and the TBTC
finally picks up. A trip command CBF TRIP is given to the adjacent breakers and the BFP is
completed.
The BFP protection can be disabled by the scheme switches [BTC] and [RTC] or the PLC signal
CBF BLOCK.

[BTC] 318
≥1 CBF TRIP
+
"ON" CBF_OP-A TBTC
173 322 t 0 319
A & & CBF TRIP-A
174 CBF_OP-B
CBF B
323 t 0 320
CBF TRIP-B
175 & &
C
CBF_OP-C
324 t 0 321
& & CBF TRIP-C

0.00 - 300.00s
≥1 314
CBF RETRIP
TRTC
t 0 315
& CBF RETRIP-A
≥1
t 0 316
CBF RETRIP-B
& ≥1

t 0 317
& ≥1 CBF RETRIP-C

0.00 - 300.00s
1660 CBF_INIT-A
≥1 &

1661 CBF_INIT-B
≥1 &

1662 CBF_INIT-C
≥1 &
Default setting
GEN._TRIP 1663 CBF_INIT [RTC]
+
"OC"

"DIR"
[APPL-CT]
+
"3P" &
1570 CBF_BLOCK 1

Figure 2.1.45 Breaker Failure Protection Scheme Logic

 57 
 6 F 2 T 0 1 7 7

Fault Start CBFP

Trip
Adjacent
breakers Closed Open

TRIP
Normal trip Retrip
Original
breakers Closed Open Open
Tcb Tcb

OCBF
Toc Toc
TBF1
TRTC

CBF
RETRIP

TBF2
TBTC

CBF
TRIP

Figure 2.1.46 Sequence Diagram

Setting
The setting elements necessary for the breaker failure protection and their setting ranges are as
follows:
Element Range Step Default Remarks
CBF 0.10 – 10.0 A 0.01 A 0.50 A Overcurrent setting
TRTC 0.00 – 300.00 s 0.01 s 0.50 s Retrip time setting
TBTC 0.00 – 300.00 s 0.01 s 1.00 s Back trip time setting
[RTC] Off / DIR / OC Off Retrip control
[BTC] Off / On Off Back trip control

The overcurrent element CBF checks that the circuit breaker has opened and that the current has
disappeared. Therefore, since it is allowed to respond to load current, it can be set to 10 to 200% of
the rated current.
The settings of TRTC and TBTC are determined by the opening time of the original circuit breaker
(Tcb in Figure 2.1.46) and the reset time of the overcurrent element (Toc in Figure 2.1.46). The
timer setting example when using retrip can be obtained as follows.
Setting of TRTC = Breaker opening time + CBF reset time + Margin
= 40ms + 10ms + 20ms
= 70ms
Setting of TBTC = TCBF1 + Output relay operating time + Breaker opening time +
CBF reset time + Margin
= 70ms + 10ms + 40ms + 10ms + 10ms
= 140ms
If retrip is not used, the setting of the TBTC can be the same as the setting of the TRTC.

 58 
 6 F 2 T 0 1 7 7

2.1.8 Countermeasures for Magnetising Inrush

GRE140 provides the following two schemes to prevent incorrect operation from a magnetising
inrush current during transformer energisation.
- Protection block by inrush current detector
- Cold load protection

2.1.8.1 Inrush Current Detector

Inrush current detector ICD is used to detect second harmonic inrush current during transformer
energisation and can be used to block the following protections:
- OC1 to OC4
- EF1 to EF4
- SEF1 to SEF4
- NOC1 and NOC2
- BCD
- RP1 and RP2
Blocking can be enabled or disabled by setting the scheme switches [OC∗-2F], [EF∗-2F],
[SEF∗-2F], [NOC∗-2F] ,[BCD-2F]and [RP∗-2F].
The ICD detects the ratio ICD-2f between the second harmonic current I2f and the fundamental
current I1f independently for each phase, and will operate if the ratio is larger than the setting
value. Figure 2.1.47 shows the characteristic of the ICD element and Figure 2.1.48 shows the ICD
block scheme. When ICD operates, OC, EF, SEF, NOC, BCD and RP elements are blocked
independently. The scheme logic of each element is shown in the previous sections.

I2f/I1f

|I2f|/|I1f|≥ICD-2f(%) & ICD

|I1f|≥ICDOC

ICD-2f(%)

0 ICDOC I1f

Figure 2.1.47 ICD Element Characteristic

150
A
151 ≥1 ICD
ICD
B
152
C

Figure 2.1.48 ICD Block Scheme

 59 
 6 F 2 T 0 1 7 7

Setting

The setting elements necessary for the ICD and their setting ranges are as follows:
Element Range Step Default Remarks
ICD-2f 10 – 50% 1% 15% Second harmonic detection
ICDOC 0.10 – 25.0 A 0.01 A 1.00 A ICD threshold setting

2.1.8.2 Cold Load Protection

GRE140 provides cold load protection to prevent incorrect operation from a magnetising inrush
current during transformer energisation.
In normal operation, the load current on the distribution line is smaller than the sum of the rated
loads connected to the line. But it amounts to several times the maximum load current for a
moment when all of the loads are energised at once after a long interruption, and decreases to 1.5
times normal peak load after three or four seconds.
To protect those lines with an overcurrent element, it is necessary to use settings to discriminate
the inrush current experienced under cold load restoration and the fault current.
This function modifies the overcurrent protection settings for a period after closing on to the type
of load that takes a high level of current on energisation. This is achieved by a ‘Cold Load
Setting’, in which the user can program an alternative setting. Normally the user will choose
higher current settings within this setting.
A state transition diagram and its scheme logic are shown in Figure 2.1.49 and Figure 2.1.50 for
the cold load protection. Note that the scheme requires the use of two binary inputs assigned by
PLC function, one each for CB OPEN and CB CLOSED.
Under normal conditions, where the circuit breaker has been closed for some time, the scheme is in
STATE 0, and the normal default setting is applied to the overcurrent protection.
If the circuit breaker opens then the scheme moves to STATE 1 and runs the Cold Load Enable
timer TCLE. If the breaker closes again while the timer is running, then STATE 0 is re-entered.
Alternatively, if TCLE expires then the load is considered cold and the scheme moves to STATE
2, and stays there until the breaker closes, upon which it goes to STATE 3.
In STATE 2 and STATE 3, the ‘Cold Load Setting’ is applied.
In STATE 3 the Cold Load Reset timer TCLR runs. If the circuit breaker re-opens while the timer
is running then the scheme returns to STATE 2. Alternatively, if TCLR expires then it goes to
STATE 0, the load is considered warm and normal settings can again be applied.
Accelerated reset of the cold load protection is also possible. In STATE 3, the phase currents are
monitored by overcurrent element ICLDO and if all phase currents drop below the ICLDO
threshold for longer than the cold load drop off time (TCLDO) then the scheme automatically
reverts to STATE 0. The accelerated reset function can be enabled with the scheme switch
[CLDOEN] setting.
Cold load protection can be disabled by setting [CLEN] to “Off”.
To test the cold load protection function, the switch [CLPTST] is provided to set the STATE 0 or
STATE 3 condition forcibly.

 60 
 6 F 2 T 0 1 7 7

STATE 0
CB status: Closed
Settings Group: Normal

Monitor CB status

CB opens CB closes
within
T CLE time

STATE 1
CB status: Open
Settings Group: Normal

Run T CLE timer

Monitor CB status
I L<ICLDO for
T CLR timer T CLDO time
T CLE timer expires
expires

STATE 3
STATE 2 CB closes CB status: Closed
CB status: Open Settings Group: Cold Load
Settings Group: Cold Load
Run T CLR timer
Monitor CB status CB opens within Monitor CB status
CLR time Monitor load current IL

Figure 2.1.49 State Transition Diagram for Cold Load Protection

376
STATE 0 Change to
&
STATE 1
TCLE
377
STATE 1 t 0 Change to
& ≥1 STATE 2
0.0 - 10000.0s

& Change to
≥1 STATE 0
378
STATE 2 Change to
&
STATE 3
379
STATE 3
&
TCLR
[CLEN] t 0
&
+ 1 [CLPTST] "S0"
"OFF"
0.0 - 10000.0s +
Default setting "S3"
389
BI2 COMMAND 1633 CB_N/O_CONT CB_CLOSE
≥1
CONSTANT 1 1634 CB_N/C_CONT 1 390
1 CB_OPEN

TCLDO
176
A t 0
≥1 1 &
ICLDO B 177
0.00 - 100.00s
178
C

[CLDOEN]
+
"ON"

Figure 2.1.50 Scheme Logic for Cold Load Protection

 61 
 6 F 2 T 0 1 7 7

Setting
The setting elements necessary for the cold load protection and their setting ranges are as follows:
Element Range Step Default Remarks
ICLDO 0.10 – 10.0 A 0.01 A 0.50 A Cold load drop-off threshold setting
TCLE 0-10000 s 1s 100 s Cold load enable timer
TCLR 0-10000 s 1s 100 s Cold load reset timer
TCLDO 0.00-100.00 s 0.01 s 0.00 s Cold load drop-off timer
[CLEN] Off / On Off Cold load protection enable
[CLDOEN] Off / On Off Cold load drop-off enable

Further, relay element settings (OC1 to OC4, EF1 to EF4, SEF1 to SEF4, NOC1, NOC2 and
BCD) are required for the cold load protection (CLP) as follows:
Element Range Step Default Remarks
CLP- OC1 0.10 – 25.0 A 0.01 A 2.00 A OC1 threshold setting in CLP mode
OC2 0.10 – 25.0 A 0.01 A 5.00 A OC2 threshold setting in CLP mode
OC3 0.10 – 150.0 A 0.01 A 20.0 A OC3 threshold setting in CLP mode
OC4 0.10 – 150.0 A 0.01 A 40.0 A OC4 threshold setting in CLP mode
EF1 0.05 – 25.0 A 0.01 A 2.00 A EF1 threshold setting in CLP mode
EF2 0.05 – 25.0 A 0.01 A 5.00 A EF2 threshold setting in CLP mode
EF3 0.05 – 100.0 A 0.01 A 20.0 A EF3 threshold setting in CLP mode
EF4 0.05 – 100.0 A 0.01 A 40.0 A EF4 threshold setting in CLP mode
SE1 0.001 – 1.000 A 0.001 A 0.020 A SEF1 threshold setting in CLP mode
SE2 0.001 – 1.000 A 0.001 A 0.020 A SEF2 threshold setting in CLP mode
SE3 0.001 – 1.000 A 0.001 A 0.020 A SEF3 threshold setting in CLP mode
SE4 0.001 – 1.000 A 0.001 A 0.020 A SEF4 threshold setting in CLP mode
NC1 0.10 – 10.0 A 0.01 A 0.80 A NOC1 threshold setting in CLP mode
NC2 0.10 – 10.0 A 0.01 A 0.40 A NOC2 threshold setting in CLP mode
BCD 0.10 – 1.00 0.01 0.40 BCD threshold setting in CLP mode

 62 
 6 F 2 T 0 1 7 7

2.1.9 Power Protection

2.1.9.1 Reverse Power Protection

The reverse power protection (RP) is used to prevent damage to motors and can be used to detect
reverse power flow in power systems with distributed energy resources.
The reverse power element operates when the level of active power falls below a threshold level
and uses an undervoltage element RPVBLK to ensure that the system voltage is higher than a
pre-determined setting. In order to prevent the operation at motor start up, the reverse power
element is blocked according to the CB condition setting [RPCB] and the timer setting [TCBRP∗].
Both RP1 and RP2 have a programmable drop off/pickup(DO/PU) ratio.
Figure 2.1.51 shows the reverse power element characteristic.

Q(Var)

0
P(W)

RP1

Figure 2.1.51 RP Element Characteristic

The active power flow direction can be set positive for either power sending or power receiving by
setting [Power] when the [RP-Power] is set to “Enable”. When [RP-Power] is set to “Disable”, the
active power flow direction is the same as the measurement setting.
The RP protection is enabled when three-phase current is introduced and the scheme switch
[APPLCT] is set to “3P” or “2P” and [APPLVT] is “3PN” or “3PP”.

Scheme Logic
Figure 2.1.52 and 2.1.53 show the scheme logic for the reverse power protection RP1 and RP2.
The active power flow directional control characteristic can be selected to “Receive” or “Send” by
scheme switch setting [Power] and [RP-Power] (not shown in Figures 2.1.52 and 2.1.53).
The reverse power elements RP1 and RP2 output RP1 TRIP and RP2 ALARM through delayed
pick-up timers TRP1 and TRP2.
This protection can be disabled by the scheme switch [RP1EN] and [RP2EN] or PLC signals RP1
BLOCK and RP2 BLOCK. Further this protection can block during the timer setting [TCBRP1]
and [TCBRP2] from the “CB CLOSE” signal being detected.
When the VTFS or CTFS detects a VT failure or a CT failure, it can be set to alarm and block the
RP1 and RP2 protection using scheme switches [VTF-RP1BLK] and [VTF-RP2BLK] or
[CTF-RP1BLK] and [CTF- RP2BLK] respectively.
The scheme switches [APPLCT] and [APPLVT] are available in which three-phase or two-phase
current protection and three-phase phase-ground or phase to phase voltage protection can be
selected. The RP protection is enabled when three-phase or two-phase current and three-phase
voltage are introduced and [APPLCT] is set to “3P” or “2P” and [APPLVT] is “3PN” or “3PP”.

 63 
 6 F 2 T 0 1 7 7

590 TRP1
RP1 0
& t 591
RP1_TRIP
[RP1-2F] 0.00 - 300.00s
+ "Block"
&
ICD ≥1
[RPVBLK]
+ "Block"
&
UV
[RP1EN]
+ "ON"
TCBRP1
t 0
CB CLOSE
≥1
0.0 - 60.0s
[RPCB]
+ "No use"

1612 RP1_BLOCK 1
&
Non VTF
[VTF-RP1BLK] ≥1
+ "OFF"
Non CTF
[CTF-RP1BLK] ≥1
+ "OFF"

Figure 2.1.52 Reverse Power Protection RP1 Scheme Logic

592 TRP2
RP2 0
& t 593
RP2_ALARM
[RP2-2F] 0.00 - 300.00s
+ "Block"
&
ICD ≥1
[RPVBLK]
+ "Block"
&
UV
[RP2EN]
+ "ON"
TCBRP2
t 0
CB CLOSE
≥1
0.0 - 60.0s
[RPCB]
+ "No use"

1613 RP2_BLOCK 1
&
Non VTF
[VTF-RP2BLK] ≥1
+ "OFF"
Non CTF
[CTF-RP2BLK] ≥1
+ "OFF"

Figure 2.1.53 Reverse Power Protection RP2 Scheme Logic

Setting
The table below shows the setting elements necessary for the RP protection and their setting
ranges.
Element Range Step Default Remarks

 64 
 6 F 2 T 0 1 7 7

Element Range Step Default Remarks

RP1 −1500.0 – -5.0 W 0.1W −30.0W RP1 threshold setting
TRP1 0.00 – 300.00 s 0.01 s 0.20 s RP1 definite time setting.
TCBRP1 0.0 – 60.0 s 0.1 s 5.0 s RP1 block time setting. Required if [RPCB] = No use.
RP1DPR 50 – 98 % 1% 95 % RP1 DO/PU ratio setting.
RP2 −1500.0 – -5.0 W 0.1W −30.0W RP2 threshold setting
TRP2 0.00 – 300.00 s 0.01 s 1.00 s RP2 definite time setting.
TCBRP2 0.0 – 60.0 s 0.1 s 5.0 s RP2 block time setting. Required if [RPCB] = No use.
RP2DPR 50 – 98 % 1% 95 % RP2 DO/PU ratio setting.
RPVBLK 40.0 – 100.0 V 0.1 V 40.0 V Undervoltage block threshold setting.
[RP1EN] Off / On Off RP1 Enable.
[CTF-RP1BLK] Off / On Off CTF block enable for RP1.
[VTF-RP1BLK] Off / On Off VTF block enable for RP1.
[RP2EN] Off / On Off RP2 Enable.
[CTF-RP2BLK] Off / On Off CTF block enable for RP2.
[VTF-RP2BLK] Off / On Off VTF block enable for RP2.
[RPCB] Use / Nouse Use RPCB block Enable.
[RP-UVBLK] NA / Block NA UV block enable for RP.
[RP-Power] Disable / Enable Disable RP-Power disable.
[Power] Send / Receive Send The active power flow direction setting.
[APPLVT] Off / 3PN / 3PP 3PN Three-phase voltage input
[APPLCT] Off / 3P / 2P / 1P 3P Three-phase current input

2.1.9.2 Reverse Reactive Power Protection

The reverse reactive power protection (RQ) is used to prevent damage to generators.
The reverse reactive power element operates below an undervoltage element RQVBLK to ensure
that the system voltage is higher than a pre-determined setting. In order to prevent the operation at
generator start up, the reverse reactive power element is blocked according to the CB condition
setting [RQCB] and the timer setting [TCBRQ∗].
Both RQ1 and RQ2 have a programmable drop off/pickup(DO/PU) ratio.
Figure 2.1.54 shows the reverse reative power element characteristic.

Q(Var)

P(W)
0
RQ1

Figure 2.1.54 RQ Element Characteristic

 65 
 6 F 2 T 0 1 7 7

The reactive power phase caracteristic can be set current phase lead-lag by setting [Current] when
the [RQ-Current] is set to “Enable”. When [RQ-Current] is set to “Disable”, the reactive power
phase characteristic is the same as the measurement setting.
The RQ protection is enabled when three-phase current is introduced and the scheme switch
[APPLCT] is set to “3P” or “2P” and [APPLVT] is “3PN” or “3PP”.

Scheme Logic
Figure 2.1.55 and 2.1.56 show the scheme logic for the reverse power protection RQ1 and RQ2.
The reactive power phase characteristic can be selected to “Lead” or “Lag” by scheme switch
setting [Current] and [RQ-Current] (not shown in Figures 2.1.55 and 2.1.56).
The reverse reactive power elements RQ1 and RQ2 output RQ1 TRIP and RQ2 ALARM through
delayed pick-up timers TRQ1 and TRQ2.
This protection can be disabled by the scheme switch [RQ1EN] and [RQ2EN] or PLC signals RQ1
BLOCK and RQ2 BLOCK. Further this protection can block during the timer setting [TCBRQ1]
and [TCBRQ2] from the “CB CLOSE” signal being detected.
When the VTFS or CTFS detects a VT failure or a CT failure, it can be set to alarm and block the
RQ1 and RQ2 protection using scheme switches [VTF-RQ1BLK] and [VTF-RQ2BLK] or
[CTF-RQ1BLK] and [CTF- RQ2BLK] respectively.
The scheme switches [APPLCT] and [APPLVT] are available in which three-phase or two-phase
current protection and three-phase phase-ground or phase to phase voltage protection can be
selected. The RQ protection is enabled when three-phase or two-phase current and three-phase
voltage are introduced and [APPLCT] is set to “3P” or “2P” and [APPLVT] is “3PN” or “3PP”.
594 TRQ1
RQ1 0
& t 595
RQ1_TRIP
[RQ1-2F] 0.00 - 300.00s
+ "Block"
&
ICD ≥1
[RQVBLK
+ "Block"
&
UV
[RQ1EN]
+ "ON"
TCBRQ
t 0
CB CLOSE
≥1
0.0 - 60.0s
[RQCB]
+ "No use"

1618 RQ1_BLOCK 1
&
Non VTF
[VTF-RQ1BLK] ≥1
+ "OFF"
Non CTF
[CTF-RQ1BLK] ≥1
+ "OFF"

Figure 2.1.55 Reverse Reactive Power Protection RQ1 Scheme Logic

 66 
 6 F 2 T 0 1 7 7

596 TRQ2
RQ2 0
& t 597
RQ2_ALARM
[RQ2-2F 0.00 - 300.00s
+ "Block"
&
ICD ≥1
[RQVBLK
+ "Block"
&
UV
[RQ2EN]
+ "ON"
TCBRQ2
t 0
CB CLOSE
≥1
0.0 - 60.0s
[RQCB]
+ "No use"

1619 RQ2_BLOCK 1
&
Non VTF
[VTF-RQ2BLK] ≥1
+ "OFF"
Non CTF
[CTF-RQ2BLK] ≥1
+ "OFF"

Figure 2.1.56 Reverse Reactive Power Protection RQ2 Scheme Logic

Setting
The table below shows the setting elements necessary for the RQ protection and their setting
ranges.
Element Range Step Default Remarks
RQ1 -1500.0 – -5.0 Var 0.1Var -30.0Var RQ1 threshold setting
TRQ1 0.00 – 300.00 s 0.01 s 0.20 s RQ1 definite time setting.
TCBRQ1 0.0 – 60.0 s 0.1 s 5.0 s RQ1 block time setting. Required if [RQCB] = No use.
RQ1DPR 50 – 98 % 1% 95 % RQ1 DO/PU ratio setting.
RQ2 -1500.0 – -5.0 Var 0.1Var -30.0Var RQ2 threshold setting
TRQ2 0.00 – 300.00 s 0.01 s 1.00 s RQ2 definite time setting.
TCBRQ2 0.0 – 60.0 s 0.1 s 5.0 s RQ2 block time setting. Required if [RQCB] = No use.
RQ2DPR 50 – 98 % 1% 95 % RQ2 DO/PU ratio setting.
RQVBLK 40.0 – 100.0 V 0.1 V 40.0 V Undervoltage block threshold setting.
[RQ1EN] Off / On Off RQ1 Enable.
[CTF-RQ1BLK] Off / On Off CTF block enable for RQ1.
[VTF-RQ1BLK] Off / On Off VTF block enable for RQ1.
[RQ2EN] Off / On Off RQ2 Enable.
[CTF-RQ2BLK] Off / On Off CTF block enable for RQ2.
[VTF-RQ2BLK] Off / On Off VTF block enable for RQ2.
[RQCB] Use / Nouse Use RQCB block Enable.
[RQ-UVBLK] NA / Block NA UV block enable for RQ.
[RQ-Current] Disable / Enable Disable RQ-Current disable.
[Current] Lag / Lead Lead The Reactive power phase characteristic setting.
[APPLVT] Off / 3PN / 3PP 3PN Three-phase voltage input
[APPLCT] Off / 3P / 2P / 1P 3P Three-phase current input

 67 
 6 F 2 T 0 1 7 7

2.1.10 Current-change detector element

GRE140 provides two current-change elements (OCD), a decay element and a rise element. These
elements measure the current change,comparing the instantaneous current value and the average
of last 2 cycle current as shown Figure 2.1.57. The current change detector element are used for
blocking element, NOT trip element.

Inst. value

Average of last 2 cycle current

Figure 2.1.57 Current-Change detector Element

Scheme Logic
Figure 2.1.58 shows the scheme logic of the current-change detector element.
The OCD element is programmable for current decay, rise or both detection by the scheme switch
[OCDEN].
The current-change detector element OCD output can have a delayed drop-off by using the
off-delay timer TOCD.
The detection can be disabled by the scheme switches [OCDEN] or PLC logic signal OCD
BLOCK.
423 TOCD
A 422 0 t 421
424 ≥
OCD B & OCD_OPERATE
425 0.00 - 20.00s
C

"UP"
"DOWN"
"BOTH"
"NA"
+ 1
[OCDEN]

1614 OCD_BLOCK 1

Figure 2.1.58 Change-current detector OCD Scheme Logic

Setting
The setting elements necessary for the current-change detector and their setting ranges are shown
in the table below.
Element Range Step Default Remarks
OCD 0.10 – 5.00 A 0.01 A 1.00 A OCD element change current setting
TOCD 0.00 – 20.00 s 0.01 s 0s OCD element off-delay timer setting
OCDEN NA / UP / DOWN /BOTH NA OCD Enable

 68 
 6 F 2 T 0 1 7 7

2.1.11 CT Requirements

2.1.11.1 Phase Fault and Earth Fault Protection

Protection class current transformers are normally specified in the form shown below. The CT
transforms primary current within the specified accuracy limit, for primary current up to the
overcurrent factor, when connected to a secondary circuit of the given burden.

5 P 20 : 10VA

Accuracy Overcurrent Maximum Burden

Limit (%) Factor (at rated current)
Accuracy limit : Typically 5 or 10%. In applications where current grading is to be applied and
small grading steps are desirable, then a 5% CT can assist in achieving the necessary accuracy. In
less onerous applications, a limit of 10% may be acceptable.
Overcurrent factor : The multiple of the CT rating up to which the accuracy limit is claimed,
typically 10 or 20 times. A value of 20 should be specified where maximum fault current is high
and accurate inverse time grading is required. In applications where fault current is relatively low,
or where inverse time grading is not used, then an overcurrent factor of 10 may be adequate.
Maximum burden : The total burden calculated at rated secondary current of all equipment
connected to the CT secondary, including relay input burden, lead burden, and taking the CT’s
own secondary resistance into account. GRE140 has an extremely low AC current burden,
typically less than 0.1VA for a 1A phase input, allowing relatively low burden CTs to be applied.
Relay burden does not vary with settings.
If a burden lower than the maximum specified is connected, then the practical overcurrent factor
may be scaled accordingly. For the example given above, at a rated current of 1A, the maximum
value of CT secondary resistance plus secondary circuit resistance (RCT + R2) should be 10Ω. If
a lower value of, say, (RCT + R2) = 5Ω is applied, then the practical overcurrent factor may be
increased by a factor of two, that is, to 40A.
In summary, the example given of a 5P20 CT of suitable rated burden will meet most applications
of high fault current and tight grading margins. Many less severe applications may be served by
5P10 or 10P10 transformers.

2.1.11.2 Minimum Knee Point Voltage

An alternative method of specifying a CT is to calculate the minimum knee point voltage,
according to the secondary current which will flow during fault conditions:
Vk ≥ If (RCT + R2)
where:
Vk = knee point voltage
If = maximum secondary fault current
RCT = resistance of CT secondary winding
R2 = secondary circuit resistance, including lead resistance.
When using this method, it should be noted that it is often not necessary to transform the
maximum fault current accurately. The knee point should be chosen with consideration of the
settings to be applied and the likely effect of any saturation on protection performance. Further,
care should be taken when determining R2, as this is dependent on the method used to connect the
CTs (E.g. residual connection, core balanced CT connection, etc).

 69 
 6 F 2 T 0 1 7 7

2.1.11.3 Sensitive Earth Fault Protection

A core balance CT should be applied, with a minimum knee point calculated as described above.

2.1.11.4 Restricted Earth Fault Protection

High accuracy CTs should be selected with a knee point voltage Vk chosen according to the
equation:
Vk ≥ 2× Vs
where Vs is the differential stability voltage setting for the scheme.

 70 
 6 F 2 T 0 1 7 7

2.2 Overvoltage and Undervoltage Protection

2.2.1 Phase Overvoltage Protection

GRE140 provides four independent phase overvoltage elements each having a programmable
drop-off/pick-up (DO/PU) ratio. OV1 and OV2 are programmable for inverse time (IDMT) or
definite time (DT) operation. OV3 and OV4 have definite time characteristic only.
Figure 2.2.1 shows the characteristic of the overvoltage elements.

Pickup

Dropoff

0 V

Figure 2.2.1 Characteristic of Overvoltage Elements

The overvoltage protection element OV1 and OV2 have an IDMT characteristic defined by
equation (1) following the form described in IEC 60255-127:
  
 k  + c
t (G ) =
TMS ×     (1)
( )
a
 V − 1 
  Vs  
where:
t = operating time for constant voltage V (seconds),
V = energising voltage (V),
Vs = overvoltage setting (V),
TMS = time multiplier setting.
k, a, c = constants defining curve.

The IDMT characteristic is illustrated in Figure 2.2.2. In addition to the IDMT curve in Figure
2.2.2, a user configurable curve is available via scheme switches [OV1EN] and [OV2EN]. If
required, set the scheme switch [OV∗EN] to “C” and set the curve defining constants k, a, c. These
curves are defined in Table 2.2.1.

Table 2.2.1 Specification of Inverse Time Curves

Curve Description k a c
“IDMT” 1 1 0
“C” (User Configurable) 0.000 – 30.000 0.00 – 5.00 0.000 – 5.000
by 0.001 step by 0.01 step by 0.001 step

The OV3 and OV4 elements are used for definite time overvoltage protection.

 71 
 6 F 2 T 0 1 7 7

Definite time reset

The definite time resetting characteristic is applied to the OV1 and OV2 elements when the
inverse time delay is used.
If definite time resetting is selected, and the delay period is set to instantaneous, then no
intentional delay is added. As soon as the energising voltage falls below the reset threshold, the
element returns to its reset condition.
If the delay period is set to some value in seconds, then an intentional delay is added to the reset
period. If the energising voltage exceeds the setting for a transient period without causing tripping,
then resetting is delayed for a user-definable period. When the energising voltage falls below the
reset threshold, the integral state (the point towards operation that it has travelled) of the timing
function (IDMT) is held for that period.
This does not apply following a trip operation, in which case resetting is always instantaneous.
Both OV1 and OV2 have a programmable drop-off/pick-up (DO/PU) ratio.

Overvoltage Inverse Time

Curves
1000.000

100.000
Operating Time (secs)

10.000
TMS = 10

TMS = 5

TMS = 2

1.000
TMS = 1

0.100
1 1.5 2 2.5 3

Applied Voltage (x Vs)

Figure 2.2.2 IDMT Characteristic

Scheme Logic
Figures 2.2.3 to 2.2.6 show the scheme logic of the overvoltage protection OV1 to OV4.
The OV1 protection provides selective definite time or inverse time characteristic as shown in
Figure 2.2.3. The definite time protection is enabled by setting [OV1EN] to “DT”, and trip signal
OV1 TRIP is given through the delayed pick-up timer TOV1. The inverse time protection is
enabled by setting [OV1EN] to “IDMT”, and trip signal OV1 TRIP is given.
The OV2 protection also provides selective definite time or inverse time characteristic as shown in
Figure 2.2.4. The scheme logic of OV2 is the same as that of the OV1.

 72 
 6 F 2 T 0 1 7 7

Figure 2.2.5 and Figure 2.2.6 show the scheme logic of the definite time overvoltage protection
OV3 and OV4. The OV3 and OV4 elements give trip and alarm signals OV3_TRIP and
OV4_ALARM through the delayed pick-up timers TOV3 and TOV4 respectively.
The OV1 to OV4 protection can be disabled by the scheme switches [OV1EN] to [OV4EN] or the
PLC signals OV1_BLOCK to OV4_BLOCK respectively.
191 TOV1
A & & t 0 332
OV1-A_TRIP
OV1 B 192 ≥1

C 193 & & t 0 333

OV1-B_TRIP
≥1
194 & & t 0 334
A OV1-C_TRIP
195
≥1
OV1 B 0.00 - 300.00s
INST
196
C
& 331
≥1 OV1_TRIP
[OV1EN] "DT"
≥1
+ &
"IDMT"
1584 OV1_BLOCK 1 &

Figure 2.2.3 OV1 Overvoltage Protection

197 TOV2
A & & t 0 336
OV2-A_TRIP
OV2 B 198 ≥1

C 199 & & t 0 337

OV2-B_TRIP
≥1
512 & & t 0 338
A OV2-C_TRIP
513
≥1
OV2 B 0.00 - 300.00s
INST
514
C
& 335
≥1 OV2_TRIP
[OV2EN] "DT"
≥1
+ &
"IDMT"
1585 OV2_BLOCK 1 &

Figure 2.2.4 OV2 Overvoltage Protection

515 TOV3
A & & t 0 432
OV3-A_TRIP
OV3 B 515

C 515 & & t 0 433

OV3-B_TRIP

[OV3EN]
& & t 0 434
+ OV3-C_TRIP
0.00 - 300.00s 431
1586 OV3_BLOCK 1 ≥1 OV3_TRIP

Figure 2.2.5 OV3 Overvoltage Protection

 73 
 6 F 2 T 0 1 7 7

518 TOV4
A & & t 0 436
OV4-A_ALARM
OV4 B 519

C 520 & & t 0 437

OV4-B_ALARM

[OV4EN]
& & t 0 438
+ OV4-C_ALARM
0.00 - 300.00s 435
1587 OV4_BLOCK 1 ≥1 OV4_ALARM

Figure 2.2.6 OV4 Overvoltage Protection

Setting
The table shows the setting elements necessary for the overvoltage protection and their setting
ranges.
Element Range Step Default Remarks
PVT 1 - 20000 1 100 VT ratio for phase voltage (integer part)
PVT_DF .00 – .99 .01 .00 VT ratio of decimals for phase voltage
OV1 10.0 – 200.0 V 0.1 V 120.0 V OV1 threshold setting
TOV1M 0.05 – 100.00 0.01 10.00 OV1 time multiplier setting. Required if [OV1EN] = IDMT.
TOV1 0.00 – 300.00 s 0.01 s 0.1 s OV1 definite time setting. Required if [OV1EN] = DT.
TOV1R 0.0 – 300.0 s 0.1 s 0.0 s OV1 definite time delayed reset.
OV1DPR 10 – 98 % 1% 95 % OV1 DO/PU ratio setting.
OV2 10.0 – 200.0 V 0.1 V 140.0 V OV2 threshold setting
TOV2M 0.05 – 100.00 0.01 10.00 OV2 time multiplier setting. Required if [OV2EN] = IDMT.
TOV2 0.00 – 300.00 s 0.01 s 0.10 s OV2 definite time setting. Required if [OV2EN] = DT.
TOV2R 0.0 – 300.0 s 0.1 s 0.0 s OV2 definite time delayed reset.
OV2DPR 10 – 98 % 1% 95 % OV2 DO/PU ratio setting.
OV3 10.0 – 200.0 V 0.1 V 160.0 V OV3 threshold setting.
TOV3 0.00 – 300.00 s 0.01 s 0.10 s OV3 definite time setting.
OV3DPR 10 - 98 % 1% 95 % OV3 DO/PU ratio setting.
OV4 10.0 – 200.0 V 0.1 V 180.0 V OV4 threshold setting.
TOV4 0.00 – 300.00 s 0.01 s 0.10 s OV4 definite time setting.
OV4DPR 10 - 98 % 1% 95 % OV4 DO/PU ratio setting.
[OV1EN] Off/DT/IDMT/C Off OV1 Enable
[OV2EN] Off/DT/IDMT/C Off OV2 Enable
[OV3EN] Off / On Off OV3 Enable
[OV4EN] Off / On Off OV4 Enable

 74 
 6 F 2 T 0 1 7 7

2.2.2 Phase Undervoltage Protection

GRE140 provides four independent phase undervoltage elements. UV1 and UV2 are
programmable for inverse time (IDMT) or definite time (DT) operation. UV3 and UV4 have
definite time characteristics only.
Figure 2.2.7 shows the characteristic of the undervoltage elements.

0 V

Figure 2.2.7 Characteristic of Undervoltage Elements

The undervoltage protection element UV1 has an IDMT characteristic defined by equation (2)
following the form described in IEC 60255-127:
  
 k  + c
t (G ) =
TMS ×   a   (2)
 1 − V
 ( )
Vs  

where:
t = operating time for constant voltage V (seconds),
V = energising voltage (V),
Vs = undervoltage setting (V),
TMS = time multiplier setting.
k, a, c = constants defining curve.

The IDMT characteristic is illustrated in Figure 2.2.8. In addition to the IDMT curve in Figure
2.2.8, a user configurable curve is available via scheme switches [UV1EN] and [UV2EN]. If
required, set the scheme switch [UV∗EN] to “C” and set the curve defining constants k, a, c. These
curves are defined in Table 2.2.1.
The UV3 and UV4 elements are used for definite time overvoltage protection.

Definite time reset

The definite time resetting characteristic is applied to the UV1 and UV2 elements when the
inverse time delay is used.
If definite time resetting is selected, and the delay period is set to instantaneous, then no
intentional delay is added. As soon as the energising voltage rises above the reset threshold, the
element returns to its reset condition.
If the delay period is set to some value in seconds, then an intentional delay is added to the reset
period. If the energising voltage is below the undervoltage setting for a transient period without
causing tripping, then resetting is delayed for a user-definable period. When the energising
voltage rises above the reset threshold, the integral state (the point towards operation that it has
travelled) of the timing function (IDMT) is held for that period.
This does not apply following a trip operation, in which case resetting is always instantaneous.

 75 
 6 F 2 T 0 1 7 7

Undervoltage Inverse Time

Curves
1000.000

100.000

Operating Time (secs)

TMS = 10

10.000

TMS = 5

TMS = 2

TMS = 1

1.000
0 0.2 0.4 0.6 0.8 1
Applied Voltage (x Vs)

Figure 2.2.8 IDMT Characteristic

Scheme Logic
Figures 2.2.9 to 2.2.12 show the scheme logic of the undervoltage protection UV1 to UV4.
The UV1 protection provides a selective definite time or inverse time characteristic as shown in
Figure 2.2.8. The definite time protection is enabled by setting [UV1EN] to “DT”, and trip signal
UV1_TRIP is given through the delayed pick-up timer TUV1. The inverse time protection is
enabled by setting [UV1EN] to “IDMT”, and trip signal UV1_TRIP is given.
The UV2 protection also provides a selective definite time or inverse time characteristic as shown
in Figure 2.2.10. The scheme logic of UV2 is the same as that of the UV1.
Figure 2.2.11 and Figure 2.2.12 show the scheme logic of the definite time undervoltage
protection UV3 and UV4. The UV3 and UV4 elements give trip and alarm signals UV3_TRIP and
UV4_ALARM through the delayed pick-up timers TUV3 and TUV4 respectively.
The UV1 to UV4 protection can be disabled by the scheme switches [UV1EN] to [UV4EN] or the
PLC signals UV1_BLOCK to UV4_BLOCK respectively.

In addition, there is a user programmable voltage threshold VBLK. If all measured phase voltages
drop below this setting, then UV1 to UV4 are prevented from operating. This function can be
blocked by the scheme switch [VBLKEN]. The [VBLKEN] should be set to “OFF” (not used)
when the UV elements are used as fault detectors, and set to “ON” (used) when used for load
shedding.
Note: The VBLK must be set lower than any other UV setting values.
Further, these protection can be blocked when VT failure (VTF) is detected.

 76 
 6 F 2 T 0 1 7 7

201 TUV1
A & & t 0 342
UV1-A_TRIP
UV1 202 ≥1
B
203 & & t 0 343
C UV1-B_TRIP
≥1
204
A & & t 0 344
UV1-C_TRIP
UV1 B 205 ≥1
INST 0.00 - 300.00s
206
C
UVBLK 341
566 217
≥1 UV1_TRI
A & P
567 1 NON
UVBLK B & UVBLK
568 &
C
[VBLKEN]
+ &
"ON"
[UVTST]
+ "DT"
"OFF" [UV1EN]
≥1
+
"IDMT"
NON VTF
≥1 &
[VTF UV1-BLK]
+
"OFF"
1588 UV1_BLOCK 1

Figure 2.2.9 UV1 Undervoltage Protection

207 TUV2
A & & t 0 346
UV2-A_TRIP
UV2 208 ≥1
B
209 & & t 0 347
C UV2-B_TRIP
≥1
522
A & & t 0 348
UV2-C_TRIP
UV2 B 523 NON ≥1
INST UVBLK 0.00 - 300.00s
524
C "DT"
[UV2EN]
≥1 ≥1
345
UV2_TRI
+ & P
"IDMT"
NON VTF &
≥1 &
[VTF UV2-BLK]
+ &
"OFF"
1589 UV2_BLOCK 1

Figure 2.2.10 UV2 Undervoltage Protection

525 TUV3
A & & t 0 440
526 UV3-A_TRIP
UV3 B
527 t 0 441
C & & UV3-B_TRIP

[UV3EN]
+ & & t 0 442
UV3-C_TRIP
"ON"
NON BLK 0.00 - 300.00s
439
NON VTF ≥1 UV3_TRIP
≥1 &
[VTF_UV3-BLK]
+
"OFF"
1590 UV3_BLOCK 1

Figure 2.2.11 UV3 Undervoltage Protection

 77 
 6 F 2 T 0 1 7 7

528 TUV4
A & & t 0 444
529 UV4-A_ALARM
UV4 B
530 t 0 445
C & & UV4-B_ALARM

[UV4EN]
+ & & t 0 446
UV4-C_ALARM
"ON"
NON BLK 0.00 - 300.00s
443
NON VTF ≥1 UV4_ALARM
≥1 &
[VTF_UV4-BLK]
+
"OFF"
1591 UV4_BLOCK 1

Figure 2.2.12 UV4 Undervoltage Protection

Setting
The table shows the setting elements necessary for the undervoltage protection and their setting
ranges.
Element Range Step Default Remarks
UV1 5.0 – 130.0 V 0.1 V 20.0 V UV1 threshold setting
TUV1M 0.05– 100.00 0.01 10.00 UVI time multiplier setting. Required if [UV1EN] = IDMT.
TUV1 0.00 – 300.00 s 0.01 s 0.00 s UV1 definite time setting. Required if [UV1EN] = DT.
TUV1R 0.0 – 300.0 s 0.1 s 0.0 s UV1 definite time delayed reset.
UV2 5.0 – 130.0 V 0.1 V 15.0 V UV1 threshold setting
TUV2M 0.05– 100.00 0.01 10.00 UVI time multiplier setting. Required if [UV2EN] = IDMT.
TUV2 0.00 – 300.00 s 0.01 s 0.10 s UV1 definite time setting. Required if [UV2EN] = DT.
TUV2R 0.0 – 300.0 s 0.1 s 0.0 s UV1 definite time delayed reset.
UV3 5.0 – 130.0 V 0.1 V 10.0 V UV3 threshold setting.
TUV3 0.00 – 300.00 s 0.01 s 0.10 s UV3 definite time setting.
UV4 5.0 – 130.0 V 0.1 V 20.0 V UV4 threshold setting.
TUV4 0.00 – 300.00 s 0.01 s 0.10 s UV4 definite time setting.
VBLK 5.0 - 20.0 V 0.1 V 10.0 V Undervoltage block threshold setting.
[UV1EN] Off/ DT/ IDMT/ DT UV1 Enable
C
[VTF UV1BLK] Off / On Off UV1 VTF block
[VBLKEN] Off / On Off UV block Enable
[UV2EN] Off/ DT/ IDMT/ DT UV2 Enable
C
[VTF UV2BLK] Off / On Off UV2 VTF block
[UV3EN] Off / On Off UV3 Enable
[VTF UV3BLK] Off / On Off UV3 VTF block
[UV4EN] Off / On Off UV4 Enable
[VTF UV4BLK] Off / On Off UV4 VTF block

 78 
 6 F 2 T 0 1 7 7

2.2.3 Zero Phase Sequence Overvoltage Protection

The zero phase sequence overvoltage protection (ZOV) is applied for earth fault detection on
unearthed, resistance-earthed system or on ac generators.
The ZOV protection is available using the [APPLVE] setting. When the [APPLVE] setting is
“On”, V0 is measured directly in the form of the system voltage. When the setting is “Off”, V0 is
calculated from the three measured phase voltages.
The low voltage settings which may be applied make the ZOV element susceptible to any 3rd
harmonic component which may be superimposed on the input signal. Therefore, a 3rd harmonic
filter is provided to suppress such superimposed components.

For earth fault detection, the following two methods are in general use.
• Measuring the zero sequence voltage produced by a VT residual connection (broken-delta
connection) as shown in Figure 2.2.13.
• Measuring the residual voltage across an earthing transformer as shown in Figure 2.2.14.
A B C

GRE140
V0

Figure 2.2.13 Earth Fault Detection on Unearthed System

A B

GRE140
V0

Resistor

Figure 2.2.14 Earth Fault Detection on Generator

Two independent elements ZOV1 and ZOV2 are provided. These elements are programmable for
definite time delayed or inverse time delayed (IDMT) operation.

The inverse time characteristic is defined by equation (3) following the form described in IEC
60255-127:

 79 
 6 F 2 T 0 1 7 7

  
 k  + c
t (G ) =
TMS ×    
( )
a (3)
 V − 1 
  Vs  
where:
t = operating time for constant voltage V0 (seconds),
V0 = Zero sequence voltage (V),
Vs = Zero sequence overvoltage setting (V),
TMS = time multiplier setting.
k, a, c = constants defining curve.

The IDMT characteristic is illustrated in Figure 2.2.15. In addition to the IDMT curve in Figure
2.2.15, a user configurable curve is available via scheme switches [ZOV1EN] and [ZOV2EN]. If
required, set the scheme switch [ZOV∗EN] to “C” and set the curve defining constants k, a, c.
These curves are defined in Table 2.2.1.

ZOV Overvoltage Inverse

Time Curves

1000.000

100.000
Operating Time (secs)

10.000

1.000
TMS = 10

TMS = 5

TMS = 2
0.100
TMS = 1

0.010
0 5 10 15 20

Applied Voltage (x Vs)

Figure 2.2.15 IDMT Characteristic for ZOV

Definite time reset

A definite time reset characteristic is applied when the inverse time delay is used. Its operation is
identical to that for the phase overvoltage protection.

 80 
 6 F 2 T 0 1 7 7

Scheme Logic
Figures 2.2.16 and 2.2.17 show the scheme logic of the zero-phase sequence overvoltage
protection. Two zero-phase sequence overvoltage elements ZOV1 and ZOV2 with independent
thresholds output trip signals ZOV1 TRIP and ZOV2 TRIP via delayed pick-up timers TZOV1
and TZOV2.
The tripping can be disabled by the scheme switches [ZOV1EN] and [ZOV2EN] or PLC signals
ZOV1 BLOCK and ZOV2 BLOCK.
Further, this protection can be blocked when a VT failure (VTF) is detected.
211 TZOV1
ZOV1 t 0
& & 351
ZOV1 212 ≥1 ZOV1 TRIP
INST 0.00 - 300.00s
"DT"
[ZOV1EN] ≥1
+ &
"IDMT"
1592 ZOV1_BLOCK 1
&
NON VTF
≥1
[VTF_ZV1-BLK]
+
"OFF"

Figure 2.2.16 ZOV1 Overvoltage Protection

213 TZOV2
ZOV2 t 0
& & 352
ZOV2 223 ≥1 ZOV2_ALARM
INST 0.00 - 300.00s
"DT"
[ZOV2EN] ≥1
+ &
"IDMT"
1593 ZOV2_BLOCK 1
&
NON VTF
≥1
[VTF_ZV2-BLK]
+
"OFF"

Figure 2.2.17 ZOV2 Overvoltage Protection

 81 
 6 F 2 T 0 1 7 7

Setting
The table below shows the setting elements necessary for the zero sequence overvoltage
protection and their setting ranges.
Element Range Step Default Remarks
VEVT 1 – 20000 1 100 VT ratio for zero phase voltage (Integer part)
VEVT_DF .00 – .99 .01 .00 VT ratio of decimals for zero phase voltage
ZOV1 1.0 - 160.0 V 0.1V 20.0 V ZOV1 threshold setting (V0) for tripping.
TZOV1M 0.05 – 100.00 0.01 10.00 ZOV1 time multiplier setting. Required if [ZOV1EN]=IDMT.
TZOV1 0.00 – 300.00 s 0.01 s 0.00 s ZOV1 definite time setting. Required if [ZOV1EN]=DT.
TZOV1R 0.0 – 300.0 s 0.1 s 0.0 s ZOV1 definite time delayed reset.
ZOV2 1.0 - 160.0 V 0.1V 40.0 V ZOV2 threshold setting (V0) for alarming.
TZOV2M 0.05 – 100.00 0.01 10.00 ZOV2 time multiplier setting. Required if [ZOV2EN]=IDMT.
TZOV2 0.00 – 300.00 s 0.01 s 0.00 s ZOV2 definite time setting. Required if [ZOV2EN]=DT.
TZOV2R 0.0 – 300.0 s 0.1 s 0.0 s ZOV2 definite time delayed reset.
[ZOV1EN] Off /DT/ IDMT/ DT ZOV1 Enable
C
[VTF ZV1BLK] Off / On Off ZOV1 VTF block
[ZOV2EN] Off /DT/ IDMT/ Off ZOV2 Enable
C
[VTF ZV2BLK] Off / On Off ZOV2 VTF block

 82 
 6 F 2 T 0 1 7 7

2.2.4 Negative Phase Sequence Overvoltage Protection

The negative phase sequence overvoltage protection is used to detect voltage unbalance
conditions such as reverse-phase rotation, unbalanced voltage supply etc.
The NOV protection is applied to protect three-phase motors from the damage which may be
caused by voltage unbalance. Unbalanced voltage supply to motors due to a phase loss can lead to
increases in the negative sequence voltage.
The NOV protection is also applied to prevent the starting of the motor in the wrong direction, if
the phase sequence is reversed.
Two independent elements NOV1 and NOV2 are provided. The elements are programmable for
definite time delayed or inverse time delayed (IDMT) operation.
The inverse time characteristic is defined by equation (4) following the form described in IEC
60255-127.

  
 k  + c
t (G ) =
TMS ×    
( )
a (4)
 V − 1 
  Vs  
where:
t = operating time for constant voltage V2 (seconds),
V2 = Negative sequence voltage (V),
Vs = Negative sequence overvoltage setting (V),
TMS = time multiplier setting.
k, a, c = constants defining curve.

The IDMT characteristic is illustrated in Figure 2.2.18. In addition to the IDMT curve in Figure
2.2.18, a user configurable curve is available via scheme switches [NOV1EN] and [NOV2EN]. If
required, set the scheme switch [NOV∗EN] to “C” and set the curve defining constants k, a, c.
These curves are defined in Table 2.2.1.

 83 
 6 F 2 T 0 1 7 7

NOV Overvoltage
Inverse Time Curves
1000.000

100.000

Operating Time (secs)

10.000

1.000 TMS = 10

TMS = 5

TMS = 2
0.100
TMS = 1

0.010
0 5 10 15 20
Applied Voltage (x Vs)

Figure 2.2.18 IDMT Characteristic for NOV

Definite time reset
A definite time reset characteristic is applied to the NOV1 element when the inverse time delay is
used. Its operation is identical to that for the phase overvoltage protection.

Scheme Logic
Figures 2.2.19 and 2.2.20 show the scheme logic of the negative sequence overvoltage protection.
Two negative sequence overvoltage elements NOV1 and NOV2 with independent thresholds
output trip signals NOV1 TRIP and NOV2 TRIP via delayed pick-up timers TNOV1 and TNOV2.
The tripping can be disabled by the scheme switches [NOV1EN] and [NOV2EN] or PLC signals
NOV1 BLOCK and NOV2 BLOCK.
Further, this protection can be blocked when VT failure (VTF) is detected.

 84 
 6 F 2 T 0 1 7 7

214 TNOV1
NOV1 t 0
& & 353
NOV1 215 ≥1 NOV1 TRIP
INST 0.00 - 300.00s
"DT"
[NOV1EN] ≥1
+ &
"IDMT"
1596 NOV1_BLOCK 1
&
NON VTF
≥1
[VTF_NV1-BLK]
+
"OFF"

Figure 2.2.19 NOV1 Overvoltage Protection

216 TNOV2
NOV2 t 0
& & 354
NOV2 224 ≥1 NOV2_ALARM
INST 0.00 - 300.00s
"DT"
[NOV2EN] ≥1
+ &
"IDMT"
1597 NOV2_BLOCK 1
&
NON VTF
≥1
[VTF_NV2-BLK]
+
"OFF"

Figure 2.2.20 NOV2 Overvoltage Protection

Setting
The table below shows the setting elements necessary for the negative sequence overvoltage
protection and their setting ranges.
The delay time setting TNOV1 and TNOV2 is added to the inherent delay of the measuring
elements NOV1 and NOV2. The minimum operating time of the NOV elements is around 200ms.
Element Range Step Default Remarks
NOV1 1.0 - 160.0 V 0.1V 20.0 V NOV1 threshold setting for tripping.
TNOV1M 0.05 – 100.00 0.01 10.00 NOV1 time multiplier setting. Required if [NOV1EN]=IDMT.
TNOV1 0.00 – 300.00 s 0.01 s 0.00 s NOV1 definite time setting. Required if [NOV1EN]=DT.
TNOV1R 0.0 – 300.0 s 0.1 s 0.0 s NOV1 definite time delayed reset.
NOV2 1.0 - 160.0 V 0.1V 40.0 V NOV2 threshold setting for alarming.
TNOV2M 0.05 – 100.00 0.01 10.00 NOV2 time multiplier setting. Required if [NOV2EN]=IDMT.
TNOV2 0.00 – 300.00 s 0.01 s 0.00 s NOV2 definite time setting. Required if [NOV2EN]=DT.
TNOV2R 0.0 – 300.0 s 0.1 s 0.0 s NOV2 definite time delayed reset.
[NOV1EN] Off /DT/ IDMT/ C Off NOV1 Enable
[NOV2EN] Off /DT/ IDMT/ C Off NOV2 Enable

 85 
 6 F 2 T 0 1 7 7

2.3 Frequency Protection

Providing four-stage frequency protection, GRE140 incorporates dedicated frequency measuring
elements and scheme logic for each stage. Each stage is programmable for underfrequency,
overfrequency or frequency rate-of-change protection.
Underfrequency protection is provided to maintain the balance between power generation
capability and loads. It is also used to maintain the frequency within the normal range by load
shedding.
Overfrequency protection is typically applied to protect synchronous machines from possible
damage due to overfrequency conditions.
Frequency rate of change protection is applied to ensure that load shedding occurs very quickly
when the frequency change is very rapid.
A-phase to B-phase voltage is used to detect frequency.

2.3.1 Frequency element

Underfrequency element UF operates when the power system frequency falls under the setting
value.
Overfrequency element OF operates when the power system frequency rises above the setting
value.
These elements measure the frequency and check for underfrequency or overfrequency every 5
ms. They operate when the underfrequency or overfrequency condition is detected 16 consecutive
times.
The outputs of both the UF and OF elements is invalidated by undervoltage block element
(FRQBLK) operation during an undervoltage condition.
Figure 2.3.1 shows the characteristics for the UF and OF elements.

Figure 2.3.1 Underfrequency and Overfrequency Element

Scheme Logic
Figure 2.3.2 shows the scheme logic for the frequency protection in stage 1. The frequency
element FRQ1 can output a trip command under the condition that the system voltage is higher
than the setting of the undervoltage element FRQBLK (FRQBLK=1). The FRQ1 element is
programmable for underfrequency or overfrequency operation by the scheme switch [FRQ1EN].
The tripping can be disabled by the scheme switches [FRQ1EN] or PLC logic signal FRQ1
BLOCK.
The stage 2 (FRQ2) to stage 4 (FRQ4) use the same logic as that for FRQ1

 86 
 6 F 2 T 0 1 7 7

TFRQ1
218 t 0 356
OF FRQ1_TRIP
FRQ1 & ≥1 & &
0.00 - 300.00s
1
UF
&
TFRQ2
219 t 0 357
OF FRQ2_TRIP
FRQ2 & ≥1 & &
0.00 - 300.00s
1
UF
&
TFRQ3
220 t 0 358
OF FRQ3_TRIP
FRQ3 & ≥1 & &
0.00 - 300.00s
1
UF
&
TFRQ4
221 t 0 359
OF FRQ4_TRIP
FRQ4 & ≥1 & &
0.00 - 300.00s
1
UF
&
222
FRQBLK 1 NON FRQBLK

[FRQ1EN] "OF"
"UF" ≥1
+
[FRQ2EN] "OF"
"UF" ≥1
+
[FRQ3EN] "OF"
"UF" ≥1
+
[FRQ4EN] "OF"
"UF" ≥1
+
1600 FRQ1_BLOCK 1

1601 FRQ2_BLOCK 1

1602 FRQ3_BLOCK 1

1603 FRQ4_BLOCK 1

Figure 2.3.2 Scheme Logic for Frequency Protection

Setting
The setting elements necessary for the frequency protection and their setting ranges are shown in
the table below.
Element Range Step Default Remarks
FRQ1 -10.00 – +10.00 Hz 0.01 Hz -1.00 Hz FRQ1 frequency element setting
TFRQ1 0.00 – 300.00 s 0.01 s 1.00 s Timer setting of FRQ1
FRQ2 -10.00 – +10.00 Hz 0.01 Hz -1.00 Hz FRQ2 frequency element setting
TFRQ2 0.00 – 300.00 s 0.01 s 1.00 s Timer setting of FRQ2
FRQ3 -10.00 – +10.00 Hz 0.01 Hz -1.00 Hz FRQ3 frequency element setting
TFRQ3 0.00 – 300.00 s 0.01 s 1.00 s Timer setting of FRQ3
FRQ4 -10.00 – +10.00 Hz 0.01 Hz -1.00 Hz FRQ4 frequency element setting
TFRQ4 0.00 – 300.00 s 0.01 s 1.00 s Timer setting of FRQ4
FVBLK 40.0 – 100.0 V 0.1 V 40.0 V UV block setting
FRQ1EN Off / OF / UF Off FRQ1 Enable
FRQ2EN Off / OF / UF Off FRQ2 Enable
FRQ3EN Off / OF / UF Off FRQ3 Enable
FRQ4EN Off / OF / UF Off FRQ4 Enable

 87 
 6 F 2 T 0 1 7 7

2.3.2 Frequency rate-of-change element

The frequency rate-of-change element calculates the gradient of frequency change (df/dt).
GRE140 provides two rate-of-change elements, a frequency decay rate element (D) and a
frequency rise rate element (R). These elements measure the change in frequency (Δf) over a time
interval (Δt=100ms), as shown Figure 2.3.3 and calculate the Δf/Δt every 5 ms. They operate
when the frequency change exceeds the setting value 50 consecutive times.
Both D and R elements output is invalidated by undervoltage block element (FRQBLK) operation
during undervoltage condition.

Hz
Δf

Δt

sec

Figure 2.3.3 Frequency Rate-of-Change Element

Scheme Logic
The stage 2 (FRQ2) to stage 4 (FRQ4) use the same logic as that for FRQ1.
Figure 2.3.4 shows the scheme logic of the frequency rate-of-change protection in stage 1. The
frequency rate-of-change element DFRQ1 can output a trip command under the condition that the
system voltage is higher than the setting of the undervoltage element FRQBLK (FRQBLK=1).
The DFRQ1 element is programmable for frequency decay rate or frequency rise rate operation by
the scheme switch [DFRQ1EN].
The tripping can be disabled by the scheme switches [DFRQ1EN] or PLC logic signal DFRQ1
BLOCK.
The stage 2 (DFRQ2) to stage 4 (DFRQ4) are the same logic of DFRQ1.
Setting
The setting elements necessary for the frequency protection and their setting ranges are shown in
the table below.
Element Range Step Default Remarks
DFRQ1 0.1 – 15.0 Hz/s 0.1 Hz/s 0.5 Hz/s DFRQ1 element setting
DFRQ2 0.1 – 15.0 Hz/s 0.1 Hz/s 0.5 Hz/s DFRQ2 element setting
DFRQ3 0.1 – 15.0 Hz/s 0.1 Hz/s 0.5 Hz/s DFRQ3 element setting
DFRQ4 0.1 – 15.0 Hz/s 0.1 Hz/s 0.5 Hz/s DFRQ4 element setting
FVBLK 40.0 – 100.0 V 0.1 V 40.0 V UV block setting
DFRQ1EN Off / R / D Off DFRQ1 Enable
DFRQ2EN Off / R / D Off DFRQ2 Enable
DFRQ3EN Off / R / D Off DFRQ3 Enable
DFRQ4EN Off / R / D Off DFRQ4 Enable

 88 
 6 F 2 T 0 1 7 7

225 360
OF DFRQ1_TRIP
DFRQ1 & ≥1 & &
1
UF
&
226 361
OF DFRQ2_TRIP
DFRQ2 & ≥1 & &
1
UF
&
227 362
OF DFRQ3_TRIP
DFRQ3 & ≥1 & &
1
UF
&
228 363
OF DFRQ4_TRIP
DFRQ4 & ≥1 & &
1
UF
&
222
FRQBLK 1 NON FRQBLK

[DFRQ1EN] "R"
"D" ≥1
+
[DFRQ2EN] "R"
"D" ≥1
+
[DFRQ3EN] "R"
"D" ≥1
+
[DFRQ4EN] "R"
"D" ≥1
+
1576 DFRQ1_BLOCK 1

1577 DFRQ2_BLOCK 1

1578 DFRQ3_BLOCK 1

1579 DFRQ4_BLOCK 1

Figure 2.3.4 Scheme Logic of Frequency Rate-of-change Protection

2.3.3 Trip Circuit

The trip circuit of the frequency protection is configured with the combination of FRQ trip and
DFRQ trip. The trip circuit is configured by the PLC function as shown in Figure 2.3.5.

FRQ1 TRIP 1680 FRQ_S1_TRIP

≥1
DFRQ1 TRIP ≥1 355
FRQ_TRIP
FRQ2 TRIP ≥1 1681 FRQ_S2_TRIP
DFRQ2 TRIP
FRQ3 TRIP 1682 FRQ_S3_TRIP
≥1
DFRQ3 TRIP
FRQ4 TRIP ≥1 1683 FRQ_S4_TRIP
DFRQ4 TRIP
By PLC

2.3.5 Frequency Protection Trip circuit

 89 
 6 F 2 T 0 1 7 7

2.4 Trip, Alarm and Pick-up Signal Output

GRE140 provides various trip and alarm signal outputs such as three-phase and single-phase trips
and alarms for each protection. Figures 2.4.1 shows the overall trip and alarm signals for each
protection and pick-up singals for IEC 60870-5-103 communication.
GRE140 provides 4 (model 400/420), 10 (model 401/421) or 16 (model 402/422) auxiliary relays
for binary outputs as described in Section 3.2.7. These auxiliary relays can be assigned to any
protection outputs by the PLC function.
After the trip signal disappears by clearing the fault, the reset time of the tripping output relay can
be programmed by PLC function. The setting is respective for each output relay.
When the relay is latched, it can be reset with the RESET key on the relay front panel or a binary
input by PLC signal. This resetting resets all the output relays collectively.
For the tripping output relay, a check must be made to ensure that the tripping circuit is open by
monitoring the status of a circuit breaker auxiliary contact prior to the resetting tripping output
relay, in order to prevent the tripping output relay from directly interrupting the circuit breaker
tripping coil current.

OC1 TRIP
OC2 TRIP
OC3 TRIP ≥1 371
≥1 GEN_TRIP
EF1 TRIP
EF2 TRIP
EF3 TRIP

SEF1-S1 TRIP
SEF2 TRIP ≥1
SEF3 TRIP
NOC1 TRIP

UC1 TRIP
THM TRIP ≥1
BCD TRIP

OV1 TRIP
OV2 TRIP
OV3 TRIP
≥1
UV1 TRIP
UV2 TRIP
UV3 TRIP
ZOV1 TRIP
NOV1 TRIP
RP1 TRIP
≥1
RQ1 TRIP

2.4.1 Tripping, Alarm and Pick-up Outputs

 90 
 6 F 2 T 0 1 7 7

OC1-A TRIP
≥1
OC2-A TRIP ≥1 372
OC3-A TRIP ≥1 GEN_TRIP-A

UC1-A TRIP

OV1-A TRIP
OV2-A TRIP
OV3-A TRIP ≥1
UV1-A TRIP
UV2-A TRIP
UV3-A TRIP

OC1-B TRIP
≥1
OC2-B TRIP ≥1 373
≥1 GEN_TRIP-B
OC3-B TRIP
UC1-B TRIP

OV1-B TRIP
OV2-B TRIP
OV3-B TRIP ≥1
UV1-B TRIP
UV2-B TRIP
UV3-B TRIP

OC1-C TRIP
≥1
OC2-C TRIP ≥1 374
OC3-C TRIP ≥1 GEN_TRIP-C
UC1-C TRIP

OV1-C TRIP
OV2-C TRIP
OV3-C TRIP ≥1
UV1-C TRIP
UV2-C TRIP
UV3-C TRIP

EF1 TRIP
≥1
EF2 TRIP ≥1 375
≥1 GEN. TRIP-N
EF3 TRIP

SEF1-S1_TRIP
≥1
SEF2_TRIP
SEF3_TRIP
ZOV1_TRIP

2.4.1 Tripping, Alarm and Pick-up Outputs (cont'd)

 91 
 6 F 2 T 0 1 7 7

OC4 ALARM
≥1
EF4 ALARM 380
≥1 GEN_ALARM
SEF4 ALARM ≥1
NOC2 ALARM

UC2 ALARM
≥1
THM ALARM

OV4 ALARM
UV2 ALARM ≥1
ZOV2 ALARM
NOV2 ALARM
RP2 ALARM ≥1
RQ2 ALARM

OC4-A ALARM
UC2-A ALARM ≥1 381
GEN_ALARM-A
≥1

OV4-A ALARM
UV4-A ALARM ≥1

OC4-B ALARM
UC2-B ALARM ≥1 382
GEN_ALARM-B
≥1

OV4-B ALARM
UV4-B ALARM ≥1

OC4-C ALARM
UC2-C ALARM ≥1 383
GEN_ALARM-C
≥1

OV4-C ALARM
UV4-C ALARM ≥1

EF4 ALARM
SEF4 ALARM ≥1 384
GEN_ALARM-N
ZOV2 ALARM

2.4.1 Tripping, Alarm and Pick-up Outputs (cont’d)

 92 
 6 F 2 T 0 1 7 7

OC1-A
OC1-B
OC1-C
OC2-A
1279
OC2-B General Pick-up
OC2-C ≥1 ≥1
OC3-A
OC3-B
OC3-C
UC1-A
UC1-B
UC1-C

OV1-A
OV1-B
OV1-C
OV2-A
≥1
OV2-B
OV2-C
OV3-A
OV3-B
OV3-C

UV1-A
UV1-B
UV1-C
UV2-A
UV2-B ≥1
UV2-C
UV3-A
UV3-B
UV3-C

EF1
EF2
EF3
≥1
SEF1
SEF2
SEF3

THM
NOC1
BCD
CBF-A ≥1
CBF-B
CBF-C
NOV1

FRQ1
FRQ2
FRQ3
FRQ4 ≥1
DFRQ1
DFRQ2
DFRQ3
DFRQ4

RP1
RQ1
EXST ≥1
STRT
LKRT

2.4.1 Tripping, Alarm and Pick-up Outputs (cont’d)

 93 
 6 F 2 T 0 1 7 7

2.5 Autoreclose
The GRE140 provides a multi-shot (five shots) autoreclosing scheme applied for one-circuit
breaker:
• Three phase autoreclosing scheme for all shots
• Integrated synchronism check function for autoreclosing
• Autoreclosing counter
Autoreclosing (ARC) can be initialized by OC1 to OC4, EF1 to EF4, SEF1-S1 to SEF4 trip
signals or external trip signals via PLC signals EXT_∗∗∗∗∗, as determined by scheme switches
[∗∗∗∗-INIT]. Trip signals are selected to be used or not used for ARC, by setting [∗∗∗∗-INIT] to
“On” or “NA” respectively. If a trip signal is used to block ARC, then [∗∗∗∗-INIT] is set to
“BLK”. ARC can also be blocked by the PLC signal ARC_BLOCK.
Three-phase autoreclosing is provided for all shots, regardless of whether the fault is single-phase
or multi-phase. Autoreclosing can be programmed to provide any number of shots, from one to
five. In each case, if the first shot fails, then all subsequent shots apply three-phase tripping and
reclosing.
To disable autoreclosing, scheme switch [ARCEN] is set to "Off".
The GRE140 also provides a manual close function. The manual close can be performed by setting
the PLC signal MANUAL_CLOSE.

2.5.1 Scheme Logic

Figure 2.5.1 shows the simplified scheme logic for the autoreclose. Autoreclose becomes ready
when the circuit breaker is closed and ready for autoreclose (CB READY=1), the on-delay timer
TRDY is picked up, and the [ARCEN] is set to "ON". TRDY is used to determine the reclaim time.
If the autoreclose is ready, then reclosing can be activated by the PLC signal ARC_INIT,
EXT_TRIP-A, EXT_TRIP-B, EXT_TRIP-C or EXT_TRIP, etc.
Auto-reclose conditions, such as voltage and synchronism check VCHK, etc., can be assigned by
PLC signals ARC-S∗_COND.
Once autoreclose is activated, it is maintained by a flip-flop circuit until one reclosing cycle is
completed.
Autoreclose success (ARC SUCCESS) or fail (ARC FAIL) can be displayed as an event record
message using the event record setting.
Autoreclose shot output can be test from Test screen SHOTNUM as “SN TEST” signal.
Multi-shot autoreclose
Regardless of the tripping mode, three-phase reclosing is performed. If the [ARCEN] is set to
"On", the dead time counter TD1 for three-phase reclosing is started. After the dead time has
elapsed, reclosing command ARC-SHOT is initiated.
Multi-shot autoreclose can be executed up to four times after the first-shot autoreclose fails. The
multi-shot mode, one to five shots, is set with the scheme switch [ARC∗-NUM].
During multi-shot reclosing, the dead time counter TD2 for the second shot is activated if the first
shot autoreclose is performed, but tripping occurs again. Second shot autoreclose is performed
after the period of time set on TD2 has elapsed. At this time, outputs of the step counter are: SP1 =
1, SP2 = 0, SP3 = 0, SP4 = 0 and SP5 = 0.
Autoreclose is completed at this step if the two shots mode is selected for the multi-shot mode. In
this case, tripping following a "reclose-onto-a-fault" becomes the final trip (ARC FT = 1).

 94 
 6 F 2 T 0 1 7 7

If three shot mode is selected for the multi-shot mode, autoreclose is further retried after the above
tripping occurs. At this time, the TD3 is started. The third shot autoreclose is performed after the
period of time set on the TD3 has elapsed. At this time, outputs of the step counter are: SP1 = 0,
SP2 = 1, SP3 = 0, SP4 = 0 and SP5 = 0.
The three shot mode of autoreclose is then completed, and tripping following a
"reclose-onto-a-fault" becomes the final trip (ARC FT = 1).
When four or five shot autoreclose is selected, autoreclose is further retried once again for tripping
that occurs after "reclose-onto-a-fault". This functions in the same manner as the three shot
autoreclose.
If a fault occurs under the following conditions, the final trip is performed and autoreclose is
blocked.
• Reclosing block signal is applied.
• During the reclaim time
• Auto-reclose condition by PLC signals ARC-S∗_COND is not completed.

In the OC∗, EF∗ and SE∗ protections, each tripping is selected by setting [OC∗-TP∗], [EF∗-TP∗]
or [SE∗-TP∗] to any one of “Inst”(instantaneous trip), “Set”(delayed trip by T∗∗∗ and [M∗∗∗]
setting) or “Off”(blocked). (See Section 2.3.)
PLC default setting TRDY 401 ARC IN-PROG TD1
t 0 402 t 0 404
BI3 COMMAND 1605 ARC_READY &
S S
& F/F & F/F &
[ARCEN]
0.0-600.0s R ARC-S1 R 0.01-300.00s STEP COUNTER
+ ARC-SHOT1 SP0 SHOT NUM1
"ON" ARC-S1
VCHK 1648 ARC-S1_COND Coordination CLK SP1 SHOT NUM2
ARC INIT (Trip command) TP1 ≥1
≥1 TR1 ARC-S2
t 0 SP2 SHOT NUM3
EXT TRIP ARC-FT ARC-S3
0.01-310.00s SP3 SHOT NUM4
Autoreclose initiation ARC-S4
TD2
405 SP4 SHOT NUM5
S t 0 ARC-S5
& F/F & SP5
ARC-S2 0.01-300.00s
SHOT NUM6
R
ARC-SHOT2
ARC-SHOT1
VCHK 1649 ARC-S2_COND
TR2 ARC-SHOT2
TW 403
t 0 ARC-SHOT3 ≥1
ARC-FT ARC-SHOT
0.01-310.00s
≥1
ARC-SHOT4 0.01-10.00s
TD3
t 0 406 ARC-SHOT5
S
& F/F &
ARC-S3 R 0.01-300.00s
ARC-SHOT3
VCHK 1650 ARC-S3_COND
TR3
t 0
ARC-FT
0.01-310.00s
TD4
t 0 407
S
& F/F &
ARC-S4 0.01-300.00s
≥1 R
ARC-SHOT1
ARC-SUCCESS
VCHK 1651 ARC-S4_COND
SN TEST TR4
t 0
ARC-FT ARC-FT
0.01-310.00s
Reset TRSET TD5
t 0 t 0 408
S
CB CLOSE & ≥1 & F/F &
See Fig. 2.1.50. 0.01-300.00s ARC-S5 0.01-300.00s
R
TARCP ARC-SHOT5
t 0 &
VCHK 1652 ARC-S5_COND
0.1-600.0s TR5
t 0
ARC-FT
TRCOV
0.01-310.00s
0 t
1
&
0.1-600.0s

1607 MANUAL_CLOSE

Figure 2.5.1 Autoreclose Scheme Logic

 95 
 6 F 2 T 0 1 7 7

Autoreclose initiation
PLC signal input ARC-READY(CB& 63condition: default setting) is alive and Reclaim time
TRDY has elapsed and Scheme switch [ARCEN] is set to "On," then autoreclose initiation is
ready. The reclaim time is selected by setting [TRDY] to “0.0-600.0s”.
Autoreclose initiation can consist of the following trips. Whether autoreclose initiation is active or
not is selected by setting [∗∗∗∗-INIT].
- OC1 to OC4 trip
- EF1 to EF4 trip
- SEF1 to SEF4 trip
Setting [∗∗∗∗-INIT] = NA / On / Block
NA: Autoreclose initiation is not active.
On : Autoreclose initiation is active.
Block: Autoreclose is blocked.
EXT_TRIP-∗(External autoreclose initiation) or ARC_INIT is autoreclose initiation by PLC
signal input. Whether autoreclose initiation is active or not is selected by setting [EXT-INIT].
Setting [EXT-INIT] = NA / On / Block
PLC default setting TRDY 401
t 0
BI3 COMMAND 1605 ARC_READY ARC initiation
& &
0.0-600.0s
[ARCEN]
+
"ON"

1628 EXT_TRIP-A TP1

≥1 & ≥1 ≥1 &
1 1 cycle
1629 EXT_TRIP-B
≥1 & ≥1
1630 EXT_TRIP-C
≥1 & ≥1

1631 EXT_TRIP
∗∗∗-INIT = “ON”
1606 ARC_INIT

1608 ARC_NO_ACT RS-ARCBLK

400
ARC_BLK_OR
&
≥1
&

ON &
[EXT-INIT]
BLK
+
∗∗∗-INIT = “BLK”
BI4 COMMAND 1604 ARC_BLOCK

Figure 2.5.2 Autoreclose Initiation

Autoreclose shot output (ARC-SHOT)

The maximum number of autoreclosing shots is selected by setting [ARC-NUM].
Setting [ARC-NUM] = S1/S2/S3/S4/S5
The command output condition is passage of TD∗ time and PLC signals ARC-S∗_COND. The
default setting of PLC signals ARC-S∗_COND is assigned to VCHK.
The passage of TD∗ time(Dead timer) is selected on each shot number by setting [TD∗] to
“0.01-300.00s.”
The command output pulse(One shot) time is selected by setting [TW] to “0.01-10.00s.”

 96 
 6 F 2 T 0 1 7 7

TD1
ARC-SHOT1
& S t 0
&
F/F ARC-SHOT2 ≥1
ARC- R 0.01-300.00s TW
S1 ARC-SHOT3
PLC default setting
≥1 ARC-SHOT
ARC-SHOT1 VCHK 1648 ARC-S1_COND ARC-SHOT4
TD2 0.01-10.00s
& ARC-SHOT5
S t 0
&
F/F
S2 R 0.01-300.00s

ARC-SHOT2 VCHK 1649 ARC-S2_COND

TD3
& S t 0
&
F/F
S3 R 0.01-300.00s

ARC-SHOT3 VCHK 1650 ARC-S3_COND

TD4
& S t 0
&
F/F
S4 R 0.01-300.00s

ARC-SHOT4 VCHK 1651 ARC-S4_COND

TD5
& S 0
&
F/F
S5 R 0.01-300.00s

VCHK 1652 ARC-S5_COND

ARC-SHOT5

Figure 2.5.3 Autoreclosing requirement

Autoreclose success judgement (ARC-SUCCESS)

If a re-trip is not executed within a period of time after the output of the autoreclosing shot, it is
judged that the autoreclose was successful - Autoreclose success(ARC-SUCCESS).
The period of time is selected by setting [TSUC] to “0.1-600.0s”.

Final trip judgement (ARC-FT)

The following cases are judged ARC-FT(Final Trip) and autoreclose is reset without autoreclose
output.
• Autoreclose initiation when autoreclose initiation is not ready
• Autoreclose initiation after the final shot output of the setting for the multi-shot mode
• Autoreclose block signal
- Autoreclose block signal by PLC input
- OC1 to OC4, EF1 to EF4, SEF1 to SEF 4 trip and external trip of setting autoreclose block
are active.
Setting [∗∗∗∗-INIT] = NA / On / Block
NA: Autoreclose initiation is not active.
On : Autoreclose initiation is active.
Block: Autoreclose is blocked.
• PLC signal ARC-S∗_COND is not completed. FT is performed after Timer [TR*].

Reset
If CB CLOSE(CB close condition) signal is alive and the CB is closed within a period of time after
autoreclose initiation, autoreclose is forcibly reset.
The period of time is selected by setting [TRSET] to “0.01-300.00s”.
It is assumed that the CB is not open(=CBF), in spite of the trip output(=autoreclose initiation).

 97 
 6 F 2 T 0 1 7 7

RS-ARCBLK & ≥1 ARC_RESET

TRSET
CB CLOSE t 0
&
0.01-300.00s
ARC_IN-PROG

Figure 2.5.4 Reset

Manual close function (MANUAL CLOSE)

MANUAL CLOSE is able to close the CB via a PLC signal input.
Autoreclose initiation is not active within a period of time after the manual close command output.
The period of time is selected by setting [TARCP] to “0.1-600.0s”.
In the case of a final trip judgement, the manual close command output is blocked within a period
of time. The period of time is selected by setting [TRCOV] to “0.1-600.0s”.
ARC-FT
TARCP
t 0

0.1-600.0s

TRCOV
0 t 1 & ARC_SHOT
0.1-600.0s
1579 MANUAL_CLOSE

Figure 2.5.5 Manual input function

2.5.2 Voltage and synchronism check

There are four voltage modes, as shown below when all three phases of the circuit breaker are
open. The voltage and synchronism check is applicable to voltage modes 1 to 3 and controls the
energising process of the lines and busbars in the three-phase autoreclose mode.
Voltage Mode 1 2 3 4
Busbar voltage (VB) live live dead dead

Line voltage (VL) live dead live dead

The synchronism check is performed for voltage mode 1 while the voltage check is performed for
voltage modes 2 and 3.
Mode 4 is used for manual closing.

 98 
 6 F 2 T 0 1 7 7

[VCHK]
+
"OFF"

"LD"

"DL"

"DD"

"S"
TLBDL
OVB 534
t 0 VCHK_LBDL
&
414
&
412
0.01 - 10.00S ≥1 VCHK
536 TDBLL
UVB t 0 VCHK_DBLL &
415
&
533 0.01 - 10.00S
OVL
TDBDL
t 0 416 VCHK_DBDL &
&
535
UVL 0.01 - 10.00S
TSYN
532 t 0 413 VCHK_SYN
SYN
0.01 – 10.00S

Figure 2.5.6 Energising Control Scheme

Figure 2.5.6 shows the energising control scheme. The voltage and synchronism check output
signal VCHK is generated when the following conditions have been established;
• Synchronism check element SYN operates and on-delay timer TSYN is picked up.
• Busbar overvoltage detector OVB and line undervoltage detector UVL operate, and
on-delay timer TLBDL is picked up. (This detects live bus and dead line condition.)
• Busbar undervoltage detector UVB and line overvoltage detector OVL operate, and
on-delay timer TDBLL is picked up. (This detects dead bus and live line condition.)
Using the scheme switch [VCHK], the energising direction can be selected.
Setting of [VCHK] Energising control
LD Reclosed under "live bus and dead line" condition or with synchronism check
DL Reclosed under "dead bus and live line" condition or with synchronism check
DD Reclosed under "dead bus and dead line" condition
S Reclosed with synchronism check only.
OFF Reclosed without voltage and synchronism check.

When [VCHK] is set to "LD", the line is energised in the direction from the busbar to line under
"live bus and dead line" condition. When [VCHK] is set to "DL", the line is energised in the
direction from the line to busbar under "dead bus and live line" condition. When [VCHK] is set to
"DD", the line is under "dead bus and dead line" condition.
When a synchronism check output exists, autoreclose is executed regardless of the scheme switch
position.
When [VCHK] is set to "S", a three-phase autoreclose is performed with synchronism check only.
When [VCHK] is set to "OFF", three-phase autoreclose is performed without voltage and
synchronism check.

 99 
 6 F 2 T 0 1 7 7

The voltage and synchronism check feature requires a single-phase voltage from the busbar and
the line with Vs input.
Additionally, it is not necessary to fix the phase of the reference voltage "Vs".
To match the busbar voltage and line voltage for the voltage and synchronism check option
mentioned above, the GRE140 has the following three switches and VT ratio settings as shown in
Figure 2.5.7.
[VTPHSEL]: This switch is used to match the voltage phases. For example, if the A-phase
voltage or A-phase to B-phase voltage is used as a reference voltage, "A" is
selected.
[VT-RATE]: This switch is used to match the magnitude and phase angle. "PH-G" is
selected when the reference voltage is a single-phase voltage while "PH-PH" is
selected when it is a phase-to-phase voltage. When the three phase voltages are
phase to phase, i.e. scheme switch [APPLVT] is set to ”3PP”, and scheme
switch [VT-RATE] is set to ”PH-G”, the relay displays “Err SET” and the
ALARM LED is lit.
[3PH-VT]: "Bus"; - The three phase voltages (Va, Vb, Vc) are Busbar voltage (VB).
- The reference voltage (Vs) is Line voltage(VL).
"Line"; - The three phase voltages (Va, Vb, Vc) are Line voltage (VL).
- The reference voltage (Vs) is Busbar voltage(VB).

Three phase Va
voltages Vb
Voltage check
Vc &
Reference Synchronism check
Vs
voltage
[VTPHSEL]
+ "A"
+
"B"
+
"C"
[VT - RATE]
+
"PH-PH"
+
"PH-G"
[3PH - VT]
+
"Bus"
+
"Line"

Figure 2.5.7 Matching of Busbar Voltage and Line Voltage

Characteristics of OVL, UVL, OVB, UVB, and SYN

The voltage check and synchronism check elements are used for autoreclose.
The output of the voltage check element is used to check whether the line voltage (VL) and busbar
voltage (VB) are dead or live. The voltage check element has undervoltage detectors UVL and
UVB, and overvoltage detectors OVL and OVB for the line voltage and busbar voltage check. The
under voltage detector checks that the line or busbar is dead while the overvoltage detector checks
that it is live. These detectors function in the same manner as other level detectors described later.

 100 
 6 F 2 T 0 1 7 7

Figure 2.5.8 shows the voltage and synchronism check zone.

VL Line voltage
(Incoming voltage)

Dead bus and Live bus and

live line live line
A B
OVL
A, C, D: Voltage check
B: Synchronism check

Dead bus and Live bus and

dead line dead line
UVL
C D
VB Busbar voltage
0V UVB OVB (Runningvoltage)

Figure 2.5.8 Voltage and Synchronism Check Zone

The synchronism check element SYN is composed of the following check functions:
- SYN∆θ(SYNθ): checks the phase angle difference between the line voltage (incoming
voltage) and the busbar voltage (running voltage)
- SYNUV/OV: check the line voltage and the busbar voltage
- SYN∆V(SYNDV): checks the voltage difference between the line voltage (incoming
voltage) and the busbar voltage (running voltage)
- SYN∆f(SYNDf): checks the frequency difference between the line voltage (incoming
voltage) and the busbar voltage (running voltage)
The SYN is configured using these detectors as shown in Figure 2.5.9. The SYN∆f can be disabled
by the scheme switch [DfEN].

SYNΔθ
&
SYNUV/OV
& SYN
OUTPUT

SYNΔV
[DfEN]
+ "Off"
SYNΔf
"On"

Figure 2.5.9 Block diagram of SYN1

Figure 2.5.10 shows the characteristics of the synchronism check element used for the autoreclose
if the line and busbar are live.
The synchronism check element operates if both the voltage difference and phase angle difference
are within their setting values.

 101 
 6 F 2 T 0 1 7 7

θS = SYNθ setting

VL

θs VB
θ

∆V

SYNOV

SYNUV

Figure 2.5.10 Synchronism Check

For the element SYN, the voltage difference is checked by the following equations.
SYNOV ≤ VB ≤ SYNUV
SYNOV ≤ VL ≤ SYNUV
∆V = |VL − VB| ≤ ∆Vs
where,
∆Vs = Voltage difference setting
VB = busbar voltage
VL = line voltage
SYNOV = lower voltage setting
SYNUV = upper voltage setting
∆V = Voltage difference
The frequency difference is checked by the following equations.
∆f = |fVL1 − fVB| ≤ ∆fs
where,
fVB = frequency of VB
fVL = frequency of VL
∆f = frequency difference
∆fs= frequency difference setting
The phase difference is checked by the following equations.
VB ⋅ VL cos θ ≥ 0
VB ⋅ VL sin (SYNθS) ≥ VB ⋅ VL sinθ
where,
θ = phase difference between VB and VL
SYNθs = phase difference setting

Note: The relay can directly detect a slip cycle (frequency difference ∆f) if ∆f is not used.
When the phase difference setting SYNθs and the synchronism check time setting
TSYN are given a detected maximum slip cycle is determined using the following
equation:
SYNθs
f=
180°×TSYN

 102 
 6 F 2 T 0 1 7 7

where,
f = slip cycle
SYNθs = phase difference setting (degree)
TSYN = setting of synchronism check timer TSYN (second)

2.5.3 Sequence Coordination

When two or more relays protect the same feeder their sequences (trip shot number) must be
coordinated. Considering the diagram as shown in Figure 2.5.11, relays A and B protect the same
feeder and both are programmed for 2 instantaneous and 2 IDMT trips. Both relays A and B ‘see’
the permanent fault at Fault F, and relays operate with instantaneous protection for 1st trip (at
SHOT NUM1) and 2nd trip (at SHOT NUM2).
3rd trip (at SHOT NUM3) is delayed, and the relays have different IDMT settings, so that relay B
only operates. Relay A does not trip and autoreclose, and judges that the autoreclose was
successful. It reclaims and returns to the beginning of its autoreclose cycle (= SHOT NUM1).
However, relay B will attempt the delayed 4th trip (at SHOT NUM4), and then an unwanted
mal-instantaneous trip will be issued by relay A. In this case, the sequence co-ordination function
is applied and the trip shot number is coordinated as shown in Figure 2.5.12. The trip shot number
is coordinated by the operation of OC, EF or SEF element. The sensitivity (OC, EF or SEF) and
the scheme switch ([COORD-OC], [COORD-EF] or [COORD-SE]) are set (See Section 2.5.4).
A B Fault F

A:GRE140 B:GRE140

Figure 2.5.11 Relay Location

Co-ordination disabled:
1st trip 2nd trip No trip & judged ARC succeed
(Inst) (Inst)
1st trip (Inst): mal-operate
Relay A

1st trip 2nd trip 3rd trip No trip

(Inst) (Inst) (IDMT)

Relay B

Co-ordination enabled:
1st trip 2nd trip No trip No trip
(Inst) (Inst)

Relay A

1st trip 2nd trip 3rd trip 4th trip

(Inst) (Inst) (IDMT) (IDMT)

Relay B

Figure 2.5.12 Sequence Coordination Function

 103 
 6 F 2 T 0 1 7 7

2.5.4 Setting

The setting elements necessary for the autoreclose function and their setting ranges are shown in
the table below.
Element Range Step Default Remarks
ARC
TRDY 0.0 – 600.0 s 0.1 s 60.0 s Reclaim time
TD1 0.01 – 300.00 s 0.01 s 10.00 s 1st shot dead time
TR1 0.01 – 310.00 s 0.01 s 310.00 s 1st shot reset time
TD2 0.01 – 300.00 s 0.01 s 10.00 s 2nd shot dead time
TR2 0.01 – 310.00 s 0.01 s 310.00 s 2nd shot reset time
TD3 0.01 – 300.00 s 0.01 s 10.00 s 3rd shot dead time
TR3 0.01 – 310.00 s 0.01 s 310.00 s 3rd shot reset time
TD4 0.01 – 300.00 s 0.01 s 10.00 s 4th shot dead time
TR4 0.01 – 310.00 s 0.01 s 310.00 s 4th shot reset time
TD5 0.01 – 300.00 s 0.01 s 10.00 s 5th shot dead time
TR5 0.01 – 310.00 s 0.01 s 310.00 s 5th shot reset time
TW 0.01 – 10.00 s 0.01 s 2.00 s Output pulse time
TSUC 0.1 – 600.0 s 0.1 s 3.0 s Autoreclose succeed judgement time
TRCOV 0.1 – 600.0 s 0.1 s 10.0 s Autoreclose recovery time after final trip
TARCP 0.1 – 600.0 s 0.1 s 10.0 s Autoreclose pause time after manually closing
TRSET 0.01 – 300.00 s 0.01 s 3.00 s Autoreclose reset time
VSVT 1 - 20000 1 100 VT ratio for synchronism phase voltage
(Integer part)
VSVT_DF .00 - .99 .01 .00 VT ratio of decimals for synchronism phase
voltage
OVB 10 - 150 V 1V 51 V Live bus check
UVB 10 - 150 V 1V 13 V Dead bus check
OVL 10 - 150 V 1V 51 V Live line check
UVL 10 - 150 V 1V 13 V Dead line check
SYNUV 10 - 150 V 1V 83 V UV element of synchronism check
SYNOV 10 - 150 V 1V 51 V OV element of synchronism check
SYNDV 0 - 150 V 1V 150 V Voltage difference for SYN
SYN θ 5 - 75° 1° 30° Synchronism check (phase angle difference)
SYNDf 0.01 – 2.00 Hz 0.01 Hz 1.00 Hz Frequency difference check for SYN
TSYN 0.01 - 10.00 s 0.01 s 1.00 s Synchronism check time (Live-bus & Live-line)
TLBDL 0.01 - 10.00 s 0.01 s 0.05 s Voltage check time (Live-bus & Dead-line)
TDBLL 0.01 - 10.00 s 0.01 s 0.05 s Voltage check time (dead-bus & Live-line)
TDBDL 0.01 - 10.00 s 0.01 s 0.05 s Voltage check time (Dead-bus & Dead-line)
[ARCEN] Off/On On Autoreclose enable
[ARC-NUM] S1/S2/S3/S4/S5 S1 Autoreclosing shot number
[VCHK] Off/LD/DL/DD/S Off Autoreclosing voltage check
[DfEN] Off/On Off Frequency difference checking enable
[VTPHSEL] A/B/C A VT phase selection
[VT-RATE] PH-G / PH-PH PH-G VT rating
[3PH-VT] Bus / Line Line 3-phase VT location
[OC1-INIT] NA/ON/Block NA Autoreclose initiation by OC1
[OC1-TP1] OFF/INST/SET SET OC1 trip mode of 1st trip
[OC1-TP2] OFF/INST/SET SET OC1 trip mode of 2nd trip
[OC1-TP3] OFF/INST/SET SET OC1 trip mode of 3rd trip
[OC1-TP4] OFF/INST/SET SET OC1 trip mode of 4th trip

 104 
 6 F 2 T 0 1 7 7

Element Range Step Default Remarks

[OC1-TP5] OFF/INST/SET SET OC1 trip mode of 5th trip
[OC1-TP6] OFF/INST/SET SET OC1 trip mode of 6th trip
[OC2-INIT] NA/ON/Block NA Autoreclose initiation by OC2
[OC2-TP1] OFF/INST/SET SET OC2 trip mode of 1st trip
[OC2-TP2] OFF/INST/SET SET OC2 trip mode of 2nd trip
[OC2-TP3] OFF/INST/SET SET OC2 trip mode of 3rd trip
[OC2-TP4] OFF/INST/SET SET OC2 trip mode of 4th trip
[OC2-TP5] OFF/INST/SET SET OC2 trip mode of 5th trip
[OC2-TP6] OFF/INST/SET SET OC2 trip mode of 6th trip
[OC3-INIT] NA/ON/Block NA Autoreclose initiation by OC3
[OC3-TP1] OFF/INST/SET SET OC3 trip mode of 1st trip
[OC3-TP2] OFF/INST/SET SET OC3 trip mode of 2nd trip
[OC3-TP3] OFF/INST/SET SET OC3 trip mode of 3rd trip
[OC3-TP4] OFF/INST/SET SET OC3 trip mode of 4th trip
[OC3-TP5] OFF/INST/SET SET OC3 trip mode of 5th trip
[OC3-TP6] OFF/INST/SET SET OC3 trip mode of 6th trip
[OC4-INIT] NA/ON/Block NA Autoreclose initiation by OC4
[OC4-TP1] OFF/INST/SET SET OC4 trip mode of 1st trip
[OC4-TP2] OFF/INST/SET SET OC4 trip mode of 2nd trip
[OC4-TP3] OFF/INST/SET SET OC4 trip mode of 3rd trip
[OC4-TP4] OFF/INST/SET SET OC4 trip mode of 4th trip
[OC4-TP5] OFF/INST/SET SET OC4 trip mode of 5th trip
[OC4-TP6] OFF/INST/SET SET OC4 trip mode of 6th trip
[EF1-INIT] NA/ON/Block NA Autoreclose initiation by EF1
[EF1-TP1] OFF/INST/SET SET EF1 trip mode of 1st trip
[EF1-TP2] OFF/INST/SET SET EF1 trip mode of 2nd trip
[EF1-TP3] OFF/INST/SET SET EF1 trip mode of 3rd trip
[EF1-TP4] OFF/INST/SET SET EF1 trip mode of 4th trip
[EF1-TP5] OFF/INST/SET SET EF1 trip mode of 5th trip
[EF1-TP6] OFF/INST/SET SET EF1 trip mode of 6th trip
[EF2-INIT] NA/ON/Block NA Autoreclose initiation by EF2
[EF2-TP1] OFF/INST/SET SET EF2 trip mode of 1st trip
[EF2-TP2] OFF/INST/SET SET EF2 trip mode of 2nd trip
[EF2-TP3] OFF/INST/SET SET EF2 trip mode of 3rd trip
[EF2-TP4] OFF/INST/SET SET EF2 trip mode of 4th trip
[EF2-TP5] OFF/INST/SET SET EF2 trip mode of 5th trip
[EF2-TP6] OFF/INST/SET SET EF2 trip mode of 6th trip
[EF3-INIT] NA/ON/Block NA Autoreclose initiation by EF3
[EF3-TP1] OFF/INST/SET SET EF3 trip mode of 1st trip
[EF3-TP2] OFF/INST/SET SET EF3 trip mode of 2nd trip
[EF3-TP3] OFF/INST/SET SET EF3 trip mode of 3rd trip
[EF3-TP4] OFF/INST/SET SET EF3 trip mode of 4th trip
[EF3-TP5] OFF/INST/SET SET EF3 trip mode of 5th trip
[EF3-TP6] OFF/INST/SET SET EF3 trip mode of 6th trip
[EF4-INIT] NA/ON/Block NA Autoreclose initiation by EF4
[EF4-TP1] OFF/INST/SET SET EF4 trip mode of 1st trip
[EF4-TP2] OFF/INST/SET SET EF4 trip mode of 2nd trip
[EF4-TP3] OFF/INST/SET SET EF4 trip mode of 3rd trip
[EF4-TP4] OFF/INST/SET SET EF4 trip mode of 4th trip
[EF4-TP5] OFF/INST/SET SET EF4 trip mode of 5th trip
[EF4-TP6] OFF/INST/SET SET EF4 trip mode of 6th trip

 105 
 6 F 2 T 0 1 7 7

Element Range Step Default Remarks

[SE1-INIT] NA/ON/Block NA Autoreclose initiation by SE1
[SE1-TP1] OFF/INST/SET SET SE1 trip mode of 1st trip
[SE1-TP2] OFF/INST/SET SET SE1 trip mode of 2nd trip
[SE1-TP3] OFF/INST/SET SET SE1 trip mode of 3rd trip
[SE1-TP4] OFF/INST/SET SET SE1 trip mode of 4th trip
[SE1-TP5] OFF/INST/SET SET SE1 trip mode of 5th trip
[SE1-TP6] OFF/INST/SET SET SE1 trip mode of 6th trip
[SE2-INIT] NA/ON/Block NA Autoreclose initiation by SE2
[SE2-TP1] OFF/INST/SET SET SE2 trip mode of 1st trip
[SE2-TP2] OFF/INST/SET SET SE2 trip mode of 2nd trip
[SE2-TP3] OFF/INST/SET SET SE2 trip mode of 3rd trip
[SE2-TP4] OFF/INST/SET SET SE2 trip mode of 4th trip
[SE2-TP5] OFF/INST/SET SET SE2 trip mode of 5th trip
[SE2-TP6] OFF/INST/SET SET SE2 trip mode of 6th trip
[SE3-INIT] NA/ON/Block NA Autoreclose initiation by SE3
[SE3-TP1] OFF/INST/SET SET SE3 trip mode of 1st trip
[SE3-TP2] OFF/INST/SET SET SE3 trip mode of 2nd trip
[SE3-TP3] OFF/INST/SET SET SE3 trip mode of 3rd trip
[SE3-TP4] OFF/INST/SET SET SE3 trip mode of 4th trip
[SE3-TP5] OFF/INST/SET SET SE3 trip mode of 5th trip
[SE3-TP6] OFF/INST/SET SET SE3 trip mode of 6th trip
[SE4-INIT] NA/ON/Block NA Autoreclose initiation by SE4
[SE4-TP1] OFF/INST/SET SET SE4 trip mode of 1st trip
[SE4-TP2] OFF/INST/SET SET SE4 trip mode of 2nd trip
[SE4-TP3] OFF/INST/SET SET SE4 trip mode of 3rd trip
[SE4-TP4] OFF/INST/SET SET SE4 trip mode of 4th trip
[SE4-TP5] OFF/INST/SET SET SE4 trip mode of 5th trip
[SE4-TP6] OFF/INST/SET SET SE4 trip mode of 6th trip
[EXT-INIT] NA/ON/Block NA Autoreclose initiation by external trip command
[COORD-OC] Off/On Off OC-CO relay for Co-ordination
[COORD-EF] Off/On Off EF-CO relay for Co-ordination
[COORD-SE] Off/On Off SEF-CO relay for Co-ordination
OC-CO 0.1 − 150.0 A 0.01 A 2.00 A OC-CO for co-ordination
EF-CO 0.05 − 100.0 A 0.01 A 0.60 A EF-CO for co-ordination
SEF-CO 0.001 − 1.000 A 0.001 A 0.010 A SEF-CO for co-ordination
.
To determine the dead time, it is essential to find an optimal value while taking factors such as
de-ionization time and power system stability into consideration which normally contradict one
another.
Normally, a longer de-ionization time is required for a higher line voltages or larger fault currents.
For three-phase autoreclose, the dead time is generally 15 to 30 cycles.

 106 
 6 F 2 T 0 1 7 7

2.6 Motor Protection

This section 2.6 is the motor protection function for 700, 701, 702, 720, 721 and 722 models
(GRE140-700 model series). For all other models, the functions described in this section are
disabled and masked.
When the scheme switch [MOTEN] is set to “On” , the motor protection functions are enabled.
2.6.1 Motor status monitoring

GRE140-700 model series provides a motor status monitoring function by detection of motor
current. In general, a large current flows in a motor during start-up, while less than the motor rated
current (IMOT≒Full load current) flows in the running state. The motor status is determined
from the ratio of measured current to motor rated current.
The motor status transitions are shown in Figure 2.6.1.

Figure 2.6.1 Motor status transition diagram

• Stop state ; When the motor current is less than 5% of motor rated current (IMOT) *
* If 5% of motor rated current is smaller than 0.1A, then current of less than 0.1A will be in stop state.
• Start-up state ; From the time when the motor current exceeds 5% of motor rated current (or
0.1A) as it leaves the stop state until the motor current falls below 150% of the motor rated
current, in cases where the motor start-up current exceed 150% of the motor rated current, or;
the start-up time setting (TMTST) expires in cases where the motor start-up current doesn’t
exceed 150% of the motor rated current.
• Running state ; Not during the start-up state, when the motor current is higher than 5% of
motor rated current (or 0.1A).
• Overload state ; Not during the start-up state, when the motor current exceeds the operating
value for the thermal overload (THM;49) function.
Element Range Step Default Remarks
IMOT 0.20 – 10.00 A 0.01 A 1.00 A Motor rated current setting
TMTST 0.1 – 300.0 s 0.1 s 60.0 s Motor start-up time setting
[MOTEN] Off / On On Motor function enable
The motor status is indicated by the motor status signal as follows signal No.:
600 ; Stop state 601 ; Start-up state 602 ; Running state
603 ; Overload 604; Locked state 605; Emergency start mode

GRE140-700 can detect following the motor parameters.

- Peak current during motor start-up

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- Number of starts (Hot starts , Cold starts and Total starts)

- Last motor start-up time
- Accumulated Running time

2.6.2 Overcurrent Protection according to motor status

GRE140-700 provides protection for motor feeders with phase fault overcurrent elements. The
OC protection characteristics are modified depending on the motor status – Start-up, Running.
OC1 and OC2 are applied in the motor running state, OC3 is activated during motor start-up, and
OC4 operates as an alarm NOT dependent on motor status.

2.6.2.1 Instantaneous and definite time Overcurrent Protection during motor start-up
The OC3 elements provide instantaneous and definite time overcurrent protection in the motor
start-up state.
During the motor starting period, several times motor rated current flows as motor start-up current.
The instantaneous overcurrent setting during the motor starting period should be higher than the
motor start-up current.
The OC3 element is effective only during the start-up state. Therefore, the OC3 setting and the
motor start-up period setting of TMTST are set from the characteristics of motor start-up current
and motor start-up period.
Figure 2.6.2 illustrates operating times for the OC3 instantaneous and definite overcurrent
protection during the motor start-up period for a typical motor start-up current characteristic.
Where:
Ir ; motor rated current,
Ist ; motor start-up current,
Isoc ; SOC setting current,
TMTST ; setting of motor start-up period,
Tst ; motor start-up period
Tsoc ; setting of SOC operating (delay) time.
Time (s) Motor current
characteristic
ROC*

TMTST

Tst

SOC
Tsoc

Ir 1.5xIr Ist Isoc Current (amps)

Figure 2.6.2 Instantaneous Overcurrent Setting during motor start-up period

The setting of SOC operating time should be set according to the motor inrush current.

 108 
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2.6.2.2 Inverse Time and Definite time Overcurrent Protection during motor running

The OC1 and OC2 elements provide overcurrent protection during the running state, and prevent
motor damage due to the motor current exceeding the allowable heating limit, as defined by the
motor’s running thermal damage curve and acceleration thermal damage curve for hot load or cold
load conditions. OC1 and OC2 provide inverse definite minimum time (IDMT) or definite time
overcurrent protection.
Figure 2.6.3-4 shows operating times for the OC1 inverse time overcurrent protection and the
OC2 definite time overcurrent protection, compared with example motor thermal damage curves
during the motor running period.

Time (s) Time (s)

Running thermal
damage curve
Running thermal
damage curve

OC2 OC1
TOC2
Acceleration thermal Acceleration thermal
damage curve damage curve
OC1 (Hot / Cold load) (Hot / Cold load)

OC2
TOC2

Current (amps) Current (amps)

Figure 2.6.3-4 Inverse time and definite time Overcurrent Setting

during motor running period

2.6.3 Motor Protection functions

GRE140-700 model series provides the following four protection elements specifically for motor
protection.
- Start Protection
- Stalled motor protection
- Locked rotor protection
- Restart Inhibit

2.6.3.1 Start Protection

The start protection operates when the start-up time exceeds the setting of start protection time
(TEXST). The start-up time is defined in section 2.0. The start protection element is shown in Figure
2.6.5.
The start protection timer pick up is the last time that the current exceeds 150% of motor rated
current within the duration of the motor start-up time setting (TMTST). GRE140-700 determines
that the motor is in the start-up state when the start protection time (TEXST) is running even though
the start-up time (TMTST) has expired. The start protection timer pick up is shown Figure 2.6.6.
If the motor current does not exceed 150% of motor rated current during the motor start-up time
(TMTST), then the start protection does not operate..

 109 
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Figure 2.6.5 Start Protection Characteristic

Figure 2.6.6 Start Protection timer pick up

Scheme logic

306 307
EXST
& EXST TRIP

[EXSTEN]
+
"ON"
EXST BLOCK 1

Figure 2.6.7 Scheme Logic for Start Protection

Setting

The setting elements necessary for the Start Protection and their setting ranges are as follows:
Element Range Step Default Remarks
TEXST 0.1 – 300.0 s 0.1 s 60.0 s Start protection time setting
TMTST 0.1 – 300.0 s 0.1 s 60.0 s Motor Start-up time setting
[EXSTEN] Off / On Off Start protection Enable

 110 
 6 F 2 T 0 1 7 7

2.6.3.2 Stalled motor Protection

The stalled motor protection uses a binary input signal from a tachometer (Speed SW) to
determine that the motor is in a stalled condition during start-up or running.
The speed switch should be connected such that when the speed falls (stall condition), the switch
opens and disconnects an auxiliary voltage at the binary input terminal. Therefore, the binary
input setting should be “SPDSW” with the sense of “Inv” setting.

Scheme logic

The stalled motor protection operates when detecting an overcurrent condition coincident with a
binary input signal from a tachometer (Speed SW) .

308 TSTRT
309
STRT t 0
& STRT TRIP

0.00 - 300.00s

SPDSW
BI signal

[STRTEN]
+
"ON"
STRT BLOCK 1

Figure 2.6.8 Scheme Logic for Stalled motor Protection

Setting
The setting elements necessary for the Stalled motor protection and their setting ranges are as
follows:
Element Range Step Default Remarks
STRT 0.10 – 50.00 A 0.01 A 5.00 A Stalled motor protection detective
current setting
TSTRT 0.00 – 300.00 s 0.01 s 0.00 s Stalled motor protection time
[STRTEN] Off / On Off Stalled motor protection Enable
SPEED SW Binary input setting of Speed SW

2.6.3.3 Locked Rotor Protection

The Locked Rotor protection is a function for protecting the rotor of the motor as opposed to the
overload function which protects the stator of the motor.
GRE140-700 simulates the temperature rises of the stator and rotor independently because each
has a different thermal characteristics.
For motor currents that are below about 2.5 times the motor rated current, the heat of the motor is
produced mainly by the stator, while for higher motor currents, the rotor produces most of the
heat.
For this reason, GRE140-700 performs temperature rise simulation for the rotor as follows,
－ When the motor current is less than 2.5 times the motor rated current (0 < I (t) < 2.5 x IMOT )
The thermal state of the rotor (θr) is made to converge into the thermal state of the stator (θs) by
the heating time constant τ1.

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The thermal state of the rotor when the motor current is less than 2.5 times the motor rated current
can be shown by equation (1).

 −t
τ1 
θr = θs 1 − e  (1)
 
where:
θr = thermal state of the rotor as a percentage,
θs = thermal state of the stator as a percentage of allowable thermal capacity,
τ1 = thermal heating time constant of the stator.
－ When the motor current is higher than 2.5 times the motor rated current ( I (t) > 2.5 x IMOT )
From the heating characteristic under locked rotor conditions that is determined by the motor
start-up current (Ist ; LKRST) and the allowable locked rotor time (Tsc; TLKRT), the temperature
rise of the rotor is simulated.
The thermal state of the rotor when the motor current is higher than 2.5 times the motor rated
current can be shown by equation (2).
2
 I(t)  1
θr = θｒ (0) +   ⋅ ⋅θrm ⋅ t　　 (2)
 I st  Tsc
where:
θr = thermal state of the rotor as a percentage,
θr(0) = thermal state of the stator as a percentage when the rotor is locked,
I(t) = motor current,
Ist = motor start-up current,
Tsc = allowable locking time in the cold state,
θrm = percentage of allowable thermal capacity of rotor as a ratio ofθs.
When theθr =θrm the Locked rotor protection operates.
The operation characteristic (operating time) in the locked state varies depending on the heated
condition of the motor and the conducting current.
The thermal state of the rotor θr is displayed as THM2 in Digest screen and "Metering" screen,
when the motor current is higher than 2.5 times the motor rated current
When starting current is flowing in the locked state, the operating time will be as follows:
( I ) In cold condition (motor is cool)
In equation (2), sinceθr(0) = 0 and I(t) = Ist , the operating time is t = Tsc.
( II ) In hot condition (motor is running at the rated current(IMOT) for a long period)
In equation (2), sinceθr(0) =θsn and I(t) = Ist , the operating time will be Tsh.
θrm −θsn
Tsh = ⋅ Tsc 　　 (3)
θrm
where:
Tsh = allowable locked rotor time in hot condition,
θsn = thermal state of the stator at motor rated current (≒ IMOT/THM ×100(%)).
(III) In operating condition
In reality, θr(0) falls between 0 andθsn. The operating time in this case will be given by
equation (4).

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θrm −θｒ (0)

Top = ⋅ Tsc 　　 (4)
θrm
where:
Top = operating time,
Figure 2.6.9 illustrates the IEC 60255-8 curves for a range of time constant settings for the Locked
Rotor protection characteristic. This chart shows the ‘hot’ condition where an overload is switched
onto a system that has previously been loaded to 0% or 90% of its capacity and following setting.
・motor rated current ≒ full load current
・thermal heating time constant of the stator = 10 min.
・motor start-up current ( Ist ) = 5 times motor rated current
・allowable locked rotor time in the cold state ( Tsc ) = 10 sec.
・percentage of allowable thermal capacity of rotor ( θrm ) = 150%
Thermal Curves
( 0% or 90% prior load)
with Locked Rotor Protection
10000

1000
Operate Time (minutes)

100

10 0%

90%
1
1 10
Overload Current (Multiple of k.IFLC)

Figure 2.6.9 Thermal Curve with Locked Rotor Protection

Scheme logic

310 311
LKRT
& LKRT TRIP

[LKRTEN]
+
"ON"
LKRT BLOCK 1

Figure 2.6.10 Scheme Logic for Locked Rotor Protection

If the scheme switch of Thermal overload protection [THMEN] or [THMAEN] is disabled, the
Locked Rotor protection is NOT available.

 113 
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Setting
The setting elements necessary for the Locked Rotor protection and their setting ranges are as
follows:
Element Range Step Default Remarks
RTTHM 50 – 500 % 1% 200 % Rotor allowable thermal capacity
LKRTIS 0.10 – 100.00 A 0.01 A 7.50 A Motor start-up current
TLKRT 1 – 300 s 1s 120 s Allowable locking time
[LKRTEN] Off / On Off Locked rotor protection Enable
The rotor allowable thermal capacity setting θrm (RTTHM) is set as a ratio of the thermal state of
the stator allowable thermal capacityθs (THM = IAOL: allowable overload current of stator).
For example,
Motor full load current is set to the allowable overload current of stator (THM) = 120A
Locked rotor current of motor is maximum current when the rotor is locked = 360A
Then the setting of allowable thermal capacity of rotorθrm (RTTHM) is 360/120=300(%) .

2.6.3.4 Restart Inhibit

The Restart Inhibit function prevents damage to the motor by repeated starting.
GRE140-700 model has two restart inhibit function, thermal state of rotor function and starts per
hour function.
a) Thermal state of rotor function
The Restart Inhibit for thermal state of rotor function detects the start-up current and the start-up
time to determine whether the thermal state of the rotor will exceed its allowable thermal capacity
when the motor is started. If the allowable thermal state of rotor is exceeded, this protective
function issues a lock signal to prevent the motor starting (CB close command).
The rotor heating caused by a single starting operation is expressed by the equation(5).
2
 I(t)  Tst
  ⋅ ⋅θrm 　　(5)
 I st  Tsc
At start-up I(t) = Ist , then the expression becomes as equation(6),
Tst
⋅θrm 　　 (6)
Tsc
where:
Tst = motor start-up time,
Tsc = allowable locking time in the cold state,
θrm = percentage of allowable thermal capacity of rotor,
Ist = motor start-up current.
When there is no margin defined in equation (7) between the thermal state of rotor θr and the
allowable thermal capacity of rotorθrm , then the output signal of motor starting (CB close) is
blocked.
Tst
θrm 　≦θｒ (ｔ)＋ ･θrm (7)
Tsc
The characteristic of the Restart Inhibit function for thermal state of rotor is shown Figure 2.1.60.

 114 
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Figure 2.6.11 Restart Inhibit for thermal state of rotor Characteristic

b) Starts per hour function

The Restart Inhibit of starts per hour function is the number of motor start limit within one hour.
It picks up when the number of motor starts exceeds the setting number(Ns). If the allowable starts
number for one hour is exceeded, this protective function issues a lock signal to prevent the motor
starting (CB close command)..If the function has picked up, the motor start is allowed if one hour
has passed since the first motor start-up.
The characteristic of the Restart Inhibit function of starts per hour function is shown Figure 2.6.12.

Figure 2.6.12 Restart Inhibit of starts per hour Characteristic

Scheme logic

312 313
RSIH
& RSIH ALARM

[RSIHEN]
+
"ON"
RSIH BLOCK 1

Figure 2.6.13 Scheme Logic for Restart Inhibit

If the scheme switch of Thermal overload protection [THMEN] or [THMAEN] is disabled, the
Restart Inhibit function is NOT available.

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Setting
The setting elements necessary for the Restart Inhibit and their setting ranges are as follows:
Element Range Step Default Remarks
TMTST 0.1 – 300.0 s 0.1 s 60.0 s Motor start-up time setting
TLKRT 1 – 300 s 1s 120 s Rotor restraint time
RTTHM 50 – 500 % 1% 200 % Rotor permissible heat range
LIMNUM 1 - 60 1 5 Starts per hour - motor start limit
[RSIHEN] Off / On Off Restart inhibit Enable
[STPHEN] Off / On Off

2.6.3.5 Emergency Start

The emergency start function allows motor start-up (CB close command) although the Restart
Inhibit function operated. This function is activated by binary input signal of emergency start
(EMRST). The emergency start is activated while the selected binary input is energized, and the
Restart Inhibit function will be ignored.

CAUTION
The emergency start function is used only in an emergency situation. Since the Restart Inhibit
function is overridden, damage to the motor may result.

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3. Technical Description
3.1 Hardware Description
3.1.1 Outline of Hardware Modules

The case outline of GRE140 is shown in Appendix F.

As shown in Figure 3.1.1, the human machine interface (HMI) panel has a liquid crystal display
(LCD), light emitting diodes (LED), operation keys and a USB type-B connector on the front
panel.
The LCD consists of 16 columns by 8 rows (128 x 64dots) with a back-light and displays
recording, status and setting data.
There are a total of 14 LED indicators and their signal labels and LED colors are defined as
follows:
Label Color Remarks
IN SERVICE Green Lit when the relay is in service and flashing when the relay is in
“Test” menu.
TRIP Red Lit when a trip command is issued.
ALARM Yellow Lit when relay alarm is detected.
Relay Fail Red Lit when a relay failure is detected.
CB CLOSED Red/Green/Yellow Lit when CB is closed.
CB OPEN Green Lit when CB is open.
LOCAL Yellow Lit when Local Control is enabled
REMOTE Yellow Lit when Remote Control is enabled
(LED1) Red/Green/Yellow User-configurable
(LED2) Red/Green/Yellow User-configurable
(LED3) Red/Green/Yellow User-configurable
(LED4) Red/Green/Yellow User-configurable
(LED5) Red/Green/Yellow User-configurable
(LED6) Red/Green/Yellow User-configurable

LED1 to LED6 are user-configurable. Each is driven via a logic gate which can be programmed
for OR gate or AND gate operation. Further, each LED has a programmable reset characteristic,
settable for instantaneous drop-off, or for latching operation. A configurable LED can be
programmed to indicate the OR combination of a maximum of 4 elements, and the LED color can
be changed to one of three colors- (Red / Green / Yellow) , the individual status of which can be
viewed on the LCD screen as “Virtual LEDs.” For the setting, see Section 4.2.6.10. For the
operation, see Section 4.2.1.
The TRIP LED and an operated LED, if latching operation is selected, must be reset by the user,
either by pressing the RESET key, by energising a binary input which has been programmed for
‘Remote Reset’ operation, or by a communications command. Other LEDs operate as long as a
signal is present. The RESET key is ineffective for these LEDs. Further, whether or not the TRIP
LED is lit is controlled with the scheme switch [AOLED] by the output of an alarm element such
as OC4 ALARM, EF4 ALARM, etc..

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The CB CLOSED and CB OPEN LEDs indicate CB condition. The CB CLOSED LED color can
be changed to one of three colors-(Red / Green / Yellow) .
The LOCAL / REMOTE LED indicates the CB control hierarchy. When the LOCAL LED is lit,
the CB can be controlled using the ○ and ｜ keys on the front panel. When the REMOTE LED
is lit, the CB can be controlled using a binary input signal or via relay communications. When
neither of these LEDs are lit , the CB control function is disabled.

The VIEW key, same as ▼ key, starts the LCD indication and switches between windows. The
VIEW key will scroll the screen through “Virtual LED” → “Metering” →”Indication and
back-light off” when the LCD is in the Digest screen mode.
The ENTER key starts the Main menu indication on the LCD.

The END key clears the LCD indication and turns the LCD back-light off when the LCD is in
the “MAIN MENU”.
The operation keys are used to display the record, status and setting data on the LCD, input
settings or change settings.
The USB connector is a B-type connector. This connector is used for connection with a local
personal computer.
Light emitting
diodes (LED) Liquid crystal
display

Control keys
Operation keys

USB connector
REMOTE
(type B)

Figure 3.1.1 Front Panel

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3.2 Input and Output Signals

3.2.1 AC Input Signals

Table 3.2.1 shows the AC input signals necessary for the GRE140 model and their respective
input terminal numbers. Model 40∗ , 42∗, 70∗ and 72∗ depend upon their scheme switch [APPL]
setting.

Table 3.2.1 AC Input Signals

Term. [APPLCT] setting VT setting

No. [APPLVT] setting [APPLVE]=3PN/3PP
3P 2P 1P [APPLVE]= [APPLVS]=
3PN 3PP
On setting On setting
TB4 A phase current A phase current --- --- --- --- ---
1-2 Ia Ia
TB4 B phase current --- --- --- --- --- ---
3-4 Ib
TB4 C phase current C phase current --- --- --- --- ---
5-6 Ic Ic
TB4 Residual current Residual Residual
7-8 Ie current Ie current Ie
or or or --- --- --- ---
Zero sequence Zero sequence Zero sequence
current Ie, Ise(*1) current Ie,Ise current Ie,Ise

A phase A-phase to
TB2 --- --- --- B-phase ---
1-2 voltage Va
Voltage Vab
B phase B-phase to
TB2 --- --- --- C-phase ---
3-4 voltage Vb
Voltage Vbc
C phase C-phase to
TB2 --- --- --- A-phase ---
5-6 voltage Vc
Voltage Vca
TB2 --- --- --- --- --- Residual
7-8 voltage Ve(*2)
Reference
TB4 voltage Vs(*2) for
9-10 synchronism
check(*2)
(*1): Ise required for SEF elements. In model ∗2∗ and [APPLCT]=3P,
the residual current is calculated by Ia , Ib and Ic.
(*2): Ve and Vs are available only when [APPLVT]=3PN or [APPLVT]=3PP.

3.2.2 Binary Input Signals

The GRE140 provides 6 (Model 400/420/700/720), 12 (Model 401/421/701/721) or 18 (Model

402/422/702/722) programmable binary input circuits. Each binary input circuit is programmable
by PLC function, and provided with the function of Logic level inversion.

Logic level inversion and detection threshold voltage change

The binary input circuit of the GRE140 is provided with a logic level inversion function, a pick-up
and drop-off delay timer function and a detection threshold voltage change as shown in Figure
3.2.1. Each input circuit has a binary switch BISNS which can be used to select either normal or
inverted operation. This allows the inputs to be driven either by normally open or normally closed

 119 
 6 F 2 T 0 1 7 7

contacts. Where the driving contact meets the contact conditions then the BISNS can be set to
“Norm” (normal). If not, then “Inv” (inverted) should be selected. The pick-up and drop-off delay
times can be set 0.0 to 300.00s respectively.
The binary input detection nominal voltage is programmable by the user, and the setting range
varies depending on the rated DC power supply voltage. In the case that a 110V / 220Vdc rated
model is ordered, the input detection nominal voltage can be set to 48V, 110V or 220V for BI1 and
BI2, and to 110V or 220V for the other BIs. In the case of a 24 / 48Vdc model, the input detection
nominal voltage can be set to 12V, 24V or 48V for BI1 and BI2, and to 24V or 48V for the other
BIs.

The binary input detection threshold voltage (i.e. minimum operating voltage) is normally set at
77V and 154V for supply voltages of 110V and 220V respectively. In case of 24V and 48V
supplies, the normal thresholds are 16.8V and 33.6V respectively. Binary inputs can be configured
for operation in a Trip Circuit Supervision (TCS) scheme by setting the [TCSPEN] switch to
“Enable”. In case TCS using 2 binary inputs is to be applied (refer to Section 3.3.3), then the
binary input detection threshold of BI1 and BI2 should be set to less than half of the rated dc
supply voltage.

The logic level inversion function, pick-up and drop-off delay timer and detection voltage change
settings are as follow:
Element Contents Range Step Default
BI1SNS – BI(*)SNS Binary switch Norm/ Inv Norm
BITHR1 BI1-2 threshold Voltage 48 / 110 / 220 110
(12 / 24 / 48 ) (24)
(24 / 48 / 110 ) (48)
BITHR2 BI3-(*) threshold voltage 110 / 220 110
(24 / 48) (24)
(48 / 110) (48)
TCSPEN TCS enable OFF / ON / OPT-ON OFF
BI1PUD – BI(*)PUD Delayed pick-up timer 0.00 - 300.00s 0.01s 0.00
BI1DOD – BI(*)DOD Delayed drop-off timer 0.00 - 300.00s 0.01s 0.00
(*):The number of binary inputs. The model 4*0 has 6 binary inputs,
the model 4*1 has 12 binary inputs, the model 4*2 has 18 binary inputs.
At the PC interface software RSM100 (Relay Setting and Monitoring system), BI threshold voltage
settings are indicated by V1, V2 and V3. The V1, V2 and V3 are distinguished with 11th digit of
ordering code for supply voltage, as shown below,:
Supply voltage (11th digt of ordering cord) V1 V2 V3
110 - 220V (-1x-xx) BITH1 48V 110V 220
BITH2 110V 220V -
48 - 110V (-2x-xx) BITH1 24V 48V 110V
BITH2 48V 110V -
12 - 48V (-Ax-xx) BITH1 12V 24V 48V
BITH2 24V 48V -

The binary input signals can be programmed to switch between two settings groups. Change of
active setting group is performed by PLC (Signal No. 2640 and 2641).
Four alarm messages (Alarm1 to Alarm4) can be set. The user can define a text message within 16

 120 
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characters for each alarm. The messages are valid for any of the input signal BIs by setting. When
inputs associated with that alarm are raised, the defined text is displayed on the LCD. These alarm
output signals are signal Nos. 2560 to 2563.
GRE140
(+) (−) BI1PUD BI1DOD [BI1SNS]
BI1 t 0 0 t
BI1 command
BI1
"Norm"
1
"Inv"
BI2PUD BI2DOD [BI2SNS]
BI2 t 0 0 t
BI2 command
BI2
"Norm"
[BITHR1]
1
+
"220V" "Inv"
BI3 +
"110V"
+
"48V"
BI(*)PUD BI(*)DOD [BI(*)SNS
BI(*) t 0 0 t ]
BI(*) BI(*) command
"Norm"
[BITHR2] 1
+ "Inv"
"220V"
+
"110V"

0V

Figure 3.2.1 Logic Level Inversion

Function selection

The input signals BI COMMAND are programed by PLC. Each input signal can be allocated for
one or some of those functions by setting. For setting, refer to Section 4.2.6.8.

The default settings of BI are refer to Appendix H.

3.2.3 Binary Output Signals

The number of binary output signals and their output terminals are as shown in Appendix F. All
outputs, except the relay failure signal, can be configured.
The signals shown in the signal list in Appendix B can be assigned to the output relay BOs
individually or in arbitrary combinations. The output relays BO1 and BO2 connect to CB OPEN /
CLOSE for CB control. When the control function is enabled, the CB Open & CB Close
commands are linked directly to output relays BO1 & BO2 respectively and all other signals are
blocked from output relay BO1.
The reset time of the tripping output relay following fault clearance can be programmed. The
setting is respective for each output relay.
The signals shown in the signal list in Appendix B can be assigned to the output relay BOs
individually or in arbitrary combinations. Signals can be combined using either an AND circuit or

 121 
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an OR circuit with 6 gates each as shown in Figure 3.2.2. The output circuit can be configured
according to the setting menu. Appendix H shows the factory default settings.
Further, each BO has a programmable reset characteristic, settable for instantaneous drop-off
“Ins”, for delayed drop-off “Dl”, for dwell operation “Dw” or for latching operation “Lat” by the
scheme switch [RESET]. The time of the delayed drop-off “Dl” or dwell operation “Dw” can be
set by TBO. When “Dw” is selected, the BO operates for the TBO set time if the input signal does
not continue longer than the TBO set time. If the duration of the input signal exceeds the TBO set
time, the BO output is continuous for the input signal time.
When the relay is latched, it can be reset with the RESET key on the relay front panel or a binary
input. This resetting resets all the output relays collectively.
The relay failure contact closes when a relay defect or abnormality in the DC power supply circuit
is detected.
Signal List

& Auxiliary relay

6 GATES
Appendix B
or ≥1

≥1
6 GATES

&

TBO
0 t
&
[RESET] "Dw" 0.00 – 10.00s
+ "Dl"
& S
F/F
"Lat"
R

Reset button
+
≥
768 By PLC
BI1_COMMAND 1639 IND.RESET

Figure 3.2.3 Configurable Output

Settings

The setting elements necessary for binary output relays and their setting ranges are as follows:
Element Range Step Default Remarks
[RESET] Ins / Dl / Dw /Lat See Appendix D Output relay reset time. Instantaneous,
delayed, dwell or latched.
[Logic] OR / AND See Appendix D BO gate logic.
TBO 0.00 – 10.00s 0.01s 0.2s BO output timer.

3.2.4 Frequency

GRE140 can be set in accordance with the rated frequency of the system i.e. 50Hz or 60Hz. If the
rated frequency is set incorrectly, it may not operate correctly because GRE140 is the measured
value cannot be detected correctly.

 122 
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3.2.5 PLC (Programmable Logic Controller) Function

GRE140 is provided with a PLC function allowing user-configurable sequence logic using binary
signals. The sequence logic with timers, flip-flops, AND, OR, XOR, NOT logic, etc. can be
produced by using the PC software “PLC tool” and linked to signals corresponding to relay
elements or binary circuits.
Configurable binary inputs and the initiation trigger for fault records and disturbance records are
programmed using the PLC function. Temporary signals are provided for complicated logic or for
using a user-configured signal in many logic sequences.
PLC logic is assigned to protection signals by using the PLC tool. For PLC tool, refer to the PLC
tool instruction manual.

Figure 3.2.5.1 Sample Screen for PLC Tool

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3.3 Automatic Supervision

3.3.1 Basic Concept of Supervision

Though the protection system is in a non-operating state under normal conditions, a power system
fault may occur at any time, and the protection must operate for the fault without fail. Therefore,
the automatic supervision function, which checks the health of the protection system during
normal operation, plays an important role. The GRE140 is provided with an automatic supervision
function, based on the following concepts:
• The supervising function should not affect the protection performance.
• Perform supervision with no omissions wherever possible.
• When a failure occurs, it is recorded as an Alarm record, and the user should be able to easily
identify the location of the failure.
• Under relay failure detection , CB open control is enabled, but CB close control is disabled.

3.3.2 Relay Monitoring

The relay is supervised by the following functions.

AC input imbalance monitoring

The AC current/voltage input is monitored to check the health of the AC input circuit. The failure
is determined if the following equation is satisfied.
• CT circuit current monitoring for [APPLCT] = “3P” setting
Max(|Ia|, |Ib|, |Ic|) − 4 × Min(|Ia|, |Ib|, |Ic|) ≥ k0
where,
Max(|Ia|, |Ib|, |Ic|) = Maximum amplitude among Ia, Ib and Ic
Min(|Ia|, |Ib|, |Ic|) = Minimum amplitude among Ia, Ib and Ic
k0 = 20% of rated current
• Zero sequence voltage monitoring for [APPLVT]= “3PN” or “3PP” setting
|Va + Vb + Vc| / 3 ≥ 6.35 (V)
• Negative sequence voltage monitoring for [APPLVT]= “3PN” or “3PP” setting
|Va + a2Vb + aVc| / 3 ≥ 6.35 (V)
where, a = Phase shift of 120°, a2 = Phase shift of 240°

The CT circuit current monitoring allows high sensitivity detection of failures that have occurred
in the AC input circuit. This monitoring can be disabled by scheme switch [CTSVEN].
The zero sequence monitoring and negative sequence monitoring allow high sensitivity detection
of failures that have occurred in the AC input circuits. These monitoring functions can be disabled
by scheme switches [V0SVEN] and [V2SVEN] respectively.
The negative sequence voltage monitoring allows high sensitivity detection of failures in the
voltage input circuit, and it is effective for detection particularly when cables have been connected
with the incorrect phase sequence.

A/D accuracy checking

An analog reference voltage is input to a prescribed channel in the analog-to-digital (A/D)

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converter, and a check is made to ensure that the data after A/D conversion is within a prescribed
range, and that the A/D conversion characteristics are correct.

Memory monitoring
Memory is monitored as follows, depending on the type of memory, and checks are performed to
verify that memory circuits are healthy:
• Random access memory monitoring:
Writes/reads prescribed data and checks the storage function.
• Program memory monitoring: Checks the checksum value of the written data.
• Setting value monitoring: Checks discrepancies between the setting values stored in
duplicate.

Watchdog Timer
A hardware timer that is cleared periodically by the software is provided, which checks that the
software is running normally.

DC Supply Monitoring
The secondary voltage level of the built-in DC/DC converter is monitored, and is checked to see
that the DC voltage is within a prescribed range.

3.3.3 CT Failure Supervision

This function is available for [APPL-CT] = “3P” setting only.

Figure 3.3.1 shows the scheme logic of the CT failure supervision (CTFS). If the residual
overcurrent element EFF(EFCF) operates and the residual overvoltage element ZOVF(ZOVCF)
does not operate, CT failure (CTF) is detected. When the CTFS detects a CTF, it can alarm and
block various protections as EF, NOC and UC protections etc.
The CTF signal is reset 100 ms after the CT failure condition has reset. When the CTF continues
for 10s or more, “Err: CTF” is displayed in LCD message.
If the PLC signal CTF_BLOCK is received, this function is blocked. If the PLC signal EXT_CTF
is received, the CT failure (CTF) is output independently of this CTF function.
This function can be enabled or disabled by scheme switch [CTFEN] and has a programmable
reset characteristic. For latching operation, set to “ON”, and for automatic reset after recovery, set
to “OPT-ON”.
231 385
EFCF & ≥1 & ≥1 CTF

232 t 0 t 0
ZOVCF & 1 & 1 NON CTF
1 0.015s 0.1s
& t 0
CTF_ALM
[CTFEN] "ON" 10s
≥1
+
"OPT-ON"
CB CLOSE 1 CB NON BLK
0.2s
A.M.F. ON

1616 CTF_BLOCK 1

1620 EXT_CTF

Figure 3.3.1 CT Failure Supervision

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3.3.4 VT Failure Supervision

This function is available for [APPLVT] = “3PN” or “3PP” settings.

When a fault occurs in the secondary circuit of the voltage transformer (VT), the voltage
dependent measuring elements may operate incorrectly. GRE140 incorporates a VT failure
supervision function (VTFS) as a measure against such incorrect operation. When the VTFS
detects a VT failure, it can alarm and block the following voltage dependent protections.
• Directional overcurrent protection
• Directional earth fault protection
• Directional sensitive earth fault protection
• Directional negative phase sequence overcurrent protection
• Undervoltage protection
• Zero phase sequence overvoltage protection
• Negative phase sequence overvoltage protection
A binary input signal (external VTF) to indicate a miniature circuit breaker trip in the VT circuits
is also available for the VTFS.

Scheme logic
Figure 3.3.2 shows the scheme logic for the VTFS. VT failure is detected by the following two
schemes.
VTF1: The phase undervoltage element UVF(UVVF) operates (UVF=1) when the three
phases of the circuit breaker are closed (CB CLOSE=1) and the phase current change
detection element OCDF (OCDVF) does not operate (OCDF=0).
VTF2: The residual overcurrent element EFF(EFVF) does not operate (EFF=0), the residual
overvoltage element ZOVF(ZOVVF) operates (ZOVF=1) and the phase current
change detection element OCDF(OCDVF) does not operate (OCDF=0)
In order to prevent detection of false VT failures due to unequal pole closing of the circuit breaker,
the VTFS is blocked for 200 ms after line energization.
The VTF signal is reset 100 ms after the VT failure condition has reset. When the VTF continues
for 10s or more, “Err: VTF1” or “Err: VTF2” is displayed as an LCD message.
If the PLC signal VTF_BLOCK is received, this function is blocked. If the PLC signal EXT_VTF
is received, the VT failure (VTF) is output independently of this VTF function.
VTF1 and VTF2 can be enabled or disabled respectively by the scheme switches [VTF1EN] and
[VTF2EN] and has a programmable reset characteristic. For latching operation, set to “ON”, and
for automatic reset after recovery, set to “OPT-ON”.

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t 0
233 VTF1 ALM
A
10s
234 236 387
UVF B ≥1 ≥1 ≥1 VTF1
235 & &
C 1 t 0 0 t
237 1 NON VTF1
A
238 0 t 240 0.015s 0.1s
OCDF B ≥1 S
& 1 &
239 F/F
C 0.1s
R 386
≥1 VTF

& 1
"ON" ≥1 NON VTF
[VTF1EN] "OPT-ON" ≥1
+ t 0
CB CLOSE VTF2 ALM
241 10s
388
ZOVVF ≥1 & ≥1 VTF2
&
EFVF
242 ≥1 & 1 t 0 0 t
& 1 NON VTF2
0.015s 0.1s

& 1
"ON"
[VTF2EN]
"OPT-ON" ≥1
+
CB NON BLK
A.M.F. ON

1617 VTF_BLOCK 1

1634 EXT_VTF

Figure 3.3.2 VT Failure Supervision

3.3.5 Trip Circuit Supervision

The circuit breaker tripping control circuit can be monitored by either one or two binary inputs, as
described below.

Trip Circuit Supervision using 1 binary input

The circuit breaker tripping control circuit can be monitored using a single binary input. Figure
3.3.3 shows a typical scheme. A binary input BIn is assigned to No.1632:TC_FAIL signal by
PLC. When the trip circuit is complete, a small current flows through the binary input and the trip
circuit. Then logic signal of the binary input circuit BIn is "1".
If the trip supply is lost or if a connection becomes open circuit, then the binary input resets and
the BIn output is "0". A trip circuit fail alarm TCSV is output when the BIn output is "0".
If a trip circuit failure is detected, then “ALARM” LED is lit and “Err: TC” is displayed in LCD
message.
Monitoring is enabled by setting the scheme switch [TCSPEN] to "ON" or "OPT-ON" and the one
BI selected "TCFAIL". When "OPT-ON" is selected, monitoring is enabled only while CB is
closed.
(+) Trip circuit supervision

BIn
Trip t 0 1270
1632 TC_FAIL 1 & TCSV
output
0.4s
CB CLOSE
& ≥1
"OPT-ON"
[TCSPEN]
+ "ON"
CB trip coil

Figure 3.3.3 Trip Circuit Supervision Scheme Logic

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Trip Circuit Supervision using 2 binary inputs

The circuit breaker tripping control circuit can also be monitored using two binary inputs. Figure
3.3.4 shows a typical scheme. When the trip circuit is complete, a small current flows in the
photo-couplers, the circuit breaker auxiliary contacts and the trip coil. This current flows for both
the breaker open and closed conditions.
If the trip circuit supply is lost or if a connection becomes open circuit then the TCS issues a Trip
Circuit Fail alarm.
Monitoring is enabled by setting the scheme switch [TCSPEN] to "ON" or "OPT-ON" and the two
BIs selected "TCFAIL". When "OPT-ON" is selected, monitoring is enabled only while CB is
closed. TCS by 2BIs should be applied using BI1 and BI2 for the BI inputs. The TCS with 2BIs
sets the BI threshold voltage ([BITHR1]) to approximately half of the trip supply voltage. If the
trip supply voltage is 110V (or 24V) , [BITHR1] sets "48" (or "12").

GRE140 Circuit Breaker

Trip Output CB Aux. CB Trip Coil -ve Trip

+ve
Contacts Supply
Trip
Supply

Resistor

Binary Input Binary Input

(BI1) (BI2)

Figure 3.3.4 Scheme Logic of Trip Circuit Supervision using 2 binary inputs
The resistors connected in series with the binary inputs are to prevent unnecessary tripping of the
circuit breaker if any one component suffers a short-circuit condition. The value of resistance
should be chosen to limit the current flowing through the circuit breaker trip coil to 60mA in the
event of a short circuit of BI1 with the circuit breaker closed. A typical value for a 110V dc rated
circuit is 3.3kΩ.

3.3.6 Circuit Breaker Monitoring

The relay provides the following circuit breaker monitoring functions.

Circuit Breaker State Monitoring

Circuit breaker state monitoring is provided for checking the health of a circuit breaker (CB). If
two binary inputs are programmed to the functions ‘CB_N/O_CONT’ and ‘CB_N/C_CONT’,
then the CB state monitoring function becomes active. In normal circumstances these inputs are in
opposite states. Figure 3.3.5 shows the scheme logic. If both show the same state for a duration of
five seconds, then a CB state alarm CBSV operates and “Err:CB” and “CB err” are displayed in an
LCD message and event record message respectively.
The monitoring can be enabled or disabled by setting of scheme switch [CBSMEN].
t 0 1271
1633 CB_N/O_CONT =1 1 CBSV
&
5.0s

1634 CB_N/C_CONT

[CBSMEN]
"ON"
+

Figure 3.3.5 CB State Monitoring Scheme Logic

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Normally open and normally closed contacts of the CB are connected to binary inputs BIm and
BIn respectively, and functions of BIm and BIn are assigned to “CB_N/O_CONT” and
“CB_N/C_CONT” by PLC.

Circuit Breaker Condition Monitoring

Periodic maintenance of a CB is required for checking the trip circuit, the operation mechanism
and the interrupting capability. Generally, maintenance is based on a time interval or a number of
fault current interruptions.
The following CB condition monitoring functions are provided to determine the time for
maintenance of the CB:
• Trip is counted for maintenance of the trip circuit and CB operating mechanism. The trip
counter increments the number of tripping operations performed. An alarm is issued and
informs the user of the time for maintenance when the count exceeds a user-defined setting
TCALM.
The trip count alarm can be enabled or disabled by setting the scheme switch [TCAEN].
The counter can be initiated by PLC signals TP_COUNT and TP_COUNT-∗. The default
setting is the TP_COUNT and is assigned to the GEN_TRIP signal.
• Sum of the current breaking quantity ∑Iy is counted for monitoring the interrupting capability
of CB. The ∑Iy counter increments the value of current to the power ‘y’, recorded at the time of
issue of the tripping signal, on a phase by phase basis. For oil circuit breakers, the dielectric
withstand capability of the oil generally decreases as a function of ∑I2t, and maintenance such
as oil changes, etc., may be required. ‘I’ is the fault current interrupted by the CB. ‘t’ is the
arcing time within the interrupter tank and it cannot be determined accurately. Therefore, ‘y’ is
normally set to 2 to monitor the square of the interrupted current. For other circuit breaker
types, especially those for HV systems, ‘y’ may be set lower, typically 1.0. An alarm is issued
when the count for any phase exceeds a user-defined setting ∑IyALM. This feature is not
available in GRE140-110. The ∑Iy count alarm can be enabled or disabled by setting the
scheme switch [∑IyAEN].
The counter can be initiated by PLC signals SGM_IY_A to SGM_IY_C. The default settings
for the SGM_IY_A to SGM_IY_C are assigned to the GEN_TRIP signal.
• Operating time monitoring is provided for CB mechanism maintenance. It checks CB
operating time and the need for mechanism maintenance is informed if CB operation is slow.
The operating time monitor records the time between issuing the tripping signal and the phase
currents falling to zero. An alarm is issued when the operating time for any phase exceeds a
user-defined setting OPTALM. The operating time is set in relation to the specified
interrupting time of the CB. The operating time alarm can be enabled or disabled by setting the
scheme switch [OPTAEN].
The CB operating time monitoring feature can be initiated by PLC signals OT_ALARM_A to
OT_ALARM_C. The default settings for OT_ALARM_A to OT_ALARM_C are assigned to
the GEN_TRIP signal.
The maintenance program should comply with the switchgear manufacturer’s instructions.

3.3.7 PLC Data and IEC61850 Monitoring Data Monitoring

If there is a failure in PLC data or IEC61850 mapping data, the function may be prevented.
Therefore, PLC data and IEC61850 mapping data are monitored and the respective alarms "PLC
stop" and "MAP stop" are issued if a failure is detected.

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3.3.8 IEC61850 Communication Monitoring

The sending and receiving functions on the LAN communication are monitored. The receiving
function is executed by checking GOOSE message receiving status, and the sending function is
executed by checking a “Ping” response to the other party. If a failure is detected, an alarm of
"GOOSE stop" or "Ping err" is issued.
These functions are disabled by setting the scheme switches [GSECHK] and [PINGCHK].

3.3.9 Failure Alarms

When a failure is detected by the automatic supervision, it is followed with an LCD message, LED
indication, external alarm and event recording. Table 3.3.1 summarizes the supervision items and
alarms.
The LCD messages are shown on the "Auto-supervision" screen, which is displayed automatically
when a failure is detected or displayed by pressing the VIEW key. The event record messages
are shown on the "Event record" screen by opening the "Record" sub-menu.
The alarms are retained until the failure is recovered.
The alarms can be disabled collectively by setting the scheme switch [AMF] to "OFF". The AC
input imbalance monitoring alarms can be disabled collectively by setting the scheme switches
[CTSVEN], [V0SVEN] and [V2SVEN] to "OFF". The setting is used to block unnecessary alarms
during commissioning, test or maintenance.
When the Watchdog Timer detects that the software is not running normally, LCD display and
event recording of the failure may not function normally.

Table 3.3.1 Supervision Items and Alarms

Supervision Item LCD LED LED LED Event record Message

Message "IN SERVICE" "ALARM" "Relay fail"
Err:CT,
AC input imbalance CT err, V0 err, V2 err,
Err:V0, On/Off (2) On (4)
monitoring Relay fail or Relay fail-A (2)
Err:V2 (1)
A/D accuracy check Err:A/D Off On (4) Relay fail
Memory monitoring Err:SUM,
Err:RAM,
Off On (4) Relay fail
Err:BRAM,
Err:EEP
Watchdog Timer ---- Off On (4) ----
Power supply monitoring Err:DC Off (3) Off Relay fail-A
Trip circuit supervision Err:TC On On Off TC err, Relay fail-A
CB state monitoring Err:CB On On Off CB err, Relay fail-A
CB condition monitoring ALM:TP TP COUNT ALM,
On On Off
Trip count alarm COUNT Relay fail-A
Operating time alarm ALM: OP time On On Off OP time ALM, Relay fail-A
∑Iy count alarm ALM:∑IY On On Off ∑IY-A ALM, ∑IY-B ALM or
∑IY-C ALM, Relay fail-A
CT failure supervision Err:CTF On On Off CTF err, Relay fail-A
VT failure supervision Err:VTF1, On On Off VTF1 err, VTF2 err,
Err:VTF2 Relay fail-A
(1): Various messages are provided as expressed with "Err:---" in the table in Section 6.7.2.
(2): The LED is on when the scheme switch [CTSVEN], [V0SVEN] or [V2SVEN] is set to "ALM"

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and off when set to "ALM & BLK" (refer to Section 3.3.6). The message "Relay fail-A" is
recorded when the scheme switch [SVCNT] is set to "ALM".
(3): Whether the LED is lit or not depends on the degree of the voltage drop.
(4): The binary output relay "FAIL" operates except for DC supply fail condition.

The failure alarm and the relationship between the LCD message and the location of the failure is
shown in Table 6.7.1 in Section 6.7.2.

3.3.10 Trip Blocking

When a failure is detected by the following supervision items, the trip function is blocked as long
as the failure exists, and is restored when the failure is removed.
• A/D accuracy check
• Memory monitoring
• Watchdog Timer
When a fault is detected by the AC input imbalance monitoring function, the scheme switches
[CTSVEN], [V0SVEN] and [V2SVEN] setting can be used to determine if both tripping is
blocked and an alarm is output, or if only an alarm is output.

3.3.11 Setting
The setting element necessary for the automatic supervision and its setting range are shown in the
table below.
Element Range Step Default Remarks
CTF supervision
EFF 0.05 – 25.00 A 0.01 A 0.20 A Residual overcurrent threshold setting
ZOVF 5.0 – 130.0 V 0.1 V 20.0 V Residual overvoltage threshold setting
VTF supervision
UVF 5.0 – 130.0 V 0.1 V 51.0 V Undervoltage threshold setting
OCDF 0.1 A (Fixed) Phase current change detection
[CTFEN] OFF/ON/OPT-ON OFF CTF supervision
[VTF1EN] OFF/ON/OPT-ON OFF VTF1 supervision
[VTF2EN] OFF/ON/OPT-ON OFF VTF2 supervision
[CTSVEN] OFF/ALM&BLK/ALM ALM AC input imbalance monitoring (current)
[V0SVEN] OFF/ALM&BLK/ALM ALM AC input imbalance monitoring (Vo)
[V2SVEN] OFF/ALM&BLK/ALM ALM AC input imbalance monitoring (V2)
[TCSPEN] OFF/ON/OPT-ON OFF Trip circuit supervision
[CBSMEN] OFF/ON OFF CB condition supervision
[TCAEN] OFF/ON OFF Trip count alarm
[∑IyAEN] OFF/ON OFF ∑Iy count alarm
[OPTAEN] OFF/ON OFF Operate time alarm
TCALM 1 - 10000 1 10000 Trip count alarm threshold setting
∑IyALM 10 – 10000 E6 E6 10000 ∑Iy alarm threshold setting
YVALUE 1.0 – 2.0 0.1 2.0 y value setting
OPTALM 100 – 5000 ms 1 ms 1000 ms Operate time alarm threshold setting

When setting ZOVF and EFF, the maximum detection sensitivity of each element should be set
with a margin of 15 to 20% taking account of variations in the system voltage, the asymmetry of
the primary system and CT and VT error.

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3.4 Recording Function

The GRE140 is provided with the following recording functions:
Fault recording
Event recording
Disturbance recording
Counters
These records are displayed on the LCD on the relay front panel or on a local or remote PC.

3.4.1 Fault Recording

Fault recording is started by a tripping command from the GRE140 and the following items are
recorded for a fault:
Date and time
Trip mode
Operating phase
Fault location
Relevant events
Power system quantities
User configurable initiation
The user can configure four fault record triggers (Signal No.:2624 to 2627) by PLC. Any of the
input signals as shown in Appendix B can be assigned to these fault record trigger signals.
The fault records are stored after 2 cycle from tripping command or fault record trigger. When the
fault of OC and EF elements does NOT continued more than 2 cycle , the fault records at tripping
command are stored.
Up to the 4 most-recent faults are stored as fault records. If a new fault occurs when 4 faults have
been stored, the oldest fault record is deleted and the record of the latest fault is then stored.

Date and time occurrence

This is the time at which a tripping command has been initiated. The time resolution is 1 ms using
the relay internal clock.

Trip mode
This shows the protection scheme such as OC1, EF1, UV1 etc. that output the tripping command.

Faulted phase
This is the phase to which an operating command is output.

Fault location
The distance to the fault point calculated by the fault locator is recorded.
The distance is expressed in km and as a percentage (%) of the line length.
Relevant events
Such events as autoreclose, re-tripping following the reclose-on-to-a fault or autoreclose are
recorded with time-tags.

Power system quantities

The following power system quantities are recorded in pre-fault and post-fault records.

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- Magnitude and phase angle of phase voltage (Va, Vb, Vc)

- Magnitude and phase angle of phase-to-phase voltage (Vab, Vbc, Vca)
- Magnitude and phase angle of symmetrical component voltage (V1, V2, V0)
- Magnitude and phase angle of zero sequence voltage which is measured directly in the form of
the system residual voltage (Ve)
- Magnitude and phase angle of the reference voltage for synchronism check (Vs)
- Magnitude and phase angle of phase current (Ia, Ib, Ic)
- Magnitude and phase angle of symmetrical component current (I1, I2, I0)
- Magnitude and phase angle of zero sequence current from residual circuit (Ie)
- Magnitude and phase angle of zero sequence current from core balance CT (Ise) for model 420
series
- Percentage of thermal capacity (THM%) only recorded at post-fault
- Frequency (f)
The zero sequence current Ie in model 420 is calculated from the three phase input currents and the
calculated Ie (I0) is displayed. Ie in other settings and models is displayed using the current fed
from the CT.

FR_mode
When the ARC element operate, the fault recording mode can be set “Mode 1” or “Mode 2”.
- Mode 1 ; One fault recording during the ARC operating.
- Mode 2 ; Each fault recording during the ARC operating.

Settings
The elements necessary for initiating fault recording are as follows:
Element Range Step Default Remarks
[FL] Off / On Off Fault Locator function.
[FR_Mode] Mode1 / Mode2 Mode1 Fault recording mode
when ARC operation.

3.4.2 Event Recording

The events shown are recorded with a 1 ms resolution time-tag when the status changes. Up to 200
records can be stored. If an additional event occurs when 200 records have been stored, the oldest
event record is deleted and the latest event record is then stored.
The user can set a maximum of 128 recording items, and their status change mode. The event
items can be assigned to a signal number in the signal list. The status change mode is set to “On”
(only recording On transitions) or “On/Off”(recording both On and Off transitions) mode by
setting. The “On/Off” mode events are specified by the “Bi-trigger events” setting. If the
“Bi-trigger events” is set to “100”, No.1 to 100 events are “On/Off” mode and No.101 to 128
events are “On” mode.
The name of an event can be set by RSM100. A maximum of 22 characters can be set, but the LCD
displays only 11 characters. Therefore, it is recommended that a maximum of 11 characters are set.
The set name can be viewed on the Set.(view) screen.

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The elements necessary for event recording and their setting ranges are shown in the table below.
The default setting of event record is shown in Appendix G.
Element Range Step Default Remarks
BITRN 0 - 128 1 100 Number of bi-trigger(on/off) events
EV1 – EV128 0 - 3071 Assign the signal number

3.4.3 Disturbance Recording

Disturbance recording is started when the overcurrent starter element operates or a tripping
command is initiated. Further, disturbance recording is started when a start command by the PLC
is initiated. The user can configure four disturbance record triggers (Signal No.:2632 to 2635) by
PLC.
The records include a maximum of 8 analogue signals as shown in Table 3.4.1, 32 binary signals
and the dates and times at which recording started. Any binary signal shown in Appendix C can be
assigned by the binary signal setting for the disturbance record.

Table 3.4.1 Analog Signals for Disturbance Recording

Model
Model 400 Model 420
APPL setting
APPLCT = 1P I0 Ie(I0), Ise(I0)
CT APPLCT = 2P Ia, Ic, Ie(I0) Ia, Ic, Ie(I0), Ise(I0)
APPLCT = 3P Ia, Ib, Ic, Ie(I0) Ia, Ib, Ic, Ise(I0)
APPLVT = 3PN,(3PP) Va, Vb, Vc Va, Vb, Vc
APPLVE = Off
APPLVS = Off (Vab, Vbc, Vca) (Vab, Vbc, Vca)
VT
APPLVT = 3PN, (3PP) Va, Vb, Vc, Ve, Vs Va, Vb, Vc, Ve, Vs
APPLVE = On
APPLVS = On (Vab, Vbc, Vca, Ve, Vs) (Vab, Vbc, Vca, Ve, Vs)

The LCD display only shows the dates and times of disturbance records stored. Details can be
displayed on a PC. For how to obtain disturbance records on the PC, see the PC software
instruction manual.
The pre-fault recording time can be set between 0.1 and 4.9s and the post-fault recording time can
be set between 0.1 and 3.0s. But the total for the pre-fault and post-fault recording time is 5.0s or
less. The number of records stored depends on the post-fault recording time. The approximate
relationship between the post-fault recording time and the number of records stored is shown in
Table 3.4.2.
Note: If the recording time setting is changed, the records stored so far are deleted.

Table 3.4.2 Fault Recording Time and Number of Disturbance Records Stored

Recording time 0.2s 1.0s 1.5s 2.0s 3.0s 4.0s 5.0s

50Hz 40 29 19 14 9 7 5
60Hz 40 24 16 12 8 6 5
Note: Recording time = pre-fault recording time + post-fault recording time.

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Settings
The elements necessary for initiating a disturbance recording and their setting ranges are shown in
the table below.
Element Range Step Default Remarks
Time1 0.1-4.9 s 0.1 s 0.3 Pre-fault recording time
Time2 0.1-4.9 s 0.1 s 0.3 Post-fault recording time
OC 0.1-150.0 A 0.01 A 2.00 A Overcurrent detection
EF 0.10-100.0 A 0.01 A 0.60 A Earth fault detection
SEF 0.001-1.00A 0.001 A 0.200 A Sensitive earth fault detection
NOC 0.10-10.0 A 0.01 A 0.40A Negative sequence overcurrent detection
OV 10.0-200.0 V 0.1 V 120.0 V Overvoltage detection
UV 5.0-130.0 V 0.1 V 60.0 V Undervoltage detection
ZOV 1.0-160.0 V 0.1 V 20.0 V Zero sequence overvoltage detection
NOV 1.0-160.0 V 0.1 V 20.0 V Negative sequence overvoltage detection
Starting the disturbance recording by a tripping command or the starter element listed above is
enabled or disabled by setting the following scheme switches.

Element Range Step Default Remarks

[Trip] OFF/ON ON Start by tripping command
[OC] OFF/ON ON Start by OC operation
[EF] OFF/ON ON Start by EF operation
[SEF] OFF/ON OFF Start by SEF operation
[NOC] OFF/ON ON Start by NC operation
[OV] OFF/ON ON Start by OV operation
[UV] OFF/ON ON Start by UV operation
[ZOV] OFF/ON ON Start by ZOV operation
[NOV] OFF/ON ON Start by NOV operation

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3.5 Metering Function

The GRE140 measures current and demand values for phase currents, phase and phase-to-phase
voltages, residual current, residual voltage, symmetrical component currents and voltages,
frequency, power factor, active and reactive power, and apparent power. The measurement data
shown below is displayed on the LCD on the relay front panel or on a local or remote PC.
Current: The following quantities are measured and updated every second.
- Magnitude and phase angle of phase current (Ia, Ib, Ic)
- Magnitude and phase angle of zero sequence current from residual circuit (Ie)
- Magnitude and phase angle of zero sequence current from core balance CT (Ise) for model 420
series
- Magnitude of positive, negative and zero sequence currents (I1, I2, I0)
- The ratio of negative to positive sequence current (I2/I1)
- Magnitude and phase angle of phase voltage (Va, Vb, Vc)
- Magnitude and phase angle of phase-to-phase voltage (Vab, Vbc, Vca)
- Magnitude and phase angle of zero sequence voltage which is measured directly in the form of
the system residual voltage (Ve)
- Magnitude and phase angle of reference voltage for synchronism check (Vs)
- Magnitude and phase angle of symmetrical component voltage (V1, V2, V0)
- Active power (P)
- Reactive power (Q)
- Apparent power (S)
- Power factor (PF)
- watt-hour (WH)
- var-hour (varH)
- Frequency (f)
- Frequency rate of change(df)
- Percentage of thermal capacity (THM%)
- Direction of each current (Ia, Ib, Ic, Ie, Ise, I2)
Demand
- Maximum and minimum of phase voltage (Va, Vb, Vc: max, min)
- Maximum and minimum of zero sequence voltage (V0: max, min)
- Maximum and minimum of the system residual voltage (Ve: max, min)
- Maximum and minimum of the reference voltage for synchronism check (Vs: max, min)
- Maximum of phase current (Ia, Ib, Ic: max.)
- Maximum of zero sequence current from residual circuit (Ie: max)
- Maximum of zero sequence current from core balance CT (Ise: max) for model 420 series
- Maximum of negative sequence current (I2: max.)
- Maximum of the ratio of negative to positive sequence current (I2/I1(I21): max)
- Maximum of active power (P: max.)
- Maximum of reactive power (Q: max.)
- Maximum of apparent power (S: max.)
- Maximum and minimum of frequency (f: max, min)

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- watt-hour (WH)
- var-hour (varH)
The above system quantities are displayed in values on the primary side or on the secondary side
as determined by a setting. To display accurate values, it is necessary to set the CT ratio as well.
For the setting method, see "Setting the metering" in 4.2.6.6 and "Setting the parameter" in 4.2.6.7.
In the case of the maximum and minimum values display above, the measured quantity is averaged
over a rolling 15 minute time window, and the maximum and minimum recorded average values
are shown on the display screen.
The zero sequence current Ie in the model 420 series is calculated from the three phase input
currents and the calculated Ie (I0) is displayed. The Ie in other settings and models is displayed the
from current fed from the CT.
The displayed quantities depend on [APPLCT] and [APPLVT] settings and relay model are as
shown in Table 3.5.1. Input current and voltage greater than 0.01×In(rated current) and 0.06V at
the secondary side are required for the measurement.
Phase angles above are expressed taking the positive sequence voltage as a reference phase angle,
where leading phase angles are expressed as positive, (+).
The signing of active and reactive power flow direction can be set positive for either power
sending or power receiving. The signing of reactive power can also be set positive for either
lagging phase or leading phase.
Table 3.5.1 Displayed Quantity
Model 400, 401, 402, 700, 701, 702 420, 421, 422, 720, 721, 722
APPL APPLCT APPLVT APPLCT APPLVT
Setting 1P 2P 3P 3PN 3PP Off 1P 2P 3P 3PN 3PP Off
Ia --   --  
Ib -- --  -- -- 
Ic --   --  
Ie      
Ise -- -- --   
I1 -- --  -- -- 
I2 -- --  -- -- 
I0 -- --  -- -- 
I2/I1 -- --  -- -- 
THM --   --  
Va  -- --  -- --
Vb  -- --  -- --
Vc  -- --  -- --
Ve      
Vab   --   --
Vbc   --   --
Vca   --   --
Vs APPLVS On/Off APPLVS On/Off
V1   --   --
V2   --   --
V0   --   --
f   --   --
df   --   --
PF --     -- --     --
P --     -- --     --
Q --     -- --     --
S --     -- --     --

(Note) : Measured
--: Not measured (The item is indicated, but the quantity value is indicated as “0”.)
Blank Space: The item is not indicated.

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3.6 Fault locator

3.6.1 Application

The fault locator incorporated in the GRE140 measures the distance to fault on the protected line
using local voltages and currents. The measurement result is expressed as a percentage (%) of line
length and distance (km) and is displayed on the LCD on the relay front panel. It is also output to
a local PC or RSM (relay setting and monitoring) system.
To measure the distance to fault, the fault locator requires a minimum of 3 cycles fault duration
time.
In distance to fault calculations, the change in the current before and after the fault has occurred is
used as a reference current, alleviating the influences of load current and arc voltage. As a result,
the location error is a maximum of ±2.5 km for faults at a distance of up to 100 km, and a
maximum of ±2.5% for faults at a distance between 100 km and 250 km.
The fault locator is available for [APPLCT]= "3P" and [APPLVT]= "3PN" or "3PP" setting.
The fault locator cannot correctly measure the distance to fault during a power swing.

3.6.2 Distance to Fault Calculation

The distance to fault x1 is calculated from equation (1) and (2) using the voltage and current of the
faulted phase and the current change before and after fault occurrence. The current change before
and after fault occurrence is represented by Iβ" and Iα" is used as the reference current. The
impedance imbalance compensation factor is used to maintain high measuring accuracy even
when the impedance of each phase has great variations.

Distance calculation for phase fault (in the case of BC-phase fault)

Im(Vbc ⋅ Iβ") × L
x 1 = {I (R ⋅ I × Iβ") + R (X ⋅ I ⋅ Iβ")} × K (1)
m 1 bc e 1 bc bc

where,
Vbc = fault voltage between faulted phases = Vb − Vc
Ibc = fault current between faulted phases = Ib − Ic
Iβ" = change of fault current before and after fault occurrence = (Ib-Ic) − (ILb-ILc)
ILb, ILc = load current
R1 = resistance component of line positive sequence impedance
X1 = reactance component of line positive sequence impedance
Kbc = impedance imbalance compensation factor
Im( ) = imaginary part in parentheses
Re( ) = real part in parentheses
L = line length (km)

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Distance calculation for earth fault (in the case of A-phase earth fault)
Im(Va ⋅ Iα") × L
x1= (2)
{Im(R1 ⋅ Iα ⋅ Iα" + R0 ⋅ I0S ⋅ Iα") + Re(X1 ⋅ Iα ⋅ Iα" + X0 ⋅ I0S ⋅ Iα")} × Ka

where,
Va = fault voltage
Iα = fault current = (2Ia − Ib − Ic)/3
Iα" = change of fault current before and after fault occurrence
2Ia − Ib − Ic 2ILa − ILb − ILc
= −
3 3
Ia, Ib, Ic = fault current
ILa, ILb, ILc = load current
I0s = zero sequence current
R1 = resistance component of line positive sequence impedance
X1 = reactance component of line positive sequence impedance
R0 = resistance component of line zero sequence impedance
X0 = reactance component of line zero sequence impedance
Ka = impedance imbalance compensation factor
Im( ) = imaginary part in parentheses
Re( ) = real part in parentheses
L = line length (km)

Equations (1) and (2) are general expressions when lines are treated as having lumped constants
and these expressions are sufficient for lines within 100 km. For lines exceeding 100 km,
influences of the distributed capacitance must be considered. For this fault locator, the following
equation is used irrespective of line length to find the compensated distance x2 with respect to
distance x1 which was obtained in equation (1) or (2).
3
x1
x2 = x1 − k2 ⋅ 3 (3)

where,
k = propagation constant of the protected line = 0.001km-1 (fixed)

3.6.3 Starting Calculation

Calculation of the fault location is initiated by the operation of OC element. It is initiated only
when the direction of fault is forward (FWD).

3.6.4 Displaying Location

The measurement result is stored in the "Fault record" and displayed on the LCD on the relay front
panel or on a local or remote PC. For displaying on the LCD, see Section 4.2.3.1.

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3.6.5 Setting

The setting items necessary for the fault location function and their setting ranges are shown in the
table below. The reactance and resistance values are input in expressions on the secondary side.
When there are large variations in the impedance of each phase, equation (4) is used to determine
the positive sequence impedance, zero sequence impedance and zero sequence mutual impedance,
while equation (5) is used to determine the imbalance compensation factors Kab to Ka.
When variations in the impedance of each phase can be ignored, the imbalance compensation
factor is set to 100%.

Z1 = {(Zaa + Zbb + Zcc) − (Zab + Zbc + Zca)}/3

Z0 = {(Zaa + Zbb + Zcc) + 2(Zab + Zbc + Zca)}/3 (4)

Kab = {(Zaa + Zbb)/2 − Zab}/Z1

Kbc = {(Zbb + Zcc)/2 − Zbc}/Z1
Kca = {(Zcc + Zaa)/2 − Zca}/Z1 (5)
Ka = {Zaa − (Zab + Zca)/2}/Z1
Kb = {Zbb − (Zbc + Zab)/2}/Z1
Kc = {Zcc − (Zca + Zab)/2}/Z1

Item Range Step Default Remarks

R1 0.0 - 999.9 Ω 0.1 Ω 1.0Ω
X1 0.0 - 999.9 Ω 0.1 Ω 10.0Ω
R0 0.0 - 999.9 Ω 0.1 Ω 3.5Ω
X0 0.0 - 999.9 Ω 0.1 Ω 34.0Ω
Kab 80 - 120% 1% 100%
Kbc 80 - 120% 1% 100%
Kca 80 - 120% 1% 100%
Ka 80 - 120% 1% 100%
Kb 80 - 120% 1% 100%
Kc 80 - 120% 1% 100%
Line 0 - 399.9 km 0.1 km 50.0km

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4. User Interface
4.1 Outline of User Interface
The user can access the relay from the front or rear panel.
Local communication with the relay is also possible using RSM (Relay Setting and Monitoring)
via a USB port. Furthermore, remote communication is also possible using either MODBUS or
IEC60870-5-103 communication protocols via the RS485 port.
This section describes the front panel configuration and the basic configuration of the menu tree
for the local human machine communication ports and HMI (Human Machine Interface).

4.1.1 Front Panel

As shown in Figure 3.1.3, the front panel is provided with a liquid crystal display (LCD), light
emitting diodes (LED), operation keys, and USB type B connector.
LCD
The LCD screen, provided with an 8-line, 16-character display and back-light, provides the user
with information such as records, status and settings. The LCD screen is normally unlit, but
pressing the VIEW key will display the digest screen and pressing the ENTER key will
display the main- menu screen.
These screens are turned off by pressing the END key when viewing the LCD display at the top
of the main-menu. If any display is left for about 5 minutes without operation, the back-light will
go off.

LED
There are 14 LEDs. The signal labels and LED colors are defined as follows:
Label Color Remarks
IN SERVICE Green Lit when the relay is in service and flashing when the relay is in “Test”
menu.
TRIP Red Lit when a trip command is issued.
ALARM Yellow Lit when an alarm command is issued or a relay alarm is detected.
Relay Fail Red Lit when a relay failure is detected.
CB CLOSED R /G / Y Lit when CB is closed.
CB OPEN Green Lit when CB is open.
Local Yellow Lit when Local Control is enabled
Remote Yellow Lit when Remote Control is enabled
(LED1) R/G/Y user-configurable
(LED2) R/G/Y user-configurable
(LED3) R/G/Y user-configurable
(LED4) R/G/Y user-configurable
(LED5) R/G/Y user-configurable
(LED6) R/G/Y user-configurable

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LED1-6 are configurable. For setting, see Section 4.2.6.10.

The TRIP LED lights up once the relay is operating and remains lit even after the trip command
goes off. The TRIP LED can be turned off by pressing the RESET key. Other LEDs are lit as
long as a signal is present and the RESET key is invalid while the signal is being maintained.

Operation keys

The operation keys are used to display records, status, and set values on the LCD, as well as to
input or change set values. The function of each operation key is as follows:
 ▼, ▲,
▲
▼
, : Used to move between lines displayed on a screen and to enter
numerical values and text strings.
 CANCEL : Used to cancel entries and return to the upper screen.

 END : Used to end the entering operation, return to the upper screen or turn off the
display.
 ENTER : Used to store or establish entries.

VIEW and RESET keys

Pressing the VIEW key displays digest screens such as "Metering", "Latest fault",
"Auto-supervision", "Alarm display" and "Indication". The VIEW key is the same as the ▼
key.
Pressing the RESET key causes the Trip LED to turn off and any latched output relays to be
released.

Control key

The control keys are used for CB control. When the cursor of the LCD display is not at the CB
control position-(CB close/open , Local / Remote), the Control key does not function.
 ○ : Used for CB open operation. When CB is in the open position, the ○ key does
not function.
② ｜ : Used for CB close operation. When CB is in the closed position, the ｜ key
does not function
③ L/R : Used for CB control hierarchy (local / remote) change.

CAUTION
The CB close control key ｜ is linked to BO1 and the CB open control key ○ is linked to BO2,
when the control function is enabled.

USB connector
The USB connector is a B-type connector for connection with a local personal computer.

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4.1.2 Communication Ports

The following two interfaces are provided as communication ports:

• USB port
• RS485 port
• IRIG-B port
• Optional Fiber optic or Ethernet LAN port for serial communication
• Optional Communication Unit port

USB port
This connector is a standard B-type connector for USB transmission and is mounted on the front
panel. By connecting a personal computer to this connector, setting operation and display
functions can be performed. This port is on the front panel of the relay, as shown in Figure 4.1.1.

IRIG-B port
The IRIG-B port collects serial IRIG-B format data from an external clock to synchronize the
relay calendar clock. The IRIG-B port is isolated from the external circuit by a photo-coupler.
This port is on the back of the relay, as shown in Figure 4.1.2.

RS485 port
The RS485 port is used for MODBUS or IEC60850-5-103 communication to connect between
relays and to construct a network communication system. (See Figure 4.4.2 in Section 4.4.)
The RS485 port is provided on the rear of the relay as shown in Figure 4.1.2.

Optional Fibre or Ethernet LAN port

Optional LAN port can be connected to an automation system via a LAN communication
networks using the MODBUS and IEC 61850 protocol. 100Base-TX (T1: RJ-45 connector) for
LAN is provided at the rear of the relay as shown in Figure 4.1.2.
Relay status LED Control LED

LCD monitor

User setting LED

USB port

Operation Keys

Figure 4.1.1 Front panel

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Variation of
TB5 TB4 TB3 TB2 TB1 Optional communication
Ports

100BASE-TX
1 2 1 2
100BASE-TX
3 4 3 4
IRIG-B 5 6 5 6

7 8 7 8
100BASE-TX 2port
9 10 9 10
100BASE-TX
Standard 11 12 11 12
RS485 13 14 13 14
terminal 15 16 1 2

100BASE-FX

100BASE-FX 2port

　Optional
N.C.
Communication Port
SC connector or RJ45

Figure 4.1.2 Location of Communication Port

4.2 Operation of the User Interface

The user can access such functions as recording, measurement, relay setting and testing with the
LCD display and operation keys.

4.2.1 LCD and LED Displays

Displays during normal operation

When the GRE140 is operating normally, the green "IN SERVICE" LED is lit and the LCD is off.
When the LCD is off press the VIEW key to display the digest screens which are "Indication",
"Metering", "Latest fault", "Auto-supervision" and the "Alarm Display" screens in turn. The
"Latest fault", "Auto-supervision" and "Alarm Display" screens are displayed only when there is
some data. The following are the digest screens and can be displayed without entering the menu
screens.
Indication

I N D 1 [ 0 0 0 0 0 0 0 0 ]

I N D 2 [ 0 0 0 0 0 0 0 0 ]

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Metering
I a * * . * * k A

* * * . * °

I b * * . * * k A

* * * . * °

I c * * . * * k A

* * * . * °

I e * * . * * k A

* * * . * °

I s e * * * . * * k A
Not available for model 400 series
* * * . * °

V a * * * . * * k V Not available for [APPLVT]=”3PP”

* * * . * ° setting

V b * * * . * * k V Not available for [APPLVT]=”3PP”

* * * . * ° setting

V c * * * . * * k V Not available for [APPLVT]=”3PP”

* * * . * ° setting

V e * * . * * * k V

* * * . * °

V a b * * . * * * k V

* * * . * °

V b c * * . * * * k V

* * * . * °

V c a * * . * * * k V

* * * . * °

f - * . * * * H z

To clear the latched indications (LEDs, LCD screen for the Latest fault), press the RESET key
for 3 seconds or more.
For any display, the back-light is automatically turned off after five minutes.

Indication
This screen shows the status of elements assigned as a virtual LED.

I N D 1 [ 0 0 0 0 0 1 0 0 ]

I N D 2 [ 0 0 0 1 0 0 0 0 ]

Status of element,
Elements depend upon user setting. 1: Operate, 0: Not operated (Reset)

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Displays in tripping
Latest fault
P h a s e A B C E : Faulted phases

O C 1 : Tripping element

If a fault occurs and a tripping command is output when the LCD is off, the red "TRIP" LED and
other configurable LEDs if signals are assigned to them triggered by tripping
Press the VIEW key to scroll the LCD screen to read the rest of the messages.

Press the RESET key for more than 3s to turn off the LEDs; the Trip LED and configurable
LEDs (LED1 through LED6) that have been assigned as latched signals will be triggered by
tripping.
To return from the menu screen to the digest "Latest fault" screen, do the following:
• Return to the top screen of the menu by repeatedly pressing the END or CANCEL key.

• Press the END key to turn off the LCD when the LCD is displaying the top menu.

• Press the VIEW key to display the digest screens.

Displays for automatic supervision operation

Auto-supervision
E r r : R O M , A / D

If the automatic supervision function detects a failure while the LCD is off, the
"Auto-supervision" screen is displayed automatically, showing the location of the failure, and the
"ALARM" LED lights.
Press the VIEW key to display other digest screens in turn including the "Metering" and "Latest
fault" screens.
Press the RESET key to turn off the LEDs. However, if the failure continues, the "ALARM"
LED remains lit.
After recovery from a failure, the "ALARM" LED and "Auto-supervision" display turn off
automatically.
If a failure is detected while any of the other screens are being displayed, the current screen
remains displayed and the "ALARM" LED lights.
While any of the menu screens are displayed, the VIEW and RESET keys do not function. To
return to the digest "Auto-supervision" screen, do the following:
• Return to the top screen of the menu by repeatedly pressing the END or CANCEL key.

• Press the END key to turn off the LCD.

• Press the VIEW key to display the digest screen.

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Alarm Display

Alarm Display (ALM1 to ALM4)

* * * * * * * * * * * * * *

* * * * * * * * : A L M 1

Four alarm screens can be provided, and their text messages are defined by the user. (For setting,
see Section 4.2.6.8) These alarms are raised by associated binary inputs.
Press the VIEW key to display other digest screens in turn including the "Metering" and "Latest
fault" screens.
To clear the Alarm Display, press the RESET key. Clearing is available after displaying up to
ALM4.

4.2.2 Relay Menu

Figure 4.2.1 shows the menu hierarchy in the GRE140. The menu has five sub-menus, "Record",
"Status", "Set. (view)", "Set. (change)", and "Test". For details of the menu hierarchy, see
Appendix E.

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MENU Record Fault

Event
Disturbance
Counter
Status Metering
Binary I/O
Relay element
Time sync.
Clock adjust.
LCD contrast
Set. (view) Version
Description
Comms
Record
Status
Protection
Binary I/P
Binary O/P
LED
Control
Frequency
Set. (change) Password
Description
Comms
Record
Status
Protection
Binary I/P
Binary O/P
LED
Control
Frequency
Control Password(Ctrl)
Local / Remote
CB close/open
Test Password(Test)
Switch
Binary O/P
Logic circuit

Figure 4.2.1 Relay Menu

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Record
In the "Record" menu, the fault records event records, disturbance records and counts such as trip
count and ΣIy count can be displayed or erased..

Status
The "Status" menu displays the power system quantities, binary input and output status, relay
measuring element status, signal source for time synchronisation (BI, IEC60870-5-103), clock
adjustment and LCD contrast.

Set. (view)
The "Set. (view)" menu displays the relay version, plant name, relay address and baud rate in
communication, the current settings of record, status, protection, binary inputs, configurable
binary outputs and configurable LEDs.

Set. (change)
The "Set. (change)" menu is used to change the settings of password, plant name, relay address
and baud rate in communication, record, status, protection, binary inputs, configurable binary
outputs and configurable LEDs.
Since this is an important menu and is used to change settings related to relay tripping, it has
password security protection.

Control
The "Control" menu is used to operate the CB. When the cursor (>) is in the Local / Remote
position, the CB control location change over key L/R is enabled. When the cursor (>) is in the CB
close/open position, the CB control keys ○ and ｜ are enabled.
Since this is an important menu and is related to relay tripping, it has password security protection.

Test
The "Test" menu is used to set testing switches and to forcibly operate binary output relays.
The "Test" menu also has password security protection.
When the LCD is off, press the ENTER key to display the top "MAIN MENU" screen and then
proceed to the relay menus.

M A I N M E N U

＞ R e c o r d

S t a t u s

S e t . ( v i e w )

S e t . ( c h a n g e )

C o n t r o l

T e s t

To display the "MAIN MENU" screen when the digest screen is displayed, press the VIEW key
to turn off the LCD, then press the ENTER key.

Press the END key when the top screen is displayed to turn off the LCD.
An example of the sub-menu screen is shown below. The top line shows the hierarchical layer.

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The last item is not displayed for all the screens. " "," " or " " displayed on the far right
shows that lower or upper lines exist.
To move the cursor downward or upward for setting or for viewing other lines not displayed on the
window, use the ▼ and ▲ keys.

/ 4 S c h e m e s w

T r i p _

> T r i p 1

O f f / O n

B I 1

O f f / O n

O C 1

O f f / O n

E F 1

O f f / O n

S E F 1

O f f / O n

N O C 1

O f f / O n

To return to the higher screen or move from the right side screen to the left side screen in Appendix
E, press the END or CANCEL key.

The CANCEL key can also be used to return to the higher screen but it must be used carefully
because it may cancel entries made so far.
To move between screens of the same hierarchical depth, first return to the higher screen and then
move to the lower screen.

4.2.3 Displaying Records

The sub-menu of "Record" is used to display fault records, event records, disturbance records and
counts such as trip count, ΣIy count and reclose count.

4.2.3.1 Displaying Fault Records

To display fault records, do the following:
• Open the top "MAIN MENU" screen by pressing any keys other than the ENTER key.

• Select "Record" to display the "Record" sub-menu.

/ 1 R e c o r d

＞ F a u l t

E v e n t

D i s t u r b a n c e

C o u n t e r

• Select "Fault" to display the "Fault" screen.

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/ 2 F a u l t

＞ V i e w r e c o r d

C l e a r

• Select "View record" to display the dates and times of fault records stored in the relay from the
top in new-to-old sequence.

/ 3 F a u l t

＞ ♯ 1 0 1 / J a n / 2 0 1 1

0 0 : 0 0 : 0 0 . 0 0 0

♯ 2 0 1 / J a n / 2 0 1 1

0 0 : 0 0 : 0 0 . 0 0 0

♯ 3 0 1 / J a n / 2 0 1 1

0 0 : 0 0 : 0 0 . 0 0 0

• Move the cursor to the fault record line to be displayed using the ▲ and ▼ keys and press
the ENTER key to display the details of the fault record.

/ 4 F a u l t ♯ 1

0 1 / J a n / 2 0 1 1

0 0 : 0 0 : 0 0 . 0 0 0

O C 1

P h a s e A B C

* * * . * k m ( * * * % )

P r e f a u l t v a l u e s

I a * * * . * * k A

* * * . * °

I b * * * . * * k A

* * * . * °

I c * * * . * * k A

* * * . * °

I e * * * . * * k A

* * * . * °

I s e * * . * * * A
Not available for EF model series
* * * . * °

I 1 * * * . * * k A

* * * . * °

I 2 * * * . * * k A

* * * . * °

 151 
 6 F 2 T 0 1 7 7

I O * * * . * * k A

* * * . * °

I 2 / I 1 * * . * *

V a * * * . * * k V

* * * . * °

V b * * * . * * k V

* * * . * °

V c * * * . * * k V

* * * . * °

V e * * * . * * k V

* * * . * °

V s * * * . * * k V

* * * . * °

V a b * * * . * * k V

* * * . * °

V b c * * * . * * k V

* * * . * °

V c a * * * . * * k V

* * * . * °

V 1 * * * . * * k V

* * * . * °

V 2 * * * . * * k V

* * * . * °

V O * * * . * * k V

* * * . * °

ｆ * * . * * H z

d f - * * . * * H z / s

P F - * . * * *

F a u l t v a l u e s

I a * * * . * * k A

* * * . * °

I b * * * . * * k A

* * * . * °

I c * * * . * * k A

* * * . * °

I e * * * . * * k A

* * * . * °

I s e * * . * * * A
Not available for EF model series
* * * . * °

I 1 * * * . * * k A

* * * . * °

 152 
 6 F 2 T 0 1 7 7

I 2 * * * . * * k A

* * * . * °

I O * * * . * * k A

* * * . * °

I 2 / I 1 * * . * *

T H M * * * . * %

V a * * * . * * k V

* * * . * °

V b * * * . * * k V

* * * . * °

V c * * * . * * k V

* * * . * °

V e * * * . * * k V

* * * . * °

V s * * * . * * k V

* * * . * °

V a b * * * . * * k V

* * * . * °

V b c * * * . * * k V

* * * . * °

V c a * * * . * * k V

* * * . * °

V 1 * * * . * * k V

* * * . * °

V 2 * * * . * * k V

* * * . * °

V O * * * . * * k V

* * * . * °

ｆ * * . * * H z

d f - * * . * * H z / s

P F r - * . * * *

M o t o r p a r a m e t e r

L a s t s t a r t u p

T H M 2 * * * . * % Display on 700 model series

H o t s t . * * * * *

C o l d s t . * * * * *

P e a k s t . * * * . * * k A

0 1 / J a n / 2 0 1 1

0 0 : 0 0 : 0 0 . 0 0 0

A R C - S 1

0 1 / J a n / 2 0 1 1

 153 
 6 F 2 T 0 1 7 7

0 0 : 0 0 : 0 0 . 0 0 0

A R C - S 2

0 1 / J a n / 2 0 0 9

0 0 : 0 0 : 0 0 . 0 0 0

O C 1 , A R C - F T

The lines which are not displayed in the window can be displayed by pressing the ▲ and ▼
keys.
To clear all the fault records, do the following:
• Open the "Record" sub-menu.
• Select "Fault" to display the "Fault" screen.
• Select "Clear" to display the following confirmation screen.

C l e a r r e c o r d s

E N D = Y C A N C E L = N

• Press the END (= Y) key to clear all the fault records stored in back-up RAM.
If all fault records have been cleared, the "Latest fault" screen of the digest screens is not
displayed.
Note: When changing the units (kA/A) of primary side current with RSM100, press the "Units"
button which is indicated in the primary side screen.

4.2.3.2 Displaying Event Records

To display event records, do the following:
• Open the top "MAIN MENU" screen by pressing the ENTER key.

• Select "Record" to display the "Record" sub-menu.

• Select "Event" to display the "Event" screen.

/ 2 E v e n t

＞ V i e w r e c o r d

C l e a r

• Select "Display" to display the events with date from the top in new-to-old sequence.

/ 3 E v e n t

2 4 / A ｕ g / 2 0 1 1 1 0 0

O C 1 ･ A t r i p O n

2 4 / A ｕ g / 2 0 1 1 0 9 9

O C 1 ･ A t r i p O N

2 2 / A ｕ g / 2 0 1 1 9 8

O C 1 ･ A t r i p O n

 154 
 6 F 2 T 0 1 7 7

1 0 / M a y / 2 0 1 1 0 0 1

O C 1 ･ A t r i p O n

▼
The time is displayed by pressing the key.

/ 3 E v e n t

1 3 : 2 2 : 4 5 . 2 1 1

O C 1 ･ A t r i p O n

1 3 : 2 2 : 4 5 . 2 0 0

O C 1 ･ A t r i p O N

1 3 : 2 2 : 4 5 . 1 1 1

O C 1 ･ A t r i p O n

1 3 : 2 2 : 4 4 . 1 0 0

O C 1 ･ A t r i p O n
▲

Press the key to return to the screen with date.

The lines which are not displayed in the window can be displayed by pressing the ▲ and ▼
keys.
To clear all the event records, do the following:
• Open the "Record" sub-menu.
• Select "Event" to display the "Event" screen.
• Select "Clear" to display the following confirmation screen.

C l e a r r e c o r d s

E N D = Y C A N C E L = N

• Press the END (= Y) key to clear all the event records stored in back-up RAM.
"Data lost" or "E.record CLR" and "F.record CLR" are displayed at the initial setting.
4.2.3.3 Displaying Disturbance Records
Details of disturbance records can be displayed on the PC screen only (*); the LCD displays only
the recorded date and time for all disturbances stored in the relay. They are displayed in the
following sequence.
(*) For the display on the PC screen, refer to RSM100 manual.
• Open the top "MAIN MENU" screen by pressing the ENTER key.

• Select "Record" to display the "Record" sub-menu.

• Select "Disturbance" to display the "Disturbance" screen.

/ 2 D i s t u r b a n c e

 155 
 6 F 2 T 0 1 7 7

＞ V i e w r e c o r d

C l e a r

• Select "View record" to display the date and time of the disturbance records from the top in
new-to-old sequence.

/ 3 D i s t u r b a n c e

♯ 1 0 1 / J a n / 2 0 1 1

0 0 : 0 0 : 0 0 . 0 0 0

♯ 2 0 1 / J a n / 2 0 1 1

0 0 : 0 0 : 0 0 . 0 0 0

♯ 3 0 1 / J a n / 2 0 1 1

0 0 : 0 0 : 0 0 . 0 0 0

The lines which are not displayed in the window can be displayed by pressing the ▲ and ▼
keys.
To clear all of the disturbance records, do the following:
• Open the "Record" sub-menu.
• Select "Disturbance" to display the "Disturbance" screen.
• Select "Clear" to display the following confirmation screen.

C l e a r r e c o r d s

E N D = Y C A N C E L = N

• Press the END (= Y) key to clear all the disturbance records stored in back-up RAM.

4.2.3.4 Displaying Counter

• Open the top "MAIN MENU" screen by pressing the ENTER key.

• Select "Record" to display the "Record" sub-menu.

• Select "Counter" to display the "Counter" screen.

/ 2 C o u n t e r

＞ V i e w c o u n t e r

C l e a r T r i p s

C l e a r T r i p s A (*)
C l e a r T r i p s B (*)
C l e a r T r i p s C (*)
C l e a r Σ I ^ y A

C l e a r Σ I ^ y B

C l e a r Σ I ^ y C

 156 
 6 F 2 T 0 1 7 7

C l e a r A R C s

(*) Note: These settings are only available when single phase External Trip BI functions
are used. In this case, the main "Clear Trips" option is not available.
• Select "View Counter" to display the counts stored in the relay.

/ 3 C o u n t e r

T r i p s * * * * * *

T r i p s A * * * * * * (*)
T r i p s B * * * * * * (*)
T r i p s C * * * * * * (*)
Σ I ^ y A * * * * * * E 6

Σ I ^ y B * * * * * * E 6

Σ I ^ y C * * * * * * E 6

A R C s * * * * *

(*) Note: These settings are only available when single phase External Trip BI functions
are used. In this case, the main "Trips" option is not available.

The lines which are not displayed in the window can be displayed by pressing the ▲ and ▼
keys.
To clear each count, do the following:
• Open the "Record" sub-menu.
• Select "Counter" to display the "Counter" screen.
• Select "Clear Trips" to display the following confirmation screen.

C l e a r T r i p s ?

E N D = Y C A N C E L = N

• Select "Clear Trips A" to display the following confirmation screen.

C l e a r T r i p s A ?

E N D = Y C A N C E L = N

• Select "Clear Trips B" to display the following confirmation screen.

C l e a r T r i p s B ?

E N D = Y C A N C E L = N

• Select "Clear Trips C" to display the following confirmation screen.

 157 
 6 F 2 T 0 1 7 7

C l e a r T r i p s C ?

E N D = Y C A N C E L = N

• Select "Clear Σ I^yA" to display the following confirmation screen.

C l e a r Σ I ＾ ｙ A ?

E N D = Y C A N C E L = N

• Select "Clear Σ I^yB" to display the following confirmation screen.

C l e a r Σ I ＾ ｙ B ?

E N D = Y C A N C E L = N

• Select "Clear Σ I^yC" to display the following confirmation screen.

C l e a r Σ I ＾ ｙ C ?

E N D = Y C A N C E L = N

• Select "Clear ARCs" to display the following confirmation screen.

C l e a r A R C s ?

E N D = Y C A N C E L = N

• Press the END (= Y) key to clear the count stored in back-up RAM.

4.2.4 Displaying the Status

From the sub-menu of "Status", the following status condition can be displayed on the LCD:
Metering data of the protected line, apparatus, etc.
Status of binary inputs and outputs
Status of measuring elements output
Status of time synchronisation source
Status of clock adjustment
Status of LCD contrast
Data is updated every second.

4.2.4.1 Displaying Metering Data

To display metering data on the LCD, do the following:
• Select "Status" on the top "MAIN MENU" screen to display the "Status" screen.

/ 1 S t a t u s

 158 
 6 F 2 T 0 1 7 7

＞ M e t e r i n g

B i n a r y I / O

R e l a y e l e m e n t

T i m e s y n c .

C l o c k a d j u s t .

L C D c o n t r a s t

M o t o r p a r a Display on 700 model series

• Select "Metering" to display the "Metering" screen.

/ 2 M e t e r i n g

＞ M e t e r i n g

D e m a n d

D i r e c t i o n

• Select " Metering " to display the current power system quantities on the "Metering" screen.

/ 3 M e t e r i n g

I a * * . * * k A

* * * . * °

I b * * . * * k A

* * * . * °

I c * * . * * k A

* * * . * °

I e * * . * * k A

* * * . * °

I s e * * * . * * k A
Not available for EF model series.
* * * . * °

I 1 * * . * * k A

* * * . * °

I 2 * * . * * k A

* * * . * °

I O * * . * * k A

* * * . * °

I 2 / I 1 * * . * *

T H M * * * . * %

T H M 2 * * * . * % Display on 700 model series.

V a * * * . * * k V

* * * . * °

V b * * * . * * k V

* * * . * °

 159 
 6 F 2 T 0 1 7 7

V c * * * . * * k V

* * * . * °

V e * * . * * * k V

* * * . * °

V s * * . * * * k V

* * * . * °

V a b * * . * * * k V

* * * . * °

V b c * * . * * * k V

* * * . * °

V c a * * . * * * k V

* * * . * °

V 1 * * . * * k V

* * * . * °

V 2 * * . * * k V

* * * . * °

V O * * . * * k V

* * * . * °

f - * . * * * H z

P F - * * * * * *

P - * * * * * * k W

Q - * * * * * * k v a r

S - * * * * * * k V A

If the primary side unit (A) and (V) are required, select 2(=Pri-A) on the "Metering" screen. See
Section 4.2.6.6.
Note: When changing the units (kA/A) and (kV/V) of primary side current with RSM100, press the
"Units" button which is indicated in the primary side screen.

• Select "Demand" to display the current demand on the "Metering" screen.

/ 3 D e m e n d

I a m a x * * . * * k A

I b m a x * * . * * k A

I c m a x * * . * * k A

I e m a x * * . * * k A

I s e m a x * * * . * * k A Not available for EF modelseries.

I 2 m a x * * . * * k A

I 2 1 m a x * * . * *

P m a x - * * * * * * k W

Q m a x - * * * * * * k v a r

S m a x - * * * * * * k V A

V a m a x * * * . * * k V

 160 
 6 F 2 T 0 1 7 7

V a m i n * * * . * * k V

V b m a x * * * . * * k V

V b m i n * * * . * * k V

V c m a x * * * . * * k V

V c m i n * * * . * * k V

V e m a x * * * . * * k V

V e m i n * * * . * * k V

V s m a x * * * . * * k V

V s m i n * * * . * * k V

V o m a x * * * . * * k V

V o m i n * * * . * * k V

f m a x * * . * * H z

f m i n * * . * * H z

d f m a x * * . * * H z

d f m i n * * . * * H z

W ｈ + * k W H

ｖ a r h + * k v r h

To clear all max data, do the following:

• Press the RESET key on any max demand screen (primary or secondary) to display the
following confirmation screen.

C l e a r m a x ?

E N D = Y C A N C E L = N

• Press the END (= Y) key to clear all max data stored in back-up RAM.

• Select "Direction" to display the direction of a current on the "Metering" screen.

The direction of each current is displayed when the directional characteristic is selected as
follows:
Ia, Ib, Ic: [OC∗-DIR]= "FWD" or "REV" setting
Ie: [EF∗-DIR]= "FWD" or "REV" setting
Ise: [SE∗-DIR]= "FWD" or "REV" setting
I2: [NC∗-DIR]= "FWD" or "REV" setting

/ 3 D i r e c t i o n

I a F o r w a r d See Table 3.5.1 for the indicated quantities.

I b R e v e r s e

I c F o r w a r d

I e F o r w a r d

I s e - - - - - - - Not available for EF model series.

I 2 F o r w a r d

 161 
 6 F 2 T 0 1 7 7

4.2.4.2 Displaying the Status of Binary Inputs and Outputs

To display the binary input and output status, do the following:
• Select "Status" on the top "MAIN MENU" screen to display the "Status" screen.
• Select "Binary I/O" to display the binary input and output status.
For Models 400, 420, 700 and 720:

/ 2 B i n a r y I / O

I P [ 0 0 0 0 0 0 ]

O P [ 0 0 0 0 ]

F A I L [ 0 ]

For Models 401, 421, 701 and 721:

/ 2 B i n a r y I / O

I P [ 0 0 0 0 0 0 ]

I P 2 [ 0 0 0 0 0 0 ]

O P [ 0 0 0 0 ]

O P 2 [ 0 0 0 0 0 0 ]

F A I L [ 0 ]

For Models 402, 422, 702 and 722:

/ 2 B i n a r y I / O

I P [ 0 0 0 0 0 0 ]

I P 2 [ 0 0 0 0 0 0 ]

I P 3 [ 0 0 0 0 0 0 ]

O P [ 0 0 0 0 ]

O P 2 [ 0 0 0 0 0 0 ]

O P 3 [ 0 0 0 0 0 0 ]

F A I L [ 0 ]

The display format is shown below.

[       ]
Input (IP) BI1 BI2 BI3 BI4 BI5 BI6
Input2(IP2) BI7 BI8 BI9 BI10 BI11 BI12
Input3(IP3) BI13 BI14 BI15 BI16 BI17 BI18
Output (OP) BO1 BO2 BO3 BO4
Output2(OP2) BO5 BO6 BO7 BO8 BO9 BO10
Output3(OP3) BO11 BO12 BO13 BO14 BO15 BO16
FAIL FAIL

The row IP shows the binary input status. BI1 to BI18 correspond to each binary input signal. In

 162 
 6 F 2 T 0 1 7 7

models 400, 420, 700 and 720 BI7 to BI18 are not available, BI13 to BI18 are not available for
models 401, 421, 701 and 721. For binary input signals, see Appendix H. The status is expressed
with logical level "1" or "0" at the photo-coupler output circuit.
The row OP shows the binary output status. BO5 to BO16 are not available for models 400, 420,
700 and 720. BO11 to BO16 are not available for models 401, 421, 701 and 721.
The status of these outputs is expressed with logical level "1" or "0" at the input circuit of the
output relay driver. That is, the output relay is energised when the status is "1".
FAIL is a normally closed contact for detection of a relay fail condition.

4.2.4.3 Displaying the Status of Measuring Elements

To display the status of measuring elements on the LCD, do the following:
• Select "Status" on the top "MAIN MENU" screen to display the "Status" screen.
• Select 3 "Ry element" to display the status of the relay elements.

/ 2 R y e l e m e n t

O C # 1 [ 0 0 0 0 0 0 0 0 0 ]

O C # 2 [ 0 0 0 ]

M O T [ 0 0 0 0 0 ] Display on 700 model series.

E F [ 0 0 0 0 ]

S E F [ 0 0 0 0 ] Not available for EF model series.

N O C [ 0 0 ]

U C [ 0 0 0 0 0 0 ]

T H M [ 0 0 ]

B C D [ 0 ]

C B F [ 0 0 0 ]

I C D [ 0 0 0 ]

C L P [ 0 0 0 0 ]

O V # 1 [ 0 0 0 0 0 0 0 0 0 ]

O V # 2 [ 0 0 0 ]

U V # 1 [ 0 0 0 0 0 0 0 0 0 ]

U V # 2 [ 0 0 0 ]

Z O V [ 0 0 ]

N O V [ 0 0 ]

F R Q [ 0 0 0 0 ]

A R C [ 0 0 0 0 0 ]

R P [ 0 0 ]

R Q [ 0 0 ]

The elements displayed depend upon the relay model. (See Table 1.1.1 in Section 1.)
The operation status of phase and residual overcurrent elements are as shown below.

 163 
 6 F 2 T 0 1 7 7

[        ]
OC#1 OC1-A OC1-B OC1-C OC2-A OC2-B OC2-C OC3-A OC3-B OC3-C OC elements
OC#2 OC4-A OC4-B OC4-C OC elements
MOT EXST STRT LKRT RSIH STPH Motor Pro. element
EF EF1 EF2 EF3 EF4 EF elements
SEF SEF1 SEF2 SEF3 SEF4 SEF elements
NOC NOC1 NOC2 NOC elements
UC UC1-A UC1-B UC1-C UC2-A UC2-B UC2-C UC elements
THM Alarm Trip THM element
BCD BCD BCD element
CBF CBF-A CBF-B CBF-C CBF element
ICD ICD-A ICD-B ICD-C ICD element
CLP 0 1 2 3 Cold Load state
OV#1 OV1-A OV1-B OV1-C OV2-A OV2-B OV2-C OV3-A OV3-B OV3-C OV elements
OV#2 OV4-A OV4-B OV4-C OV elements
UV#1 UV1-A UV1-B UV1-C UV2-A UV2-B UV2-C UV3-A UV3-B UV3-C UV elements
UV#2 UV4-A UV4-B UV4-C UV elements
ZOV ZOV1 ZOV2 ZOV elements
NOV NOV1 NOV2 NOV elements
FRQ FRQ1 FRQ2 FRQ3 FRQ4 FRQ elements
ARC OVB UVB SYN OVL UVL ARC elements
RP RP1 RP2 RP elements
RQ RQ1 RQ2 RQ elements

The status of each element is expressed with logical level "1" or "0". Status "1" means the element
is in operation.

4.2.4.4 Displaying the Status of the Time Synchronisation Source

The internal clock of the GRE140 can be synchronised with external clocks such as the binary
input signal clock, Modbus or IEC60870-5-103 or SNTP(IEC61850). To display on the LCD
whether these clocks are active (=Act.) or inactive (=Inact.) and which clock the relay is
synchronised with, do the following:
• Select "Status" on the top "MAIN MENU" screen to display the "Status" screen.
• Select "Time sync." to display the status of time synchronisation sources.

/ 2 T i m e s y n c .

B I : I n a c t .

* M o d b u s : A c t .

I R I G : I n a c t .

I E C : I n a c t .

S N T P I n a c t .

The asterisk on the far left shows that the internal clock is synchronised with the marked source
clock. If the marked source clock is inactive, the internal clock runs locally. “SNTP” is displayed

 164 
 6 F 2 T 0 1 7 7

when setting is displayed if submodel of communication type is A0.

Note: If the Binary input signal has not been detected for one hour or more after the last detection, the
status becomes "inactive".
For details of the setting time synchronisation, see Section 4.2.6.6.

4.2.4.5 Clock Adjustment

To adjust the clock when the internal clock is running locally, do the following:
• Select "Status" on the top "MAIN MENU" screen to display the "Status" screen.
• Select "Clock adjust." to display the setting screen.

/ 2 2 6 / A u g / 2 0 2 0

0 0 : 0 0 : 0 0 [ L ] L:Local, B:BI, M:MODBUS, R:IRIG-B, E:IEC60870-5-103

> M i n u t e S:SNTP

0 _

H o u r

8 _

D a y

2 4 _

M o n t h

7 _

Y e a r

2 0 2 0 _

Lines 1 and 2 show the current date and time. The time can be adjusted only when the clock is
running locally. When [B], [M], [R], [E] or [S] is active, the adjustment is invalid.
• Enter a numerical value for each item and press the key. For details on how to enter a
numerical value, see 4.2.6.1.
• Press the END key to adjust the internal clock to the set hours without fractions and return to
the previous screen.
If a date which does not exist in the calendar is set and END is pressed, "**** Error ****" is
displayed on the top line and the adjustment is discarded. Return to the normal screen by pressing
the CANCEL key and adjust again.

4.2.4.6 LCD Contrast

To adjust the contrast of the LCD screen, do the following:
• Select "Status" on the top "MAIN MENU" screen to display the "Status" screen.
• Select "LCD contrast" to display the setting screen.

/ 2 L C D C o n t r a s t

 165 
 6 F 2 T 0 1 7 7

■ ■ ■ ■

• Press the

▼
or key to adjust the contrast. The characters on the screen become thinner by

▼
pressing the key and thicker by pressing the key.

4.2.4.7 Motor parameter

GRE140-700 model series can display the last start-up time, accumulated running time, Hot / Cold
/ total start counter and peak current at start-up time, as motor parameters on the LCD.
To display the status of motor parameters on the LCD:
• Select "Status" on the top "MAIN MENU" screen to display the "Status" screen.
• Select "Motor Para." to display the motor parameter status.

/ 2 M o t o r P a r a .

> V i e w P a r a .

S e t P a r a . .

C l e a r P a r a .

• Select "View Para." to display the view of motor parameter screen.

/ 3 V i e w P a r a .

> T i m e

C o u n t e r .

C u r r e n t

• Select "Time" to display the motor last start-up time and accumulated running time at "View
Para." screen.

/ 4 T i m e

L a s t s t a r t _ u p

0 1 / J a n / 2 0 1 1

0 0 : 0 0 : 0 0 . 0 0 0

R u n n i n g

* * * * 0 0 : 0 0 : 0 0

• Select "Counter" to display the motor start-up counter (total, Hot start, Cold start) at "View
Para." screen.

/ 4 C o u n t e r

S t a r t ( H + C ) *

H o t s t . * .

C o l d s t . *

 166 
 6 F 2 T 0 1 7 7

• Select "Current" to display the motor start-up current at "View Para." screen.

/ 4 C u r r e n t

P e a k s t . * A

GRE140-700 model series can set the accumulated running time and the Hot / Cold start counter in
the case the motor parameters are lost by memory clear etc..
To set the status of motor parameters on the LCD:
• Select "Set Para." to display the set of motor parameter screen.

/ 3 S e t P a r a .

> T i m e

C o u n t e r

• Select "Time" to display the accumulated running time setting screen.

/ 4 R u n n i n g

0 0 : 0 0 : 0 0

> M i n u t e

H o u r

0 0

• Select "Counter" to display start counter setting screen.

/ 4 C o u n t e r

> H o t s t . *

C o l d s t . *

To clear all motor parameters:

• Select "Clear Para." to display the clear of motor parameter screen.

C l e a r M o t . P a r a . ?

E N D = Y C A N C E L = N

• Press the END (= Y) key to clear all motor parameters stored in back-up RAM.

4.2.5 Viewing the Settings

The sub-menu "Set. (view)" is used to view the settings made using the sub-menu "Set. (change)".
The following items are displayed:
Relay version
Description

 167 
 6 F 2 T 0 1 7 7

Relay address, IP address and baud rate in Modbus or IEC60870-5-103.

Record setting
Status setting
Protection setting
Binary input setting
Binary output setting
LED setting
Control setting
Frequency setting
Enter an item on the LCD to display each item as described in the previous sections.
4.2.5.1 Relay Version
To view the relay version, do the following.
• Press the "Set.(view)" on the main menu.

/ 1 S e t . ( v i e w )

> V e r s i o n

D e s c r i p t i o n

C o m m s

R e c o r d

S t a t u s

P r o t e c t i o n

B i n a r y I / P

B i n a r y O / P

L E D

C o n t r o l

F r e q u e n c y

• Press "Version" on the "Set.(view)" menu.

/ 2 V e r s i o n

> R e l a y t y p e

S o f t w a r e .

• Select "Relay type" to display the relay type form and model number. (ex.;GRE140-401A-10-A0)

G R E 1 4 0 - 4 0 1 A - 1 0

- A 0

• Select "Software" to display the relay software type form and version. (ex.;GS1***-**-*)

 168 
 6 F 2 T 0 1 7 7

■ M a i n s o f t w a r e ↓

G S 1 * * * - * * - *

■ P L C d a t a

P G R E 1 4 0 A * * * *

( * * * * * * * * )

■ I E C 1 0 3 D a t a

I G R E 1 4 0 A * * * *

( * * * * * * * * )

■ I E C 6 1 8 5 0 C I D

* * * * * * - * * - *

( * * * * * * * * )

■ I E C 6 1 8 5 0 M A P This setting is displayed if submodel of

* * * * * * - * * - *
communication type is A0.
( * * * * * * * * )

■ M A C A d d r e s s 1

* * * * * * * * * * *

4.2.5.2 Settings
The "Description", "Comms", "Record", "Status", "Protection", "Binary I/P", "Binary
O/P" ,"LED" , "Control" and "Frequency" screens display the current settings input using the "Set.
(change)" sub-menu.

4.2.6 Changing the Settings

The "Set. (change)" sub-menu is used to make or change settings for the following items:
Password
Description
Relay address, IP address and baud rate in RSM or IEC60870-5-103 or IEC61850
Recording setting
Status setting
Protection setting
Binary input setting
Binary output setting
LED setting
Control setting
Frequency setting
All of the above settings except the password can be seen using the "Set. (view)" sub-menu.

CAUTION
Modification of settings : Care should be taken when modifying settings for "active group",
"scheme switch" and "protection element" in the "Protection" menu. Dependencies exist between

 169 
 6 F 2 T 0 1 7 7

the settings in the various menus, with settings in one menu becoming active (or inactive)
depending on the selection made in another menu. Therefore, it is recommended that all necessary
settings changes be made while the circuit breaker tripping circuit is disconnected.
Alternatively, if it is necessary to make settings changes with the tripping circuit active, then it is
recommended to enter the new settings into a different settings group, and then change the "active
group" setting, thus ensuring that all new settings become valid simultaneously.

4.2.6.1 Setting Method

There are three setting methods as follows:
- To enter a selected item
- To enter a text string
- To enter numerical values

To enter a selected item

If a screen as shown below is displayed, setting can be performed setting as follows.
The cursor can be moved to upper or lower lines within the screen by pressing the ▲ and ▼
keys. If setting (change) is not required, skip the line with the ▲ and ▼ keys.

/ 1 S e t . ( c h a n g e )

> P a s s w o r d

D e s c r i p t i o n

C o m m s

R e c o r d

S t a t u s

P r o t e c t i o n

B i n a r y I / P

B i n a r y O / P

L E D

C o n t r o l

F r e q u e n c y

• Move the cursor to a setting item.

• Press the ENTER key.

To enter a text string

Text strings are entered under the "Plant name" or "Description" screen.

/ 2 D e s c r i p t i o n

> P l a n t n a m e

D e s c r i p t i o n

To select a character, use keys ▼ , ▲ ,

▲

and to move the blinking cursor down, up, left

 170 
 6 F 2 T 0 1 7 7

and right. "→" and "←" on the final line indicate a space and backspace, respectively. A maximum
of 22 characters can be entered.

A B C D E F G H I J K L M N O P

Q R S T U V W X Y Z a b c d e f

g h i j K l m n o p q r s t u v

w x y z 0 1 2 3 4 5 6 7 8 9 ( )

[ ] @ _ { } * / + - < = > ! “ ♯

$ % & ‘ : ; , . ^ `  

• Set the cursor position in the grid square where you want the text to appear by selecting "→" or
"←" and pressing the ENTER key.

• Move the blinking cursor to a select the desired character.

• Press the ENTER key to enter the blinking character at the cursor position in the grid square.

• Press the END key to confirm the entry and return to the upper screen.
To correct the entered character, do either of the following:
• Discard the character by selecting "←" and pressing the ENTER key and enter the new
character.
• Discard the whole entry by pressing the CANCEL key and restart the entry from the first
step.

To enter numerical values

When the screen shown below is displayed, setting can be performed setting as follows:
The number to the left of the cursor shows the current setting or default setting set at shipment. The
cursor can be moved to upper or lower lines within the screen by pressing the ▲ and ▼ keys. If
a setting (change) is not required, skip the line with the ▲ and ▼ keys.

/ 4 T i m e / S t a r t e r

T i m e 1 _ s

> T i m e 1 2 . 0 s

T i m e 2 2 . 0 s

O C 2 . 0 0 A

E F 0 . 6 0 A

S E F 0 . 2 0 0 A Not available for model 400 series.

N O C 0 . 4 0 A

O V 1 2 0 . 0 V

U V 6 0 . 0 V

Z O V 2 0 . 0 V

N O V 2 0 . 0 V

 171 
 6 F 2 T 0 1 7 7

• Move the cursor to a setting line.

• Press the

▼
or key to set a desired value. The value is can be raised or powered by

▼
pressing the or key.
• Press the ENTER key to enter the value.

• After completing the setting on the screen, press the END key to return to the upper screen.
The numerical value entered can be modified as follows:
• If the need to change the numerical value is decided before pressing the ENTER key, press
the CANCEL key and enter the new numerical value.

• If it is after pressing the ENTER key, move the cursor to the correct line by pressing the ▲
and ▼ keys and enter the new numerical value.
Note: If the CANCEL key is pressed after any entry is confirmed by pressing the ENTER key, all
the entries made so far on the screen concerned are canceled and the screen will return to the
upper level.
To complete the setting
Enter the settings after making entries on each setting screen by pressing the ENTER key, the
new settings are not yet used for operation, though stored in the memory. To validate the new
settings, take the following steps.
• Press the END key to return to the upper screen. Repeat this until the confirmation screen
shown below is displayed. The confirmation screen is displayed just before returning to the
"Set. (change)" sub-menu.

C h a n g e s e t t i n g s ?

E N T E R = Y C A N C E L = N

• When the screen is displayed, press the ENTER key to start operation using the new settings,
or press the CANCEL key to correct or cancel entries. In the latter case, the screen returns to
the setting screen to enable re-entries. Press the CANCEL key to cancel entries made so far
and to turn to the "Set. (change)" sub-menu.
4.2.6.2 Password
For the sake of security of Setting changes password protection can be set as follows:
• Select "Set. (change)" on the " MAIN MENU " screen to display the "Setting change" screen.
• Select "Password" to display the "Password" screen.
• Enter a 4-digit number within the grid square after "Input" and press the ENTER key.

S e t . ( c h a n g e )

I n p u t [ _ ]

1 2 3 4 5 6 7 8 9 0 ＜

• For confirmation, enter the same 4-digit number in the grid square after "Retype".

 172 
 6 F 2 T 0 1 7 7

S e t . ( c h a n g e )

R e t y p e [ _ ]

1 2 3 4 5 6 7 8 9 0 ＜

• Press the END key to display the confirmation screen. If the retyped number is different from
that first entered, the following message is displayed on the bottom of the "Password" screen
before returning to the upper screen.
"Unmatch passwd!"
Re-entry is then requested.
Password trap
After the password has been set, the password must be entered in order to enter the setting change
screens.
If "Set. (change)" or "Test" is entered on the top "MENU" screen, the password trap screen
"Password" is displayed. If the password is not entered correctly, it is not possible to move to the
"Setting (change)" or "Test" sub-menu screens.

S e t . ( c h a n g e )

P a s s w o r d [ _ ]

1 2 3 4 5 6 7 8 9 0 ＜

Canceling or changing the password

To cancel the password protection, enter "0000" in the two grid square on the "Password" screen.
The "Set. (change)" screen is then displayed without having to enter a password.
The password can be changed by entering a new 4-digit number on the "Password" screen in the
same way as the first password setting.

If you forget the password

Press the CANCEL and RESET keys together for one second on the top "MAIN MENU"
screen. The screen goes off, and the password protection of the GRE140 is canceled. Set the
password again.

4.2.6.3 Plant Name

To enter the plant name and other data, do the following. These data are attached to records.
• Select "Set. (change)" on the " MAIN MENU " screen to display the " Set. (change)" screen.
• Select "Description" to display the "Description" screen.

/ 2 D e s c r i p t i o n

> P l a n t n a m e

D e s c r i p t i o n

• To enter the plant name, select "Plant name" on the "Description" screen.
• To enter special items, select "Description" on the "Description" screen.

 173 
 6 F 2 T 0 1 7 7

4.2.6.4 Communication
If the relay is linked with Modbus, IEC60870-5-103 communication or Ethernet LAN (optional)
an address must be set. Do this as follows:
• Select "Set. (change)" on the "MAIN MENU" screen to display the "Set. (change)" screen.
• Select "Comms" to display the "Comms" screen.

/ 2 C o m m s

＞ A d d r . / P a r a m

S w i t c h

• Select "Addr./Param." on the "Comms" screen to enter the relay address number.

P G 1 - 1 0

P G 1 - 2 0 This setting is displayed if submodel of

P G 1 - 3 0 communication type is “A0 of C0”.

P G 1 - 4  174 0
S M O D E 0
 6 F 2 T 0 1 7 7

This setting is displayed at IEC 61850

setting..

• Enter IP address for IP1-1 to IP1-4, Subnet mask for SM1-1 to SM1-4, Default gateway for
GW1-1 to GW1-4, and SNTP server address for SI1-1 to SI2-4. two SNTP servers are
available.
Enter "0" or "1" on "SMODE" column to set the standard time synchronized mode for SNTP
server. Using low accuracy level of time server, synchronized compensation to maintain
synchronization accuracy may not be done automatically. Therefore enter "1", and
synchronized compensation is done forcibly. The default setting is "0".
Enter the time on "GOINT" to set the maximum GOOSE message publishing term if GOOSE
message receive checked. Enter the time on "DEADT" to set the Keep Alive time.
Enter the IP address of the device for PG1-1 to PG2-4 if Ping response is checked.
IP address: ∗∗∗, ∗∗∗, ∗∗∗, ∗∗∗ (IP1-1, IP1-2, IP1-3, IP1-4)
SM1-1 to SM1-4, GW1-1 to GW1-4, SI1-1 to SI1-4: same as above.
Enter the parameter “VSD”, “PQSSD”, “PFSD”, “FSD”, “WhvhSD”, “PhsSD” and
“PeriodSD” to set the dead band setting. The dead band settings are wtitten at Appendix P.
• Press the ENTER key.

CAUTION: Do not duplicate the relay address number.

• Select "Switch" on the "Comms" screen to select the protocol and transmission speed (baud
rate), etc., of theModbus, IEC60870-5-103, IEC61850.

/ 3 S w i t c h

R S 4 8 5 B R _

> R S 4 8 5 B R 0

9 . 6 / 1 9 . 2

I E C B L K 0

N o r m a l / B l o c k e d

R S 4 8 5 P 0

O f f / M o d b u s / I E C 1

0 3

E t h e r P  175 0
O f f / I E C 6 1 8 5 0
 6 F 2 T 0 1 7 7

This setting is displayed if submodel of

communication type is “A0 orC0”.

• Select the number and press the ENTER key.

<RS485BR>

This line is to select the baud rate when the Modbus or IEC60870-5-103 system applied.

<IECBLK>

Select 1 (=Blocked) to block transmission from relay to BCU for IEC60870-5-103

communication. When using the IEC60870-5-103 communication, select 0 (=Normal).

<RS485P>

This line is to select the communication protocol when the MODBUS or IEC60850-5-103 system
applied.

<EtherP>

This line is to select the communication protocol when the IEC61850 system applied.

<61850BLK>

Select 1 (=Blocked) to block transmission from relay to BCU for IEC61850 communication.
When using the IEC61850 communication, select 0 (=Normal).

<TSTMOD>

Select 1 (=On) to set the test mode in IEC61850 communication.

<GSECHK>

This function is to alarm if any one of the GOOSE messages written in a GOOSE subscribe file

 176 
 6 F 2 T 0 1 7 7

cannot be received.
Select 1 (=On) to execute a GOOSE receive check for IEC61850 communication.

<PINGCHK>

This function is to check the health of the network by regularly sending a ‘Ping’ to IP address
which is set on PG∗-∗.
Select 1 (=On) to execute a ‘Ping’ response check.

4.2.6.5 Setting the Recording function

To set the recording function as described in Section 4.2.3, do the following:
• Select "Set. (change)" on the "MAIN MENU" screen to display the "Set. (change)" screen.
• Select "Record" to display the "Record " screen.

/ 2 R e c o r d

> F a u l t

E v e n t

D i s t u r b a n c e

C o u n t e r

Setting the fault recording

• Select "Fault" to display the "Fault" screen.

/ 3 F a u l t

F L _

> F L 0

O f f / O n

F R _ m o d E

M o d e 1 / M o d e 2

•<FL>

Enter 1 to enable the fault locator. In order to disable the fault locator, enter 0.

•<FR_mode>

This swicth is used to change the Fault recording mode when the ARC function operate.
Setting the event recording.

• Select "Event" to display the "Event" screen.

/ 3 E v e n t

 177 
 6 F 2 T 0 1 7 7

＞ S i g n a l N o .

E v e n t n a m e

• Select "Signal No." on the "Event" screen to enter the event setting.

/ 4 S i g n a l N o .

B I T R N _

> B I T R N . 1 0 0

E V 1 3 0 0 1

E V 2 3 0 0 2

E V 3 3 0 0 3

E V 4 3 0 0 4

E V 5 3 0 0 5

E V 1 2 7 3 1 2 7

E V 1 2 8 3 1 2 8

<BITRN>
Enter the number of event to record the status change both to "On" and "Off". If 20 is entered, both
status change is recorded for EV1 to EV20 events and only the status change to "On" is recorded
for EV21 to EV128 events.

<EV∗>
Enter the signal number in Appendix C to record the signal as an event. It is recommended that this
setting be performed using RSM100 because the signal name cannot be entered in the LCD screen.
(Refer to Section 3.4.2.)
• Select "Event name" on the "Event" screen to enter the event name.

/ 4 E v e n t n a m e

> E v e n t n a m e 1

* * * * * * * * * * * *

E v e n t n a m e 2

* * * * * * * * * * * *

E v e n t n a m e 3

* * * * * * * * * * * *

E v e n t n a m e 1 2 8

* * * * * * * * * * * *

• Enter the text string (up to 12 characters) of event name according to the text setting method.

 178 
 6 F 2 T 0 1 7 7

Setting the disturbance recording

• Select "Disturbance" to display the "Disturbance" screen.

/ 3 D i s t u r b a n c e

> T i m e / S t a r t e r

S c h e m e s w

B i n a r y s i g .

S i g n a l n a m e

• Select "Time/starter" to display the "Time/starter" screen.

/ 4 T i m e / S t a r t e r

T i m e 1 _ s

> T i m e 1 2 . 0 s

T i m e 2 2 . 0 s

O C 2 . 0 0 A

E F 0 . 6 0 A

S E F 0 . 2 0 0 A Not available for model 400 series.

N O C 0 . 4 0 A

O V 1 2 0 . 0 V

U V 6 0 . 0 V

Z O V 2 0 . 0 V

N O V 2 0 . 0 V

• Enter the recording time and starter element settings.

To set whether or not a function is to be used as a starter, do the following:
• Select "Scheme sw" on the "Disturbance" screen to display the "Scheme sw" screen.

/ 4 S c h e m e s w

T r i p _

> T r i p 1

O f f / O n

O C 1

O f f / O n

E F 1

O f f / O n

S E F 1
Not available for model 400 series.
O f f / O n

N O C 1

O f f / O n

O V 1

O f f / O n

 179 
 6 F 2 T 0 1 7 7

U V 1

O f f / O n

Z O V 1

O f f / O n

N O V 1

O F f / O n

• Enter 1 to use as a starter. If not to be used as a starter, enter 0.

To set each signal number to record binary signals, do the following:
• Select "Binary sig." on the "Disturbance" screen to display the "Binary sig." screen.

/ 4 B i n a r y s i g .

S I G 1 _

> S I G 1 1 0 0 0

S I G 2 1 0 0 1

S I G 3 1 0 0 2

S I G 4 1 0 0 3

S I G 5 1 0 0 4

S I G 6 1 0 0 5

S I G 3 1 1 0 3 0

S I G 3 2 1 0 3 1

• Enter the signal number to be recorded from the binary listed in Appendix C.
• Select "Signal name" on the "Disturbance" screen to display the "Signal name" screen.

/ 4 S i g n a l n a m e

> S i g n a l n a m e 1

* * * * * * * * * * * *

S i g n a l n a m e 2

* * * * * * * * * * * *

S i g n a l n a m e 3

* * * * * * * * * * * *

S i g n a l n a m e 3 1

* * * * * * * * * * * *

S i g n a l n a m e 3 2

* * * * * * * * * * * *

• Enter the text string (up to 22 characters) for the signal name according to the text setting
method.

 180 
 6 F 2 T 0 1 7 7

Setting the counter

• Select "Counter" to display the "Counter" screen.

/ 3 C o u n t e r

> S c h e m e s w

A l a r m s e t

To set whether or not a counter is to be used, do the following:

• Select "Scheme sw" on the "Counter" screen to display the "Scheme sw" screen.

4 S c h e m e s w

T C S P E N _

> T C S P E N 1

O f f / O n / O p t - O n

C B S M E N 1

O f f / O n

T C A E N 1

O f f / O n

Σ I y A E N 1

O f f / O n

O P T A E N 1

O f f / O n

• Enter 1 to use as a counter. If not to be used as a counter, enter 0.

To set the threshold setting, do the following:
• Select "Alarm set" on the "Counter" screen to display the "Alarm set" screen.

/ 4 A l a r m s e t

T C A L M _

> T C A L M 1 0 0 0 0

Σ I y A L M 1 0 0 0 0 E 6

Y V A L U E 2 . 0

O P T A L M 5 0 0 0 m s

• Enter the threshold settings.

4.2.6.6 Status
To set the status display described in Section 4.2.4, do the following:
Select "Status" on the "Set. (change)" sub-menu to display the "Status" screen.

 181 
 6 F 2 T 0 1 7 7

/ 2 S t a t u s

> M e t e r i n g

T i m e s y n c .

Setting the metering

• Select "Metering" to display the "Metering" screen.

/ 3 M e t e r i n g

D i s p l a y _

> D i s p l a y 0

P r i / S e c / P r i - A

P o w e r 0

S e n d / R e c e i v e

C u r r e n t 1

L a g / L e a d

• Enter 0 or 1 or 2 for Display.

Enter 0(=Pri) to display the primary side current in kilo-amperes(kA) and voltage in
kilo-volts(kV) .
Enter 1(=Sec) to display the secondary side current.
Enter 2(=Pri-A) to display the primary side current in amperes(A) and voltage in volts (V).
• Enter 0(=Send) or 1(=Receive) for Power, and 0(=Lag) or 1(=Lead) for Current, and press the
ENTER key.

Note: Power and Current setting

Active Power Display
Power setting=0 (Send) Power setting=1 (Receive)

－ ＋ ＋ －
V V

I I
－ ＋ ＋ －
Reactive Power Display
Current setting=0 (Lag) Current setting=1 (Lead)

＋ ＋ － －
V V

I I
－ － ＋ ＋

Setting the time synchronisation

The calendar clock can run locally or be synchronised with the binary input signal, I-RIG, SNTP
or by using IEC60870-5-103. This is selected by setting as follows.

 182 
 6 F 2 T 0 1 7 7

• Select "Time sync" to display the "Time sync" screen.

/ 3 T i m e s y n c .

T i m e s y n c . _

> T i m e s y n c . 1

O f f / B I / M o d b u s / I

R I G / I E C 1 0 3 / S N T P

• Enter 0, 1, 2, 3, 4 or 5 and press the ENTER key.

Enter 0(=off) not to be synchronised with any external signals.
Enter 1(=BI) to be synchronised with the binary input signal.
Enter 2(=Modbus) to be synchronised with Modbus.
Enter 3(=IRIG) to be synchronised with IRIG-B time signal.
Enter 4(=IEC103) to be synchronised with IEC60870-5-103.
Enter 5(=SNTP) to be synchronised with SNTP.
Note: When selecting BI, Modbus, IRIG-B, SNTP or IEC60870-5-103, check that they are active on
the "Status" screen in "Status" sub-menu.
If BI is selected, the BI command trigger setting should be “None” otherwise the repetitive
operation of the BI selected will quickly fill the event records (See Section 4.2.6.5.)
If it is set to inactive BI, Modbus, IRIG-B, SNTP or IEC60870-5-103, the calendar clock runs
locally.

Setting the time zone

When the calendar clock is synchronized with the SNTP, it is possible to transform GMT to the
local time.
• Select "Time zone" to display the "Time zone" screen.

/ 3 T i m e z o n e .

G M T _

> G M T + o h r S

G M T M + O m i n

• Enter the difference between GMT and local time. Enter numerical values to GMT (hrs) and
GMTm (min), and press the ENTER key.

4.2.6.7 Protection
The GRE140 can have 2 setting groups for protection in order to accommodate changes in the
operation of the power system, one setting group is assigned active. To set the protection, do the
following:
• Select "Protection" on the "Set. (change)" screen to display the "Protection" screen.

/ 2 P r o t e c t i o n

> C h a n g e a c t . g p .

 183 
 6 F 2 T 0 1 7 7

C h a n g e s e t

C o p y g p .

Changing the active group

• Select "Change act. gp." to display the "Change act. gp." screen.

/ 3 C h a n g e a c t .

g p .

A c t i v e g p . _

> A c t i v e g p . 1

• Enter the group number and press the ENTER key.

Changing the settings

Almost all the setting items have default values that are set when the product is shipped. For the
default values, see Appendix H. To change the settings, do the following:

/ 3 A c t . g p . = 1 .

> C o m m o n

G r o u p 1

G r o u p 2

Changing the Common settings

• Select "Common" to set the current and voltage input state and input imbalance monitoring
and press the ENTER key.

/ 4 C o m m o n

A P P L C T _

> A P P L C T 1

O f f / 3 P / 2 P / 1 P

A P P L V T 1

O f f / 3 P N

A P P L V E 1

O f f / O n

A P P L V S 1

O f f / O n

C T F E N 0

O f f / O n / O P T - O n

V T F 1 E N 0

O f f / O n / O P T - O n

 184 
 6 F 2 T 0 1 7 7

V T F 2 E N 0

O f f / O n / O P T - O n

C T S V E N 2

O f f / A L M & B L K / A L M

V 0 S V E N 2

O f f / A L M & B L K / A L M

V 2 S V E N 2

O f f / A L M & B L K / A L M

A O L E D 1

O f f / O n

<APPLCT>
• Enter 0(=Off: not used), 1(=3P: 3 phase), 2(=2P: 2 phase) or 3(=1P: 1 pole) to set the current
input state and press the ENTER key.

<APPLVT>
• Enter 0(=Off: not used) , 1(=3PN: 3 phase) or 2(=3PP: 3-phase to phase) and press the
ENTER key.

<APPLVE>
• Enter 0(=Off: not used), 1(=Ve: the zero-sequence voltage used is input directly) and press the
ENTER key.

<APPLVS>
• Enter 0(=Off: not used), 1 (=Vs: voltage used for synchronism check) and press the ENTER
key.

<AOLED>
This switch is used to control the “TRIP” LED lighting when an alarm element outputs.
• Enter 1 (=On) to light the “TRIP” LED when an alarm element outputs, and press the ENTER
key. If not, enter 0 (=Off) and press the ENTER key.

<CTFEN, VTF1EN, VTF2EN>

To set CT failure function and VT failure function enable, do the following.
• Enter 0(=Off) or 1(=On) or 2(=OPT-On) by pressing the
▲

or key and press the ENTER

key.

< CTSVEN, V0SVEN, V2SVEN>

To set AC input imbalance supervision enable, do the following.
• Enter 0(=Off) or 1(=ALM&BLK) or 2(=ALM) by pressing the
▲

or key and press the

ENTER key.
Changing the Group settings
• Select the "Group∗" on the "Act gp.= *" screen to change the settings and press the ENTER
key.

 185 
 6 F 2 T 0 1 7 7

/ 4 G r o u p ＊

> P a r a m e t e r

T r i p

A R C

Setting the parameter

Enter the line name, the CT/VT ratio and the fault locator as follows:
• Select "Parameter" on the "Group ∗" screen to display the "Parameter" screen.

/ 5 P a r a m e t e r

> L i n e n a m e

C T / V T r a t i o

F a u l t l o c .

• Select "Line name" to display the "Line name" screen.

• Enter the line name as a text string and press the END key.
• Select "CT/VT ratio" to display the "CT/VT ratio" screen.

/ 6 C T / V T r a t i o

O C C T _

> O C C T 4 0 0

E F C T 4 0 0

S E F C T 4 0 0 Not available for EF model series

P V T 1 0 0

P V T _ D F . 0 0

V E V T 1 0 0

V E V T _ D F . 0 0

V S V T 1 0 0

V S V T _ D F . 0 0

Note: The "CT/VT ratio" screen depends on the APPLCT and APPLVT setting.

• Enter the CT/VT ratio and press the ENTER key.

CAUTION
Do not set the CT/VT primary rated current. Set the CT ratio and VT ratio.
(CT ratio) = (CT primary rated current [A]) / (Relay rated current [A])
(VT ratio) = (VT primary rated voltage [V]) / (Relay rated voltage [V])
PVT_DF, VEVT_DF and VSVT_DF are the VT ratio of decimals part settings for low
voltage system.
ex) primary rated volgate ; 420V, relay rated voltage; 110V
(VT ratio) = 3.8181….
Set (PVT) = 3 and (PVT_DF) = 82 (or 81).

 186 
 6 F 2 T 0 1 7 7

• Select "Fault Locator" to display the "Fault Locator" screen.

/ 6 F a u l t l o c .

X 1 _ Ω

> X 1 1 0 . 0 Ω

X 0 3 4 . 0 Ω

R 1 1 . 0 Ω

R 0 3 . 5 Ω

K a b 1 0 0 %

K b C 1 0 0 %

K c A 1 0 0 %

K a 1 0 0 %

K b 1 0 0 %

K c 1 0 0 %

L i n e 5 0 . 0 k m

• Enter the setting value and press the ENTER key.

Setting the trip function

To set the scheme switches and protection elements, do the following.
• Select "Trip" on the "Group ∗" screen to display the "Trip" screen.

/ 5 T r i p

> S c h e m e s w

P r o t . e l e m e n t

Setting the scheme switch

• Select "Scheme sw" on the "Trip" screen to display the "Scheme sw" screen.

/ 6 S c h e m e s w

> A p p l i c a t i o n

O C P r o t .

E F P r o t .

S E F P r o t . Not available for model 400 series

M o t o r p r o t . Display at 700 model series.

M i s c P r o t .

O V P r o t .

U V P r o t .

Z O V P r o t .

N O V P r o t .

F R Q P r o t .

 187 
 6 F 2 T 0 1 7 7

Setting the application

To set the application setting, do the following.
• Select "Application" on the " Scheme sw" screen to display the "Application" screen.

/ 7 A p p l i c a t i o n

M O C 1 _

> M O C 1 1

D / I E C / I E E E / U S / C

M O C 2 1

D / I E C / I E E E / U S / C

M E F 1 1

D / I E C / I E E E / U S / C

M E F 2 1

D / I E C / I E E E / U S / C

M S E 1 1 Not available for model 400 series

D / I E C / I E E E / U S / C Not available for model 400 series

M S E 2 1 Not available for model 400 series

D / I E C / I E E E / U S / C Not available for model 400 series

M N C 1 1

D / I E C / I E E E / U S / C

M N C 2 1

D / I E C / I E E E / U S / C

<MOC1, 2>, <MEF1, 2>, <MSE1, 2>, <MNC1, 2>

To set the OC1, OC2, EF1, EF2, SEF1, SEF2, NOC1 and NOC2 time delay characteristic type, do
the following.
• Enter 0(=D: DT) or 1(=IEC) or 2(=IEEE) or 3(=US) or 4(=C: CON) and press the ENTER
key.
Setting the OC protection
The settings for the OC protection are as follows:
• Select "OC Prot." on the "Scheme sw" screen to display the "OC prot." screen.

/ 7 O C P r o t .

O C 1 E N _

> O C 1 E N 1

O F f / O n

O C 1 - D I R 0

F W D / R E V / N O N

M O C 1 C - I E C 0
This setting is displayed if [MOC1] is 1(=IEC).
N I / V I / E I / L T I

M O C 1 C - I E E E 0
This setting is displayed if [MOC1] is 2(=IEEE).
M I / V I / E I

 188 
 6 F 2 T 0 1 7 7

M O C 1 C - U S 0
This setting is displayed if [MOC1] is 3(=US).
C O 2 / C O 8

O C 1 R 0
This setting is displayed if [MOC1] is 2(=IEEE) or 3(=US).
D E F / D E P

O C 1 - 2 F 0

N A / B l o c k

V T F - O C 1 B L K 0

O f f / O n

O C 2 E N 0

O f f / O n

O C 2 - D I R 0

F W D / R E V / N O N

M O C 2 C - I E C 0
This setting is displayed if [MOC2] is 1(=IEC).
N I / V I / E I / L T I

M O C 2 C - I E E E 0
This setting is displayed if [MOC2] is 2(=IEEE).
M I / V I / E I

M O C 2 C - U S 0
This setting is displayed if [MOC2] is 3(=US).
C O 2 / C O 8

O C 2 R 0
This setting is displayed if [MOC2] is 2(=IEEE) or 3(=US)
D E F / D E P

O C 2 - 2 F 0

N A / B l o c k

V T F - O C 2 B L K 0

O f f / O n

O C 3 E N 0

O f f / O n

O C 3 - D I R 0

F W D / R E V / N O N

O C 3 - 2 F 0

N A / B l o c k

V T F - O C 3 B L K 0

O f f / O n

O C 4 E N 0

O f f / O n

O C 4 - D I R 0

F W D / R E V / N O N

O C 4 - 2 F 0

N A / B l o c k

V T F - O C 4 B L K 0

O f f / O n

O C T P 0

 189 
 6 F 2 T 0 1 7 7

3 P O R / 2 O U T O F 3

<OC∗EN>
• Enter 1(=On) to enable the OC∗ and press the ENTER key. If disabling the OC∗, enter
0(=Off) and press the ENTER key.

<OC∗-DIR>
To set the OC∗ directional characteristic, do the following.
• Enter 0(=FWD) or 1(=REV) or 2(=NON) and press the ENTER key.

<MOC1C>, <MOC2C>
To set the OC1 and OC2 Inverse Curve Type, do the following.
• If [MOC∗] is 1(=IEC), enter 0(=NI) or 1(=VI) or 2(=EI) or 3(=LTI) and press the ENTER
key.
• If [MOC∗] is 2(=IEEE), enter 0(=MI) or 1(=VI) or 2(=EI) and press the ENTER key.

• If [MOC∗] is 3(=US), enter 0(=CO2) or 1(=CO8) and press the ENTER key.

<OC1R>, <OC2R>
To set the Reset Characteristic, do the following.
• If [MOC∗] is 2(=IEEE) or 3(=US), enter 0(=DEF) or 1(=DEP) and press the ENTER key.

<OC1-2F>, <OC2-2F>, <OC3-2F>, <OC4-2F>

• Enter 1(=Block) to block the OC1, OC2, OC3 and OC4 against the inrush current, and press
the ENTER key.

<VTF-OC∗BLK>
To set the VTF block enable of OC∗, do the following.
• Enter 1(=On) to enable "Trip block" by the VTF function and press the ENTER key. If
disabling it, enter 0(=Off) and press the ENTER key.

<OCTP>
To set the trip mode, do the following.
• Enter 0(=3POR) or 1(=2OUTOF3) and press the ENTER key. If the “2OUTOF3” selected,
the trip signal is not issued when only one phase element operates.

• After setting, press the END key to display the following confirmation screen.

C h a n g e s e t t i n g s ?

E N T E R = Y C A N C E L = N

 190 
 6 F 2 T 0 1 7 7

• Press the ENTER (=Y) key to change settings and return to the "Scheme sw" screen.

Setting the EF protection

The settings for the EF protection are as follows:
• Select the "EF prot." on the "Scheme sw" screen to display the "EF prot." screen.

/ 7 E F P r o t .

E F 1 E N _

> E F 1 E N 1

O f f / O n / P O P

E F 1 - D I R 0

F W D / R E V / N O N

M E F 1 C - I E C 0
This setting is displayed if [MEF1] is 1(=IEC).
N I / V I / E I / L T I

M E F 1 C - I E E E 0
This setting is displayed if [MEF1] is 2(=IEEE).
M I / V I / E I

M E F 1 C - U S 0
This setting is displayed if [MEF1] is 3(=US).
C O 2 / C O 8

E F 1 R 0
This setting is displayed if [MEF1] is 2(=IEEE) or 3(=US).
D E F / D E P

E F 1 - 2 F 0

N A / B l o c k

C T F - E F 1 B L K 0

O f f / O n

V T F - E F 1 B L K 0

O f f / O n

E F 2 E N 0

O f f / O n / P O P

E F 2 - D I R 0

F W D / R E V / N O N

M E F 2 C - I E C 0
This setting is displayed if [MEF2] is 1(=IEC).
N I / V I / E I / L T I

M E F 2 C - I E E E 0
This setting is displayed if [MEF2] is 2(=IEEE).
M I / V I / E I

M E F 2 C - U S 0
This setting is displayed if [MEF2] is 3(=US).
C O 2 / C O 8

E F 2 R 0
This setting is displayed if [MEF2] is 2(=IEEE) or 3(=US).
D E F / D E P

E F 2 - 2 F 0

 191 
 6 F 2 T 0 1 7 7

N A / B l o c k

C T F - E F 2 B L K 0

O f f / O n

V T F - E F 2 B L K 0

O f f / O n

E F 3 E N 0

O f f / O n / P O P

E F 3 - D I R 0

F W D / R E V / N O N

E F 3 - 2 F 0

N A / B l o c k

C T F - E F 3 B L K 0

O f f / O n

V T F - E F 3 B L K 0

O f f / O n

E F 4 E N 0

O f f / O n / P O P

E F 4 - D I R 0

F W D / R E V / N O N

E F 4 - 2 F 0

N A / B l o c k

C T F - E F 4 B L K 0

O f f / O n

V T F - E F 4 B L K 0

O f f / O n

C U R R E V

O f f / 1 / 2 / 3 / 4

<EF∗EN>
• Enter 1(=On) to use an earth fault protection or enter 2(=POP) to use the directional earth fault
command protection (POP scheme), and press the ENTER key. If disabling the EF∗, enter
0(=Off) and press the ENTER key.

<EF∗-DIR>
To set the EF∗ directional characteristic, do the following.
• Enter 0(=FWD) or 1(=REV) or 2(=NON) and press the ENTER key.

<MEF1C>, <MEF2C>
To set the EF1 and EF2 Inverse Curve Type, do the following.
• If [MEF∗] is 1(=IEC), enter 0(=NI) or 1(=VI) or 2(=EI) or 3(=LTI) and press the ENTER
key.
• If [MEF∗] is 2(=IEEE), enter 0(=MI) or 1(=VI) or 2(=EI) and press the ENTER key.

 192 
 6 F 2 T 0 1 7 7

• If [MEF∗] is 3(=US), enter 0(=CO2) or 1(=CO8) and press the ENTER key.

<EF1R>, <EF2R>
To set the Reset Characteristic, do the following.
• If [MEF∗] is 2(=IEEE) or 3(=US), enter 0(=DEF) or 1(=DEP) and press the ENTER key.

<EF1-2F>, <EF2-2F>, <EF3-2F>, <EF4-2F>

• Enter 1(=Block) to block the EF1, EF2, EF3 and EF4 against the inrush current, and press the
ENTER key.

<CTF-EF∗BLK>, <VTF-EF∗BLK>
To set the CTF block and VTF block enable of EF∗, do the following.
• Enter 1(=On) to enable "Trip block" by the CTF function and VTF function, and press the
ENTER key. If disabling them, enter 0(=Off) and press the ENTER key.

<CURREV>
To set which stage is used for current reverse detection in the command protection, do the
following.
• Enter 1(=EF1), 2(=EF2), 3(EF3) or 4(=EF4) and press the ENTER key. If disabling them,
enter 0(=Off) and press the ENTER key.

• After setting, press the END key to display the following confirmation screen.

C h a n g e s e t t i n g s ?

E N T E R = Y C A N C E L = N

• Press the ENTER (=Y) key to change settings and return to the "Scheme sw" screen.

Setting the SEF protection

The settings for the SEF protection are as follows:
• Select "SEF prot." on the "Scheme sw" screen to display the "SEF prot." screen.

/ 7 S E F p r o t .

S E 1 E N _

> S E 1 E N 1

O f f / O n

S E 1 - D I R 0

F W D / R E V / N O N

M S E 1 C - I E C 0 This setting is displayed if [MSE1] is 1(=IEC).

N I / V I / E I / L T I

M S E 1 C - I E E E 0 This setting is displayed if [MSE1] is 2(=IEEE).

M I / V I / E I

M S E 1 C - U S 0 This setting is displayed if [MSE1] is 3(=US).

 193 
 6 F 2 T 0 1 7 7

C O 2 / C O 8

S E 1 R 0 This setting is displayed if [MSE1] is 2(=IEEE) or 3(=US).

D E F / D E P

S E 1 S 2 0

O f f / O n

S E 1 - 2 F 0

N A / B l o c k

V T F - S E 1 B L K 0

O f f / O n

S E 2 E N 0

O f f / O n

S E 2 - D I R 0

F W D / R E V / N O N

M S E 2 C - I E C 0 This setting is displayed if [MSE2] is 1(=IEC).

N I / V I / E I / L T I

M S E 2 C - I E E E 0 This setting is displayed if [MSE2] is 2(=IEEE).

M I / V I / E I

M S E 2 C - U S 0 This setting is displayed if [MSE2] is 3(=US).

C O 2 / C O 8

S E 2 R 0 This setting is displayed if [MSE2] is 2(=IEEE) or 3(=US).

D E F / D E P

S E 2 - 2 F 0

N A / B l o c k

V T F - S E 2 B L K 0

O f f / O n

S E 3 E N 0

O f f / O n

S E 3 - D I R 0

F W D / R E V / N O N

S E 3 - 2 F 0

N A / B l o c k

V T F - S E 3 B L K 0

O f f / O n

S E 4 E N 0

O f f / O n

S E 4 - D I R 0

F W D / R E V / N O N

S E 4 - 2 F 0

N A / B l o c k

V T F - S E 4 B L K 0

O f F / O n

 194 
 6 F 2 T 0 1 7 7

Z P E N 0

O f f / O n

<SE∗EN>
• Enter 1(=On) to enable the SEF∗ and press the ENTER key. If disabling the SEF∗, enter
0(=Off) and press the ENTER key.

<MSE1C>, <MSE2C>
To set the SEF1 and SEF2 Inverse Curve Type, do the following.
• If [MSE∗] is 1(=IEC), enter 0(=NI) or 1(=VI) or 2(=EI) or 3(=LTI) and press the ENTER
key.
• If [MSE∗] is 2(=IEEE), enter 0(=MI) or 1(=VI) or 2(=EI) and press the ENTER key.

• If [MSE∗] is 3(=US), enter 0(=CO2) or 1(=CO8) and press the ENTER key.

<SE1R>, <SE2R>
To set the Reset Characteristic, do the following.
• If [MSE∗] is 2(=IEEE) or 3(=US), enter 0(=DEF) or 1(=DEP) and press the ENTER key.

<SE1S2>
To set the Stage 2 Timer Enable, do the following.
• Enter 1(=On) to enable the SE1S2 and press the ENTER key. If disabling the SE1S2, enter
0(=Off) and press the ENTER key.

<SE1-2F>, <SE2-2F>, <SE3-2F>, <SE4-2F>

• Enter 1(=Block) to block the SEF1, SEF2, SEF3 and SEF4 against the inrush current, and press
the ENTER key.

<VTF-SE∗BLK>
To set the VTF block enable of SE∗, do the following.
• Enter 1(=On) to enable "Trip block" by the VTF function and press the ENTER key. If
disabling it, enter 0(=Off) and press the ENTER key.

<ZPEN>
To set the zero phase sequence power block enable of SE∗, do the following.
• Enter 1(=On) to enable "Trip block" by the residual power block function and press the
ENTER key. If disabling it, enter 0(=Off) and press the ENTER key.

• After setting, press the END key to display the following confirmation screen.

C h a n g e s e t t i n g s ?

E N T E R = Y C A N C E L = N

 195 
 6 F 2 T 0 1 7 7

• Press the ENTER (=Y) key to change settings and return to the "Scheme sw" screen.

Setting the Motor protection

The settings for motor protection are as follows (only for GRE140-700 model series) :
• Select "Motor prot." to display the "Motor prot." screen.

/ 7 M o t o r p r o t .

E X S T _

> E X S T E N 1

O f f / O N

S T R T E N 0

O f f / O n

L K R T E N 0

O f f / O n

R S I H E N 0

O f f / O n

S T P H E N 0

O f f / O n

<EXSTEN>
• Enter 1(=On) to enable the Start Protection and press the ENTER key. If disabling the Start
Protection, enter 0(=Off) and press the ENTER key.

<STRTEN>
• Enter 1(=On) to enable the Stalled Motor Protection and press the ENTER key. If disabling
the Stalled Motor Protection, enter 0(=Off) and press the ENTER key.

<LKRTEN>
• Enter 1(=On) to enable the Locked Rotor Protection and press the ENTER key. If disabling
the Locked Rotor Protection, enter 0(=Off) and press the ENTER key.
If thermal OL or thermal Alarm is disable, the Locked Rotor Protection is NOT available.

<RSIHEN>
• Enter 1(=On) to enable the Restart Inhibit and press the ENTER key. If disabling the Restart
Inhibit , enter 0(=Off) and press the ENTER key.
If thermal OL or thermal Alarm is disable, the Restart Inhibit is NOT available.

<STPHEN>
• Enter 1(=On) to enable the Starts per hour element and press the ENTER key. If disabling the

 196 
 6 F 2 T 0 1 7 7

Starts per hour element , enter 0(=Off) and press the ENTER key.

Setting the Misc. protection

The settings for the miscellaneous protection are as follows:
• Select the "Misc. prot." on the "Scheme sw" screen to display the "Misc. prot." screen.

/ 7 M i s c P r o t .

N C 1 E N _

> N C 1 E N 0

O f f / O n

N C 1 - D I R 0

F W D / R E V / N O N

M N C 1 C - I E C 0
This setting is displayed if [MNC1] is 1(=IEC).
N I / V I / E I / L T I

M N C 1 C - I E E E 0
This setting is displayed if [MNC1] is 2(=IEEE).
M I / V I / E I

M N C 1 C - U S 0
This setting is displayed if [MNC1] is 3(=US).
C O 2 / C O 8

N C 1 R 0
This setting is displayed if [MNC1] is 2(=IEEE) or 3(=US).
D E F / D E P

N C 1 - 2 F 0

N A / B l o c k

C T F - N C 1 B L K 0

O f f / O n

V T F - N C 1 B L K 0

O f f / O n

N C 2 E N 0

O f f / O n

N C 2 - D I R 0

F W D / R E V / N O N

M N C 2 C - I E C 0
This setting is displayed if [MNC1] is 1(=IEC).
N I / V I / E I / L T I

M N C 2 C - I E E E 0
This setting is displayed if [MNC1] is 2(=IEEE).
M I / V I / E I

M N C 2 C - U S 0
This setting is displayed if [MNC1] is 3(=US).
C O 2 / C O 8

N C 2 R 0
This setting is displayed if [MNC1] is 2(=IEEE) or 3(=US).
D E F / D E P

N C 2 - 2 F 0

N A / B l o c k

C T F - N C 2 B L K 0

O f f / O n

 197 
 6 F 2 T 0 1 7 7

V T F - N C 2 B L K 0

O f f / O n

U C 1 E N 0

O f f / O n

C T F - U C 1 B L K 0

O f f / O n

U C 2 E N 0

O f f / O n

C T F - U C 2 B L K 0

O f f / O n

T H M E N 0

O f f / O n

T H M A E N 0

O f f / O n

B C D E N 0

O f f / O n

B C D - 2 F 0

N A / B l o c k

B T C 0

O f f / O n

R T C 0

O f f / D I R / O C

C L E N 0

O f f / O n

C L D O E N 0

O f f / O n

R P C B 0

U s e / N o u s e

R P - U V B L K 0

N A / B l o c k

R P - P o w e r 0

D i s a b l e / E n a b l e

P o w e r 0

S e n d / R e c e i v e

R P 1 E N 0

O f f / O n

R P 1 - 2 F 0

N A / B l o c k

C T F - R P 1 B L K 0

O f f / O N

V T F - R P 1 B L K 0

 198 
 6 F 2 T 0 1 7 7

O f f / O N

R P 2 E N 0

O f f / O n

R P 2 - 2 F 0

N A / B l o c k

C T F - R P 2 B L K 0

O f f / O N

V T F - R P 2 B L K 0

O f f / O N

R Q C B 0

U s e / N o u s e

R Q - U V B L K 0

N A / B l o c k

R Q - C u r r e n t 0

D i s a b l e / E n a b l e

C u r r e n t 0

L e a d / L a g

R Q 1 E N 0

O f f / O n

R Q 1 - 2 F 0

N A / B l o c k

C T F - R Q 1 B L K 0

O f f / O N

V T F - R Q 1 B L K 0

O f f / O N

R Q 2 E N 0

O f f / O n

R Q 2 - 2 F 0

N A / B l o c k

C T F - R Q 2 B L K 0

O f f / O N

V T F - R Q 2 B L K 0

O f f / O N

O C D E N 0

N A / U P / D O W N / B O T H

<NC∗EN>
• Enter 1(=On) to enable the NC∗ and press the ENTER key. If disabling the NC∗, enter
0(=Off) and press the ENTER key.

<NC∗-DIR>
To set the NC∗ directional characteristic, do the following.

 199 
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• Enter 0(=FWD) or 1(=REV) or 2(=NON) and press the ENTER key.

<MNC1C>, <MNC2C>
To set the NOC1 and NOC2 Inverse Curve Type, do the following.
• If [MNC∗] is 1(=IEC), enter 0(=NI) or 1(=VI) or 2(=EI) or 3(=LTI) and press the ENTER
key.
• If [MNC∗] is 2(=IEEE), enter 0(=MI) or 1(=VI) or 2(=EI) and press the ENTER key.

• If [MNC∗] is 3(=US), enter 0(=CO2) or 1(=CO8) and press the ENTER key.

<NC1R>, <NC2R>
To set the Reset Characteristic, do the following.
• If [MNC∗] is 2(=IEEE) or 3(=US), enter 0(=DEF) or 1(=DEP) and press the ENTER key.

<NC1-2F>, <NC2-2F>
• Enter 1(=Block) to block the NOC1 and NOC2 against the inrush current, and press the
ENTER key.

<CTF-NC∗BLK>, <VTF-NC∗BLK>
To set the CTF block and VTF block enable of NC∗, do the following.
• Enter 1(=On) to enable "Trip block" by the CTF function and VTF function, and press the
ENTER key. If disabling them, enter 0(=Off) and press the ENTER key.

<UC∗EN>
• Enter 1(=On) to enable the UC∗ and press the ENTER key. If disabling the UC∗, enter
0(=Off) and press the ENTER key.

<CTF-UC∗BLK>
To set the CTF block enable of UC∗, do the following.
• Enter 1(=On) to enable "Trip block" by the CTF function, and press the ENTER key. If
disabling it, enter 0(=Off) and press the ENTER key.

<THMEN>
• Enter 1(=On) to enable the Thermal OL and press the ENTER key. If disabling the Thermal
OL, enter 0(=Off) and press the ENTER key.

<THMAEN>
• Enter 1(=On) to enable the Thermal Alarm and press the ENTER key. If disabling the
Thermal Alarm, enter 0(=Off) and press the ENTER key.

<BCDEN>
• Enter 1(=On) to enable the Broken Conductor and press the ENTER key. If disabling the

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Broken Conductor, enter 0(=Off) and press the ENTER key.

<BCD-2F>
• Enter 1(=Block) to block the BCD against the inrush current, and press the ENTER key.

<BTC>
• Enter 1(=On) to set the Back-trip control and press the ENTER key. If not setting the
Back-trip control, enter 0(=Off) and press the ENTER key.

<RTC>
To set the Re-trip control, do the following.
• Enter 0(=Off) or 1(=Direct) or 2(=OC controlled) and press the ENTER key.

<CLEN>
To set the Cold load function enable, do the following.
• Enter 1(=On) to enable the Cold Load function and press the ENTER key. If disabling the
Cold Load, enter 0(=Off) and press the ENTER key.

<CLDOEN>
• Enter 1(=On) to enable the Cold Load drop-off and press the ENTER key. If disabling the
Cold Load drop-off, enter 0(=Off) and press the ENTER key.

<RPCB>
To set the RPCB setting , do the following.
• Enter 0(=Use) to enable RP element block by CB Close status and press the ENTER key. If
disabling the RPCB, enter 1(=Nouse) and press the ENTER key.

<RP-UVBLK>
To set the undervoltage block enable for RP, do the following.
• Enter 1(=Block) to enable "Trip block" by the RP-UVBLK function, and press the ENTER
key. If disabling it, enter 0(=NA) and press the ENTER key.

<RP-Power>
To set the RP-Power setting , do the following.
• Enter 1(=Enable) to enable the active power direction setting from [Power] setting and press
the ENTER key. If disabling the RP-Power, enter 0(=Disable) and press the ENTER key.

<Power>
To set the Power setting , do the following.
• When [RP-Power] is set to 1(=Enable) , enter 1(=Receive) to set the receiving direction setting,
or enter 0(=Send) to set the sending direction setting and press the ENTER key

 201 
 6 F 2 T 0 1 7 7

<RP∗EN>
• Enter 1(=On) to enable RP∗ and press the ENTER key. If disabling RP∗, enter 0(=Off) and
press the ENTER key.

<RP1-2F>, <RP2-2F>
• Enter 1(=Block) to block RP1 and RP2 for inrush current, and press the ENTER key.

<CTF-RP∗BLK>, <VTF-RP∗BLK>
To set the CTF block and VTF block enable for RP∗, do the following.
• Enter 1(=On) to enable "Trip block" by the CTF function and VTF function, and press the
ENTER key. If disabling them, enter 0(=Off) and press the ENTER key.

<RQCB>
To set the RQCB setting , do the following.
• Enter 0(=Use) to enable RQ element block by CB Close status and press the ENTER key. If
disabling the RQCB, enter 1(=Nouse) and press the ENTER key.

<RQ-UVBLK>
To set the undervoltage block enable for RQ, do the following.
• Enter 1(=Block) to enable "Trip block" by the RQ-UVBLK function, and press the ENTER
key. If disabling it, enter 0(=NA) and press the ENTER key.

<RQ-Current>
To set the RQ-Current setting , do the following.
• Enter 1(=Enable) to enable the reactive phase characteristic setting from [Current] setting and
press the ENTER key. If disabling the RQ-Power, enter 0(=Disable) and press the ENTER
key.

<Current>
To set the Current setting , do the following.
• When [RQ-Current] is set to 1(=Enable) , enter 1(=Lag) to set the phase - Lag setting, or enter
0(=Lead) to set the phase – Lead setting and press the ENTER key

<RQ∗EN>
• Enter 1(=On) to enable RQ∗ and press the ENTER key. If disabling RQ∗, enter 0(=Off) and
press the ENTER key.

<RQ1-2F>, <RQ2-2F>
• Enter 1(=Block) to block RQ1 and RQ2 for inrush current, and press the ENTER key.

<CTF-RQ∗BLK>, <VTF-RQ∗BLK>
To set the CTF block and VTF block enable for RQ∗, do the following.
• Enter 1(=On) to enable "Trip block" by the CTF function and VTF function, and press the

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ENTER key. If disabling them, enter 0(=Off) and press the ENTER key.

<OCDEN>
To set the OCD element:
• Enter 1(=UP, Current rise), 2(=DOWN, Current decay) or 3(=BOTH, Current rise and decay)
and press the ENTER key. If disabling theOCD, enter 0(=NA) and press the ENTER key.

• After setting, press the END key to display the following confirmation screen.

C h a n g e s e t t i n g s ?

E N T E R = Y C A N C E L = N

• Press the ENTER (=Y) key to change settings and return to the "Scheme sw" screen.

Setting the OV protection

The settings for the OV protection are as follows:
• Select "OV" on the "Scheme sw" screen to display the "OV" screen.

/ 7 O V p r o t .

O V 1 E N _

> O V 1 E N 0

O f f / D T / I D M T / C

O V 2 E N 0

O f f / D T / I D M T / C

O V 3 E N 0

O f f / O N

O V 4 E N 0

O f f / O N

<OV1EN>, <OV2EN>
To set the OV1 and OV2 delay type, do the following.
• Enter 1 (=DT) or 2 (=IDMT) or 3 (=C: configurable curve) and press the ENTER key. If
disabling the OV1 or OV2, enter 0 (=Off) and press the ENTER key.

<OV3EN>, <OV4EN>
• Enter 1 (=On) to enable the OV3 or OV4, and press the ENTER key. If disabling the OV3 or
OV4, enter 0 (=Off) and press the ENTER key.

• After setting, press the END key to display the following confirmation screen.

C h a n g e s e t t i n g s ?

E N T E R = Y C A N C E L = N

 203 
 6 F 2 T 0 1 7 7

• Press the ENTER (= Y) key to change settings and return to the "Scheme sw" screen.

Setting the UV protection

The settings for the UV protection are as follows:
• Select "UV" on the "Scheme sw" screen to display the "UV" screen.

/ 7 U V p r o t .

U V 1 E N _

> U V 1 E N 0

O f f / D T / I D M T / C

V T F - U V 1 B L K 0

O f f / O n

U V 2 E N 0

O F f / D T / I D M T / C

V T F - U V 2 B L K 0

O f f / O n

U V 3 E N 0

O f f / O N

V T F - U V 3 B L K 0

O f f / O n

U V 4 E N 0

O f f / O N

V T F - U V 4 B L K 0

O f f / O n

V B L K E N 0

O f f / O n

U V H S S E N 0

O f f / O n

U V H S G E N 0

O f f / O n

U V D E N 0

O f f / O n

<UV1EN>, <UV2EN>
To set the UV1 and UV2 delay type, do the following.
• Enter 1 (=DT) or 2 (=IDMT) or 3 (=C: configurable curve) and press the ENTER key. If
disabling the UV1 or UV2, enter 0 (=Off) and press the ENTER key.

<UV3EN>, <UV4EN>
• Enter 1 (=On) to enable the UV3 or UV4, and press the ENTER key. If disabling the UV3 or
UV4, enter 0 (=Off) and press the ENTER key.

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<VTF-UV∗BLK>
To set the VTF block enable of UV∗, do the following.
• Enter 1(=On) to enable "Trip block" by the VTF function and press the ENTER key. If
disabling it, enter 0(=Off) and press the ENTER key.

<VBLKEN>
• Enter 1 (=On) to enable the UV blocking and press the ENTER key. If disabling the UV
blocking, enter 0 (=Off) and press the ENTER key.

• After setting, press the END key to display the following confirmation screen.

C h a n g e s e t t i n g s ?

E N T E R = Y C A N C E L = N

• Press the ENTER (= Y) key to change settings and return to the "Scheme sw" screen.
Setting the ZOV protection
The settings for the ZOV protection are as follows:
• Select "ZOV" on the "Scheme sw" screen to display the "ZOV" screen.

/ 7 Z O V P r o t .

Z O V 1 E N _

> Z O V 1 E N 0

O f f / D T / I D M T / C

V T F - Z V 1 B L K 0

O f f / O n

Z O V 2 E N 0

O f f / D T / I D M T / C

V T F - Z V 2 B L K 0

O f f / O n

<ZOV1EN>, <ZOV2EN>
To set the ZOV1 and ZOV2 delay type, do the following.
• Enter 1 (=DT) or 2 (=IDMT) or 3 (=C: configurable curve) and press the ENTER key. If
disabling the ZOV1 or ZOV2, enter 0(=Off) and press the ENTER key.

<VTF-ZV1BLK>, <VTF-ZV1BLK>
To set the VTF block enable of ZOV1 and ZOV2, do the following.
• Enter 1(=On) to enable "Trip block" by the VTF function and press the ENTER key. If
disabling it, enter 0(=Off) and press the ENTER key.

• After setting, press the END key to display the following confirmation screen.
C h a n g e s e t t i n g s ?

 205 
 6 F 2 T 0 1 7 7

E N T E R = Y C A N C E L = N

• Press the ENTER (= Y) key to change settings and return to the "Scheme sw" screen.

Setting the NOV protection

The settings for the NOV protection are as follows:
• Select "NOV" on the "Scheme sw" screen to display the "NOV" screen.

/ 7 N O V P r o t .

N O V 1 E N _

> N O V 1 E N 0

O f f / D T / I D M T / C

V T F - N V 1 B L K 0

O f f / O n

N O V 2 E N 0

O f f / D T / I D M T / C

V T F - N V 2 B L K 0

O f f / O n

<NOV1EN>, <NOV2EN>
To set the NOV1 and NOV2 delay type, do the following.
• Enter 1 (=DT) or 2 (=IDMT) or 3 (=C: configurable curve) and press the ENTER key. If
disabling the NOV1 or NOV2, enter 0(=Off) and press the ENTER key.

<VTF-NV1BLK>, < VTF-NV2BLK>

To set the VTF block enable of NOV1 and NOV2, do the following.
• Enter 1(=On) to enable "Trip block" by the VTF function and press the ENTER key. If
disabling it, enter 0(=Off) and press the ENTER key.

• After setting, press the END key to display the following confirmation screen.

C h a n g e s e t t i n g s ?

E N T E R = Y C A N C E L = N

• Press the ENTER (= Y) key to change settings and return to the "Scheme sw" screen.

Setting the FRQ protection

The settings for the FRQ (over/under frequency) protection are as follows:
• Select "FRQ" on the "Scheme sw" screen to display the "FRQ" screen.

/ 7 F R Q P r o t .

F R Q 1 E N _

> F R Q 1 E N 0

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 6 F 2 T 0 1 7 7

O f f / O F / U F

F R Q 2 E N 0

O f f / O F / U F

F R Q 3 E N 0

O f f / O F / U F

F R Q 4 E N 0

O f f / O F / U F

D F R Q 1 E N 0

O f f / R / D

D F R Q 2 E N 0

O f f / R / D

D F R Q 3 E N 0

O f f / R / D

D F R Q 4 E N 0

O f f / R / D

<FRQ∗EN>
To set the FRQ∗ scheme enable, do the following.
• Enter 1(=OF, overfrequency) or 2(=UF, underfrequency) and press the ENTER key. If
disabling the FRQ∗, enter 0(=Off) and press the ENTER key.

<DFRQ∗EN>
To set the FRQ∗ scheme enable, do the following.
• Enter 1(=R, frequency rise rate) or 2(=UF, frequency decay rate) and press the ENTER key.
If disabling the FRQ∗, enter 0(=Off) and press the ENTER key.

Setting the protection elements

To set the protection elements, do the following.
• Select "Prot. element" on the "Trip" screen to display the "Prot. element" screen.

/ 6 P r o t . e l e m e n t

> O C P r o t .

E F P r o t .

S E F P r o t . Not available for model 400 series

M o t o t p r o t . Display on 700 model series.

M i s c P r o t .

O V P r o t .

U V P r o t .

Z O V P r o t .

N O V P r o t .

F R Q P r o t .

C T F / V T F .

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 6 F 2 T 0 1 7 7

Setting the OC elements

• Select "OC" on the "Prot. element" screen to display the "OC" screen.
/ 7 O C P r o t .

O C θ _ d e g

> O C θ - 4 5 d e g

O C 1 1 . 0 0 A

T O C 1 1 . 0 0 s This setting is displayed if [MOC1] is 0(=DT)

T O C 1 M 1 . 0 0 0 This setting is displayed if [MOC1] is 1(=IEC) , 2(=IEEE) or 3(=US).
T O C 1 R 0 . 0 s This setting is displayed if [MOC1] is 0(=DT)
T O C 1 R M 1 . 0 0 0 This setting is displayed if [MOC1] is 2(=IEEE) or 3(=US).
O C 2 5 . 0 0 A

T O C 2 1 . 0 0 0 s This setting is displayed if [MOC2] is 0(=DT)

T O C 2 M 1 . 0 0 0 This setting is displayed if [MOC2] is 1(=IEC) , 2(=IEEE) or 3(=US).
T O C 2 R 0 . 0 s This setting is displayed if [MOC2] is 0(=DT)
T O C 2 R M 1 . 0 0 0 This setting is displayed if [MOC2] is 2(=IEEE) or 3(=US).
O C 3 1 0 . 0 0 A

T O C 3 1 . 0 0 s

O C 4 2 0 . 0 0 A

T O C 4 1 . 0 0 s

O C 1 - k 0 . 0 0 0 This setting is displayed if [MOC1] is 4(=C)

O C 1 - α 0 . 0 0 ditto
O C 1 - C 0 . 0 0 0 ditto
O C 1 - k r 0 . 0 0 0 ditto
O C 1 - β 0 . 0 0 ditto
O C 2 - k 0 . 0 0 0 This setting is displayed if [MOC2] is 4(=C)
O C 2 - α 0 . 0 0 ditto
O C 2 - C 0 . 0 0 0 ditto
O C 2 - k r 0 . 0 0 0 ditto
O C 2 - β 0 . 0 0 ditto

• Enter the numerical value and press the ENTER key.

• After setting, press the END key to display the following confirmation screen.

C h a n g e s e t t i n g s ?

E N T E R = Y C A N C E L = N

• Press the ENTER (=Y) key to change settings and return to the "Prot. element" screen.

 208 
 6 F 2 T 0 1 7 7

Setting the EF elements

• Select "EF" on the "Prot. element" screen to display the "EF" screen.
/ 7 E F P r o t .

E F θ _ d e g

> E F θ - 4 5 d e g

E F V 3 . 0 V

E F 1 0 . 3 0 A

T E F 1 1 . 0 0 s This setting is displayed if [MEF1] is 0(=DT)

T E F 1 M 1 . 0 0 0 This setting is displayed if [MEF1] is 1(=IEC) , 2(=IEEE) or 3(=US).
T E F 1 R 0 . 0 s This setting is displayed if [MEF1] is 0(=DT)
T E F 1 R M 1 . 0 0 0 This setting is displayed if [MEF1] is 2(=IEEE) or 3(=US).
E F 2 3 . 0 0 A

T E F 2 1 . 0 0 s This setting is displayed if [MEF2] is 0(=DT)

T E F 2 M 1 . 0 0 0 This setting is displayed if [MEF2] is 1(=IEC) , 2(=IEEE) or 3(=US).
T E F 2 R 0 . 0 s This setting is displayed if [MEF2] is 0(=DT)
T E F 2 R M 1 . 0 0 0 This setting is displayed if [MEF2] is 2(=IEEE) or 3(=US).
E F 3 5 . 0 0 A

T E F 3 1 . 0 0 s

E F 4 1 0 . 0 0 A

T E F 4 1 . 0 0 s

T R E B K 0 . 1 0 s

E F 1 - k 0 . 0 0 0 This setting is displayed if [MEF1] is 4(=C)

E F 1 - α 0 . 0 0 ditto
E F 1 - C 0 . 0 0 0 ditto
E F 1 - k r 0 . 0 0 0 ditto
E F 1 - β 0 . 0 0 ditto
E F 2 - k 0 . 0 0 0 This setting is displayed if [MEF2] is 4(=C)
E F 2 - α 0 . 0 0 ditto
E F 2 - C 0 . 0 0 0 ditto
E F 2 - k r 0 . 0 0 0 ditto
E F 2 - β 0 . 0 0 ditto

• Enter the numerical value and press the ENTER key.

• After setting, press the END key to display the following confirmation screen.

C h a n g e s e t t i n g s ?

E N T E R = Y C A N C E L = N

• Press the ENTER (=Y) key to change settings and return to the "Prot. element" screen.

 209 
 6 F 2 T 0 1 7 7

Setting the SEF elements

• Select "SEF" on the "Prot. element" screen to display the "SEF" screen.
/ 7 S E F P r o t .

S E θ _ d e g

> S E θ - 4 5 d e g

S E V 3 . 0 V

S E 1 0 . 3 0 A

T S E 1 1 . 0 0 s This setting is displayed if [MSE1] is 0(=DT)

T S E 1 M 1 . 0 0 0 This setting is displayed if [MSE1] is 1(=IEC) , 2(=IEEE) or 3(=US).
T S E 1 R 0 . 0 s This setting is displayed if [MSE1] is 0(=DT)
T S E 1 R M 1 . 0 0 0 This setting is displayed if [MSE1] is 2(=IEEE) or 3(=US).
T S 1 S 2 1 . 0 0 s

S E 2 0 . 0 1 0 A

T S E 2 1 . 0 0 s This setting is displayed if [MSE2] is 0(=DT)

T S E 2 M 1 . 0 0 0 This setting is displayed if [MSE2] is 1(=IEC) , 2(=IEEE) or 3(=US).
T S E 2 R 0 . 0 s This setting is displayed if [MSE2] is 0(=DT)
T S E 2 R M 1 . 0 0 0 This setting is displayed if [MSE2] is 2(=IEEE) or 3(=US).
S E 3 0 . 0 1 0 A

T S E 3 1 . 0 0 s

S E 4 0 . 0 1 0 A

T S E 4 1 . 0 0 s

R P 0 . 0 0 W

S E 1 - k 0 . 0 0 0 This setting is displayed if [MSE1] is 4(=C)

S E 1 - α 0 . 0 0 ditto
S E 1 - C 0 . 0 0 0 ditto
S E 1 - k r 0 . 0 0 0 ditto
S E 1 - β 0 . 0 0 ditto
S E 2 - k 0 . 0 0 0 This setting is displayed if [MSE2] is 4(=C)
S E 2 - α 0 . 0 0 ditto
S E 2 - C 0 . 0 0 0 ditto
S E 2 - k r 0 . 0 0 0 ditto
S E 2 - β 0 . 0 0 ditto
• Enter the numerical value and press the ENTER key.

• After setting, press the END key to display the following confirmation screen.
C h a n g e s e t t i n g s ?

E N T E R = Y C A N C E L = N

• Press the ENTER (=Y) key to change settings and return to the "Prot. element" screen.

 210 
 6 F 2 T 0 1 7 7

Setting the Motor protection

• Select "Motor prot." to display the "Motor prot." screen. This setting is for GRE140-700 model
series only.

/ 7 M o t o R p r o t .

I M O T _ A

> I M O T 1 . 0 0 A

T E X S T 0 . 0 s

T M T S T 0 . 0 s

S T R T 0 . 0 0 A

T S T R T 0 . 0 0 s

L K R T I S 0 . 0 0 A

T L K R T 0 S

R T T H M 2 0 0 %

L I M N U M 6

Setting the Misc. protection elements

• Select "Misc." on the "Prot. element" screen to display the "Misc." screen.
/ 7 M i s c P r o t .

N C θ _ d e g

> N C θ - 4 5 d e g

N C V 3 . 0 V

N C 1 0 . 4 0 A

T N C 1 1 . 0 0 s This setting is displayed if [MNC1] is 0(=DT)

T N C 1 M 1 . 0 0 0 This setting is displayed if [MNC1] is 1(=IEC) , 2(=IEEE) or 3(=US).
T N C 1 R 0 . 0 s This setting is displayed if [MNC1] is 0(=DT)
T N C 1 R M 1 . 0 0 0 This setting is displayed if [MNC1] is 2(=IEEE) or 3(=US).
N C 2 0 . 2 0 A

T N C 2 1 . 0 0 s This setting is displayed if [MNC2] is 0(=DT)

T N C 2 M 1 . 0 0 0 This setting is displayed if [MNC2] is 1(=IEC) , 2(=IEEE) or 3(=US).
T N C 2 R 0 . 0 s This setting is displayed if [MNC2] is 0(=DT)
T N C 2 R M 1 . 0 0 0 This setting is displayed if [MNC2] is 2(=IEEE) or 3(=US).
N C 1 - k 0 . 0 0 0 This setting is displayed if [MNC1] is 4(=C)
N C 1 - α 0 . 0 0 ditto
N C 1 - C 0 . 0 0 0 ditto
N C 1 - k r 0 . 0 0 0 ditto
N C 1 - β 0 . 0 0 ditto
N C 2 - k 0 . 0 0 0 This setting is displayed if [MNC2] is 4(=C)
N C 2 - α 0 . 0 0 ditto
N C 2 - C 0 . 0 0 0 ditto
N C 2 - k r 0 . 0 0 0 ditto

 211 
 6 F 2 T 0 1 7 7

N C 2 - β 0 . 0 0 ditto
U C 1 0 . 2 0 A

T U C 1 1 . 0 0 s

U C 2 0 . 4 0 A

T U C 2 1 . 0 0 s

T H M 1 . 0 0 A

T H M 1 P 0 . 0 0 A

T T H M 1 0 . 0 m i n

T H M A 8 0 %

B C D 0 . 2 0

T B C D 1 . 0 0 s

C B F 0 . 5 0 A

T B T C 0 . 5 0 s

T R T C 0 . 4 0 s

I C D - 2 F 1 5 %

I C D O C 0 . 1 0 A

O C 1 2 . 0 0 A

O C 2 5 . 0 0 A

O C 3 2 0 . 0 0 A

O C 4 4 0 . 0 0 A

E F 1 2 . 0 0 A

E F 2 5 . 0 0 A

E F 3 2 0 . 0 0 A

E F 4 4 0 . 0 0 A

S E 1 0 . 0 2 0 A

S E 2 0 . 0 2 0 A

S E 3 0 . 0 2 0 A

S E 4 0 . 0 2 0 A

N C 1 0 . 8 0 A

N C 2 0 . 4 0 A

B C D 0 . 4 0

T C L E 1 0 0 s

T C L R 1 0 0 s

I C L D O 0 . 5 0 A

T C L D O 0 . 0 0 s

R P 1 2 0 . 0 W

R P 1 D P R 9 5 %

T R P 1 1 . 0 0 s

T C B R P 1 0 . 0 s

R P 2 2 0 . 0 W

R P 2 D P R 9 5 %

 212 
 6 F 2 T 0 1 7 7

T R P 2 1 . 0 0 s

T C B R P 2 0 . 0 s

R P V B L K 4 0 . 0 V

O C D 0 . 5 0 A

T O C D 1 . 0 0 s

• Enter the numerical value and press the ENTER key.

• After setting, press the END key to display the following confirmation screen.

C h a n g e s e t t i n g s ?

E N T E R = Y C A N C E L = N

• Press the ENTER (=Y) key to change settings and return to the "Prot. element" screen.

Setting the OV elements

• Select "OV" on the "Prot. element" screen to display the "OV" screen.
/ 7 O V P r o t .

O V 1 _ V

> O V 1 1 2 0 . 0 V OV1 Threshold setting.

T O V 1 1 . 0 0 s OV1 Definite time delay.
T O V 1 M 1 . 0 0 OV1 Inverse time multiplier setting.
T O V 1 R 0 . 0 s OV1 Definite time reset delay.
O V 1 D P R 9 5 % OV1 DO/PU ratio
O V 2 1 4 0 . 0 V OV2 Threshold setting.
T O V 2 1 . 0 0 s OV2 Definite time delay.
T O V 2 M 1 . 0 0 OV2 Inverse time multiplier setting.
T O V 2 R 0 . 0 s OV2 Definite time reset delay.
O V 2 D P R 9 5 % OV2 DO/PU ratio
O V 3 1 4 0 . 0 V OV3 Threshold setting.
T O V 3 1 . 0 0 s OV3 Definite time delay.
O V 3 D P R 9 5 % OV3 DO/PU ratio
O V 4 1 4 0 . 0 V OV4 Threshold setting.
T O V 4 1 . 0 0 s OV4 Definite time delay.
O V 4 D P R 9 5 % OV4 DO/PU ratio
O V 1 - k 1 . 0 0 OV1 User configurable IDMT curve setting
O V 1 - α 1 . 0 0 ditto
O V 1 - C 0 . 0 0 0 ditto
O V 2 - k 1 . 0 0 OV2 User configurable IDMT curve setting
O V 2 - α 1 . 0 0 ditto

 213 
 6 F 2 T 0 1 7 7

O V 2 - C 0 . 0 0 0 ditto

• Enter the numerical value and press the ENTER key.

• After setting, press the END key to display the following confirmation screen.

C h a n g e s e t t i n g s ?

E N T E R = Y C A N C E L = N

• Press the ENTER (= Y) key to change settings and return to the "Prot. element" screen.

Setting the UV elements

• Select "UV" on the "Prot. element" screen to display the "UV" screen.
/ 7 U V P r o t .

U V 1 _ V

> U V 1 6 0 . 0 V UV1 Threshold setting.

T U V 1 1 . 0 0 s UV1 Definite time delay.
T U V 1 M 1 . 0 0 UV1 Inverse time multiplier setting.
T U V 1 R 0 . 0 s UV1 Definite time reset delay.
U V 2 4 0 . 0 V UV2 Threshold setting.
T U V 2 1 . 0 0 s UV2 Definite time delay.
T U V 2 M 1 . 0 0 UV2 Inverse time multiplier setting.
T U V 2 R 0 . 0 s UV2 Definite time reset delay.
U V 3 4 0 . 0 V UV3 Threshold setting.
T U V 3 1 . 0 0 s UV3 Definite time delay.
U V 4 4 0 . 0 V UV4 Threshold setting.
T U V 4 1 . 0 0 s UV4 Definite time delay.
V B L K 1 0 . 0 V UV Blocking threshold
U V H S S 8 0 . 0 V Not available for model 400 series

U V H S G 4 6 . 0 V Not available for model 400 series

U V D 7 . 0 % Not available for model 400 series

T U V D 1 . 0 0 s Not available for model 400 series

U V 1 - k 1 . 0 0 UV1 User configurable IDMT curve setting

U V 1 - α 1 . 0 0 ditto
U V 1 - C 0 . 0 0 0 ditto
U V 2 - k 1 . 0 0 UV2 User configurable IDMT curve setting
U V 2 - α 1 . 0 0 ditto
U V 2 - C 0 . 0 0 0 ditto

• Enter the numerical value and press the ENTER key.

• After setting, press the END key to display the following confirmation screen.

 214 
 6 F 2 T 0 1 7 7

C h a n g e s e t t i n g s ?

E N T E R = Y C A N C E L = N

• Press the ENTER (= Y) key to change settings and return to the "Prot. element" screen.

Setting the ZOV elements

• Select "ZOV" on the "Prot. element" screen to display the "ZOV" screen.
/ 7 Z O V P r o t .

Z O V 1 _ V

> Z O V 1 2 0 . 0 V ZOV1 Threshold setting.

T Z O V 1 1 . 0 0 s ZOV1 Definite time setting.
T Z O V 1 M 1 . 0 0 ZOV1 Inverse time multiplier setting.
T Z O V 1 R 0 . 0 s ZOV1 Definite time reset delay.
Z O V 2 4 0 . 0 V ZOV2 Threshold setting.
T Z O V 2 1 . 0 0 s ZOV2 Definite time setting.
T Z O V 2 M 1 . 0 0 ZOV2 Inverse time multiplier setting.
T Z O V 2 R 0 . 0 s ZOV2 Definite time reset delay.
Z O V 1 - k 1 . 0 0 ZOV1 User configurable IDMT curve setting
Z O V 1 - α 1 . 0 0 ditto
Z O V 1 - C 0 . 0 0 0 ditto
Z O V 2 - k 1 . 0 0 ZOV2 User configurable IDMT curve setting
Z O V 2 - α 1 . 0 0 ditto
Z O V 2 - C 0 . 0 0 0 ditto

• Enter the numerical value and press the ENTER key.

• After setting, press the END key to display the following confirmation screen.

C h a n g e s e t t i n g s ?

E N T E R = Y C A N C E L = N

• Press the ENTER (= Y) key to change settings and return to the "Prot. element" screen.

Setting the NOV protection elements

• Select "NOV" on the "Prot. element" screen to display the "NOV" screen.
/ 7 N O V P r o t .

N O V 1 _ V

> N O V 1 2 0 . 0 V NOV1 Threshold setting.

T N O V 1 1 . 0 0 s NOV1 Definite time setting.
T N O V 1 M 1 . 0 0 NOV1 Inverse time multiplier setting.

 215 
 6 F 2 T 0 1 7 7

T N O V 1 R 0 . 0 s NOV1 Definite time reset delay.

N O V 2 4 0 . 0 V NOV2 Threshold setting.
T N O V 2 1 . 0 0 s NOV2 Definite time setting.
T N O V 2 M 1 . 0 0 NOV2 Inverse time multiplier setting.
T N O V 2 R 0 . 0 s NOV2 Definite time reset delay.
N O V 1 - k 1 . 0 0 NOV1 User configurable IDMT curve setting
N O V 1 - α 1 . 0 0 ditto
N O V 1 - C 0 . 0 0 0 ditto
N O V 2 - k 1 . 0 0 NOV2 User configurable IDMT curve setting
N O V 2 - α 1 . 0 0 ditto
N O V 2 - C 0 . 0 0 0 ditto

• Enter the numerical value and press the ENTER key.

• After setting, press the END key to display the following confirmation screen.
C h a n g e s e t t i n g s ?

E N T E R = Y C A N C E L = N

• Press the ENTER (= Y) key to change settings and return to the "Prot. element" screen.

Setting the FRQ elements

• Select "FRQ" on the "Prot. element" screen to display the "FRQ" screen.

/ 7 F R Q P r o t .

F R Q 1 _ H z

> F R Q 1 - 1 . 0 0 H z

T F R Q 1 1 . 0 0 s

F R Q 2 - 1 . 0 0 H z

T F R Q 2 1 . 0 0 s

F R Q 3 - 1 . 0 0 H z

T F R Q 3 1 . 0 0 s

F R Q 4 - 1 . 0 0 H z

T F R Q 4 1 . 0 0 s

F V B L K 4 0 . 0 V UV Blocking threshold
D F R Q 1 0 . 5 H z s

D F R Q 2 0 . 5 H z s

D F R Q 3 0 . 5 H z s

D F R Q 4 0 . 5 H z s

• Enter the numerical value and press the ENTER key.

• After setting, press the END key to display the following confirmation screen.

 216 
 6 F 2 T 0 1 7 7

C h a n g e s e t t i n g s ?

E N T E R = Y C A N C E L = N

• Press the ENTER (= Y) key to change settings and return to the "Prot. element" screen.

Setting the CTF/VTF elements

• Select "CTF/VTF" on the "Prot. element" screen to display the "CTF/VTF" screen.

/ 7 C T F / V T F

E F F _ A

> E F F 0 . 2 0 A

O C D F 0 . 1 0 A

Z O V F 2 0 . 0 V

U V F 5 1 . 0 V

• Enter the numerical value and press the ENTER key.

• After setting, press the END key to display the following confirmation screen.

C h a n g e s e t t i n g s ?

E N T E R = Y C A N C E L = N

• Press the ENTER (=Y) key to change settings and return to the "Prot. element" screen.

Setting the autoreclose function

To set the autoreclose function, do the following.
• Select "ARC" on the "Group ∗" screen to display the "ARC" screen.

/ 5 A R C

> S c h e m e s w

A R C e l e m e n t

Setting the scheme switch

• Select "Scheme sw" on the "ARC" screen to display the "Scheme sw" screen.

/ 6 S c h e m e s w

> G e n e r a l

O C P r o t .

E F P r o t .

S E F P r o t . Not available for EF model series.

 217 
 6 F 2 T 0 1 7 7

M i s c P r o t .

<General>
• Select "General" on the "Scheme sw" screen to set the autoreclose mode.

/ 7 G e n e r a l

A R C E N _

> A R C E N 1

O f f / O n

A R C - N U M 0

S 1 / S 2 / S 3 / S 4 / S 5

V C H K 0

O f f / L D / D L / D D / S

D f E N 0

O f f / O n

V T P H S E L 0

A / B / C

V T - R A T E 0

P H - G / P H - P H

3 P H - V T 0

B u s / L i n e

ARCEN
• Enter 1(=On) or 0(=Off) to enable or to disable the autoreclose.
ARC-NUM
• Enter 0 or 1 or 2 or 3 or 4 to set the number of shot.
Enter 0 (= S1) to perform single-shot autoreclosing.
Enter 1 (= S2) to perform two-shot autoreclosing..
Enter 2 (= S3) to perform three-shot autoreclosing.
Enter 3 (= S4) to perform four-shot autoreclosing.
Enter 4 (= S5) to perform five-shot autoreclosing.
VCHK
• Enter 0 or 1 or 2 or 3 or 4 and press the ENTER key.
Enter 0 (= Off) to perform the reclose without voltage and synchronism check.
Enter 1 (= LD) to perform the reclose under "live bus and dead line" condition or with
synchronism check.
Enter 2 (= DL) to perform the reclose under "dead bus and live line" condition or with
synchronism check.
Enter 3 (= DD) to perform the reclose under "dead bus and dead line" condition.
Enter 4 (= S) to perform the reclose with synchronism check.
DfEN

 218 
 6 F 2 T 0 1 7 7

• Enter 0 or 1 and press the ENTER key.

Enter 0 (= Off) not to use the ∆f checking function.
Enter 1 (= On) to use the ∆f checking function.
VTPHSEL

• Enter 0 or 1 or 2 and press the ENTER key.

Enter 0 (= A) not to use A-phase voltage for voltage and synchronism check.
Enter 1 (= B) to use B-phase voltage.
Enter 2 (= C) to use C-phase voltage.
VT-RATE

• Enter 0 or 1 and press the ENTER key.

Enter 0 (= PH-G) if the VT rating of the selected above is a phase-to-earth voltage.
Enter 1 (= PH-PH) if the VT rating of the selected above is a phase-to-phase voltage.
3PH-VT

• Enter 0 or 1 and press the ENTER key.

Enter 0 (= Bus) if three-phase voltage is applied to the bus side.
Enter 1 (= Line) if three-phase voltage is applied to the line side..

<OC>, <EF>, <SEF>

• Select "OC" on the "Scheme sw" screen to set the autoreclose initiation and trip mode of OC
protection.
/ 7 O C P r o t .

O C 1 - I N I T _

> O C 1 - I N I T 0

N A / O n / B l o c K

O C 1 - T P 1 2

O F F / I n s t / S e t

O C 1 - T P 2 2

O F F / I n s t / S e t

O C 1 - T P 3 2

O F F / I n s t / S e t

O C 1 - T P 4 2

O F F / I n s t / S e t

O C 1 - T P 5 2

O F F / I n s t / S e t

O C 1 - T P 6 2

O F F / I n s t / S e t

O C 2 - I N I T 0

N A / O n / B l o c K

O C 2 - T P 1 2

 219 
 6 F 2 T 0 1 7 7

O F f / I n s t / S e t

O C 2 - T P 2 2

O F f / I n s t / S e t

O C 2 - T P 3 2

O F f / I n s t / S e t

O C 2 - T P 4 2

O F F / I n s t / S e t

O C 2 - T P 5 2

O F F / I n s t / S e t

O C 2 - T P 6 2

O F F / I n s t / S e t

O C 3 - I N I T 0

N A / O n / B l o c K

O C 3 - T P 1 2

O F F / I n s t / S e t

O C 3 - T P 2 2

O F F / I n s t / S e t

O C 3 - T P 3 2

O F F / I n s t / S e t

O C 3 - T P 4 2

O F F / I n s t / S e t

O C 3 - T P 5 2

O F F / I n s t / S e t

O C 3 - T P 6 2

O F F / I n s t / S e t

O C 4 - I N I T 0

N A / O n / B l o c K

O C 4 - T P 1 2

O F F / I n s t / S e t

O C 4 - T P 2 2

O F F / I n s t / S e t

O C 4 - T P 3 2

O F F / I n s t / S e t

O C 4 - T P 4 2

O F F / I n s t / S e t

O C 4 - T P 5 2

O F F / I n s t / S e t

O C 4 - T P 6 2

O F F / I n s t / S e t

C O O R D - O C 0

O f f / O n

 220 
 6 F 2 T 0 1 7 7

• Enter 1(=INIT) or 2(=Block) to initiate or to block the autoreclose by the OC1 trip in
"OC1-INIT". To neither initiate nor block it, enter 0(=NA).
• Enter 1(=Inst) or 2(=Set) to set the OC1 first trip to “Instantaneous trip” or “Set time delay trip”
in the "OC1-TP1". To not use the OC1 trip, enter 0(=Off).
Note: OC1-TP2 to OC1-TP6 show the OC1 second trip to OC1 sixth trip.
For OC2 to OC4, the settings are same as OC1.
• Enter 1(=On) or 0(=Off) to enable or to disable the co-ordination for "COOD-OC" and press
the ENTER key.

After changing settings, press the ENTER key.

The setting method for EF and SEF(SE) is same as that of OC above.

<Misc>
• Select "Misc" on the "Scheme sw" screen to set the external initiation of the autoreclose.

/ 7 M i s c P r o t .

E X T - I N I T _

> E X T - I N I T 0

N A / O n / B l o c k

• Enter 1(=On: INIT) or 2(=Block) to initiate or to block the autoreclose by the external trip. To
neither initiate nor block it, enter 0(=NA).

Setting ARC element

• Select "ARC element" on the "Group ∗" screen to set timer setting and the threshold setting of
OC, EF and SEF for co-ordination.
/ 6 A R C e l e m e n t

T R D Y _ s

> T R D Y 6 0 . 0 s

T D 1 1 0 . 0 0 s

T R 1 3 1 0 . 0 0 s

T D 2 1 0 . 0 0 s

T R 2 3 1 0 . 0 0 s

T D 3 1 0 . 0 0 s

T R 3 3 1 0 . 0 0 s

T D 4 1 0 . 0 0 s

T R 4 3 1 0 . 0 0 s

T D 5 1 0 . 0 0 s

T R 5 3 1 0 . 0 0 s

T W 2 . 0 0 s

T S U C 3 . 0 s

T R C O V 1 0 . 0 s

T A R C P 1 0 . 0 s

 221 
 6 F 2 T 0 1 7 7

T R S E T 3 . 0 0 s

O V B 5 1 V

U V B 1 3 V

O V L 5 1 V

U V L 1 3 V

S Y N U V 8 3 V

S Y N O V 5 1 V

S Y N D V 1 5 0 V

S Y N θ 3 0 d e g

S Y N D f 1 . 0 0 H z

T S Y N 1 . 0 0 s

T L B D L 0 . 0 5 s

T D B L L 0 . 0 5 s

T D B D L 0 . 0 5 s

O C - C O 1 . 0 0 A

E F - C O 0 . 3 0 A

S E - C O 0 . 0 1 0 A

• Enter the numerical value and press the ENTER key.

• After setting, press the END key to display the following confirmation screen.

C h a n g e s e t t i n g s ?

E N T E R = Y C A N C E L = N

• Press the ENTER (=Y) key to change settings and return to the "ARC" screen.

Setting group copy

To copy the settings of one group and overwrite them to another group, do the following:
• Select "Copy gp." on the "Protection" screen to display the "Copy A to B" screen.

/ 3 C ｏ ｐ ｙ A t o B

> A _

B _

• Enter the group number to be copied in line A and press the ENTER key.
• Enter the group number to be overwritten by the copy in line B and press the ENTER key.

4.2.6.8 Binary Input

The logic level of binary input signals can be inverted by setting before entering the scheme logic.
Inversion is used when the input contact cannot meet the requirements described in Table 3.2.2.
• Select "Binary I/P" on the "Set. (change)" sub-menu to display the "Binary I/P" screen.

 222 
 6 F 2 T 0 1 7 7

/ 2 B i n a r y I / P

> B I S t a t u s

B I 1

B I 2

B I 3

B I 4

B I 5

B I 6

B I 7 Not available for model 4x0 model

B I 8 Not available for model 4x0 model

B I 9 Not available for model 4x0 model

B I 1 0 Not available for model 4x0 model

B I 1 1 Not available for model 4x0 model

B I 1 2 Not available for model 4x0 model

B I 1 3 Not available for model 4x0 and 4x1 model

B I 1 4 Not available for model 4x0 and 4x1 model

B I 1 5 Not available for model 4x0 and 4x1 model

B I 1 6 Not available for model 4x0 and 4x1 model

B I 1 7 Not available for model 4x0 and 4x1 model

B I 1 8 Not available for model 4x0 and 4x1 model

Setting Binary Input Status

GRE140 can selected the binary input detection threshold voltage. The threshold voltage supports
control voltages of 24V, 48V, 110V and 220V.
BI1 and BI2 can be changed between three threshold voltages - 48 / 110 / 220V ( or 12 / 24 / 48V)
BI3 to BI6, BI12 or BI18 can be changed between two threshold voltages – 110 / 220V (or 24 /
48V)
Note: The threshold voltage of 48V (or 12V) of BI1 and BI2 is used for Trip Circuit Surpervision
using 2 Binary inputs. See section 3.3.3.
The threshold voltage of 48-220V and 12-48V correspond to individual relay models,
respectively.
To set the binary inputs threshold voltage, do the following:
• Select "BI Status" on the "Binary I/P" screen to display the "BI Status" screen.

/ 3 B I S t a t u s

B I T H R 1 _

> B I T H R 1 0

4 8 / 1 1 0 / 2 2 0

B I T H R 2 0

1 1 0 / 2 2 0

 223 
 6 F 2 T 0 1 7 7

<BITHR1>

To set the Binary Input 1 and 2 threshold voltage, do the following.

• Enter 0(=48V) or 1(=110V) or 2(=220V) and press the ENTER key.

<BITHR2>

To set the Binary Input 3 to 6, 12 or 18 threshold voltage, do the following.

• Enter 0(=110V) or 1(=220V) and press the ENTER key.

Selection of Binary Input

• Select the input number (BI number) on the "Binary I/P" screen.
After setting, press the ENTER key to display the "BI∗" screen.

/ 3 B I ＊

> T i m e r s

F u n c t i o n s

Setting timers
• Select "Timers" on the "BI" screen to display the "Timers" screen.

/ 4 T i m e r s

B I ＊ P U D _ s

> B I ＊ P U D 0 . 0 0 s Pick-up delay setting

B I ＊ D O D 0 . 0 0 s Drop-off delay setting

• Enter the numerical value and press the ENTER key.

• After setting, press the END key to return to the "BI∗" screen.

Setting Functions
• Select "Functions" on the "BI" screen to display the "Functions" screen.

/ 4 F u n c t i o n s

B I ＊ S N S _

> B I ＊ S N S 0

N o r m / I n v

• To set the Binary Input Sense, enter 0(=Normal) or 1(=Inverted) and press the ENTER key.

• After setting, press the END key to return to the "BI∗" screen.

 224 
 6 F 2 T 0 1 7 7

4.2.6.9 Binary Output

All the binary outputs of the GRE140 except the relay failure signal are user-configurable. It is
possible to assign one signal or up to four ANDing or ORing signals to one output relay. Available
signals are listed in Appendix C.
It is also possible to attach Instantaneous or delayed or latched reset timing to these signals.
Appendix H shows the factory default settings.

CAUTION
When having changed the binary output settings, release the latch state on a digest screen by
pressing the RESET key for longer than 3 seconds.
To configure the binary output signals, do the following:

Selection of output relay

• Select "Binary O/P" on the "Set. (change)" screen to display the "Binary O/P" screen.
For Models 400 and 420:

/ 2 B i n a r y O / P

> B O 1

B O 2

B O 3

B O 4

For Models 401 and 421:

/ 2 B i n a r y O / P

> B O 1

B O 2

B O 3

B O 4

B O 5

B O 6

B O 7

B O 8

B O 9

B O 1 0

For Models 402 and 422:

/ 2 B i n a r y O / P

> B O 1

B O 2

B O 3

B O 4

B O 5

 225 
 6 F 2 T 0 1 7 7

B O 6

B O 7

B O 8

B O 9

B O 1 0

B O 1 1

B O 1 2

B O 1 3

B O 1 4

B O 1 5

B O 1 6

Note: The setting is required for all of the binary outputs. If any of the binary outputs are not used,
enter 0 to logic gates #1 to #6 in assigning signals.

• Select the output relay number (BO number) and press the ENTER key to display the "BO∗"
screen.

/ 3 B O *

> L o g i c / R e s e t

F u n c t i o n s

Setting the logic gate type and timer

• Select "Logic/Reset" to display the "Logic/Reset" screen.

/ 4 L o g i c / R e s e t

L o g i c _

> L o g i c 0

O R / A N D

R e s e t 0

I n s / D l / D w / L a t

• Enter 0(=OR) or 1(=AND) to use an OR gate or AND gate and press the ENTER key.

• Enter 0(=Instantaneous) or 1(=Delayed) or 2(=Dwell) or 3(=Latched) to select the reset timing

and press the ENTER key.

• Press the END key to return to the "BO∗" screen.

Note: To release the latch state, push the [RESET] key for longer than 3 seconds.

Assigning signals
• Select "Functions" on the "BO∗" screen to display the "Functions" screen.

/ 4 F u n c t i o n s

 226 
 6 F 2 T 0 1 7 7

I n ♯ 1 _

> I n ♯ 1

I n ♯ 2

I n ♯ 3

I n ♯ 4

I n ♯ 5

I n ♯ 6

T B O 0 . 2 0 s

• Assign signals to gates (In #1 to #6) by entering the number corresponding to each signal
referring to Appendix C. Do not assign the signal numbers 471 to 477 and 487 to 490 (signal
names: "BO1 OP" to "BO16 OP"). And set the delay time of timer TBO.
Note: If signals are not assigned to all the gates #1 to #6, enter 0 for the unassigned gate(s).
Repeat this process for the outputs to be configured.
4.2.6.10 LEDs

Six LEDs of the GRE140 are user-configurable. A configurable LED can be programmed to
indicate the OR combination of a maximum of 4 elements, the individual status of which can be
viewed on the LED screen as “Virtual LEDs.” The signals listed in Appendix C can be assigned to
each LED as follows.

CAUTION
When having changed the LED settings, it is necessary to release the latch state on a digest
screen by pressing the RESET key for longer than 3 seconds.

Selection of LEDs
• Select "LED" on the "Set. (change)" screen to display the "LED" screen.

/ 2 L E D

> L E D

V i r t u a l L E D

Selection of real LEDs

• Select "LED" on the "/2 LED" screen to display the "/3 LED" screen.

/ 3 L E D

> L E D 1

L E D 2

L E D 3

L E D 4

L E D 5

L E D 6 Not available on 700 model series and [MOTEN]=”1”

C B C L O S E D

 227 
 6 F 2 T 0 1 7 7

• Select the LED number and press the ENTER key to display the "LED∗" screen.

/ 4 L E D ＊

> L o g i c / R e s e t

F u n c t I o n s

L E D C o l o r

Setting the logic gate type and reset type

• Select "Logic/Reset" to display the "Logic/Reset" screen.

/ 5 L o g i c / R e s e t

L o g i c _

> L o g i c 0

O R / A N D

R e s e t 0

I n s t / L a t c h

• Enter 0(=OR) or 1(=AND) to use an OR gate or AND gate and press the ENTER key.

• Enter 0(=Instantaneous) or 1(=Latched) to select the reset timing and press the ENTER key.

• Press the END key to return to the "LED∗" screen.

Note: To release the latch state, refer to Section 4.2.1.

Assigning signals
• Select "Functions" on the "LED∗" screen to display the "Functions" screen.

/ 5 F u n c t i o n s

I n ♯ 1 _

> I n ♯ 1

I n ♯ 2

I n ♯ 3

I n ♯ 4

• Assign signals to gates (In #1 to #4) by entering the number corresponding to each signal
referring to Appendix C.
Note: If signals are not assigned to all the gates #1 to #4, enter 0 for the unassigned gate(s).

• Press the END key to return to the "LED∗" screen.

Repeat this process for the outputs to be configured.

Setting the LEDs color

• Select "LED color" on the "LED∗ " screen or on the "CB CLOSED" screen to display the
"LED color" screen.

 228 
 6 F 2 T 0 1 7 7

/ 5 L E D C o l o r

C o l o r _

> C o l o r 0

R / G / Y

• Select the LED colors of red , green or yellow.

• Press the END key to return to the "LED∗" screen.
Repeat this process for the LED colors to be configured.

Selection of virtual LEDs

• Select "Virtual LED" on the "/2 LED" screen to display the "Virtual LED" screen.

/ 3 V i r t u a l L E D

> I N D 1

I N D 2

• Select the IND number and press the ENTER key to display the "IND∗" screen.
/ 4 I N D ＊

> R e s e t

F u n c t i o n s

Setting the reset timing

• Select "Reset" to display the "Reset" screen.
/ 5 R e s e t

R e s e t _

> R e s e t 0

I n s t / L a t c h

• Enter 0(=Instantaneous) or 1(=Latched) to select the reset timing and press the ENTER key.

• Press the END key to return to the "IND∗" screen.

Note: To release the latch state, push the [RESET] key for longer than 3 seconds.

Assigning signals
• Select "Functions" on the "IND∗" screen to display the "Functions" screen.

/ 5 F u n c t i o n s

B I T 1 _

> B I T 1

B I T 2

 229 
 6 F 2 T 0 1 7 7

B I T 3

B I T 4

B I T 5

B I T 6

B I T 7

B I T 8

• Assign signals to bits (1 to 8) by entering the number corresponding to each signal referring to
Appendix C.
Note: If signals are not assigned to all the bits 1 to 8, enter 0 for the unassigned bit(s).

• Press the END key to return to the "IND∗" screen.

Repeat this process for the outputs to be configured.

4.2.6.11 Control
The GRE140 can enable the control of Circuit Breaker(CB) open / close using the front panel
keys.
The interlock function can block the Circuit Breaker(CB) close command by an interlock signal
from a binary input signal or a communication command.
To set the control function and interlock function, do the following:
• Select "Control" on the "Set. (change)" screen to display the "Control" screen.

/ 2 C o n t r o l

C o n t r o l _

> C o n t r o l 0

D i s a b l e / E n a b l e

I n t e r l o c k 0

D i s a b l e / E n a b l e

• Enter 0(=Disable) or 1(=Enable) to select whether or not the control function is to be used and
press the ENTER key.

• Enter 0(=Disable) or 1(=Enable) to select whether of not the interlock function is to be used
and press the ENTER key.
Note: When the Control function is disabled, both the "Local" LED and the "Remote" LED are not
lit, and the sub-menu "Control" on the LCD is not displayed.

4.2.6.12 Frequency

The GRE140 is provided with a setting to select the system frequency i.e. 50Hz or 60Hz.
• Select "Frequency" on the "Set. (change)" screen to display the "Frequency" screen.

/ 2 F r e q u e n c y

F r e q u e n c y _

 230 
 6 F 2 T 0 1 7 7

> F r e q u e n c y 0

5 0 H z / 6 0 H z

• Enter 0(=50Hz) or 1(=60Hz) to select the system frequency setting 50Hz or 60Hz and press the
ENTER key.

CAUTION
When having changed the system frequency settings, the GRE140 must reboot to enable the
setting change.

4.2.7 Control
The sub-menu "Control" enables the CB control function using the front panel keys - ○ , ｜ and
L/R .

Note: When the Control function is disabled, both the "Local" LED and the "Remote" LED are not
lit, and the sub-menu "Control" on the LCD is not displayed.

4.2.7.1 Local / Remote Control

The "Local/Remote" function provides change of CB control hierarchy.

• Select "Control" on the "MAIN MENU" screen to display the "Control" screen.

/ 1 C o n t r o l

> P a s s w o r d ( C t r l )

L o c a l / R e m o t e

C B c l o s e / o p e n

• Move the cursor to "Local/Remote" on LCD.

/ 1 C o n t r o l

P a s s w o r d ( C t r l )

> L o c a l / R e m o t e

C B c l o s e / o p e n

• The L/R key is enabled to change the CB control hierarchy.

4.2.7.2 CB close / open Control

The "CB close/open" function provides CB control.

• Move the cursor to "CB close/open" on the LCD.

 231 
 6 F 2 T 0 1 7 7

/ 1 C o n t r o l

P a s s w o r d ( C t r l )

L o c a l / R e m o t e

> C B c l o s e / o p e n

• The ｜ and ○ keys are enabled to control CB – close / open.

4.2.7.3 Password

For the sake of security of control password protection can be set as follows:
• Select "Control" on the "MAIN MENU" screen to display the "Control" screen.
• Select "Password" to display the "Password" screen.
• Enter a 4-digit number within the grid square after "Input" and press the ENTER key.

C o n t r o l

I n p u t [ _ ]

1 2 3 4 5 6 7 8 9 0 ＜

• For confirmation, enter the same 4-digit number in the grid square after "Retype".

C o n t r o l

R e t y p e [ _ ]

1 2 3 4 5 6 7 8 9 0 ＜

• Press the END key to display the confirmation screen. If the retyped number is different from
that first entered, the following message is displayed on the bottom of the "Password" screen
before returning to the upper screen.
"Unmatch passwd!"
Re-entry is then requested.

Password trap

After the password has been set, the password must be entered in order to enter the setting change
screens.
If "Set. (change)" is entered on the "MAIN MENU" screen, the password trap screen "Password"
is displayed. If the password is not entered correctly, it is not possible to move to the "Setting
(change)" sub-menu screens.

C o n t r o l

P a s s w o r d [ _ ]

 232 
 6 F 2 T 0 1 7 7

1 2 3 4 5 6 7 8 9 0 ＜

Canceling or changing the password

To cancel the password protection, enter "0000" in the two grid square on the "Password" screen.
The "Test" screen is then displayed without having to enter a password.
The password can be changed by entering a new 4-digit number on the "Password" screen in the
same way as the first password setting.

If you forget the password

Press the CANCEL and RESET keys together for one second on the "MAIN MENU" screen.
The password protection of the GRE140 is canceled. Set the password again.

4.2.8 Testing

The sub-menu "Test" provides such functions as disabling the automatic monitoring functions and
enables the forced operation of binary outputs. The password, if set, must be entered in order to
enter the test screens because the "Test" menu has password security protection. (See the section
4.2.6.2.) If the password trap is set, enter the password in the following screen.

T e s t

I n p u t [ _ ]

1 2 3 4 5 6 7 8 9 0 ＜

Note: When operating the "Test" menu, the "IN SERVICE" LED is flickering. But if an alarm occurs
during the test, the flickering stops. The "IN SERVICE" LED flickers only in a testing state.

4.2.8.1 Scheme Switch

The automatic monitor function (A.M.F.) can be disabled by setting the switch [A.M.F] to "OFF".
Disabling the A.M.F. inhibits trip blocking even in the event of a failure in the items being
monitored by this function. It also prevents failures from being displayed on the "ALARM" LED
and LCD described in Section 4.2.1. No events related to A.M.F. are recorded, either.
Disabling A.M.F. is useful for blocking the output of unnecessary alarms during testing.
• Select "Test" on the top "MENU" screen to display the "Test" screen.

/ 1 T e s t

> S w i t h

B i n a r y O / P

L o g i c c i r c u i t

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 6 F 2 T 0 1 7 7

• Select "Switch" to display the "Switch" screen.

/ 2 S w i t h

A . M . F _

> A . M . F 1

O f f / O n

U V T D T 0

O f f / O n

C L P T S T 0

O f f / S 0 / S 3

T H M R S T 0

O f f / O n

S H O T N U M 0

O f f / S 1 - S 6

I E C T S T 0

O f f / O n

• Enter 0(=Off) to disable the A.M.F. and press the ENTER key.

• Enter 1(=On) for UVTDT to disable the UV block when testing UV elements and press the
ENTER key.

• Enter 0(=Off) or 1(=State0) or 2(=State3) to set forcibly the test condition of the Cold Load
Protection (CLPTST) and press the ENTER key.

• Enter 1(=On) to set the reset delay time of the thermal overload element to instantaneous reset
for testing (THMRST) and press the ENTER key.

• Enter 0(=Off) or 1(=S1) or 2(=S2) or 3(=S3) or 4(=S4) or 5(=S5) to set shot number
(SHOTNUM) for autoreclose test and press the ENTER key.

• Enter 1(=On) for IECTST to transmit ‘test mode’ to the control system by IEC60870-5-103
communication when testing the local relay, and press the ENTER key.

• Press the END key to return to the "Test" screen.

4.2.8.2 Binary Output Relay

It is possible to forcibly operate all binary output relays for checking connections with external
devices. Forced operation can be performed on one or more binary outputs at a time.
• Select "Binary O/P" on the "Test" screen to display the "Binary O/P" screen. Then the LCD
displays the name of the output relay.
/ 2 B i n a r y O / P

B O 1 _

> B O 1 0

D i s a b l e / E n a b l e

B O 2 0

D i s a b l e / E n a b l e

 234 
 6 F 2 T 0 1 7 7

B O 3 0

D i s a b l e / E n a b l e

B O 4 0

D i S a b l e / E n a b l e

B O 5 0

D i S a b l e / E n a b l e

B O 6 0

D i S a b l e / E n a b l e

B O 1 6 0

D i s a b l e / E n a b l e

F A I L 0

D i s a b l e / E n a b l e

• Enter 1(=Enable) and press the ENTER key to operate the output relays forcibly.

• After completing the entries, press the END key. Then the LCD displays the screen shown
below.
O p e r a t e ?

E N T R Y = Y C A N C E L = N

• Press the ENTER key continuously to operate the assigned output relays.

• Release the ENTER key to reset the operation.

• Press the CANCEL key to return to the upper "Binary O/P" screen.

4.2.8.3 Logic Circuit

It is possible to observe the binary signal level on the signals listed in Appendix C with monitoring
jacks A and B.
• Select "Logic circuit" on the "Test" screen to display the "Logic circuit" screen.

/ 2 L o g i c

c i r c u i t

T e r m A _

> T e r m A 1

T e r m B 1 0 0 1

• Enter a signal number to be observed at monitoring jack A and press the ENTER key.

• Enter the other signal number to be observed at monitoring jack B and press the ENTER key.
After completing the setting, the signals can be observed by the binary logic level at monitoring

 235 
 6 F 2 T 0 1 7 7

jacks A and B or by the LEDs above the jacks.

On screens other than the above screen, observation with the monitoring jacks is disabled.

4.2.8.4 Password

For the sake of security of testing password protection can be set as follows:
• Select "Test" on the "MAIN MENU" screen to display the "Test" screen.
• Select "Password" to display the "Password" screen.
• Enter a 4-digit number within the grid square after "Input" and press the ENTER key.

T e s t

I n p u t [ _ ]

1 2 3 4 5 6 7 8 9 0 ＜

• For confirmation, enter the same 4-digit number in the grid square after "Retype".

T e s t

R e t y p e [ _ ]

1 2 3 4 5 6 7 8 9 0 ＜

• Press the END key to display the confirmation screen. If the retyped number is different from
that first entered, the following message is displayed on the bottom of the "Password" screen
before returning to the upper screen.
"Unmatch passwd!"
Re-entry is then requested.

Password trap

After the password has been set, the password must be entered in order to enter the setting change
screens.
If "TEST" is entered on the "MAIN MENU" screen, the password trap screen "Password" is
displayed. If the password is not entered correctly, it is not possible to move to the "TEST"
sub-menu screens.

T e s t

P a s s w o r d [ _ ]

1 2 3 4 5 6 7 8 9 0 ＜

 236 
 6 F 2 T 0 1 7 7

Canceling or changing the password

To cancel the password protection, enter "0000" in the two grid square on the "Password" screen.
The "Test" screen is then displayed without having to enter a password.
The password can be changed by entering a new 4-digit number on the "Password" screen in the
same way as the first password setting.
If you forget the password

Press the CANCEL and RESET keys together for one second on the "MAIN MENU" screen.
The screen goes off, and the password protection of the GRE140 is canceled. Set the password
again.
4.3 Personal Computer Interface
The relay can be operated from a personal computer using a USB port on the front panel.
On the personal computer, the following analysis and display of the fault currents are available in
addition to the items available on the LCD screen using the PC interface software RSM100.
• Display of current and voltage waveforms: Oscillograph display
• Symmetrical component analysis: On arbitrary time span
• Harmonic analysis: On arbitrary time span
• Frequency analysis: On arbitrary time span
At the optional communication model, RSM100 can use via Ethernet LAN.
For details, see separate instruction manual "PC INTERFACE RSM100".

4.4 MODBUS Interface

The GRE140 supports the MODBUS communication protocol. This protocol is mainly used when
the relay communicates with a control system and is used to transfer the following measurement
and status data from the relay to the control system. (For details, see Appendix N.)
• Measurement data: current
• Status data: events, fault indications, counters, etc.
• Setting data
• Remote CB operation － Open / Close
• Time setting / synchronization
The protocol can be used through the RS485 port on the relay rear panel.
The relay supports two baud-rates 9.6kbps and 19.2kbps. These are selected by setting. See
Section 4.2.6.4.
4.5 IEC 60870-5-103 Interface
The GRE140 supports the IEC60870-5-103 communication protocol. This protocol is mainly used
for relay communication when the relay communicates with a control system and is used to
transfer the following measurand and status data from the relay to the control system. (For details,
see Appendix M.)
• Measurand data: current, voltage, active power, reactive power, frequency
• Status data: events, fault indications, etc.

 237 
 6 F 2 T 0 1 7 7

The protocol can be used through the RS485 port or the Fibre optic port on the relay rear panel.
The relay supports two baud-rates 9.6kbps and 19.2kbps. These are selected by setting. See
Section 4.2.6.4.
The data transfer from the relay can be blocked by setting.
For the settings, see the Section 4.2.6.

4.6 IEC 61850 Communication _ Option

GRE140 can also support data communication according to the IEC 61850 standard with the
provision of an optional communication board. Station bus communication as specified in IEC
61850-8-1 facilitates integration of the relays within substation control and automation systems
via Ethernet LAN.
Figure 4.6.1 shows an example of a substation automation system using Ethernet-based IEC
61850 communication.

Figure 4.6.1 IEC 61850 Communication Network

4.7 Clock Function

The clock function (Calendar clock) is used for time-tagging for the following purposes:
• Event records
• Disturbance records
• Fault records
TX
The calendar clock can run locally or be synchronised with an external clock such as the binary
time standard input signal, RSM clock, Modbus or SNTP for IEC61850 etc. This can be selected
by setting (see 4.2.6.6.).
4.7.1 Binary input , Modbus communication
The “clock synchronise” function synchronises the relay internal clock to the BI (connected to
PLC input No.2576 SYNC_CLOCK) or Modbus by the following method. Since the BI or
Modbus signal is an “ON” or “OFF” signal which cannot express year-month-day and
hour-minute-second etc, synchronising is achieved by setting the number of milliseconds to zero.
This method will give accurate timing if the synchronising BI or Modbus signal is input every

 238 
 6 F 2 T 0 1 7 7

second.
Synchronisation is triggered by an “OFF” to “ON” (rising edge) transition of the BI or Modbus
signal. When the trigger is detected, the millisecond value of the internal clock is checked, and if
the value is between 0~499ms then it is rounded down. If it is between 500~999ms then it is
rounded up (ie the number of seconds is incremented).

n sec (n+1) sec

500ms
corrected to (n+1) sec
corrected to n sec
t

Figure 4.7.1 Clock synchronise by input signal

4.7.2 RSM signalWhen the relays are connected with the RSM system as shown in Figure 4.4.1
and "RSM" is selected in the time synchronisation setting, the calendar clock of each relay is
synchronised with the RSM clock. If the RSM clock is synchronised with the external time
standard, then all of the relay clocks are synchronised with the external time standard.

4.7.3 SNTP
At the optional communication model, The “clock synchronise” function by SNTP can be used.
The SNTP method is possible when relay connect with time-servers. Figure 4.7.2
exemplifies server is connected with the relayss using the LAN.
Time server Server

LAN

Ry_1 Ry_2 …………. Ry_n

Figure 4.7.2 Time server connected on the LAN

4.8 Special Mode

The GRE140 shifts to the following special mode by using a specific key operation.
• LCD contrast adjustment mode
• Light check mode

LCD contrast adjustment mode

When the LCD is not displayed or not displayed clearly, the contrast adjustment of LCD might not
be appropriate. To adjust the contrast of the LCD screen on any screen, do the following:
• Press ▼ and ▲ ,at same time for 3 seconds or more to shift to LCD contrast adjustment mode.

L C D C o n t r a s t

■ ■ ■ ■

 239 
 6 F 2 T 0 1 7 7

• Press the

▼
or key to adjust the contrast.

LCD and LED check mode

To perform a LCD and LED check , do the following.

• Press the
▲
key for 3 seconds or more when the LCD is off.
• While pressing the

▲
key all LEDs are lit and white dots appear on the whole LCD screen.
The colors of configurable LEDs displayed (LED1-6) are the user setting color.

• Release the
▲

key , to finish the LCD and LED check mode.

 240 
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5. Installation
5.1 Receipt of Relays
When relays are received, carry out the acceptance inspection immediately. In particular, check
for damage during transportation, and if any is found, contact the vendor.
Always store the relays in a clean, dry environment.

5.2 Relay Mounting

The relay case is designed for flush mounting using two mounting attachment kits.
Appendix F shows the case outlines.

127

5
14
117 13 5

Fig. 5.2.1 Outline of attachment kit

This attachment kits can be mounted on a panel of thickness 1 – 2.5mm when the M4x8 screws
that are included with the realy are used. When mounted on a panel of thickness 2.5-4.5mm,
M4x10 screws and washers should be used.

5.2.1 Flush Mounting

For flush mounting the panel cut-out;

・Mount the case in the panel cut-out from the front of panel. ; See Fig.5.2.2.
・Use the mounting attachment kits set ; See Fig.5.2.3.
・Tighten the M4 screw of the attachment kits ; see Fig.5.2.3.
The allowed range for the fixing screws’ tightening torque is 1.0…1.4Nm.
Do not tighten the screws too tightly.

 241 
 6 F 2 T 0 1 7 7

Fig. 5.2.2 Flush mounting the case into a panel cut-out

Fig. 5.2.3 Side view of GRE140 with the mounting attachment kit positions

 242 
 6 F 2 T 0 1 7 7

5.2.2 Dimensions

5.2.2.1 Power Supply

The power supply for the relay can be either DC (range 24-48Vdc, 48-110Vdc, 110-250Vdc) or
AC (110-220Vac-50/60Hz). The voltage range is specified on the relay indicator plate on front
face. The power supply should be connected to terminals 13 and 14 of TB2 and the earthing
should be connected to terminal 12 of TB2.
A minimum 1.25mm2 wire size recommended.

5.2.2.2 Current inputs

GRE140 has 4 analogue inputs for phase and earth current. These measuring inputs cover both 1
A and 5 A nominal values. The current inputs should be connected to terminals 1 to 8 of TB4. A
minimum 2 mm2 wire size recommended.

5.2.2.3 Voltage inputs

GRE140 has 5 analogue inputs for 3 phase voltage, zero phase sequence voltage and 1 phase
voltage for synchronize function related to [APPL] setting. The voltage inputs should be
connected to terminals 1 to 8 of TB2 and terminal 9 to 10 of TB4. A minimum 1.25 mm2 wire size
recommended.

5.2.2.4 Binary inputs

The relay has 6 / 12 / 18 opto-insulated logic inputs. Each input has is separately powered with a
dc voltage. The binary inputs should be connected to terminals 13 to 22 of TB5 and terminals 15
to 24 of TB1 and TB3.
A minimum 1.25 mm2 wire size is recommended.

5.2.2.5 Binary outputs (Output relays)

The relay has 4 / 10 / 16 programmable output relay. BO1 and BO2 are applicable for direct CB
coil connection. The binary outputs should be connected to terminal 1 to 10 of TB5 and terminal 1
to 12 of TB1 and TB3. The terminal 11 - 12 of TB5 is assigned to the signaling of a relay fault.
A minimum 1.25 mm2 wire size is recommended.

5.2.2.6 RS485 port

The communication connection (RS485 port) is assigned to terminals 21, 23 and 24 of TB5. The
total length of twisted pair wires should not exceed 1200 m.
The transmission wires should be terminated using a 120Ω resistor at both extreme ends of the
cable.

The relay terminal block size and the clearance between the terminals are shown at Fig 5.2.4.

 243 
 6 F 2 T 0 1 7 7

TB5 TB4 TB3 TB2 TB1

6.35

6.35
8.7
8.7
10.0
7.62

10.0

7.62
8.83
6.35

Rear View
17 55
7
18.5
36
24

Top View

Fig. 5.2.4 Rear and Top view of the relay

5.3 Electrostatic Discharge

CAUTION
Do not remove the relay PCB from the relay case since electronic components on the modules are
very sensitive to electrostatic discharge.

5.4 Handling Precautions

A person's normal movements can easily generate electrostatic potentials of several thousand
volts. Discharge of these voltages into semiconductor devices when handling electronic circuits
can cause serious damage. This damage often may not be immediately apparent, but the reliability
of the circuit will have been reduced.
The electronic circuits are completely safe from electrostatic discharge when housed in the case.
Do not expose them to risk of damage.

5.5 External Connections

External connections for each relay model are shown in Appendix G.

 244 
 6 F 2 T 0 1 7 7

6. Commissioning and Maintenance

6.1 Outline of Commissioning Tests
The GRE140 is fully numerical and the hardware is continuously monitored.
Commissioning tests can be kept to a minimum and need only include hardware tests and
conjunctive tests. Functional tests are at the user’s discretion.
In these tests, the user interfaces on the front panel of the relay or local PC can be fully utilized.
Test personnel must be familiar with general relay testing practices and safety precautions to avoid
personal injuries or equipment damage.

Hardware tests

These tests are performed for the following hardware to ensure that there is no hardware defect.
Defects in hardware circuits other than the following can be detected by monitoring which circuits
function when the DC power is supplied.
User interfaces
Binary input circuits and output circuits
AC input circuits

Function tests

These tests are performed for the following functions that are fully software-based.
Measuring elements
Metering and recording

Conjunctive tests

The tests are performed after the relay is connected with the primary equipment and other external
equipment.

The following tests are included:

On load test: phase sequence check and polarity check
Tripping circuit test
Reclosing circuit test

6.2 Cautions
6.2.1 Safety Precautions

CAUTION
• When connecting the cable to the back of the relay, firmly fix it to the terminal block and attach
the cover provided on top of it.
• Before checking the interior of the relay, be sure to turn off the power.

Failure to observe any of the precautions above may cause electric shock or malfunction.

 245 
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6.2.2 Precautions for Testing

CAUTION
• While the power is on, do not draw out/insert the relay unit.
• Before turning on the power, check the following:
- Make sure the polarity and voltage of the power supply are correct.
- Make sure the CT circuit is not open.
- Make sure the VT circuit is not short-circuited.
• Be careful that the relay is not damaged due to an overcurrent or overvoltage.
• If settings are changed for testing, remember to reset them to the original settings.

Failure to observe any of the precautions above may cause damage or malfunction of the relay.

6.3 Preparations
Test equipment

The following test equipment is required for the commissioning tests.

1 Single-phase current source
1 Three-phase current source
1 Single-phase voltage source
1 Three-phase voltage source
1 power supply
3 Phase angle meter
3 AC ammeter
3 AC voltmeter
1 Time counter, precision timer
1 PC (not essential)
Relay settings

Before starting the tests, it must be specified whether the tests will use the user’s settings or the
default settings.

For the default settings, see the following appendices:

Appendix D Binary Output Default Setting List
Appendix H Relay Setting Sheet

Visual inspection

After unpacking the product, check for any damage to the relay case. If there is any damage, the
internal module might also have been affected. Contact the vendor.

Relay ratings

Check that the items described on the nameplate on the front of the relay conform to the user’s
specification. The items are: relay type and model, AC current and frequency ratings, and
auxiliary DC supply voltage rating.

 246 
 6 F 2 T 0 1 7 7

Local PC

When using a local PC, connect it with the relay via the USB port on the front of the relay.
RSM100 software is required to run the PC.
For details, see separate volume "PC INTERFACE RSM100".

6.4 Hardware Tests

The tests can be performed without external wiring, but a DC power supply and AC current and
voltage sources are required.

6.4.1 User Interfaces

This test ensures that the LCD, LEDs and keys function correctly.

LCD ･ LED display

• Apply the rated supply voltage and check that the LCD is off and the "IN SERVICE" LED is lit
in green.
Note: If there is a failure, the LCD will display the "ERR: " screen when the supply voltage is applied.
• Press the
▲

key for 3 seconds or more and check that white dots appear on the whole screen
and all LEDs are lit.

Operation keys

• Press the ENTER key when the LCD is off and check that the LCD displays the "MAIN
MENU" screen. Press the END key to turn off the LCD.

• Press the ENTER key when the LCD is off and check that the LCD displays the "MAIN
MENU" screen. Press any keys and check that all keys operate.

6.4.2 Binary Input Circuit

The testing circuit is shown in Figure 6.4.1.

(a) for GRE140--400, -420

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 6 F 2 T 0 1 7 7

(b) for GRE140-401, -421

(c) for GRE140-402, -422

Figure 6.4.1 Testing Binary Input Circuit

• Display the "Binary I/O" screen from the "Status" sub-menu.

/ 2 B i n a r y I / O

I P [ 0 0 0 0 0 0 ]

I P 2 [ 0 0 0 0 0 0 ] Not available for Model 4x0

I P 3 [ 0 0 0 0 0 0 ] Not available for Models 4x0 and 4x1
O P [ 0 0 0 0 ]

O P 2 [ 0 0 0 0 0 0 ] Not available for Model 4x0

O P 3 [ 0 0 0 0 0 0 ] Not available for Models 4x0 and 4x1
F A I L [ 0 ]

• Apply the rated DC voltage to terminals 13 - 14, 15 - 16 , 17, 18, 19, 20 - 22 of terminal block
TB5 , terminals 13 - 14, 15 - 16 , … , 23 - 24 of terminal block TB1 for model 4x1 or 4x2, and
terminals 13 - 14, 15 - 16 , … , 23 - 24 of terminal block TB3 for model 4x2.
Check that the status display corresponding to the input signal (IP) changes from 0 to 1. (For
details of the binary input status display, see Section 4.2.4.2.)

 248 
 6 F 2 T 0 1 7 7

6.4.3 Binary Output Circuit

This test can be performed by using the "Test" sub-menu and forcibly operating the relay drivers
and output relays. Operation of the output contacts is monitored at the output terminal. The output
contact and corresponding terminal number are shown in Appendix G.
• Select "Binary O/P" on the "Test" screen to display the "Binary O/P" screen. The LCD displays
the name of the output relay.

/ 2 B i n a r y O / P

B O 1 _

> B O 1 0

D i s a b l e / E n a b l e

B O 2 0

D i s a b l e / E n a b l e

B O 3 0

D i s a b l e / E n a b l e

B O 4 0

D i S a b l e / E n a b l e

B O 5 0
Not available for Model 4x0
D i S a b l e / E n a b l e

ditto

B O 1 0 0
ditto
D i S a b l e / E n a b l e

B O 1 1 0
Not available for Models 4x0 and 4x1.
D i S a b l e / E n a b l e

ditto

B O 1 6 0
ditto
D i s a b l e / E n a b l e

F A I L 0

D i s a b l e / E n a b l e

• Enter 1 and press the ENTER key.

• After completing the entries, press the END key. The LCD will display the screen shown
below. If 1 is entered for all the output relays, the following forcible operation can be
performed collectively.

O p e r a t e ?

E N T R Y = Y C A N C E L = N

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• Press the ENTER key continuously to forcibly operate the output relays.

• Check that the output contacts operate at the terminal.

• Release the ENTER key to reset the operation

6.4.4 AC Input Circuits

This test can be performed by applying known values of voltage and current to the AC input
circuits and verifying that the values applied coincide with the values displayed on the LCD
screen.
The testing circuits are shown in Figures 6.4.2. A three-phase voltage source and a single-phase
current source are required.

Figure 6.4.3 Testing AC Input Circuit

• Check that the metering data is set to be expressed as secondary values on the "Metering switch"
screen.
"Settings" sub-menu → "Status" screen → "Metering switch" screen
If the setting is “Display Value = Primary”, change the setting in the "Metering switch" screen.
Remember to reset it to the initial setting after the test is finished.
• Open the "Metering" screen in the "Status" sub-menu.
"Status" sub-menu → "Metering" screen
• Apply AC rated voltages and currents and check that the displayed values are within ± 5% of the
input values.

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6.5 Function Test

CAUTION
The function test may cause the output relays to operate including the tripping output relays.
Therefore, the test must be performed with tripping circuits disconnected.

6.5.1 Measuring Element

Measuring element characteristics are realized by software, so it is possible to verify the overall
characteristics by checking representative points.
Operation of the element under test is observed by assigning the signal number to a configurable
LED or a binary output relay.

CAUTION
After testing, it is necessary to reset the settings used for testing to the original settings.
In case of a three-phase element, it is sufficient to test for a representative phase. The A-phase
element is selected hereafter. Further, the [APPLCT] and [APPLVES] settings are selected “3P”
and “3PV”.

Assigning signal to LED

• Select "LED" on the "Set. (change)" screen to display the "2/ LED" screen.

/ 2 L E D

> L E D

V i r t u a l L E D

• Select "LED" on the "/2 LED" screen to display the "/3 LED" screen.

/ 3 L E D

> L E D 1

L E D 2

L E D 3

L E D 4

L E D 5

L E D 6

C B C L O S E D

Note: The setting is required for all of the LEDs. If any of the LEDs are not used, enter 0 to logic gates
#1 to #4 in assigning signals.

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Assigning signal to Binary Output Relay

• Select "Binary O/P" on the "Set. (change)" screen to display the "Binary O/P" screen.

Note: The setting is required for all of the binary outputs. If any of the binary outputs are not used,
enter 0 to logic gates In #1 to #4 in assigning signals.

• Select the output relay number (BO number) and press the ENTER key to display the "BO∗"
screen.

/ 3 B O ∗

> L o g i c / R e s e t

F u n c t i o n s

• Select "Logic/Reset" to display the "Logic/Reset" screen.

/ 4 L o g i c / R e s e t

L o g i c _

> L o g i c 0

O R / A N D

R e s e t 0

I n s / D l / D w / L a t

• Enter 0 (= OR) and press the ENTER key.

• Enter 0 (= Instantaneous) and press the ENTER key.

• Press the END key to return to the "BO∗" screen.

• Select "Functions" on the "BO∗" screen to display the "Functions" screen.

/ 4 F u n c t i o n s

I n ♯ 1 _

> I n ♯ 1
_ _ _
I n ♯ 2
_ _ _
I n ♯ 3
_ _ _
I n ♯ 4
_ _ _
I n ♯ 5 _ _ _

I n ♯ 6 _ _ _

• Assign the gate In #1 to the number corresponding to the testing element by referring to
Appendix B, and assign other gates the value “0”.

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6.5.1.1 Overcurrent and undercurrent element OC1 to OC4, UC1, UC2 and CBF and Earth fault
element EF1 to EF4 and SEF1 to SEF4
The overcurrent element is checked for operating current value and operating time for an IDMT
curve.

Operating current check

Figure 6.5.1 shows a testing circuit. The operating current value is checked by increasing or
decreasing the magnitude of the current applied.

Figure 6.5.1 Operating Current Value Test

The output signal of the testing element is assigned to a configurable LED.

The output signal numbers of the elements are as follows:

Element Signal No. Element Signal No. Element Signal No. Element Signal No.
OC1-A 101 EF1 131 SEF1 141 UC1-A 161
OC2-A 107 EF2 133 SEF2 143 UC2-A 164
OC3-A 113 EF3 135 SEF3 145 CBF-A 173
OC4-A 116 EF4 136 SEF4 146

• Enter the signal number to observe the operation at the LED as shown in Section 6.5.1 and
press the ENTER key.

• Set the scheme switches [∗∗∗-DIR] to “NON”.

• Apply a test current and change the magnitude of the current applied and measure the value
at which the element operates.
Check that the measured value is within ± 5% of the setting value.

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Operating time check for IDMT curve

The testing circuit is shown in Figure 6.5.2.

Figure 6.5.2 Testing IDMT

One of the inverse time characteristics can be set, and the output signal numbers of the IDMT
elements are as follows:
Element Signal No.
OC1-A 101
EF1 131
SEF1 141

Fix the time characteristic to test by setting the scheme switch MOC1, MEF1 or MSE1 on the
"OC", "EF" or "SEF" screen.

Example: "Settings" sub-menu → "Protection" screen → "Group∗" screen → "OC" screen

The test procedure is as follows:

• Enter the signal number to observe the operating time at a binary output relay as shown in
Section 6.5.1 and press the ENTER key.

• Apply a test current and measure the operating time. The magnitude of the test current should
be between 1.2 × Is to 20 × Is, where Is is the current setting.
• Calculate the theoretical operating time using the characteristic equations shown in Section
2.1.1. (For accuracy, refer to Appendix K.)

If checking the dependent time reset characteristic, use the output signal numbers 576 to 587
(∗∗∗∗_DEPRST). These signals output “1”(logic level) when the value of internal time delay
counter is down to “0” in Figure 6.5.2.1 “Dependent time reset characteristic in accordance with
IEC 60255-151”.

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0.

Figure 6.5.2.1 Dependent time reset characteristic

6.5.1.2 Directional characteristic test

The directional characteristic is checked as follows:

OC element
The test circuit is shown in Figure 6.5.3.

Figure 6.5.3 Testing OC Element

OC elements and their output signal number are shown in Section 6.5.1.1.
The following describes the routine for testing OC1.
• Enter the signal number to observe the operating time at a binary output relay as shown in
Section 6.5.1 and press the ENTER key.

• Set the scheme switch [OC1-DIR] to “FWD”.

• Apply three-phase rated voltage and single-phase test current IT (= Ia).
Set IT to lag Vbc by OC characteristic angle OC θ. (The default setting of OC θ is -45°.)

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• Changing the magnitude of IT while maintaining the phase angle with the voltage, and
measure the current at which the element operates. Check that the measured current magnitude
is within ± 5% of the current setting.

EF element
The test circuit is shown in Figure 6.5.4.

Figure 6.5.4 Testing EF and SEF Elements

EF elements and their output signal number are shown in Section 6.5.1.1.
The following describes the routine for testing EF1.
• Enter the signal number to observe the operating time at a binary output relay as shown in
Section 6.5.1 and press the ENTER key.

• Set the scheme switch [EF1-DIR] to “FWD”.

• Apply the rated voltage VT (= V0) and single-phase test current IT.
Set IT to lag V0 by EF characteristic angle EF θ. (The default setting of EF θ is -45°.)
• Changing the magnitude of IT while maintaining the phase angle with the voltage, and
measure the current at which the element operates. Check that the measured current magnitude
is within ± 5% of the current setting.

SEF element
The test circuit is shown in Figure 6.5.4.
SEF elements and their output signal number are shown in Section 6.5.1.1.
The following describes the routine for testing SEF1.
• Enter the signal number to observe the operating time at a binary output relay as shown in
Section 6.5.1 and press the ENTER key.

• Set the scheme switch [SE1-DIR] to “FWD”.

• Apply the rated voltage VT (= V0) and single-phase test current IT (= Ise).
Set IT to lag V0 by SEF characteristic angle SE θ. (The default setting of SE θ is 0°.)

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• Changing the magnitude of IT while maintaining the phase angle with the voltage, and
measure the current at which the element operates. Check that the measured current magnitude
is within ± 5% of the current setting.

6.5.1.3 Thermal overload element THM-A and THM-T

The testing circuit is the same as the circuit shown in Figure 6.5.2.
The output signal of the testing element is assigned to a configurable LED.
The output signal numbers of the elements are as follows:
Element Signal No.
THM-A 167
THM-T 168

• Set the scheme switch [THMRST](∗) to "ON".

Note (*): While the switch [THMRST] is set to "ON", the thermal state instantly resets to 0% when
applying the input current to 0 (zero).
• Enter the signal number to observe the operation at the LED as shown in Section 6.5.1 and
press the ENTER key.

• Apply a test current and measure the operating time. The magnitude of the test current
should be between 1.2 × Is to 10 × Is, where Is is the current setting.
CAUTION
After the setting of a test current, apply the test current after first checking that the THM%
has become 0 on the "Metering" screen.
• Calculate the theoretical operating time using the characteristic equations shown in Section
2.1.5. Check that the measured operating time is within ± 5%.

6.5.1.4 Negative sequence overcurrent element NOC1 and NOC2

The testing circuit is shown in Figure 6.5.5.
The output signal of the testing element is assigned to a configurable LED.
The output signal numbers of the elements are as follows:
Element Signal No.
NOC1 169
NOC2 171
• Enter the signal number to observe the operation at the LED as shown in Section 6.5.1 and
press the ENTER key.

• Apply a three-phase balanced current and check the operating current value by increasing
the magnitude of the current applied.
Check that the measured value is within ± 5% of the setting value.

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Figure 6.5.5 Testing NOC elements

Directional characteristic test of NOC element

The test circuit is shown in Figure 6.5.6.

Figure 6.5.6 Testing Directional Characteristic of NOC Element

The following describes shows the routine for testing NOC1.

• Enter the signal number to observe the operation at the LED as shown in Section 6.5.1 and
press the ENTER key.

• Set the scheme switch [NC1-DIR] to “FWD”.

• Apply three-phase balance voltage and three-phase balance current.
Set Ia to lag Va by NOC characteristic angle NC θ. (The default setting of NC θ is -45°.)
• Changing the magnitude of the three-phase balanced current while retaining the phase angle
with the voltage, and measure the current Ia at which the element operates. Check that the
measured current magnitude is within ± 5% of the current setting.

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6.5.1.5 Broken conductor detection element BCD

The testing circuit is shown in Figure 6.5.7.

Figure 6.5.7 Testing BCD element

The output signal of the testing element is assigned to a configurable LED.

The output signal numbers of the elements are as follows:
Element Signal No.
BCD 172

• Enter the signal number to observe the operation at the LED as shown in Section 6.5.1 and
press the ENTER key.

• Apply the three-phase balanced current at 10% of the rated current and interrupt a phase
current.
Then, check that the BCD element operates.

6.5.1.6 Cold load protection

The testing circuit is the same as the circuit shown in Figure 6.5.1.
To check the cold load protection function, the scheme switch [CLPTST] shown in the "Switch"
screen on the "Test" menu is used. Test the OC1 element as described in Section 6.5.1.1.
• Set the scheme switch [CLPTST] to "S0".
Check that the OC1 element operates at the setting value in the normal setting group.
• Next, set the scheme switch [CLPTST] to "S3".
Check that the OC1 element operates at the setting value for the cold load setting of
CLP-OC1.

6.5.1.7 Overvoltage and undervoltage elements

The testing circuit is shown in Figure 6.5.8.

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Figure 6.5.8 Operating Value Test Circuit

The output signal of the testing element is assigned to a configurable LED.

Overvoltage and undervoltage elements and their output signal numbers are listed below.
Element Signal No.
OV1-A 191
OV2-A 197
OV3-A 515
OV4-A 518
UV1-A 201
UV2-A 207
UV3-A 525
UV4-A 528
ZOV1 211
ZOV2 213

• Enter the signal number to observe the operation at the LED as shown in Section 6.5.1 and
press the ENTER key.

Operating value test of OV1, OV2, OV3, OV4, ZOV1, ZOV2

• Apply a rated voltage as shown in Figure 6.5.8.
• Increase the voltage and measure the value at which the element operates. Check that the
measured value is within ± 5% of the setting.

Operating value test of UV1, UV2, UV3, UV4

• Apply a rated voltage and frequency as shown in Figure 6.5.8.
• Decrease the voltage and measure the value at which the element operates. Check that the
measured value is within ± 5% of the setting.

Operating time check of OV1, UV1, ZOV1 IDMT curves

• Change the voltage from the rated voltage to the test voltage quickly and measure the
operating time.
• Calculate the theoretical operating time using the characteristic equations shown in Section
2.2.1 and 2.2.2. Check the measured operating time.

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6.5.1.8 Negative sequence overvoltage element NOV1 and NOV2

The testing circuit is shown in Figure 6.5.9.

Figure 6.5.9 Testing NOV elements

The output signal of the testing element is assigned to a configurable LED.

The output signal numbers of the elements are as follows:
Element Signal No.
NOV1 214
NOV2 216

• Enter the signal number to observe the operation at the LED as shown in Section 6.5.1 and
press the ENTER key.

• Apply the three-phase balanced voltage and check the operating voltage value by
increasing the magnitude of the voltage applied.
Check that the measured value is within ± 5% of the setting value.

Operating time check of NOV1 IDMT curve

• Change the voltage from the rated voltage to the test voltage quickly and measure the
operating time.
• Calculate the theoretical operating time using the characteristic equations shown in Section
2.2.4. Check the measured operating time.

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6.5.1.9 Frequency Elements

The testing circuit is shown in Figure 6.5.10.

Figure 6.5.10 Operating Value Test Circuit

The output signal of the testing element is assigned to a configurable LED.

Frequency elements and their output signal numbers are listed below.
Element Signal No.
FRQ1 218
FRQ2 219
FRQ3 220
FRQ4 221
FRQBLK 222

Overfrequency or underfrequency elements FRQ1 to FRQ4

• Enter the signal number to observe the operation at the LED as shown in Section 6.5.1 and
press the ENTER key.

• Apply a rated voltage and frequency as shown in Figure 6.5.10.

In case of overfrequency characteristic,
• Increase the frequency and measure the value at which the element operates. Check that the
measured value is within ± 0.005Hz of the setting.
In case of underfrequency characteristics,
• Decrease the frequency and measure the value at which the element operates. Check that
the measured value is within ± 0.005Hz of the setting.

Undervoltage block test, FRQBLK

• Apply a rated voltage and change the magnitude of frequency to operate an element.
• Maintain the frequency at which the element is operating, and change the magnitude of the
voltage applied from the rated voltage to less than the FRQBLK setting voltage. And then,
check that the element resets.
6.5.1.10 Voltage and Synchronism Check Elements

The testing circuit is shown in Figure 6.5.11.

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Figure 6.5.11 Operating Voltage Value Test Circuit

Voltage and synchronism check elements and their output signal numbers are listed below.
Element Signal No.
OVB 534
UVB 536
OVL 533
UVL 535
SYN 532

Voltage check element OVB, UVB, OVL

• Enter the signal number to observe the operation at the LED as shown in Section 6.5.1 and
press the ENTER key.

• Apply a rated voltage as shown in Figure 6.5.11.

OVB and UVB :
• Adjust the magnitude of the voltage applied to terminal TB2-A3 and -B3 and measure the value
at which the element operates. Check that the measured value is within ± 5% of the setting.
OVL and UVL :
• Adjust the magnitude of the voltage applied to terminal TB-A1 and –B2 and measure the value
at which the element operates. Check that the measured value is within ± 5% of the setting.

Synchronism check element SYN

• Enter the signal number to observe the operation at the LED as shown in Section 6.5.1 and press
the ENTER key.

• Apply rated voltages VB and VL as shown Figure 6.5.11.

Voltage check:
• Set the [DfEN] to "OFF", and set the voltage to any value over the SYNOV setting. (The
default setting of SYNOV is 51 V.)
Whilst keeping VL in-phase with VB, increase the single-phase voltage VL from zero volts.
Measure the voltage at which the element operates. Check that the measured voltage is

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within ± 5% of the SYNUV setting.

• Further increase VL and measure the voltage at which the element resets. Check that the
measured voltage is within ±5% of the SYNOV setting.
• To check the SYNDV detector, set the VB to a fixed value and increase the VL from zero
volts. Measure the voltage at which the element operates. Check that | VL − VB| is within ±
5% of the SYNDV setting.
Phase angle check:
• Set the [DfEN] to "OFF", and set VB and VL to any value between the SYNOV and
SYNUV settings keeping VB in-phase with VL. The SYN element should operate.
• Shift the angle of VL from that of VB, and measure the angle at which the element resets.
• Check that the measured angle is within ±5° of the SYNθ setting. (The default setting of
SYNθ is 30°.)
• Change VB and VL, and repeat the above.
Frequency difference check:
• Set the [DfEN] to "ON", and set VB and VL to a rated voltage and rated frequency. The
SYN element should operate.
• Shift the frequency of VL and measure the frequency at which the element resets.
• Check that |(frequency of VL) − (frequency of VB)| is within ±5% of the SYNDf setting.
(The default setting of SYNDf is 1.00Hz.)

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6.5.2 Protection Scheme

In the protection scheme tests, a dynamic test set is required to simulate power system pre-fault,
fault and post-fault conditions.
Tripping can be observed by monitoring the tripping command output relays when a simulated
fault is applied.

Circuit Breaker failure tripping

• Set the scheme switch [BTC] to "ON" and [RTC] to "DIR" or "OC".
• Apply a fault, maintain it and input an external trip signal. Check that the retrip output relays
operate after the time setting of the TRTC and the adjacent breaker tripping output relay
operates after the time setting of the TBTC.

6.5.3 Metering and Recording

The metering function can be checked while testing the AC input circuit. See Section 6.4.4.
Fault recording can be checked while testing the protection schemes. Open the "Fault record"
screen and check that the descriptions are correct for the fault concerned.
Recording events are listed in Appendix D. There are internal events and external events from
binary input commands. Event recording for the external event can be checked by changing the
status of binary input command signals. Change the status in the same way as for the binary input
circuit test (see Section 6.4.2) and check that the description displayed on the "Event record"
screen is correct. Some of the internal events can be checked in the protection scheme tests.
Disturbance recording can be checked while testing the protection schemes. The LCD display
only shows the date and time when a disturbance is recorded. Open the "Disturbance record"
screen and check that the descriptions are correct.
Details can be displayed on a PC. Check that the descriptions on the PC are correct. For details
on how to obtain disturbance records on a PC, see the RSM100 Manual.

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6.6 Conjunctive Tests

6.6.1 On Load Test

To check the polarity of the current and voltage transformers, check the load current, system
voltage and their respective phase angle with the metering displays on the LCD screen.
• Open the "Auto-supervision" screen, check that no message appears.
• Open the following "Metering" screen from the "Status" sub-menu to check the above.

/ 3 M e t e r i n g

I a * * . * * k A

* * * . * °

I b * * . * * k A

* * * . * °

I c * * . * * k A

* * * . * °

I e * * . * * k A

* * * . * °

I s e * * * . * * k A
Not available for model 400 series.
* * * . * °

I 1 * * . * * k A

* * * . * °

I 2 * * . * * k A

* * * . * °

I O * * . * * k A

* * * . * °

I 2 / I 1 * * . * *

T H M * * * . * %

V a * * * . * * k V

* * * . * °

V b * * * . * * k V

* * * . * °

V c * * * . * * k V

* * * . * °

V e * * . * * * k V

* * * . * °

V s * * . * * * k V

* * * . * °

V a b * * . * * * k V

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* * * . * °

V b c * * . * * * k V

* * * . * °

V c a * * . * * * k V

* * * . * °

V 1 * * . * * k V

* * * . * °

V 2 * * . * * k V

* * * . * °

V O * * . * * k V

* * * . * °

f - * . * * * H z

P F - * * * * * *

P - * * * * * * k W

Q - * * * * * * k v a r

S - * * * * * * k V A

Note: The magnitude of current can be set in values on the primary side or on the secondary side
by selecting the appropriate setting. (The default setting is the secondary side.)

Directional check of Directional phase overcurrent element

The correctness of the polarity of the directional phase overcurrent element can be verified if the
current and voltage values and their respective phase angles are all ascertained as being correct
in the above metering check. Further, it can be also be checked as follows:
• Select “Direction” on the “Metering” screen to display the “Direction” screen, the direction
of the current will be displayed. (See Section 4.2.4.1.) Check the direction of current is
correct.
Note: Not available for models 110 and APPL=1P and 2P settings in models 40∗ and 42∗.

Directional check of Directional earth fault element

The correctness of the polarity of the directional earth fault element can be verified if the current
and voltage values and their respective phase angles are all ascertained as being correct in the
above metering check. Further, if required, it can be also checked as follows:
• Check the operation of this element by simulating an unbalanced condition of the three phase
voltages and currents.

CAUTION: The tripping circuit must be blocked when performing this check by simulating an
unbalanced condition. After checking, all connections must be returned to their
original state.

6.6.2 Tripping and Reclosing Circuit Test

The tripping circuit including the circuit breaker can be checked by forcibly operating the output
relay and monitoring the circuit breaker to confirm that it has tripped. Forcible operation of the
output relay is performed on the "Binary O/P " screen of the "Test" sub-menu as described in
Section 6.4.3.

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Tripping circuit
• Set the breaker to be closed.
• Select "Binary O/P" on the "Test" sub-menu screen to display the "Binary O/P" screen.

/ 2 B i n a r y O / P

B O 1 _

> B O 1 0

D i s a b l e / E n a b l e

B O 2 0

D i s a b l e / E n a b l e

B O 3 0

D i s a b l e / E n a b l e

B O 4 0

D i S a b l e / E n a b l e

B O 5 0
Not available for Model 4x0
D i S a b l e / E n a b l e

ditto

B O 1 0 0
ditto
D i S a b l e / E n a b l e

B O 1 1 0
Not available for Models 4x0 and 4x1.
D i S a b l e / E n a b l e

ditto

B O 1 6 0
ditto
D i s a b l e / E n a b l e

F A I L 0

D i s a b l e / E n a b l e

BO1 to BO16 are output relays with one normally open contact.

• Enter 1 for BO1 and press the ENTER key.

• Press the END key. The LCD will display the screen shown below.

O p e r a t e ?

E N T E R = Y C A N C E L = N

• Continue to press the ENTER key to maintain the operation of binary output relay BO1
and check that the A-phase breaker has tripped.
• Release the ENTER key to reset the operation.

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• Repeat the above for BOs.

Reclosing circuit
• Ensure that the circuit breaker is open.
• Select "Binary O/P" on the "Test" sub-menu screen to display the "Binary O/P" screen.
• Select the BO number which is an autoreclose command output relay with one normally open
contact.
Note: The autoreclose command is assigned to any of the output relays by a user setting
• Operate the BO in the same manner as above.

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6.7 Maintenance
6.7.1 Regular Testing
The relay is almost completely self-supervised. The circuits that can not be supervised are the
binary input and output circuits and human interfaces.
Therefore, regular testing can be minimised to checking the unsupervised circuits. The test
procedures are the same as described in Sections 6.4.1, 6.4.2 and 6.4.3.

6.7.2 Failure Tracing and Repair

Failures will be detected by automatic supervision or regular testing.
When a failure is detected by the supervision, a remote alarm is issued by the binary output relay
called FAIL and the failure is indicated on the front panel by the LED indicators or on the LCD
display. It is also recorded in the event record.
Failures detected by the supervision can be traced by checking the "Err: " screen on the LCD.
Table 6.7.1 shows the LCD messages and failure locations.
The items marked with (1) have a higher probability of being the cause of failure than those items
marked with (2).

Table 6.7.1 LCD Message and Failure Location

Message Failure location
CB or
Relay Unit AC cable PLC data
cable
Err: SUM ×(Flash memory)
Err: ROM ×(ROM data)
Err: RAM ×(SRAM)
Err: CPU ×(CPU)
Err: Invalid ×
Err: NMI ×
Err: BRAM ×(Backup RAM)
Err: EEP ×(EEPROM)
Err: A/D ×(A/D converter)
Err: SP ×(Sampling)
Err: DC ×(DC power supply circuit)
Err: TC ×(Tripping circuit)(1) × (2)
Err: CT, Err: V0, Err: V2 × (AC input circuit)(1) × (2)
Err: CB × (Circuit breaker)(1) × (2)
Err: CTF × (AC input circuit)(2) × (1)
Err: VTF1, Err: VTF2 × (AC input circuit)(2) × (1)
Err: PLC ×(PLC data)
( ): Probable failure location in the relay unit including peripheral circuits.

If no message is shown on the LCD, this means that the failure location is either in the DC power
supply circuit or in the microprocessors. If the "ALARM" LED is off, the failure is in the DC
power supply circuit. If the LED is lit, the failure is in the microprocessors. Replace the relay unit
in both cases after checking if the correct DC voltage is applied to the relay.
If a failure is detected by either the automatic supervision functions or by regular testing, replace
the failed relay unit.

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Note: When a failure or an abnormality is detected during regular testing, confirm the following
first:
- Test circuit connections are correct.
- Modules are securely inserted in position.
- Correct DC power supply voltage is applied.
- Correct AC inputs are applied.
- Test procedures comply with those stated in the manual.

6.7.3 Replacing Failed Relay Unit

If the failure is identified to be in the relay unit and the user has a spare relay unit, the user can
recover the protection by replacing the failed relay unit.
Repair at site should be limited to relay unit replacement. Maintenance at the component level is
not recommended.
Check that the replacement relay unit has an identical Model Number and relay version (software
type form) as the relay that is to be replaced.
The Model Number is indicated on the front of the relay. For the relay version, see Section
4.2.5.1.

Replacing the relay unit

CAUTION After replacing the relay unit, check the settings including the data related to
the PLC, IEC103 and IEC61850, etc. are restored the original settings.

The procedure for relay withdrawal and insertion is as follows:

• Switch off the DC power supply.
WARNING Hazardous voltage may remain in the DC circuit immediately following the
switching off the DC power supply. It takes approximately 30 seconds for
the voltage to discharge.
• Disconnect the trip outputs.
• Short-circuit all AC current inputs. Open all AC voltage inputs.
• Remove the terminal blocks from the relay leaving the wiring.
• To remove the relay unit from the panel, remove the attachments screws.
• Insert the (spare) relay unit in the reverse procedure.
CAUTION To avoid risk of damage:
• When the attachment kits are removed, be careful to ensure that the relay does not to
fall from panel.
• The cover of the relay front panel is closed during operation.

6.7.4 Resumption of Service

After replacing the failed relay, take the following procedures to restore the relay to the service.
• Switch on the power supply and confirm that the "IN SERVICE" green LED is lit and the
"ALARM" red LED is not lit.
• Supply the AC inputs and reconnect the trip outputs.

6.7.5 Storage

The spare relay should be stored in a dry and clean room. Based on IEC Standard 60255-6 the
storage temperature should be −25°C to +70°C, but a temperature of 0°C to +40°C is
recommended for long-term storage.

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7. Putting the Relay into Service

The following procedure must be adhered to when putting the relay into service after finishing
the commissioning tests or maintenance tests.
• Check that all of the external connections are correct.
• Check the settings of all measuring elements, timers, scheme switches, recordings and the
clock are correct.
In particular, when settings are changed temporarily for testing, be sure to restore them.
• Clear any unnecessary records on faults, events and disturbances which are recorded during
the tests.
• Press the ▼ key and check that no failure messages are displayed on the "Auto-supervision"
screen.
• Check that the green "IN SERVICE" LED is lit.

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Appendix A
Programmable Reset Characteristics
and Implementation of Thermal Model
to IEC60255-149

 273 
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Programmable Reset Characteristics

The overcurrent stages for phase and earth faults, OC and EF, each have a programmable reset feature.
Resetting may be instantaneous, definite time delayed, or, in the case of IEEE/US curves, inverse time
delayed.
Instantaneous resetting is normally applied in multi-shot auto-reclosing schemes, to ensure correct
grading between relays at various points in the scheme. On the other hand, the inverse reset
characteristic is particularly useful to provide correct co-ordination with an upstream induction disc type
overcurrent relay.
The definite time delayed reset characteristic may be used to provide faster clearance of intermittent
(‘pecking’ or ‘flashing’) fault conditions. An example of where such phenomena may be experienced is
in plastic insulated cables, where the fault energy melts the cable insulation and temporarily
extinguishes the fault, after which the insulation again breaks down and the process repeats.
An inverse time overcurrent protection with instantaneous resetting cannot detect this condition until the
fault becomes permanent, thereby allowing a succession of such breakdowns to occur, with associated
damage to plant and danger to personnel. If a definite time reset delay of, for example, 60 seconds is
applied, on the other hand, the inverse time element does not reset immediately after each successive
fault occurrence. Instead, with each new fault inception, it continues to integrate from the point reached
during the previous breakdown, and therefore operates before the condition becomes permanent.
If a dependent time reset is applied, it attenuate the integrate current, and therefore in the intermittent
fault condition operates rapidly.
Figure A-1 illustrates this theory.

Intermittent
Fault Condition

TRIP LEVEL

Inverse Time Relay

with Instantaneous
Reset

TRIP LEVEL

Inverse Time Relay

with Definite Time
Reset
Delayed
Reset
TRIP LEVEL

Inverse Time Relay

with Dependent Time
Reset

Figure A-1

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Implementation of Thermal Model to IEC60255-149

Heating by overload current and cooling by dissipation of an electrical system follow exponential time
constants. The thermal characteristics of the electrical system can be shown by equation (1).
I2  −t 
θ = 2
1 − e τ  × 100% (1)
I AOL  

where:
θ = thermal state of the system as a percentage of allowable thermal capacity,
I = applied load current,
IAOL = allowable overload current of the system,
τ = thermal time constant of the system.
The thermal stateθis expressed as a percentage of the thermal capacity of the protected system, where
0% represents the cold state and 100% represents the thermal limit, which is the point at which no
further temperature rise can be safely tolerated and the system should be disconnected. The thermal
limit for any given electrical plant is fixed by the thermal setting IAOL. The relay gives a trip output
when θ = 100%.
If current I is applied to a cold system, then θ will rise exponentially from 0% to (I2/IAOL2 × 100%), with time
constant τ, as in Figure A-2. If θ = 100%, then the allowable thermal capacity of the system has been reached.

θ (%)

100%

I2 2 × 100%
I AOL

2 − tτ 
θ = I I 2 1 − e 

× 100%
AOL

t (s)
Figure A-2

A thermal overload protection relay can be designed to model this function, giving tripping times
according to the IEC60255-8 ‘Hot’ and ‘Cold’ curves.
 I2 
t =τ·Ln  2 2  (1) ∙∙∙∙∙ Cold curve
 I − I AOL 

 I2 − I 2 
t =τ·Ln  2 2P  (2) ∙∙∙∙∙ Hot curve
 I − I AOL 

where:
IP = prior load current.

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In fact, the cold curve is simply a special case of the hot curve where prior load current IP = 0, catering
for the situation where a cold system is switched on to an immediate overload.
Figure A-3 shows a typical thermal profile for a system which initially carries normal load current, and
is then subjected to an overload condition until a trip results, before finally cooling to ambient
temperature.

θ (%) Overload Current

Condition Trip at 100%

100%

Normal Load
Current Condition Cooling Curve

t (s)

Figure A-3

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Appendix B
Directional Earth Fault Protection and
Power System Earthing

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Directional Earth Fault Protection and Power System Earthing

Power systems may be solidly earthed, impedance earthed or unearthed (insulated). Depending
on the method used, faults to earth have widely differing characteristics, and so methods of earth
fault protection differ greatly between the various types of system.

1. Solidly earthed systems

In a solidly earthed system the neutral points of the power transformers are connected directly to
earth, for the purposes of reducing overvoltages and facilitating fault detection. The
disadvantage of solid earthing is that fault currents can be very high, and must be disconnected
quickly.
Since the impedance of the source is normally very low, fault current varies greatly in
magnitude depending on the location of the fault. Selective isolation of a faulty section is
therefore possible via time/current graded earth fault overcurrent protection. Fault current is
detected by measuring the system residual current.
On an interconnected system, where fault current can flow in either direction, then directional
earth fault relays are applied. The fault causes a residual voltage to be generated, and this can be
used for directional polarization. Residual current and voltage can be measured as shown in
Figure B-1.
Residual current IR is equal in magnitude and direction to the fault current. It typically lags the
faulted phase voltage by a considerable angle due to the reactance of the source. Directional
control is achieved by polarising against the system residual voltage, which may be found either
by summating the phase voltages, or it may be extracted from the open delta connected
secondary (or tertiary) winding of a five limb VT, as shown in the diagram.
A directional earth fault relay protecting a solidly earthed system is normally connected to
measure VR inverted. If GRE140 is applied to derive residual voltage from the phase voltages
then the inversion of VR is performed internally.

A
F

51N

67

V an

IR
Pre- Ia V an Post-fault
fault Earth
n
n
V cn V bn V cn V bn
VR

Figure B-1 Directional Earth Fault Protection for Solidly Earthed Systems

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 6 F 2 T 0 1 7 7

The relay characteristic angle setting is applied to compensate for lag of the fault current.
Generally accepted angle settings are -45° for solidly earthed distribution systems and -60° for
transmission systems.
Due to system imbalances and measuring tolerances, small levels of residual voltage can be
present during normal operating conditions. Therefore, GRE140 provides a voltage threshold
which must be exceeded before the directional protection will operate. Although this threshold is
user programmable, most applications will be satisfied by the default setting of 3V.

2. Unearthed (insulated) systems

An insulated system has no intentional connection to earth, although all systems are in fact
earthed by natural capacitive coupling. Fault current is very low, being made up of capacitive
charging currents, thus limiting damage to plant. However, high steady-state and transient
overvoltages are produced, and selective isolation of faults is difficult.
An earth fault on an ungrounded system causes a voltage shift between the neutral point and
earth, and the fault can be detected by measuring this shift. So called neutral voltage
displacement protection is commonly applied but, unfortunately, the shift in voltage is
essentially the same throughout the system and so this method cannot selectively isolate a
faulted section.
The method of directional earth fault protection described previously for solidly earthed systems
cannot be used in the case of insulated systems because of the absence of real fault current.
However, an alternative method can be applied, using GRE140 directional sensitive earth fault
protection. The relay must be connected using a core balance CT, to measure the flow of
capacitive charging currents, which become unbalanced in the event of a fault.
A phase to earth fault effectively short circuits that phase’s capacitance to earth for the whole
system, thus creating an unbalance in the charging currents for all feeders connected to the
system. The resulting fault current is made up of the sum of the combined residual charging
currents for both the faulty and healthy feeders.

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 6 F 2 T 0 1 7 7

51N 51N

IF

IU2 IU1

-VR
IU3+....

Healthy Faulty
feeder V an Earth (e) feeder

IR1
V an
Ib IU1
IU2(=IR2) IU1
n Ic IF=IU1+IU2+IU3+... n

V cn V bn V cn V bn

Figure B-2 Residual Current Flow in an Unearthed System

It can be shown that the residual current measured in the faulty feeder is 180° out of phase with
that in the healthy feeder, as illustrated in Figure B-2 This fact can be used to apply a GRE140
directional sensitive earth fault relay. The polarising voltage used for directional earth fault
relays is normally -VR (the residual voltage inverted), and it can be seen that the residual current
(IR1) for the faulty feeder leads this voltage by 90°. For the healthy feeders the residual current
lags the voltage by 90°. Therefore, the GRE140 sensitive earth fault protection should be applied
with a characteristic angle of +90° so as to provide discriminatory protection.
The residual current in the faulted phase is equal to three times the per phase charging current,
and the sensitive earth fault element should be set well below this value to ensure operation
(30% of this value is typical).

3. Impedance earthing
In between the two extremes of solidly earthed and unearthed systems there are a variety of
compromise solutions, which normally involve connecting the system neutrals to earth via a
resistance or reactance.

3a. Resistance earthing

In the case of resistance earthed systems, GRE140 directional earth fault relays can normally be
applied in a similar manner to that for solidly earthed systems, with the exceptions that current
settings will be lower and the characteristic angle setting will probably be different. In the event
of a fault, it is the resistance in the neutral which predominates in the source impedance, and so
the residual current lags its polarising voltage by a much smaller angle. Characteristic angle
settings of -15° or 0° are common.

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3b. Reactance earthing

Reactance earthed systems are also common in many countries. A special case of this method is
known as Petersen coil, or resonant, earthing. The inductance in the neutral is chosen to cancel
the total capacitance of the system so that no current flows into an earth fault.
Directional sensitive earth fault protection can again be applied by detecting the unbalance in
charging currents. It can be shown that the residual current distribution for healthy and faulty
feeders is as illustrated in Figure B-3.
In the case of the healthy feeder, the residual current lags the polarising voltage (-VR) by more
than 90°, while for the faulty feeder, the angle is less than 90°. GRE140 directional sensitive
earth fault protection can be applied, with a 0° characteristic angle. Note that the SEF boundary
of directional operation should be set to ±90°. The residual current for the healthy feeder then
falls in the restraint zone, while for the faulty feeder it lies in the operate zone, thus providing
selective isolation of the fault.

-V R -V R

Healthy Faulty
feeder Earth (e) feeder

V an V an IR1
Operate Zone
n Restraint Zone n
IR2
V cn V cn V bn
V bn

Figure B-3 Residual Current Flow in a Resonant Earthed System

3c. Reactance Earthing and Residual Power Control

GRE140 can provide an additional restraint on operation by the (optional) residual power
control feature. The active component of residual power can be calculated as follows:
ℜ(PR ) = I R × VR × cos φ
where φ is the phase angle between the residual current (IR) and the polarising voltage (-VR).
It is clear from Figure B-3 that this value will be positive when measured at the faulty feeder and
negative anywhere else. GRE140 directional sensitive earth fault protection can be applied with
a power threshold such that operation is permitted when residual power exceeds the setting and
is in the operate direction.

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Appendix C
Signal List

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 6 F 2 T 0 1 7 7

No. Signal Name Contents

0 CONSTANT_0 constant 0
1 CONSTANT_1 constant 1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50

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No. Signal Name Contents

51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101 OC1-A OC1-A relay element output
102 OC1-B OC1-B relay element output
103 OC1-C OC1-C relay element output
104 OC1-A_INST OC1-A relay element start
105 OC1-B_INST OC1-B relay element start

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No. Signal Name Contents

106 OC1-C_INST OC1-C relay element start
107 OC2-A OC2-A relay element output
108 OC2-B OC2-B relay element output
109 OC2-C OC2-C relay element output
110 OC2-A_INST OC2-A relay element start
111 OC2-B_INST OC2-B relay element start
112 OC2-C_INST OC2-C relay element start
113 OC3-A OC3-A relay element output
114 OC3-B OC3-B relay element output
115 OC3-C OC3-C relay element output
116 OC4-A OC4-A relay element output
117 OC4-B OC4-B relay element output
118 OC4-C OC4-C relay element output
119 OC1-A_HS High speed output of OC1-A relay
120 OC1-B_HS High speed output of OC1-B relay
121 OC1-C_HS High speed output of OC1-C relay
122
123
124
125
126
127
128
129
130
131 EF1 EF1 relay element output
132 EF1_INST EF1 relay element start
133 EF2 EF2 relay element output
134 EF2_INST EF2 relay element start
135 EF3 EF3 relay element output
136 EF4 EF4 relay element output
137 CUR-REV_DET. Current reversal detection.
138 EF1_HS High speed output of EF1 relay
139
140
141 SEF1 SEF1 relay element output
142 SEF1_INST SEF1 relay element start
143 SEF2 SEF2 relay element output
144 SEF2_INST SEF2 relay element start
145 SEF3 SEF3 relay element output
146 SEF4 SEF4 relay element output
147 SEF1_HS High speed output of SEF1 relay
148 RPF Residual power forward element
149 RPR Residual power reverse element
150 ICD-A Inrush current detector
151 ICD-B Inrush current detector
152 ICD-C Inrush current detector
153
154
155
156
157
158
159
160

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No. Signal Name Contents

161 UC1-A UC1-A relay element output
162 UC1-B UC1-B relay element output
163 UC1-C UC1-C relay element output
164 UC2-A UC2-A relay element output
165 UC2-B UC2-B relay element output
166 UC2-C UC2-C relay element output
167 THM-A THERMAL Alarm relay element output
168 THM-T THERMAL Trip relay element output
169 NOC1 NOC1 relay element output
170 NOC1_INST NOC1 relay element start
171 NOC2 NOC2 relay element output
172 BCD BCD relay element output
173 CBF-A CBF-A relay element output
174 CBF-B CBF-B relay element output
175 CBF-C CBF-C relay element output
176 ICLDO-A ICLDO-A relay (OC relay) element output used in "CLP scheme"
177 ICLDO-B ICLDO-B relay (OC relay) element output used in "CLP scheme"
178 ICLDO-C ICLDO-C relay (OC relay) element output used in "CLP scheme"
179 OC-A_DIST OC-A relay for disturbance record
180 OC-B_DIST OC-B relay for disturbance record
181 OC-C_DIST OC-C relay for disturbance record
182 EF_DIST EF relay for disturbance record
183 SEF_DIST SEF relay for disturbance record
184 NOC_DIST NOC relay for disturbance record
185 NOC2_INST NOC2 relay element start
186
187
188
189
190
191 OV1-A OV1-A relay element output
192 OV1-B OV1-B relay element output
193 OV1-C OV1-C relay element output
194 OV1-A_INST OV1-A relay element start
195 OV1-B_INST OV1-B relay element start
196 OV1-C_INST OV1-C relay element start
197 OV2-A OV2-A relay element output
198 OV2-B OV2-B relay element output
199 OV2-C OV2-C relay element output
200
201 UV1-A UV1-A relay element output
202 UV1-B UV1-B relay element output
203 UV1-C UV1-C relay element output
204 UV1-A_INST UV1-A relay element start
205 UV1-B_INST UV1-B relay element start
206 UV1-C_INST UV1-C relay element start
207 UV2-A UV2-A relay element output
208 UV2-B UV2-B relay element output
209 UV2-C UV2-C relay element output
210
211 ZOV1 ZOV1 relay element output
212 ZOV1_INST ZOV1 relay element start
213 ZOV2 ZOV2 relay element output
214 NOV1 NOV1 relay element output
215 NOV1_INST NOV1 relay element start

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No. Signal Name Contents

216 NOV2 NOV2 relay element output
217 UVBLK UV blocked element operating
218 FRQ1 FRQ1 relay element output
219 FRQ2 FRQ2 relay element output
220 FRQ3 FRQ3 relay element output
221 FRQ4 FRQ4 relay element output
222 FRQBLK FRQ blocked element operating
223 ZOV2_INST ZOV2 relay element start
224 NOV2_INST NOV2 relay element start
225 DFRQ1 DFRQ1 relay element output
226 DFRQ2 DFRQ2 relay element output
227 DFRQ3 DFRQ3 relay element output
228 DFRQ4 DFRQ4 relay element output
229
230
231 EFCF EF element for CTF detection
232 ZOVCF ZOV element for CTF detection
233 UVVF-A UV-A element for VTF detection
234 UVVF-B UV-B element for VTF detection
235 UVVF-C UV-C element for VTF detection
236 UVVF-OR UV-OR element for VTF detection
237 OCDVF-A OCD-A element for VTF detection
238 OCDVF-B OCD-B element for VTF detection
239 OCDVF-C OCD-C element for VTF detection
240 OCDVF-OR OCD-OR element for VTF detection
241 ZOVVF ZOV element for VTF detection
242 EFVF EF element for VTF detection
243 OC_COORD-A OC-A coordination element
244 OC_COORD-B OC-B coordination element
245 OC_COORD-C OC-C coordination element
246 EF_COORD EF coordination element
247 SEF_COORD SEF coordination element
248 ZOV_DIST ZOV relay for disturbance record
249 NOV_DIST NOV relay for disturbance record
250 OV-A_DIST OV-A relay for disturbance record
251 OV-B_DIST OV-B relay for disturbance record
252 OV-C_DIST OV-C relay for disturbance record
253 UV-A_DIST UV-A relay for disturbance record
254 UV-B_DIST UV-B relay for disturbance record
255 UV-C_DIST UV-C relay for disturbance record
256
257
258
259
260
261 OC1_TRIP OC1 trip command
262 OC1-A_TRIP OC1 trip command (A Phase)
263 OC1-B_TRIP OC1 trip command (B Phase)
264 OC1-C_TRIP OC1 trip command (C Phase)
265 OC2_TRIP OC2 trip command
266 OC2-A_TRIP OC2 trip command (A Phase)
267 OC2-B_TRIP OC2 trip command (B Phase)
268 OC2-C_TRIP OC2 trip command (C Phase)
269 OC3_TRIP OC3 trip command
270 OC3-A_TRIP OC3 trip command (A Phase)

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No. Signal Name Contents

271 OC3-B_TRIP OC3 trip command (B Phase)
272 OC3-C_TRIP OC3 trip command (C Phase)
273 OC4_ALARM OC4 alarm command
274 OC4-A_ALARM OC4 alarm command (A Phase)
275 OC4-B_ALARM OC4 alarm command (B Phase)
276 OC4-C_ALARM OC4 alarm command (C Phase)
277
278
279
280
281 EF1_TRIP EF1 trip command
282 EF2_TRIP EF2 trip command
283 EF3_TRIP EF3 trip command
284 EF4_ALARM EF4 alarm command
285 EF1_CARRIER EF1 carrier command
286 EF2_CARRIER EF2 carrier command
287 EF3_CARRIER EF3 carrier command
288 EF4_CARRIER EF4 carrier command
289
290
291 SEF1-S1_TRIP SEF1 Stage1 trip command
292 SEF1-S2_TRIP SEF1 Stage2 trip command
293 SEF2_TRIP SEF2 trip command
294 SEF3_TRIP SEF3 trip command
295 SEF4_ALARM SEF4 alarm command
296
297
298
299
300
301 UC1_TRIP UC1 trip command
302 UC1-A_TRIP UC1 trip command (A Phase)
303 UC1-B_TRIP UC1 trip command (B Phase)
304 UC1-C_TRIP UC1 trip command (C Phase)
305 UC2_ALARM UC2 alarm command
306 UC2-A_ALARM UC2 alarm command (A Phase)
307 UC2-B_ALARM UC2 alarm command (B Phase)
308 UC2-C_ALARM UC2 alarm command (C Phase)
309 THM_ALARM Thermal alarm command
310 THM_TRIP Thermal trip command
311 NOC1_TRIP NOC1 trip command
312 NOC2_ALARM NOC2 alarm command
313 BCD_TRIP BCD trip command
314 CBF_RETRIP CBF retrip command
315 CBF_RETRIP-A CBF retrip command(A Phase)
316 CBF_RETRIP-B CBF retrip command(B Phase)
317 CBF_RETRIP-C CBF retrip command(C Phase)
318 CBF_TRIP CBF back trip command
319 CBF_TRIP-A CBF back trip command(A Phase)
320 CBF_TRIP-B CBF back trip command(B Phase)
321 CBF_TRIP-C CBF back trip command(C Phase)
322 CBF_OP-A CBF start signal (A phase)
323 CBF_OP-B CBF start signal (B phase)
324 CBF_OP-C CBF start signal (C phase)
325

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No. Signal Name Contents

326
327
328
329
330
331 OV1_TRIP OV1 trip command
332 OV1-A_TRIP OV1 trip command(Phase-A)
333 OV1-B_TRIP OV1 trip command(Phase-B)
334 OV1-C_TRIP OV1 trip command(Phase-C)
335 OV2_TRIP OV2 trip command
336 OV2-A_TRIP OV2 trip command(Phase-A)
337 OV2-B_TRIP OV2 trip command(Phase-B)
338 OV2-C_TRIP OV2 trip command(Phase-C)
339
340
341 UV1_TRIP UV1 trip command
342 UV1-A_TRIP UV1 trip command(Phase-A)
343 UV1-B_TRIP UV1 trip command(Phase-B)
344 UV1-C_TRIP UV1 trip command(Phase-C)
345 UV2_TRIP UV2 trip command
346 UV2-A_TRIP UV2 trip command(Phase-A)
347 UV2-B_TRIP UV2 trip command(Phase-B)
348 UV2-C_TRIP UV2 trip command(Phase-C)
349
350
351 ZOV1_TRIP ZOV1 trip command
352 ZOV2_ALARM ZOV2 alarm command
353 NOV1_TRIP NOV1 trip command
354 NOV2_ALARM NOV2 alarm command
355 FRQ_TRIP FRQ trip command
356 FRQ1_TRIP FRQ1 trip command
357 FRQ2_TRIP FRQ2 trip command
358 FRQ3_TRIP FRQ3 trip command
359 FRQ4_TRIP FRQ4 trip command
360 DFRQ1_TRIP DFRQ1 trip command
361 DFRQ2_TRIP DFRQ2 trip command
362 DFRQ3_TRIP DFRQ3 trip command
363 DFRQ4_TRIP DFRQ4 trip command
364
365
366
367
368
369
370
371 GEN.TRIP General trip command
372 GEN.TRIP-A General trip command (A Phase)
373 GEN.TRIP-B General trip command (B Phase)
374 GEN.TRIP-C General trip command (C Phase)
375 GEN.TRIP-N General trip command (N Phase)
376 CLP_STATE0 Cold Load Protection State
377 CLP_STATE1 Cold Load Protection State
378 CLP_STATE2 Cold Load Protection State
379 CLP_STATE3 Cold Load Protection State
380 GEN.ALARM General alarm command

 289 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

381 GEN.ALARM-A General alarm command (A Phase)
382 GEN.ALARM-B General alarm command (B Phase)
383 GEN.ALARM-C General alarm command (C Phase)
384 GEN.ALARM-N General alarm command (N Phase)
385 CTF CT failure detection
386 VTF VT failure detection
387 VTF1 VT failure detection 1
388 VTF2 VT failure detection 2
389 CB_CLOSE CB closed status
390 CB_OPEN CB opened status
391
392
393
394
395
396
397
398
399
400 ARC_BLK_OR Auto-Reclosing block
401 ARC_READY_T Auto-Reclosing ready condition
402 ARC_IN-PROG Auto-Reclosing in-progress conditon
403 ARC_SHOT Auto-Reclosing shot
404 ARC_SHOT1 Auto-Reclosing shot of number1
405 ARC_SHOT2 Auto-Reclosing shot of number2
406 ARC_SHOT3 Auto-Reclosing shot of number3
407 ARC_SHOT4 Auto-Reclosing shot of number4
408 ARC_SHOT5 Auto-Reclosing shot of number5
409 ARC_FT Auto-Reclosing failed (Final trip)
410 ARC_SUCCESS Auto-Reclosing succeed
411 ARC_COORD Auto-Reclosing coordination
412 VCHK Voltage check for ARC
413 VCHK_SYN ditto
414 VCHK_LBDL ditto
415 VCHK_DBLL ditto
416 VCHK_DBDL ditto
417
418
419
420
421 OCD_OPERATE 50D Operate
422 OCD-OR_PICKUP 50D-OR pickup
423 OCD-1_PICKUP 50D-1 pickup
424 OCD-2_PICKUP 50D-2 pickup
425 OCD-3_PICKUP 50D-3 pickup
426
427
428
429
430
431 OV3_TRIP OV3 trip command
432 OV3-A_TRIP OV3 trip command(Phase-A)
433 OV3-B_TRIP OV3 trip command(Phase-B)
434 OV3-C_TRIP OV3 trip command(Phase-C)
435 OV4_ALARM OV4 alarm command

 290 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

436 OV4-A_ALARM OV4 alarm command(Phase-A)
437 OV4-B_ALARM OV4 alarm command(Phase-B)
438 OV4-C_ALARM OV4 alarm command(Phase-C)
439 UV3_TRIP UV3 trip command
440 UV3-A_TRIP UV3 trip command(Phase-A)
441 UV3-B_TRIP UV3 trip command(Phase-B)
442 UV3-C_TRIP UV3 trip command(Phase-C)
443 UV4_ALARM UV4 alarm command
444 UV4-A_ALARM UV4 alarm command(Phase-A)
445 UV4-B_ALARM UV4 alarm command(Phase-B)
446 UV4-C_ALARM UV4 alarm command(Phase-C)
447 OC1-OR OC1 relay (3PHASE OR)
448 OC2-OR OC2 relay (3PHASE OR)
449 OC3-OR OC3 relay (3PHASE OR)
450 OC4-OR OC4 relay (3PHASE OR)
451 OC1_INST-OR OC1_INST relay (3PHASE OR)
452 OC2_INST-OR OC2_INST relay (3PHASE OR)
453 UC1-OR UC1 relay (3PHASE OR)
454 UC2-OR UC2 relay (3PHASE OR)
455 CBF-OR CBF relay (3PHASE OR)
456 OV1-OR OV1 relay (3PHASE OR)
457 OV2-OR OV2 relay (3PHASE OR)
458 OV3-OR OV3 relay (3PHASE OR)
459 OV4-OR OV4 relay (3PHASE OR)
460 OV1_INST-OR OV1_INST relay (3PHASE OR)
461 OV2_INST-OR OV2_INST relay (3PHASE OR)
462 UV1-OR UV1 relay (3PHASE OR)
463 UV2-OR UV2 relay (3PHASE OR)
464 UV3-OR UV3 relay (3PHASE OR)
465 UV4-OR UV4 relay (3PHASE OR)
466 UV1_INST-OR UV1_INST relay (3PHASE OR)
467 UV2_INST-OR UV2_INST relay (3PHASE OR)
468 ICD-OR ICD (3PHASE OR)
469
470
471 BO1_OP Binary output 1
472 BO2_OP Binary output 2
473 BO3_OP Binary output 3
474 BO4_OP Binary output 4
475 BO5_OP Binary output 5
476 BO6_OP Binary output 6
477 BO7_OP Binary output 7
478 BO8_OP Binary output 8
479 BO9_OP Binary output 9
480 BO10_OP Binary output 10
481 BO11_OP Binary output 11
482 BO12_OP Binary output 12
483 BO13_OP Binary output 13
484 BO14_OP Binary output 14
485 BO15_OP Binary output 15
486 BO16_OP Binary output 16
487
488
489
490

 291 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512 OV2-A_INST OV2-A relay element start
513 OV2-B_INST OV2-B relay element start
514 OV2-C_INST OV2-C relay element start
515 OV3-A OV3-A relay element output
516 OV3-B OV3-B relay element output
517 OV3-C OV3-C relay element output
518 OV4-A OV4-A relay element output
519 OV4-B OV4-B relay element output
520 OV4-C OV4-C relay element output
521
522 UV2-A_INST UV2-A relay element start
523 UV2-B_INST UV2-B relay element start
524 UV2-C_INST UV2-C relay element start
525 UV3-A UV3-A relay element output
526 UV3-B UV3-B relay element output
527 UV3-C UV3-C relay element output
528 UV4-A UV4-A relay element output
529 UV4-B UV4-B relay element output
530 UV4-C UV4-C relay element output
531
532 SYN Voltage check relay for ARC
533 OVL ditto
534 OVB ditto
535 UVL ditto
536 UVB ditto
537
538 OC1-A_RST OC1 relay element definite time reset
539 OC1-B_RST ditto
540 OC1-C_RST ditto
541 OC2-A_RST OC2 relay element definite time reset
542 OC2-B_RST ditto
543 OC2-C_RST ditto
544 EF1_RST EF1 relay element definite time reset
545 EF2_RST EF2 relay element definite time reset

 292 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

546 SEF1_RST SEF1 relay element definite time reset
547 SEF2_RST SEF2 relay element definite time reset
548 NOC1_RST NOC1 relay element definite time reset
549 NOC2_RST NOC2 relay element definite time reset
550 OV1-A_RST OV1 relay element definite time reset
551 OV1-B_RST ditto
552 OV1-C_RST ditto
553 OV2-A_RST OV2 relay element definite time reset
554 OV2-B_RST ditto
555 OV2-C_RST ditto
556 UV1-A_RST UV1 relay element definite time reset
557 UV1-B_RST ditto
558 UV1-C_RST ditto
559 UV2-A_RST UV2 relay element definite time reset
560 UV2-B_RST ditto
561 UV2-C_RST ditto
562 ZOV1_RST ZOV1 relay element definite time reset
563 ZOV2_RST ZOV2 relay element definite time reset
564 NOV1_RST NOV1 relay element definite time reset
565 NOV2_RST NOV2 relay element definite time reset
566 UVBLK-A UV blocked element operating
567 UVBLK-B ditto
568 UVBLK-C ditto
569
570
571
572
573
574
575
576 OC1-A_DEPRST OC1 relay element IDMT dependent time reset
577 OC1-B_DEPRST ditto
578 OC1-C_DEPRST ditto
579 EF1_DEPRST EF1 relay element IDMT dependent time reset
580 SEF1_DEPRST SEF1 relay element IDMT dependent time reset
581 NOC1_DEPRST NOC1 relay element IDMT dependent time reset
582 OC2-A_DEPRST OC2 relay element IDMT dependent time reset
583 OC2-B_DEPRST ditto
584 OC2-C_DEPRST ditto
585 EF2_DEPRST EF2 relay element IDMT dependent time reset
586 SEF2_DEPRST SEF2 relay element IDMT definite time reset
587 NOC2_DEPRST NOC2 relay element IDMT dependent time reset
588
589
590 RP1 RP1 relay element output
591 RP1_TRIP RP1 trip command
592 RP2 RP2 relay element output
593 RP2_ALARM RP2 alarm command
594 RQ1 RQ1 relay element output
595 RQ1_TRIP RQ1 trip command
596 RQ2 RQ2 relay element output
597 RQ2_ALARM RQ2 alarm command
598
599
600 MSTP_STATE Motor Stop State

 293 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

601 MSTRT_STATE Motor start-up state
602 MRUN_STATE Motor Run state
603 MOL_STATE Motor Overload state
604 MLOCK_STATE Motor Lock state
605 MEMR_STATE Motor Emergency start state
606 EXST Start Protection pick-up
607 EXST_TRIP Start Protection Trip
608 STRT Stalled motor protection pick-up
609 STRT_TRIP Stalled motor protection Trip
610 LKRT Locked rotor protection pick-up
611 LKRT_TRIP Locked rotor protection Trip
612 RSIH Restart Inhibit operate
613 RSIH_ALARM Restart Inhibit Alarm output
614 STPH Starts per hour operate
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655

 294 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710

 295 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765

 296 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

766
767
768 BI1_COMMAND Binary input signal BI1
769 BI2_COMMAND Binary input signal BI2
770 BI3_COMMAND Binary input signal BI3
771 BI4_COMMAND Binary input signal BI4
772 BI5_COMMAND Binary input signal BI5
773 BI6_COMMAND Binary input signal BI6
774 BI7_COMMAND Binary input signal BI7
775 BI8_COMMAND Binary input signal BI8
776 BI9_COMMAND Binary input signal BI9
777 BI10_COMMAND Binary input signal BI10
778 BI11_COMMAND Binary input signal BI11
779 BI12_COMMAND Binary input signal BI12
780 BI13_COMMAND Binary input signal BI13
781 BI14_COMMAND Binary input signal BI14
782 BI15_COMMAND Binary input signal BI15
783 BI16_COMMAND Binary input signal BI16
784 BI17_COMMAND Binary input signal BI17
785 BI18_COMMAND Binary input signal BI18
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800 E_FAULT_L1 A phase earth fault signal for IEC103
801 E_FAULT_L2 B phase earth fault signal for IEC103
802 E_FAULT_L3 C phase earth fault signal for IEC103
803 E_FAULT_FWD Earth fault forward signal for IEC103
804 E_FAULT_REV Earth fault reverse signal for IEC103
805 PICKUP_L1 A phase element pick-up for IEC103
806 PICKUP_L2 B phase element pick-up for IEC103
807 PICKUP_L3 C phase element pick-up for IEC103
808 PICKUP_N Earth fault element pick-up for IEC103
809
810
811
812
813
814
815
816 FAULT_FWD Forward fault for IEC103
817 FAULT_REV Reverse fault for IEC103
818 CBF_TP_RETP CBF trip or CBF retrip for IEC103
819 IDMT_OC_TRIP Inverse time OC trip for IEC103
820 DT_OC_TRIP Definite time OC trip for IEC103

 297 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

821 IDMT_EF_TRIP Inverse time earth fault OC trip for IEC103
822 DT_EF_TRIP Definite time earth fault OC trip for IEC103
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875

 298 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930

 299 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985

 300 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040 FAULT_PHA_A fault_phase_A

 301 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

1041 FAULT_PHA_B fault_phase_B
1042 FAULT_PHA_C fault_phase_C
1043 FAULT_PHA_N fault_phase_N
1044 FL_ERR fault location start up error
1045 FL_OB_FWD fault location out of bounds(forward)
1046 FL_OB_BACK fault location out of bounds(backward)
1047 FL_NC fault location not converged
1048 FL_COMPLETED fault location completed
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060 ETHER1_LINK_UP Ethernet port1 link-up status
1061 ETHER2_LINK_UP Etehrnet port2 link-up status
1062 IEC61850_RUN IEC61850 task running
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095

 302 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150

 303 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205

 304 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241 IEC_MDBLK monitor direction blocked
1242 IEC_TESTMODE IEC61870-5-103 testmode
1243 GROUP1_ACTIVE group1 active
1244 GROUP2_ACTIVE group2 active
1245
1246
1247
1248
1249
1250
1251 RLY_FAIL RELAY FAILURE
1252 RLY_OP_BLK RELAY OUTPUT BLOCK
1253 AMF_OFF SV BLOCK
1254
1255
1256
1257
1258 RELAY_FAIL-A
1259 IEC_RLY_FAIL-A
1260

 305 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

1261 TRIP-H Trip signal hold
1262 CT_ERR_UF CT error(unfiltered)
1263
1264 V0_ERR_UF V0 error(unfiltered)
1265 V2_ERR_UF V2 error(unfiltered)
1266 CT_ERR CT error
1267
1268 V0_ERR V0 error
1269 V2_ERR V2 error
1270 TCSV Trip circuit supervision failure
1271 CBSV Circuit breaker status monitoring failure
1272 TC_ALARM Trip counter alarm
1273 SGM_Iy_ALM ΣIY alarm
1274 OT_ALARM Operate time alarm
1275 CTF_ALARM CT failure detection
1276 VTF1_ALARM VT failure detection 1
1277 VTF2_ALARM VT failure detection 2
1278
1279 GEN_PICKUP General start/pick-up
1280
1281
1282
1283
1284 BI1_COM_UF Binary input signal BI1 (unfiltered)
1285 BI2_COM_UF Binary input signal BI2 (unfiltered)
1286 BI3_COM_UF Binary input signal BI3 (unfiltered)
1287 BI4_COM_UF Binary input signal BI4 (unfiltered)
1288 BI5_COM_UF Binary input signal BI5 (unfiltered)
1289 BI6_COM_UF Binary input signal BI6 (unfiltered)
1290 BI7_COM_UF Binary input signal BI7 (unfiltered)
1291 BI8_COM_UF Binary input signal BI8 (unfiltered)
1292 BI9_COM_UF Binary input signal BI9 (unfiltered)
1293 BI10_COM_UF Binary input signal BI10 (unfiltered)
1294 BI11_COM_UF Binary input signal BI11 (unfiltered)
1295 BI12_COM_UF Binary input signal BI12 (unfiltered)
1296 BI13_COM_UF Binary input signal BI13 (unfiltered)
1297 BI14_COM_UF Binary input signal BI14 (unfiltered)
1298 BI15_COM_UF Binary input signal BI15 (unfiltered)
1299 BI16_COM_UF Binary input signal BI16 (unfiltered)
1300 BI17_COM_UF Binary input signal BI17 (unfiltered)
1301 BI18_COM_UF Binary input signal BI18 (unfiltered)
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315

 306 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328 GOOSE_IN_Q1 Goose input quality #1
1329 GOOSE_IN_Q2 Goose input quality #2
1330 GOOSE_IN_Q3 Goose input quality #3
1331 GOOSE_IN_Q4 Goose input quality #4
1332 GOOSE_IN_Q5 Goose input quality #5
1333 GOOSE_IN_Q6 Goose input quality #6
1334 GOOSE_IN_Q7 Goose input quality #7
1335 GOOSE_IN_Q8 Goose input quality #8
1336 GOOSE_IN_Q9 Goose input quality #9
1337 GOOSE_IN_Q10 Goose input quality #10
1338 GOOSE_IN_Q11 Goose input quality #11
1339 GOOSE_IN_Q12 Goose input quality #12
1340 GOOSE_IN_Q13 Goose input quality #13
1341 GOOSE_IN_Q14 Goose input quality #14
1342 GOOSE_IN_Q15 Goose input quality #15
1343 GOOSE_IN_Q16 Goose input quality #16
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360 GOOSE_IN_1 Goose input #1
1361 GOOSE_IN_2 Goose input #2
1362 GOOSE_IN_3 Goose input #3
1363 GOOSE_IN_4 Goose input #4
1364 GOOSE_IN_5 Goose input #5
1365 GOOSE_IN_6 Goose input #6
1366 GOOSE_IN_7 Goose input #7
1367 GOOSE_IN_8 Goose input #8
1368 GOOSE_IN_9 Goose input #9
1369 GOOSE_IN_10 Goose input #10
1370 GOOSE_IN_11 Goose input #11

 307 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

1371 GOOSE_IN_12 Goose input #12
1372 GOOSE_IN_13 Goose input #13
1373 GOOSE_IN_14 Goose input #14
1374 GOOSE_IN_15 Goose input #15
1375 GOOSE_IN_16 Goose input #16
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401 LOCAL_OP_ACT local operation active
1402 REMOTE_OP_ACT remote operation active
1403 NORM_LED_ON IN-SERVICE LED ON
1404 ALM_LED_ON ALARM LED ON
1405 TRIP_LED_ON TRIP LED ON
1406 RYFAIL_LED_ON RELAY FAIL LED ON
1407
1408 PRG_LED_RESET Latched programmable LED RESET
1409 LED_RESET TRIP LED RESET
1410
1411 ARC_COM_ON IEC103 communication command
1412
1413 PROT_COM_ON IEC103 communication command
1414 PRG_LED1_ON PROGRAMMABLE LED1 ON
1415 PRG_LED2_ON PROGRAMMABLE LED2 ON
1416 PRG_LED3_ON PROGRAMMABLE LED3 ON
1417 PRG_LED4_ON PROGRAMMABLE LED4 ON
1418 PRG_LED5_ON PROGRAMMABLE LED5 ON
1419 PRG_LED6_ON PROGRAMMABLE LED6 ON
1420
1421
1422
1423
1424
1425

 308 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

1426
1427
1428
1429
1430 LCD_IND. VirLCD indication(Virtual LED) command
1431 LCD_IND1. LCD indication1(Virtual LED) command
1432 LCD_IND2. LCD indication2(Virtual LED) command
1433
1434
1435 F.Record_CLR Fault record clear
1436 E.Record_CLR Event record clear
1437 D.Record_CLR Disturbance record clear
1438 Data_Lost Data clear by BU-RAM memory monitoring error
1439 TP_COUNT_CLR Trip counter cleared
1440 Iy_COUNT_CLR SGM_Iy counter cleared
1441 AR_COUNT_CLR ARC Counter CLR
1442 DEMAND_CLR Demand cleared
1443 MOT.para_CLR Motor parameter clear
1444 STPH_Time_CLR Motor Start Time clear for STPH
1445 PLC_data_CHG PLC data change
1446 IEC103_data_CHG IEC-103 data change
1447 IEC850_data_CHG IEC-850 data change
1448 Sys.set_change System setting change
1449 Rly.set_change Relay setting change
1450 Grp.set_change Group setting change
1451
1452
1453
1454
1455
1456
1457 KEY-RESET RESET key status (2:pressed)
1458 KEY-ENTER ENTER key status (3:pressed)
1459 KEY-END END key status (4:pressed)
1460 KEY-CANCEL CANCEL key status (5:pressed)
1461
1462
1463
1464
1465
1466 RTC_err RTC stopped
1467
1468 GOOSE_stop GOOSE stopped
1469 PING_err Ping error
1470 PLC_err PLC stopeed
1471 61850_stop IEC61850 task stopped
1472 SUM_err Program ROM checksum error
1473
1474 SRAM_err SRAM memory monitoring error
1475 BU_RAM_err BU-RAM memory monitoring error
1476
1477 EEPROM_err EEPROM memory monitoring error
1478
1479 A/D_err A/D accuracy checking error
1480 CPU_err Program error

 309 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

1481
1482 Tsk_run_err Tsk stopped
1483 Sampling_err Sampling error
1484 DIO_err DIO card connection error
1485
1486
1487 ROM_data_err 8M Romdata error
1488 Comm_run_err Communication board stopped
1489 DPRAM_err DPRAM error
1490
1491
1492
1493 SET_err Setting error
1494
1495
1496
1497
1498
1499
1500 Set._LOCAL Setting LOCAl
1501 Set._REMOTE Setting REMOTE
1502 LOCAL_OP_CMD LOCAL OPEN COMMAND
1503 LOCAL_CL_CMD LOCAL CLOSE COMMAND
1504 RMT_OP_CMD_B REMOTE OPEN COMMAND(BI)
1505 RMT_CL_CMD_B REMOTE CLOSE COMMAND(BI)
1506 RMT_OP_CMD_C REMOTE OPEN COMMAND(COMM)
1507 RMT_CL_CMD_C REMOTE CLOSE COMMAND(COMM)
1508 CTRL_LOCK_B CONTROL LOCK(BI)
1509 CTRL_LOCK_C CONTROL LOCK(COMM)
1510 CB_OPEN_OP CB OPEN OPERATE
1511 CB_CLOSE_OP CB CLOSE OPERATE
1512
1513
1514
1515
1516
1517
1518
1519
1520
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530
1531
1532
1533
1534
1535

 310 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

1536 OC1_BLOCK OC trip block command
1537 OC2_BLOCK ditto
1538 OC3_BLOCK ditto
1539 OC4_BLOCK ditto
1540
1541
1542
1543
1544 EF1_BLOCK EF trip block command
1545 EF2_BLOCK ditto
1546 EF3_BLOCK ditto
1547 EF4_BLOCK ditto
1548 EF1_PERMIT Carrier protection permissive command
1549 EF2_PERMIT ditto
1550 EF3_PERMIT ditto
1551 EF4_PERMIT ditto
1552 SEF1_BLOCK SEF trip block command
1553 SEF2_BLOCK ditto
1554 SEF3_BLOCK ditto
1555 SEF4_BLOCK ditto
1556
1557
1558
1559
1560 NOC1_BLOCK NOC trip block command
1561 NOC2_BLOCK ditto
1562
1563
1564
1565
1566
1567
1568 UC1_BLOCK UC trip block command
1569 UC2_BLOCK ditto
1570 CBF_BLOCK CBF trip block command
1571
1572 THM_BLOCK THM trip block command
1573 THMA_BLOCK ditto
1574 BCD_BLOCK BCD trip block command
1575
1576 DFRQ1_BLOCK DFRQ trip block command
1577 DFRQ2_BLOCK ditto
1578 DFRQ3_BLOCK ditto
1579 DFRQ4_BLOCK ditto
1580
1581
1582
1583
1584 OV1_BLOCK OV trip block command
1585 OV2_BLOCK ditto
1586 OV3_BLOCK ditto
1587 OV4_BLOCK ditto
1588 UV1_BLOCK UV trip block command

 311 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

1589 UV2_BLOCK ditto
1590 UV3_BLOCK ditto
1591 UV4_BLOCK ditto
1592 ZOV1_BLOCK ZOV trip block command
1593 ZOV2_BLOCK ditto
1594
1595
1596 NOV1_BLOCK NOV trip block command
1597 NOV2_BLOCK ditto
1598
1599
1600 FRQ1_BLOCK FRQ trip block command
1601 FRQ2_BLOCK ditto
1602 FRQ3_BLOCK ditto
1603 FRQ4_BLOCK ditto
1604 ARC_BLOCK ARC scheme block command
1605 ARC_READY ARC ready command
1606 ARC_INIT ARC initiation command
1607 MANUAL_CLOSE Manual close command
1608 ARC_NO_ACT ARC not applied command
1609
1610
1611
1612 RP1_BLOCK RP1 trip block command
1613 RP2_BLOCK RP2 trip block command
1614 OCD_BLOCK 50D operate block command
1615
1616 CTF_BLOCK CTF block commamd
1617 VTF_BLOCK VTF block commamd
1618 RQ1_BLOCK RQ1 trip block command
1619 RQ2_BLOCK RQ2 trip block command
1620 EXT_CTF External CTF commamd
1621 EXT_VTF External VTF commamd
1622
1623
1624
1625
1626
1627
1628 EXT_TRIP-A External trip commamd (A Phase)
1629 EXT_TRIP-B External trip commamd (B Phase)
1630 EXT_TRIP-C External trip commamd (C Phase)
1631 EXT_TRIP External trip commamd
1632 TC_FAIL Trip circuit Fail Alarm commamd
1633 CB_N/O_CONT CB N/O contact commamd
1634 CB_N/C_CONT CB N/C contact commamd
1635
1636
1637
1638
1639 IND.RESET Indication reset command
1640
1641 EXST_BLOCK EXST bloclk state
1642 STRT_BLOCK SRTR block state
1643 LKRT_BLOCK LKRT block state

 312 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

1644 RSIH_BLOCK Restart Inhibit block state
1645 STPH_BLOCK STPH block state
1646 SPEED_SW Speed swich input
1647 Emergency start-up input
1648 ARC-S1_COND Auto-reclosing shot1 condition
1649 ARC-S2_COND 2
1650 ARC-S3_COND 3
1651 ARC-S4_COND 4
1652 ARC-S5_COND 5
1653
1654
1655
1656
1657
1658
1659
1660 CBF_INIT-A CBF initiation command (Phase A)
1661 CBF_INIT-B B
1662 CBF_INIT-C C
1663 CBF_INIT CBF initiation command
1664 TP_COUNT-A Trip counter count up command
1665 TP_COUNT-B ditto
1666 TP_COUNT-C ditto
1667 TP_COUNT ditto
1668
1669
1670
1671
1672 SGM_IY-A Sigma IY counter count up command
1673 SGM_IY-B ditto
1674 SGM_IY-C ditto
1675
1676 OT_ALARM-A Operating alarm start command
1677 OT_ALARM-B ditto
1678 OT_ALARM-C ditto
1679
1680 FRQ_S1_TRIP Frequency scheme trip command (Stage1)
1681 FRQ_S2_TRIP Frequency scheme trip command (Stage2)
1682 FRQ_S3_TRIP Frequency scheme trip command (Stage3)
1683 FRQ_S4_TRIP Frequency scheme trip command (Stage4)
1684
1685
1686
1687
1688
1689
1690
1691
1692
1693
1694
1695
1696 OC1_INST_TP OC1 instantly trip command
1697 OC2_INST_TP OC2 instantly trip command
1698 OC3_INST_TP OC3 instantly trip command

 313 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

1699 OC4_INST_TP OC4 instantly trip command
1700 EF1_INST_TP EF1 instantly trip command
1701 EF2_INST_TP EF2 instantly trip command
1702 EF3_INST_TP EF3 instantly trip command
1703 EF4_INST_TP EF4 instantly trip command
1704 SEF1_INST_TP SEF1 instantly trip command
1705 SEF2_INST_TP SEF2 instantly trip command
1706 SEF3_INST_TP SEF3 instantly trip command
1707 SEF4_INST_TP SEF4 instantly trip command
1708
1709
1710
1711
1712
1713
1714
1715
1716
1717
1718
1719
1720
1721
1722
1723
1724
1725
1726
1727
1728
1729
1730
1731
1732
1733
1734
1735
1736
1737
1738
1739
1740
1741
1742
1743
1744
1745
1746
1747
1748
1749
1750
1751
1752
1753

 314 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

1754
1755
1756
1757
1758
1759
1760
1761
1762
1763
1764
1765
1766
1767
1768
1769
1770
1771
1772
1773
1774
1775
1776
1777
1778
1779
1780
1781
1782
1783
1784
1785
1786
1787
1788
1789
1790
1791
1792
1793
1794
1795
1796
1797
1798
1799
1800
1801
1802
1803
1804
1805
1806
1807
1808

 315 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

1809
1810
1811
1812
1813
1814
1815
1816
1817
1818
1819
1820
1821
1822
1823
1824
1825
1826
1827
1828
1829
1830
1831
1832
1833
1834
1835
1836
1837
1838
1839
1840
1841
1842
1843
1844
1845
1846
1847
1848
1849
1850
1851
1852
1853
1854
1855
1856
1857
1858
1859
1860
1861
1862
1863

 316 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

1864
1865
1866
1867
1868
1869
1870
1871
1872
1873
1874
1875
1876
1877
1878
1879
1880
1881
1882
1883
1884
1885
1886
1887
1888
1889
1890
1891
1892
1893
1894
1895
1896
1897
1898
1899
1900
1901
1902
1903
1904
1905
1906
1907
1908
1909
1910
1911
1912
1913
1914
1915
1916
1917
1918

 317 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

1919
1920
1921
1922
1923
1924
1925
1926
1927
1928
1929
1930
1931
1932
1933
1934
1935
1936
1937
1938
1939
1940
1941
1942
1943
1944
1945
1946
1947
1948
1949
1950
1951
1952
1953
1954
1955
1956
1957
1958
1959
1960
1961
1962
1963
1964
1965
1966
1967
1968
1969
1970
1971
1972
1973

 318 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

1974
1975
1976
1977
1978
1979
1980
1981
1982
1983
1984
1985
1986
1987
1988
1989
1990
1991
1992
1993
1994
1995
1996
1997
1998
1999
2000
2001
2002
2003
2004
2005
2006
2007
2008
2009
2010
2011
2012
2013
2014
2015
2016
2017
2018
2019
2020
2021
2022
2023
2024
2025
2026
2027
2028

 319 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

2029
2030
2031
2032
2033
2034
2035
2036
2037
2038
2039
2040
2041
2042
2043
2044
2045
2046
2047
2048
2049
2050
2051
2052
2053
2054
2055
2056
2057
2058
2059
2060
2061
2062
2063
2064
2065
2066
2067
2068
2069
2070
2071
2072
2073
2074
2075
2076
2077
2078
2079
2080
2081
2082
2083

 320 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

2084
2085
2086
2087
2088
2089
2090
2091
2092
2093
2094
2095
2096
2097
2098
2099
2100
2101
2102
2103
2104
2105
2106
2107
2108
2109
2110
2111
2112
2113
2114
2115
2116
2117
2118
2119
2120
2121
2122
2123
2124
2125
2126
2127
2128
2129
2130
2131
2132
2133
2134
2135
2136
2137
2138

 321 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

2139
2140
2141
2142
2143
2144
2145
2146
2147
2148
2149
2150
2151
2152
2153
2154
2155
2156
2157
2158
2159
2160
2161
2162
2163
2164
2165
2166
2167
2168
2169
2170
2171
2172
2173
2174
2175
2176
2177
2178
2179
2180
2181
2182
2183
2184
2185
2186
2187
2188
2189
2190
2191
2192
2193

 322 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

2194
2195
2196
2197
2198
2199
2200
2201
2202
2203
2204
2205
2206
2207
2208
2209
2210
2211
2212
2213
2214
2215
2216
2217
2218
2219
2220
2221
2222
2223
2224
2225
2226
2227
2228
2229
2230
2231
2232
2233
2234
2235
2236
2237
2238
2239
2240
2241
2242
2243
2244
2245
2246
2247
2248

 323 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

2249
2250
2251
2252
2253
2254
2255
2256
2257
2258
2259
2260
2261
2262
2263
2264
2265
2266
2267
2268
2269
2270
2271
2272
2273
2274
2275
2276
2277
2278
2279
2280
2281
2282
2283
2284
2285
2286
2287
2288
2289
2290
2291
2292
2293
2294
2295
2296
2297
2298
2299
2300
2301
2302
2303

 324 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

2304 CONTROL_LOCK_BI CONTROL LOCK(BI)
2305 REMOTE_OP_CMD REMOTE OPEN COMMAND
2306 REMOTE_CL_CMD REMOTE CLOSE COMMAND
2307
2308
2309
2310
2311
2312
2313
2314
2315
2316
2317
2318
2319
2320
2321
2322
2323
2324
2325
2326
2327
2328
2329
2330
2331
2332
2333
2334
2335
2336
2337
2338
2339
2340
2341
2342
2343
2344
2345
2346
2347
2348
2349
2350
2351
2352
2353
2354
2355
2356
2357
2358

 325 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

2359
2360
2361
2362
2363
2364
2365
2366
2367
2368
2369
2370
2371
2372
2373
2374
2375
2376
2377
2378
2379
2380
2381
2382
2383
2384
2385
2386
2387
2388
2389
2390
2391
2392
2393
2394
2395
2396
2397
2398
2399
2400
2401
2402
2403
2404
2405
2406
2407
2408
2409
2410
2411
2412
2413

 326 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

2414
2415
2416
2417
2418
2419
2420
2421
2422
2423
2424
2425
2426
2427
2428
2429
2430
2431
2432
2433
2434
2435
2436
2437
2438
2439
2440
2441
2442
2443
2444
2445
2446
2447
2448
2449
2450
2451
2452
2453
2454
2455
2456
2457
2458
2459
2460
2461
2462
2463
2464
2465
2466
2467
2468

 327 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

2469
2470
2471
2472
2473
2474
2475
2476
2477
2478
2479
2480
2481
2482
2483
2484
2485
2486
2487
2488
2489
2490
2491
2492
2493
2494
2495
2496
2497
2498
2499
2500
2501
2502
2503
2504
2505
2506
2507
2508
2509
2510
2511
2512
2513
2514
2515
2516
2517
2518
2519
2520
2521
2522
2523

 328 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

2524
2525
2526
2527
2528
2529
2530
2531
2532
2533
2534
2535
2536
2537
2538
2539
2540
2541
2542
2543
2544
2545
2546
2547
2548
2549
2550
2551
2552
2553
2554
2555
2556
2557
2558
2559
2560 DISP.ALARM1 Indicate the alarm display
2561 DISP.ALARM2 ditto
2562 DISP.ALARM3 ditto
2563 DISP.ALARM4 ditto
2564
2565
2566
2567
2568
2569
2570
2571
2572
2573
2574
2575
2576 SYNC_CLOCK Synchronise clock command
2577
2578

 329 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

2579
2580
2581
2582
2583
2584
2585
2586
2587
2588
2589
2590
2591
2592
2593
2594
2595
2596
2597
2598
2599
2600
2601
2602
2603
2604
2605
2606
2607
2608
2609
2610 ALARM_LED_SET Alarm LED set
2611
2612
2613
2614
2615
2616
2617
2618
2619
2620
2621
2622
2623
2624 F.RECORD1 Fault record stored command 1
2625 F.RECORD2 2
2626 F.RECORD3 3
2627 F.RECORD4 4
2628
2629
2630
2631
2632 D.RECORD1 Disturbance record stored command 1
2633 D.RECORD2 2

 330 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

2634 D.RECORD3 3
2635 D.RECORD4 4
2636
2637
2638
2639
2640 SET.GROUP1 Active setting group changed command (Change to group1)
2641 SET.GROUP2 2
2642
2643
2644
2645
2646
2647
2648
2649
2650
2651
2652
2653
2654
2655
2656 CON_TPMD1 User configurable trip mode in fault record
2657 CON_TPMD2 ditto
2658 CON_TPMD3 ditto
2659 CON_TPMD4 ditto
2660 CON_TPMD5 ditto
2661 CON_TPMD6 ditto
2662 CON_TPMD7 ditto
2663 CON_TPMD8 ditto
2664
2665
2666
2667
2668
2669
2670
2671
2672
2673
2674
2675
2676
2677
2678
2679
2680
2681
2682
2683
2684 ARC_COM_RECV Auto-recloser inactivate command received
2685
2686 PROT_COM_RECV Protection inactivate command received
2687
2688 TPLED_RST_RECV TRIP LED reset command received

 331 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

2689
2690 OP_CMD_RECV CB open command received
2691 CL_CMD_RECV CB close command received
2692 LOCK_CMD_RECV Control lock command received
2693
2694
2695
2696
2697
2698
2699
2700
2701
2702
2703
2704
2705
2706
2707
2708
2709
2710
2711
2712
2713
2714
2715
2716
2717
2718
2719
2720
2721
2722
2723
2724
2725
2726
2727
2728
2729
2730
2731
2732
2733
2734
2735
2736
2737
2738
2739
2740
2741
2742
2743

 332 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

2744
2745
2746
2747
2748
2749
2750
2751
2752
2753
2754
2755
2756
2757
2758
2759
2760
2761
2762
2763
2764
2765
2766
2767
2768
2769
2770
2771
2772
2773
2774
2775
2776
2777
2778
2779
2780
2781
2782
2783
2784
2785
2786
2787
2788
2789
2790
2791
2792
2793
2794
2795
2796
2797
2798

 333 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

2799
2800
2801
2802
2803
2804
2805
2806
2807
2808
2809
2810
2811
2812
2813
2814
2815
2816 TEMP001
2817 TEMP002
2818 TEMP003
2819 TEMP004
2820 TEMP005
2821 TEMP006
2822 TEMP007
2823 TEMP008
2824 TEMP009
2825 TEMP010
2826 TEMP011
2827 TEMP012
2828 TEMP013
2829 TEMP014
2830 TEMP015
2831 TEMP016
2832 TEMP017
2833 TEMP018
2834 TEMP019
2835 TEMP020
2836 TEMP021
2837 TEMP022
2838 TEMP023
2839 TEMP024
2840 TEMP025
2841 TEMP026
2842 TEMP027
2843 TEMP028
2844 TEMP029
2845 TEMP030
2846 TEMP031
2847 TEMP032
2848 TEMP033
2849 TEMP034
2850 TEMP035
2851 TEMP036
2852 TEMP037
2853 TEMP038

 334 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

2854 TEMP039
2855 TEMP040
2856 TEMP041
2857 TEMP042
2858 TEMP043
2859 TEMP044
2860 TEMP045
2861 TEMP046
2862 TEMP047
2863 TEMP048
2864 TEMP049
2865 TEMP050
2866 TEMP051
2867 TEMP052
2868 TEMP053
2869 TEMP054
2870 TEMP055
2871 TEMP056
2872 TEMP057
2873 TEMP058
2874 TEMP059
2875 TEMP060
2876 TEMP061
2877 TEMP062
2878 TEMP063
2879 TEMP064
2880 TEMP065
2881 TEMP066
2882 TEMP067
2883 TEMP068
2884 TEMP069
2885 TEMP070
2886 TEMP071
2887 TEMP072
2888 TEMP073
2889 TEMP074
2890 TEMP075
2891 TEMP076
2892 TEMP077
2893 TEMP078
2894 TEMP079
2895 TEMP080
2896 TEMP081
2897 TEMP082
2898 TEMP083
2899 TEMP084
2900 TEMP085
2901 TEMP086
2902 TEMP087
2903 TEMP088
2904 TEMP089
2905 TEMP090
2906 TEMP091
2907 TEMP092
2908 TEMP093

 335 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

2909 TEMP094
2910 TEMP095
2911 TEMP096
2912 TEMP097
2913 TEMP098
2914 TEMP099
2915 TEMP100
2916 TEMP101
2917 TEMP102
2918 TEMP103
2919 TEMP104
2920 TEMP105
2921 TEMP106
2922 TEMP107
2923 TEMP108
2924 TEMP109
2925 TEMP110
2926 TEMP111
2927 TEMP112
2928 TEMP113
2929 TEMP114
2930 TEMP115
2931 TEMP116
2932 TEMP117
2933 TEMP118
2934 TEMP119
2935 TEMP120
2936 TEMP121
2937 TEMP122
2938 TEMP123
2939 TEMP124
2940 TEMP125
2941 TEMP126
2942 TEMP127
2943 TEMP128
2944 TEMP129
2945 TEMP130
2946 TEMP131
2947 TEMP132
2948 TEMP133
2949 TEMP134
2950 TEMP135
2951 TEMP136
2952 TEMP137
2953 TEMP138
2954 TEMP139
2955 TEMP140
2956 TEMP141
2957 TEMP142
2958 TEMP143
2959 TEMP144
2960 TEMP145
2961 TEMP146
2962 TEMP147
2963 TEMP148

 336 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

2964 TEMP149
2965 TEMP150
2966 TEMP151
2967 TEMP152
2968 TEMP153
2969 TEMP154
2970 TEMP155
2971 TEMP156
2972 TEMP157
2973 TEMP158
2974 TEMP159
2975 TEMP160
2976 TEMP161
2977 TEMP162
2978 TEMP163
2979 TEMP164
2980 TEMP165
2981 TEMP166
2982 TEMP167
2983 TEMP168
2984 TEMP169
2985 TEMP170
2986 TEMP171
2987 TEMP172
2988 TEMP173
2989 TEMP174
2990 TEMP175
2991 TEMP176
2992 TEMP177
2993 TEMP178
2994 TEMP179
2995 TEMP180
2996 TEMP181
2997 TEMP182
2998 TEMP183
2999 TEMP184
3000 TEMP185
3001 TEMP186
3002 TEMP187
3003 TEMP188
3004 TEMP189
3005 TEMP190
3006 TEMP191
3007 TEMP192
3008 TEMP193
3009 TEMP194
3010 TEMP195
3011 TEMP196
3012 TEMP197
3013 TEMP198
3014 TEMP199
3015 TEMP200
3016 TEMP201
3017 TEMP202
3018 TEMP203

 337 
 6 F 2 T 0 1 7 7

No. Signal Name Contents

3019 TEMP204
3020 TEMP205
3021 TEMP206
3022 TEMP207
3023 TEMP208
3024 TEMP209
3025 TEMP210
3026 TEMP211
3027 TEMP212
3028 TEMP213
3029 TEMP214
3030 TEMP215
3031 TEMP216
3032 TEMP217
3033 TEMP218
3034 TEMP219
3035 TEMP220
3036 TEMP221
3037 TEMP222
3038 TEMP223
3039 TEMP224
3040 TEMP225
3041 TEMP226
3042 TEMP227
3043 TEMP228
3044 TEMP229
3045 TEMP230
3046 TEMP231
3047 TEMP232
3048 TEMP233
3049 TEMP234
3050 TEMP235
3051 TEMP236
3052 TEMP237
3053 TEMP238
3054 TEMP239
3055 TEMP240
3056 TEMP241
3057 TEMP242
3058 TEMP243
3059 TEMP244
3060 TEMP245
3061 TEMP246
3062 TEMP247
3063 TEMP248
3064 TEMP249
3065 TEMP250
3066 TEMP251
3067 TEMP252
3068 TEMP253
3069 TEMP254
3070 TEMP255
3071 TEMP256

 338 
 6 F 2 T 0 1 7 7

Appendix D
Binary Output Default Setting list

 339 
 6 F 2 T 0 1 7 7

Relay BO Terminal Signal Contents Setting

Model No. No. Name
Signal No. Logic Reset
(OR:0, (Inst:0, Del:1
AND:1) DW:2 Latch:3)
TB5:
GRE140 BO1 1-2 NON Off (Link to CB Close SW) 0 0 1
-400 BO2 3-4 GENERAL TRIP Relay trip (General) 371 0 1
(Link to CB Open SW)
BO3 5-6 GENERAL ALARM Relay alarm (General) 380 0 1
BO4 7-8 UVB Undervoltage detection 536 0 1
R.F. 9 - 10 Relay fail

TB5:
GRE140 BO1 1-2 NON Off (Link to CB Close SW) 0 0 1
-401 BO2 3-4 GENERAL TRIP Relay trip (General) 141 0 1
(Link to CB Open SW)
BO3 5-6 GENERAL ALARM Relay alarm (General) 150 0 1
BO4 7-8 UVB Undervoltage detection 0 0 1
R.F. 9 - 10 Relay fail

TB1:
BO5 1–2 GENERAL TRIP Relay trip (General) 141 0 1
BO6 3–4 GENERAL ALARM Relay alarm (General) 150 0 1
BO7 5–6 NON Off 0 0 1
BO8 7–8 NON Off 0 0 1
BO9 9 – 10 NON Off 0 0 1
BO10 11 – 12 NON Off 0 0 1

TB2:
GRE140 BO1 1-2 NON Off (Link to CB Close SW) 0 0 1
-402 BO2 3-4 GENERAL TRIP Relay trip (General) 141 0 1
(Link to CB Open SW)
BO3 5-6 GENERAL ALARM Relay alarm (General) 150 0 1
BO4 7-8 NON Off 0 0 1
R.F. 9 - 10 Relay fail

TB1:
BO5 1–2 GENERAL TRIP Relay trip (General) 141 0 1
BO6 3–4 GENERAL ALARM Relay alarm (General) 150 0 1
BO7 5–6 NON Off 0 0 1
BO8 7–8 NON Off 0 0 1
BO9 9 – 10 NON Off 0 0 1
BO10 11 – 12 NON Off 0 0 1

TB3;
BO11 1–2 NON Off 0 0 1
BO12 3–4 NON Off 0 0 1
BO13 5–6 NON Off 0 0 1
BO14 7–8 NON Off 0 0 1
BO15 9 – 10 GENERAL ALARM Relay alarm (General) 150 0 1
BO16 11 – 12 GENERAL TRIP Relay trip (General) 141 0 1

 340 
 6 F 2 T 0 1 7 7

Relay BO Terminal Signal Contents Setting

Model No. No. Name
Signal No. Logic Reset
(OR:0, (Inst:0, Del:1
AND:1) DW:2 Latch:3)
TB5:
GRE140 BO1 1-2 NON Off (Link to CB Close SW) 0 0 1
-420 BO2 3-4 GENERAL TRIP Relay trip (General) 371 0 1
(Link to CB Open SW)
BO3 5-6 GENERAL ALARM Relay alarm (General) 380 0 1
BO4 7-8 UVB Undervoltage detection 536 0 1
R.F. 9 - 10 Relay fail

TB5:
GRE140 BO1 1-2 NON Off (Link to CB Close SW) 0 0 1
-421 BO2 3-4 GENERAL TRIP Relay trip (General) 141 0 1
(Link to CB Open SW)
BO3 5-6 GENERAL ALARM Relay alarm (General) 150 0 1
BO4 7-8 UVB Undervoltage detection 0 0 1
R.F. 9 - 10 Relay fail

TB1:
BO5 1–2 GENERAL TRIP Relay trip (General) 141 0 1
BO6 3–4 GENERAL ALARM Relay alarm (General) 150 0 1
BO7 5–6 NON Off 0 0 1
BO8 7–8 NON Off 0 0 1
BO9 9 – 10 NON Off 0 0 1
BO10 11 – 12 NON Off 0 0 1

TB2:
GRE140 BO1 1-2 NON Off (Link to CB Close SW) 0 0 1
-422 BO2 3-4 GENERAL TRIP Relay trip (General) 141 0 1
(Link to CB Open SW)
BO3 5-6 GENERAL ALARM Relay alarm (General) 150 0 1
BO4 7-8 NON Off 0 0 1
R.F. 9 - 10 Relay fail

TB1:
BO5 1–2 GENERAL TRIP Relay trip (General) 141 0 1
BO6 3–4 GENERAL ALARM Relay alarm (General) 150 0 1
BO7 5–6 NON Off 0 0 1
BO8 7–8 NON Off 0 0 1
BO9 9 – 10 NON Off 0 0 1
BO10 11 – 12 NON Off 0 0 1

TB3;
BO11 1–2 NON Off 0 0 1
BO12 3–4 NON Off 0 0 1
BO13 5–6 NON Off 0 0 1
BO14 7–8 NON Off 0 0 1
BO15 9 – 10 GENERAL ALARM Relay alarm (General) 150 0 1
BO16 11 – 12 GENERAL TRIP Relay trip (General) 141 0 1

 341 
 6 F 2 T 0 1 7 7

Appendix E
Details of Relay Menu and
LCD & Keypad Operation

 342 
 6 F 2 T 0 1 7 7

MAIN MENU
Record
Status
Set. (view)
Set. (change)
Control
Test

/1 Record
Fault
Event
Disturbance
Counter

/2 Fault /3 Fault /4 Fault #1

View record 16/Jul/2011
Clear #1 16/Jul/2011 18:13:57.031
18:13:57.031 OCT1
Refer to Section
4.2.3.1. Phase ABC
Clear records? ***.**km(**％)
END=Y CANCEL=N

/2 Event /3 Event
View record
Clear 16/Jul/2011 480
OC1-A trip On
Refer to Section
4.2.3.2.
Clear records?
END=Y CANCEL=N

/2 Disturbance /3 Disturbance
View record
Clear #1 16/Jul/2011
18:13:57.401
Refer to Section
4.2.3.3.
Clear records?
END=Y CANCEL=N

a-1 b-1

 343 
 6 F 2 T 0 1 7 7

a-1 b-1

/2 Counter /3 Counter
View record Trips *****
Clear Trips TripsA *****
Clear Trips A TripsB *****
Clear Trips B TripsC *****
Clear Trips C Σ I^yA ******E6
Clear Σ I^yA Σ I^yB ******E6
Clear Σ I^yB Σ I^yC ******E6
Clear Σ I^yC ARCs ******
Clear ARCs
Refer to Section Clear Trips?
4.2.3.4. END=Y CANCEL=N

Clear Trips A?
END=Y CANCEL=N

Clear Trips B?
END=Y CANCEL=N

Clear Trips C?
END=Y CANCEL=N

Clear Σ I^yA?
END=Y CANCEL=N

Clear Σ I^yB?
END=Y CANCEL=N

Clear Σ I^yC?
END=Y CANCEL=N

Clear ARCs?
END=Y CANCEL=N

a-1

 344 
 6 F 2 T 0 1 7 7
a-1

/1 Status /2 Metering /3 Metering

Metering Metering la **.** kA
Binary I/O Demand
Relay element Direction /3 Demand
Time sync. lamax **.** kA
Clock adjust. /2 Binary I/O
LCD contrast IP [0000 00 ] /3 Direction
Motor para. la Forward
/2 Ry element
Refer to Section 4.2.4.
OC#1[000000000]

/2 Time sync.
*BI: Act.

/2 12/Nov/2011
22:56:19 [L]

/2 LCD contrast
/1 Set. (view)
Version
Description /2 Motor para /3 View para.
Comms View para. Time
Record Set para.
Status Clear para. /3 Set para.
Time
Protection
Binary I/P
Binary O/P /3 Clear para
Refer to Section 4.2.5 END=Y CANCEL=N
LED

/2 Version GRE140-402A-10
Relay type -10
Software
Main Software
GSP***-04-*
/2 Description
Plant name ∗∗∗∗∗∗∗∗∗∗∗∗∗∗
Description ∗∗∗∗∗∗
Alarm1 Text
Alarm2 Text
/2 Comms /3 Addr./param.
Addr./param. Modbus 2
Switch
/3 Switch
RS485BR 1
a-1, b-1

 345 
 6 F 2 T 0 1 7 7
a-1 b-1

/2 Record /3 Fault
Fault
Disturbance FL 0
Counter Off/On

/3 Disturbance /4 Time/starter
Time/starter Time1 2.0s
Scheme sw
/4 Scheme sw
TRIP 0

/3 Counter /4 Scheme sw
Scheme sw TCSPEN
Alarm set
/4 Alarm set
TCALM 10000

/2 Status /3 Metering
Metering Display 1
Time sync.
Time zone /3 Time sync.
Time sync 0

/2 Act. gp. =* /3 Time zone This setting is displayed if submodel of

Common GMT +9hrs communication type is A - D.

Group1
Group2 /3 Common
APPLCT 1
Off/3P/2P/1P
/3 Common APPLVT 1
APPLCT 1 Off/3PN
APPLVE 1
/3 Group1 Off/3PN
Parameter APPLVS 1
Trip Off/On
ARC MOTEN 1
Off/On
.....

a-1 b-1 c-1 d-1

 346 
 6 F 2 T 0 1 7 7
a-1 b-1 c-1 d-1

/4 Parameter ∗∗∗∗∗∗∗∗∗∗∗∗∗∗
Line name ∗∗∗∗∗∗
CT/VT ratio
Fault loc. /5 CT/VT ratio
OCCT 400

/5 Fault Loc.
X1 10.0 Ω

/6 Application
MOC1 0
/4 Trip
Scheme sw /6 OC prot.
Prot.element OC1EN 1

/5 Scheme sw /6 EF prot.
Application EF1EN 1
OC prot.
EF prot. /6 SEF prot.
SEF prot. SEF1EN 1
Motor prot.
Misc. prot.
This setting is displayed in case of model
OV prot. 700 or model 720 (motor protection).
UV prot.
ZOV prot. /6 Misc prot.
NOV prot. NC1EN 1

/6 OV prot.
OV1EN 1

/6 UV prot.
UV1EN 1

/6 ZOV prot.
ZOV1EN 1

/6 NOV prot.
NOV1EN 1

/6 FRQ prot.
FRQ1EN 1

a-1 b-1 C-1 d-1 e-1

 347 
 6 F 2 T 0 1 7 7
a-1 b-1 c-1 d-1 e-1
/6 OC prot.
OCθ −45°
/5 Prot.element /6 EF prot.
OC prot. EFθ −45°
EF prot.
SEF prot. /6 SEF prot.
Motor prot. SEθ +90°
Misc. prot. /6 Motor prot. This setting is displayed in case of model
OV prot. IMOT 1.00A 700 or model 720 (motor protection).
UV prot.
ZOV prot. /6 Misc.prot.
NOV prot. UC1 0.40A
FRQ prot.
/6 OV prot.
CTF/VTF
OV1 120.0V

/6 UV prot.
UV1 60.0V

/6 ZOV prot.
ZOV1 20.0V

/6 NOV prot.
NOV1 20.0V

/6 FRQ prot.
FRQ1 −1.00Hz
/6 CTF/VTF
/4 ARC EFF 0.20A
Scheme sw
ARC element

/5 Scheme SW /6 General
General ARCEN 1
OC prot.
/6 OC prot.
EF prot. OC1-INIT 0
SEF prot.
Misc prot. /6 EF prot.
EF1-INIT 0
/5 ARC element
TRDY 60.0s /6 SEF prot.
SEF1-INIT 0

/6 Misc prot.
EXT-INIT 0
a-1 b-1 C-1

 348 
 6 F 2 T 0 1 7 7
a-1 b-1 c-1

/3 Group2
Parameter

/2 Binary I/P /3 BI Status

BI Status BITHR1 0
BI1
BI2 /3 BI1 /4 Timers
Timer BI1PUD 0.00s
Functions
/4 Functions
BI1SNS 0
/2 Binary O/P
BO1 AND, INS
∗∗∗∗, ∗∗∗∗, ∗∗∗∗
BO2 AND, INS
∗∗∗∗, ∗∗∗∗, ∗∗∗∗

BO16 OR, L
∗∗∗∗, ∗∗∗∗, ∗∗∗∗
TBO1 0.20s

TBO16 0.20s

/2 LED /3 LED
LED LED1 OR, I R
Virtual LED
/3 Virtual LED /4 LED1
IND1 BIT1 I,O
IND2
/4 LED2
/2 Control BIT1 I,O
Control 0
Interlock

/2 Frequency

a-1 b-1

 349 
 6 F 2 T 0 1 7 7
a-1

/1 Set.(change)
: Password trap
Password
Description Password [_ ]
Comms 1234567890←
Record : Confirmation trap

Status Change settings?

Protection ENTER=Y CANCEL=N
Binary I/P
Binary O/P
LED
Control
Frequency

Set.(change) Set.(change)
Input [_ ] Retype [_ ]
1234567890← 1234567890←
Refer to Section 4.2.6.2.

/2 Description _
Plant name ABCDEFG
Description
Alarm1 Text _
: ABCDEFG
Alarm4 Text
/3 Addr./param.
/2 Comms
Addr./param.
/3 Switch
Switch
Refer to Section
4.2.6.4.

/2 Record /3 Fault
Fault FL
Disturbance
Counter /3 Disturbance /4 Time/starter
Time/starter
Refer to Section
4.2.6.5. Scheme sw
/4 Scheme sw

/3 Counter /4 Scheme sw
Scheme sw
Alarm set
/4 Alarm set
a-1 b-2

 350 
 6 F 2 T 0 1 7 7
a-1 b-2

/2 Status /3 Metering
Metering
Time sync.
Time zone /3 Time sync.
Refer to Section 4.2.6.6.

/3 Time zone This setting is displayed if submodel of

communication type is A - D.

/2 Protection
Change act. gp.
Change set.
Refer to Section
Copy gp. 4.2.6.7.

/3 Change act.
gp.

/3 Act gp.=1
Common /3 Common
Group1 APPLCT
Group2 APPLCT 1
Off/3P/2P/1P
APPLVT 1
Off/3PN
/4 Common APPLVE 1
Off/3PN
APPLVS 1
/4 Group1 Off/On
Parameter MOTEN 1 This setting is displayed in case of model
Off/On 700 or model 720series (motor
Trip protection).
.....

ARC

/5 Parameter _
Line name ABCDEFG
CT/VT ratio
Fault loc. /6 CT/VT ratio

/6 Fault Loc.

a-1 b-2 c-2 d-2 e-2

 351 
 6 F 2 T 0 1 7 7
a-1 b-2 c-2 d-2 e-2

/5 Trip
Scheme sw
Prot.element

/6 Scheme sw /7 Application
Application
OC prot.
EF prot. /7 OC prot.
SEF prot.
Motor prot.
Misc prot. /7 EF prot.
OV prot.
UV prot.
ZOV prot. /7 SEF prot.
NOV prot.
FRQ prot.
/7 Motor prot. This setting is displayed in case of model
700 or model 720series (motor
protection).

/7 Misc. prot.

/7 OV prot.

/7 UV prot.

/7 ZOV prot.

/7 NOV prot.

/7 FRQ prot.

a-1, b-2 c-2 d-2 e-2 f-2

 352 
 6 F 2 T 0 1 7 7

a-1 b-2 c-2 d-2 e-2 f-2

/7 OC prot.

/6 Prot.element /7 EF prot.
OC prot.
EF prot.
SEF prot. /7 SEF prot.
Motor prot.
Misc prot. /7 Motor prot.
OV prot. This setting is displayed in case of model
700 or model 720series (motor
UV prot. protection).

ZOV prot. /7 Misc prot.

NOV prot.
FRQ prot.
/7 OV prot.

/7 UV prot.

/7 ZOV prot.

/7 NOV prot.

/7 FRQ prot.

/7 CTF/VTF
/5 ARC
Scheme sw
ARC element

/6 Scheme SW /7 General
General
OC prot.
/7 OC prot.
EF prot.
SEF prot.
Misc prot. /7 EF prot.

/6 ARC element
/7 SEF prot.

/7 Misc prot.
a-1, b-2 c-2 e-2

 353 
 6 F 2 T 0 1 7 7
a-1 b-2 c-2 d-2

/4 Group2
Parameter

/3 Copy A to B
A _
B _

/2 Binary I/P /3 BI1 /4 Timers

BI1 Timers
BI2 Functions
BI3 /4 Functions
BI4

/3 BI*
BI17 Timers
BI18 Functions
Refer to Section 4.2.6.8.

/2 Binary O/P /3 BO1 /4 Logic/Reset

BO1 Logic/Reset
BO2 Functions
/4 Functions
/3 BO16
BO15 Logic/Reset
BO16 Functions
Refer to Section
4.2.6.9.

/2 LED
LED
Refer to Section
Virtual LED 4.2.6.10.

/3 LED /4 LED1 /5 Logic/Reset

LED1 Logic/Reset
Functions
/5 Functions
LED Color
LED6
CB CLOSED /4 LED6
Logic/Reset /5 LED Color

/4 CB CLOSED /5 LED Color

a-1 b-2 c-3
LED Color

 354 
 6 F 2 T 0 1 7 7
a-1 b-2 c-3

/3 Virtual LED /4 IND1 /5 Reset

IND1 Reset
IND2 Functions
/5 Functions
/2 Control /4 IND2
Control 1 Reset
Disable/Enable Functions
Interlock 0
Disable/Enable

/2 Frequency
Frequency 0
50Hz/60Hz

/1 Control Control Control

Password(Ctrl) Input [_ ] Retype [_ ]
Local/Remote 1234567890← 1234567890←
CB close/open

/1 Test Test Test

Password(Test) Input [_ ] Retype [_ ]
Switch 1234567890← 1234567890←
Binary O/P
Refer to Section 4.2.7. /2 Switch
A.M.F 1
: Password trap

Password [_ ] /2 Binary O/P Operate?

1234567890← ENTER=Y CANCEL=N

 355 
 6 F 2 T 0 1 7 7

Appendix F
Case Outline

 356 
 6 F 2 T 0 1 7 7

Case Outline

 357 
 6 F 2 T 0 1 7 7

Appendix G
Typical External Connections

 358 
 6 F 2 T 0 1 7 7

GRE140 – 400A

A OUTPUT CONACTS
SIGNAL LIST (DEFAULT)
B Control
BO1 OFF(CB CLOSE)
C BO2 GENERAL TRIP P
Power
BO3 GENERAL ALARM
BO4 UVB

GRE140-400A TB5
CB CLOSE CB CLOSE BO1
TB4 [APPL Vs] = “Off”
SW
1
2
1 ** Ia
CB OPEN CB OPEN/TRIP BO2
2 SW
3
3 ** Ib 4
4 AUXILIARY BO3
TRIP
COIL
CLOSE
COIL
5 ** Ic 5 N
*
6 6
7 ** Ie AUXILIARY BO4
8 *
7
9 8
10 Vs
Relay fail R.F.
11 IRIG-B 9
12 10 Relay fail
13 N.C. Optional N.C. 11
indicator
14 COM RS485 DEFAULT BI1-6; Off
12 N
15 A+ AUXILIARY Threshold
BI1
16 B- ***
33.6/77/154V
Available for 13
TCS 14
AUXILIARY Threshold BI2
Optional Communication 33.6/77/154V
Port *** Available for 15
TCS
Threshold
16
77/154V
BI3-6
100BASE-TX
AUXILIARY
(CB CLOSED) 17
　1port / 2port
AUXILIARY
(CB OPEN) 18
AUXILIARY 19
AUXILIARY 20
22 N
A+
B-
100BASE-FX RS485 COM
　1port / 2port COM 21 COM
A+ 23 A+

[APPL VT] = “3PN” B- 24 B-

TB2 [APPL Ve] = “Off” Rear PANEL

1 INPUT SIGNAL LIST
2 Va (DEFAULT by PLC)
3 RJ45 N.C. BI1 IND.RESET
4 Vb BI2 N.A.
5 Vc
BI3 CB N/O Contact
6 BI4 CB N/C Contact
7 BI5 ARC READY
8 Ve BI6 ARC BLOCK
9 FRONT PANEL
10 N.C.
P
11
N
12 GND POWER USB Type B
13 + SUPPLY
14 -
FG

*BO3 and BO4 are NOT applicable for direct CB coil connection.
**Analogue current input ports are shorted when the terminal block is removed. (1-2, 3-4, 5-6, 7-8)
*** Available only when the RS485 communication function is selected.

Typical External Connection of GRE140 – 400A

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GRE140 – 401A

A
B Control
C P
Power

GRE140-401A TB5
CB CLOSE CB CLOSE BO1
[APPL Vs] = “On”
TB4 [VT RATE] = “PH-PH”
SW
1
2
1 ** Ia
CB OPEN CB OPEN/TRIP BO2
2 SW
3
3 ** Ib 4
4 AUXILIARY BO3
TRIP
COIL
CLOSE
COIL
5 ** Ic 5 N
*
6 6
7 ** Ise AUXILIARY BO4
8 *
7
9 8
10 Vs
Relay fail R.F.
11 IRIG-B 9
12 10 Relay fail
13 N.C. N.C. 11
indicator
14 COM Optional DEFAULT BI1-6; Off
12 N
15 A+ RS485 AUXILIARY Threshold
33.6/77/154V
BI1
16 B- *** Available for 13
TCS 14
AUXILIARY Threshold BI2
Optional Communication 33.6/77/154V
Port *** Available for 15
TCS
Threshold
16
77/154V
BI3-6
100BASE-TX
AUXILIARY
(CB CLOSED) 17
　1port / 2port
AUXILIARY
(CB OPEN) 18
AUXILIARY 19
AUXILIARY 20
22 N
A+
B-
100BASE-FX RS485 COM
　1port / 2port COM 21 COM
A+ 23 A+

[APPL VT] = “3PP”

B- 24 B-

TB2 [APPL Ve] = “On” Rear PANEL

1 OUTPUT CONACTS
2 Vab SIGNAL LIST (DEFAULT)
3 RJ45 N.C.
4 Vbc BO1 OFF(CB CLOSE)
BO2 GENERAL TRIP
5 Vca
TB1 BO3 GENERAL ALARM
6 1 BO4 UVB
7 Ve
BO5
2 BO5 GENERAL TRIP
8 3 BO6 GENERAL ALARM
9 BO6
4 BO7 OFF
10 N.C. 5 BO8 OFF

P
11 BO7
6 BO9 OFF

N
12 GND POWER 7 BO10 OFF
13 + SUPPLY BO8
8
14 - 9 INPUT SIGNAL LIST
BO9
10 (DEFAULT by PLC)
FG
BO10
11 BI1 IND.RESET
12 BI2 N.A.
13 BI3 CB N/O Contact
FRONT PANEL
14 BI4 CB N/C Contact
BI7 15 BI5 ARC READY
BI8 16 BI6 ARC BLOCK
BI9 17 BI7
18
…

USB Type B BI10 N.A.

19 BI12
20
BI11 21
22
BI12 23
24

*BO3, 4, 7 - 12 are NOT applicable for direct CB coil connection.

**Analogue current input ports are shorted when the terminal block is removed. (1-2, 3-4, 5-6, 7-8)
*** Available only when the RS485 communication function is selected.
Typical External Connection of GRE140 – 401A

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GRE140 – 421A

A
B Control
C P
Power

GRE140-421A TB5
CB CLOSE CB CLOSE BO1
TB4 [APPL Vs] = “Off”
SW
1
2
1 ** Ia
CB OPEN CB OPEN/TRIP BO2
2 SW
3
3 ** Ib 4
4 AUXILIARY BO3
TRIP
COIL
CLOSE
COIL
5 ** Ic 5 N
*
6 6
7 ** Ise AUXILIARY BO4
8 *
7
9 8
10 Vs
Relay fail R.F.
Core 11 IRIG-B 9
balance 12 10 Relay fail

CT
13 N.C. N.C. 11
indicator
14 COM Optional DEFAULT BI1-6; Off
12 N
15 A+ RS485 AUXILIARY Threshold
33.6/77/154V
BI1
16 B- *** Available for 13
TCS 14
AUXILIARY Threshold BI2
Optional Communication 33.6/77/154V
Port *** Available for 15
TCS
Threshold
16
77/154V
BI3-6
100BASE-TX
AUXILIARY
(CB CLOSED) 17
　1port / 2port
AUXILIARY
(CB OPEN) 18
AUXILIARY 19
AUXILIARY 20
22 N
A+
B-
100BASE-FX RS485 COM
　1port / 2port COM 21 COM
A+ 23 A+

[APPL VT] = “3PP”

B- 24 B-

TB2 [APPL Ve] = “Off” Rear PANEL

1
2 Vab OUTPUT CONACTS
N.C. SIGNAL LIST (DEFAULT)
3 Vbc
RJ45
4 BO1 OFF(CB CLOSE)
5 Vca
TB1 BO2 GENERAL TRIP
6 BO3 GENERAL ALARM
1 BO4 UVB
7 Ve
BO5
2 BO5 GENERAL TRIP
8 3 BO6 GENERAL ALARM
9 BO6
4 BO7 OFF
10 N.C. 5 BO8 OFF
P
11 BO7
6 BO9 OFF
N
12 GND POWER 7 BO10 OFF
13 + SUPPLY BO8
8
14 - 9
BO9
10 INPUT SIGNAL LIST
FG
BO10
11 (DEFAULT by PLC)
12 BI1 IND.RESET
13 BI2 N.A.
FRONT PANEL
14 BI3 CB N/O Contact
BI7 15 BI4 CB N/C Contact
BI8 16 BI5 ARC READY
BI9 17 BI6 ARC BLOCK
USB Type B BI10 18 BI7
…

19 N.A.
BI12
20
BI11 21
22
BI12
23
24

*BO3, 4, 7 - 12 are NOT applicable for direct CB coil connection.

**Analogue current input ports are shorted when the terminal block is removed. (1-2, 3-4, 5-6, 7-8)
*** Available only when the RS485 communication function is selected.

Typical External Connection of GRE140 – 421A

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GRE140 – 402A

A INPUT SIGNAL LIST (DEFAULT by PLC)

B BI1 IND.RESET BI5 ARC READY Control
BI2 N.A. BI6 ARC BLOCK
C BI3 CB N/O Contact BI7 P
Power

…
BI4 CB N/C Contact N.A.
BI16

GRE140-402A TB5
CB CLOSE CB CLOSE BO1
[APPL Vs] = “On”
TB4 [VT RATE] = “PH-G”
SW
1
2
1 ** Ia
CB OPEN CB OPEN/TRIP BO2
2 SW
3
3 ** Ib 4
4 AUXILIARY BO3
TRIP
COIL
CLOSE
COIL
5 ** Ic 5 N
*
6 6
7 ** Ie AUXILIARY BO4
8 *
7
9 8
10 Vs
Relay fail R.F.
11 IRIG-B 9
12 10 Relay fail
OUTPUT CONACTS
13 N.C. Optional N.C. 11
indicator
SIGNAL LIST (DEFAULT) 14 COM RS485 12 N
15 A+ AUXILIARY Threshold
BI1
16 B- ***
33.6/77/154V
BO1 OFF(CB CLOSE) Available for 13
BO2 GENERAL TRIP TCS 14
BO3 GENERAL ALARM AUXILIARY Threshold BI2
Optional Communication 33.6/77/154V
BO4 UVB
BO5 GENERAL TRIP
Port *** Available for 15
BO6 GENERAL ALARM
TCS
Threshold
16
BI3-6
BO7 OFF 77/154V

BO8 OFF 100BASE-TX

AUXILIARY
(CB CLOSED) 17
BO9 OFF 　1port / 2port
AUXILIARY
(CB OPEN) 18
BO10 OFF
AUXILIARY 19
BO11 OFF AUXILIARY 20
BO12 OFF 22 N
A+
B-
BO13 OFF 100BASE-FX RS485 COM
BO14 OFF 　1port / 2port COM 21 COM
BO15 GENERAL ALARM A+ 23 A+
BO16 GENERAL TRIP
[APPL VT] = “3PN” B- 24 B-

TB2 [APPL Ve] = “On” Rear PANEL

1
2 Va
3 RJ45 N.C.
4 Vb
5 Vc
TB1
6 1 TB3
7 Ve
BO5
2 1
8 3 BO11
2
9 BO6
4 3
10 N.C. 5 BO12
4
P
11 BO7
6 5
N
12 GND POWER 7 BO13
6
13 + SUPPLY BO8
8 7
14 - 9 BO14
8
BO9
10 BO15
9
FG
BO10
11 10
12 BO16
11
13 12
FRONT PANEL
14 13
BI7 15 14
BI8 16 BI13 15
BI9 17 Threshold BI14 16
USB Type B BI10 18 77/154V
BI15 17
19 BI16 18
20 19
BI11 21 20
22 BI17 21
BI12 23 22
24 BI18 23
24
*BO3, 4, 7 – 10, 13 - 16 are NOT applicable for direct CB coil connection.
**Analogue current input ports are shorted when the terminal block is removed. (1-2, 3-4, 5-6, 7-8)
*** Available only when the RS485 communication function is selected.

Typical External Connection of GRE140 – 402A

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Appendix H
Relay Setting Sheet
1. Relay Identification
2. Line parameter
3. Binary output setting
4. Relay setting
5. Disturbance record signal setting
6. LED setting

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1. Relay Identification Date:

Relay type Serial Number
Frequency AC current
AC voltage Supply voltage
Password
Active setting group

2. Line parameter
CT ratio OC: EF: SEF:
VT ratio PVT: EVT: SVT:

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3. Binary output setting

Default Setting Setting
Setting Model Model
Device Range Unit Contents 400A, 420A 401A, 421A 402A, 422A
Name 700A,720A 701A, 721A 702A, 722A
Settin Signal Settin Signal Settin Signal Setting Signal
BO1 Logic OR - AND － Logic gate OR -- OR -- OR --
Reset Ins - Dl - Dw - Lat － Reset application Dl -- Dl -- Dl --
In #1 0 - 3071 － Output signal 0 0 0
In #2 0 - 3071 － ditto 0 0 0
In #3 0 - 3071 － ditto 0 0 0
In #4 0 - 3071 － ditto 0 0 0
In #5 0 - 3071 － ditto 0 0 0
In #6 0 - 3071 － ditto 0 0 0
TBO 0.00 - 10.00 s Dl/Dw timer 0.20 -- 0.20 -- 0.20 --
BO2 Logic OR - AND － Logic gate OR -- OR -- OR --
Reset Ins - Dl - Dw - Lat － Reset application Dl -- Dl -- Dl --
In #1 0 - 3071 － Output signal 371 GEN.TRIP 371 GEN.TRIP 371 GEN.TRIP
In #2 0 - 3071 － ditto 0 0 0
In #3 0 - 3071 － ditto 0 0 0
In #4 0 - 3071 － ditto 0 0 0
In #5 0 - 3071 － ditto 0 0 0
In #6 0 - 3071 － ditto 0 0 0
TBO 0.00 - 10.00 s Dl/Dw timer 0.20 -- 0.20 -- 0.20 --
BO3 Logic OR - AND － Logic gate OR -- OR -- OR --
Reset Ins - Dl - Dw - Lat － Reset application Dl -- Dl -- Dl --
In #1 0 - 3071 － Output signal 380 GEN.ALARM 380 GEN.ALARM 380 GEN.ALARM
In #2 0 - 3071 － ditto 0 0 0
In #3 0 - 3071 － ditto 0 0 0
In #4 0 - 3071 － ditto 0 0 0
In #5 0 - 3071 － ditto 0 0 0
In #6 0 - 3071 － ditto 0 0 0
TBO 0.00 - 10.00 s Dl/Dw timer 0.20 -- 0.20 -- 0.20 --
BO4 Logic OR - AND － Logic gate OR -- OR -- OR --
Reset Ins - Dl - Dw - Lat － Reset application Dl -- Dl -- Dl --
In #1 0 - 3071 － Output signal 536 UVB 536 UVB 536 UVB
In #2 0 - 3071 － ditto 0 0 0
In #3 0 - 3071 － ditto 0 0 0
In #4 0 - 3071 － ditto 0 0 0
In #5 0 - 3071 － ditto 0 0 0
In #6 0 - 3071 － ditto 0 0 0
TBO 0.00 - 10.00 s Dl/Dw timer 0.20 -- 0.20 -- 0.20 --
BO5 Logic OR - AND － Logic gate OR -- OR --
Reset Ins - Dl - Dw - Lat － Reset application Dl -- Dl --
In #1 0 - 3071 － Output signal 371 GEN.TRIP 371 GEN.TRIP
In #2 0 - 3071 － ditto 0 0
In #3 0 - 3071 － ditto 0 0
In #4 0 - 3071 － ditto 0 0
In #5 0 - 3071 － ditto 0 0
In #6 0 - 3071 － ditto 0 0
TBO 0.00 - 10.00 s Dl/Dw timer 0.20 -- 0.20 --
BO6 Logic OR - AND － Logic gate OR -- OR --
Reset Ins - Dl - Dw - Lat － Reset application Dl -- Dl --
In #1 0 - 3071 － Output signal 380 GEN.ALARM 380 GEN.ALARM
In #2 0 - 3071 － ditto 0 0
In #3 0 - 3071 － ditto 0 0
In #4 0 - 3071 － ditto 0 0
In #5 0 - 3071 － ditto 0 0
In #6 0 - 3071 － ditto 0 0
TBO 0.00 - 10.00 s Dl/Dw timer 0.20 -- 0.20 --
BO7 Logic OR - AND － Logic gate OR -- OR --
Reset Ins - Dl - Dw - Lat － Reset application Dl -- Dl --
In #1 0 - 3071 － Output signal 0 0
In #2 0 - 3071 － ditto 0 0
In #3 0 - 3071 － ditto 0 0
In #4 0 - 3071 － ditto 0 0
In #5 0 - 3071 － ditto 0 0
In #6 0 - 3071 － ditto 0 0
TBO 0.00 - 10.00 s Dl/Dw timer 0.20 -- 0.20 --
BO8 Logic OR - AND － Logic gate OR -- OR --
Reset Ins - Dl - Dw - Lat － Reset application Dl -- Dl --
In #1 0 - 3071 － Output signal 0 0
In #2 0 - 3071 － ditto 0 0
In #3 0 - 3071 － ditto 0 0
In #4 0 - 3071 － ditto 0 0
In #5 0 - 3071 － ditto 0 0
In #6 0 - 3071 － ditto 0 0
TBO 0.00 - 10.00 s Dl/Dw timer 0.20 -- 0.20 --

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Default Setting Setting

Setting Model Model
Device Range Unit Contents 400A, 420A 401A, 421A 402A, 422A
Name 700A, 720A 701A, 721A 702A, 722A
Settin Signal Settin Signal Settin Signal Setting Signal
BO9 Logic OR - AND － Logic gate -- OR -- OR --
Reset Ins - Dl - Dw - Lat － Reset application -- Dl -- Dl --
In #1 0 - 3071 － Output signal 0 0
In #2 0 - 3071 － ditto 0 0
In #3 0 - 3071 － ditto 0 0
In #4 0 - 3071 － ditto 0 0
In #5 0 - 3071 － ditto 0 0
In #6 0 - 3071 － ditto 0 0
TBO 0.00 - 10.00 s Dl/Dw timer -- 0.20 -- 0.20 --
BO Logic OR - AND － Logic gate OR -- OR --
10 Reset Ins - Dl - Dw - Lat － Reset application Dl -- Dl --
In #1 0 - 3071 － Output signal 0 0
In #2 0 - 3071 － ditto 0 0
In #3 0 - 3071 － ditto 0 0
In #4 0 - 3071 － ditto 0 0
In #5 0 - 3071 － ditto 0 0
In #6 0 - 3071 － ditto 0 0
TBO 0.00 - 10.00 s Dl/Dw timer 0.20 -- 0.20 --
BO Logic OR - AND － Logic gate OR --
11 Reset Ins - Dl - Dw - Lat － Reset application Dl --
In #1 0 - 3071 － Output signal 0
In #2 0 - 3071 － ditto 0
In #3 0 - 3071 － ditto 0
In #4 0 - 3071 － ditto 0
In #5 0 - 3071 － ditto 0
In #6 0 - 3071 － ditto 0
TBO 0.00 - 10.00 s Dl/Dw timer 0.20 --
BO Logic OR - AND － Logic gate OR --
12 Reset Ins - Dl - Dw - Lat － Reset application Dl --
In #1 0 - 3071 － Output signal 0
In #2 0 - 3071 － ditto 0
In #3 0 - 3071 － ditto 0
In #4 0 - 3071 － ditto 0
In #5 0 - 3071 － ditto 0
In #6 0 - 3071 － ditto 0
TBO 0.00 - 10.00 s Dl/Dw timer 0.20 --
BO Logic OR - AND － Logic gate OR --
13 Reset Ins - Dl - Dw - Lat － Reset application Dl --
In #1 0 - 3071 － Output signal 0
In #2 0 - 3071 － ditto 0
In #3 0 - 3071 － ditto 0
In #4 0 - 3071 － ditto 0
In #5 0 - 3071 － ditto 0
In #6 0 - 3071 － ditto 0
TBO 0.00 - 10.00 s Dl/Dw timer 0.20 --
BO Logic OR - AND － Logic gate OR --
14 Reset Ins - Dl - Dw - Lat － Reset application Dl --
In #1 0 - 3071 － Output signal 0
In #2 0 - 3071 － ditto 0
In #3 0 - 3071 － ditto 0
In #4 0 - 3071 － ditto 0
In #5 0 - 3071 － ditto 0
In #6 0 - 3071 － ditto 0
TBO 0.00 - 10.00 s Dl/Dw timer 0.20 --
BO Logic OR - AND － Logic gate OR --
15 Reset Ins - Dl - Dw - Lat － Reset application Dl --
In #1 0 - 3071 － Output signal 380 GEN.ALARM
In #2 0 - 3071 － ditto 0
In #3 0 - 3071 － ditto 0
In #4 0 - 3071 － ditto 0
In #5 0 - 3071 － ditto 0
In #6 0 - 3071 － ditto 0
TBO 0.00 - 10.00 s Dl/Dw timer 0.20 --
BO Logic OR - AND － Logic gate OR --
16 Reset Ins - Dl - Dw - Lat － Reset application Dl --
In #1 0 - 3071 － Output signal 371 GEN.TRIP
In #2 0 - 3071 － ditto 0
In #3 0 - 3071 － ditto 0
In #4 0 - 3071 － ditto 0
In #5 0 - 3071 － ditto 0
In #6 0 - 3071 － ditto 0
TBO 0.00 - 10.00 s Dl/Dw timer 0.20

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4. Relay setting

Default Value
No. Name Range Units Contents Model Model
400, 401, 402 420, 421, 422
（700, 701, 702） (720, 721, 722)
1 Active gp. 1-2 － Active setting group 1 1

2 APPLCT Off - 3P - 2P - 1P － Application setting of CT 3P 3P

3 APPLVT Off - 3PN -3PP － Application setting of VT 3PN 3PN

4 APPLVE Off - On － Application setting of VT-Ve On On

5 APPLVS Off - On － Application setting of VT-Vbus On On

6 CTFEN Off - On - OPT-On － CTF Enable Off Off

7 VTF1EN Off - On - OPT-On － VTF1 Enable Off Off

8 VTF2EN Off - On - OPT-On － VTF2 Enable Off Off

9 CTSVEN Off - ALM&BLK - ALM － AC input imbalance Super Visor Enable ALM ALM

10 V0SVEN Off - ALM&BLK - ALM － ditto ALM ALM

11 V2SVEN Off - ALM&BLK - ALM － ditto ALM ALM

12 AOLED Off - On － TRIP LED lighting control at alarm output On On

13 Control Disable - Enable － Control Enable Enable Enable

14 Interlock Disable - Enable － Interlock Enable Disable Disable

15 Control Kind Local - Remote － (if Control = Enable) --(Local) --(Local)

16 Frequency 50Hz - 60Hz － Frequency 50Hz 50Hz

17 MOTEN Off - On － Motor condition Enable --(Off) --(Off)

Specified by
18 Line name Specified by user － Line name Specified by user
user
19 OCCT 1 - 20000 － Phase CT ratio 400 400

20 EFCT 1 - 20000 － Residual CT ratio 200 200

21 SEFCT 1 - 20000 － SEF CT ratio --(400) 150

22 PVT 1 - 20000 － Phase VT ratio 100 100

23 VEVT 1 - 20000 － Ve VT ratio 100 100

24 VSVT 1 - 20000 － Vbus VT ratio 100 100

25 FL X1 0.0 - 999.9 Ω Fault location 10.0 10.0

26 FL X0 0.0 - 999.9 Ω ditto 34.0 34.0

27 FL R1 0.0 - 999.9 Ω ditto 1.0 1.0

28 FL R0 0.0 - 999.9 Ω ditto 3.5 3.5

29 FL Kab 80 - 120 % ditto 100 100

30 FL Kbc 80 - 120 % ditto 100 100

31 FL Kca 80 - 120 % ditto 100 100

32 FL Ka 80 - 120 % ditto 100 100

33 FL Kb 80 - 120 % ditto 100 100

34 FL Kc 80 - 120 % ditto 100 100

35 FL Line 0.0 - 399.9 km ditto 50.0 50.0

36 MOC1 D - IEC - IEEE - US - C － OC1 Delay Type D D

37 MOC2 D - IEC - IEEE - US - C － OC2 Delay Type D D

38 MEF1 D - IEC - IEEE - US - C － EF1 Delay Type D D

39 MEF2 D - IEC - IEEE - US - C － EF2 Delay Type D D

40 MSE1 D - IEC - IEEE - US - C － SEF1 Delay Type -- (D) D

41 MSE2 D - IEC - IEEE - US - C － SEF2 Delay Type -- (D) D

42 MNC1 D - IEC - IEEE - US - C － NOC1 Delay Type D D

43 MNC2 D - IEC - IEEE - US - C － NOC2 Delay Type D D

44 OC OC1EN Off - On － OC1 Enable On On

45 OC OC1-DIR FWD - REV - NON － OC1 Directional Characteristic FWD FWD

46 OC MOC1C-IEC NI - VI - EI - LTI － OC1 IEC Inverse Curve Type NI NI

47 OC MOC1C-IEEE MI - VI - EI － OC1 IEEE Inverse Curve Type MI MI

48 OC MOC1C-US CO2 - CO8 － OC1 US Inverse Curve Type CO2 CO2

49 OC OC1R DEF - DEP － OC1 Reset Characteristic DEF DEF

50 OC OC1-2F NA - Block － 2f Block Enable NA NA

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Default Value
No. Name Range Units Contents Model Model
400, 401, 402 420, 421, 422
（700, 701, 702） (720, 721, 722)
51 OC VTF-OC1BLK Off - On － VTF block enable Off Off

52 OC OC2EN Off - On － OC2 Enable Off Off

53 OC OC2-DIR FWD - REV - NON － OC2 Directional Characteristic FWD FWD

54 OC MOC2C-IEC NI - VI - EI - LTI － OC2 IEC Inverse Curve Type NI NI

55 OC MOC2C-IEEE MI - VI - EI － OC2 IEEE Inverse Curve Type MI MI

56 OC MOC2C-US CO2 - CO8 － OC2 US Inverse Curve Type CO2 CO2

57 OC OC2R DEF - DEP － OC2 Reset Characteristic DEF DEF

58 OC OC2-2F NA - Block － 2f Block Enable NA NA

59 OC VTF-OC2BLK Off - On － VTF block enable Off Off

60 OC OC3EN Off - On － OC3 Enable Off Off

61 OC OC3-DIR FWD - REV - NON － OC3 Directional Characteristic FWD FWD

62 OC OC3-2F NA - Block － 2f Block Enable NA NA

63 OC VTF-OC3BLK Off - On － VTF block enable Off Off

64 OC OC4EN Off - On － OC4 Enable On On

65 OC OC4-DIR FWD - REV - NON － OC4 Directional Characteristic FWD FWD

66 OC OC4-2F NA - Block － 2f Block Enable NA NA

67 OC VTF-OC4BLK Off - On － VTF block enable Off Off

68 OC OCTP 3POR - 2OUTOF3 － OC trip mode 3POR 3POR

69 EF EF1EN Off - On - POP － EF1 Enable On On

70 EF EF1-DIR FWD - REV - NON － EF1 Directional Characteristic FWD FWD

71 EF MEF1C-IEC NI - VI - EI - LTI － EF1 IEC Inverse Curve Type NI NI

72 EF MEF1C-IEEE MI - VI - EI － EF1 IEEE Inverse Curve Type MI MI

73 EF MEF1C-US CO2 - CO8 － EF1 US Inverse Curve Type CO2 CO2

74 EF EF1R DEF - DEP － EF1 Reset Characteristic DEF DEF

75 EF EF1-2F NA - Block － 2f Block Enable NA NA

76 EF CTF-EF1BLK Off - On － CTF block enable Off Off

77 EF VTF-EF1BLK Off - On － VTF block enable Off Off

78 EF EF2EN Off - On - POP － EF2 Enable Off Off

79 EF EF2-DIR FWD - REV - NON － EF2 Directional Characteristic FWD FWD

80 EF MEF2C-IEC NI - VI - EI - LTI － EF2 IEC Inverse Curve Type NI NI

81 EF MEF2C-IEEE MI - VI - EI － EF2 IEEE Inverse Curve Type MI MI

82 EF MEF2C-US CO2 - CO8 － EF2 US Inverse Curve Type CO2 CO2

83 EF EF2R DEF - DEP － EF2 Reset Characteristic DEF DEF

84 EF EF2-2F NA - Block － 2f Block Enable NA NA

85 EF CTF-EF2BLK Off - On － CTF block enable Off Off

86 EF VTF-EF2BLK Off - On － VTF block enable Off Off

87 EF EF3EN Off - On - POP － EF3 Enable Off Off

88 EF EF3-DIR FWD - REV - NON － EF3 Directional Characteristic FWD FWD

89 EF EF3-2F NA - Block － 2f Block Enable NA NA

90 EF CTF-EF3BLK Off - On － CTF block enable Off Off

91 EF VTF-EF3BLK Off - On － VTF block enable Off Off

92 EF EF4EN Off - On - POP － EF4 Enable On On

93 EF EF4-DIR FWD - REV - NON － EF4 Directional Characteristic FWD FWD

94 EF EF4-2F NA - Block － 2f Block Enable NA NA

95 EF CTF-EF4BLK Off - On － CTF block enable Off Off

96 EF VTF-EF4BLK Off - On － VTF block enable Off Off

97 EF CURREV Off - 1 - 2 - 3 - 4 － Current reverse detection Off Off

98 SEF SE1EN Off - On － SEF1 Enable -- (Off) On

99 SEF SE1-DIR FWD - REV - NON － SEF1 Directional Characteristic -- (FWD) FWD

100 SEF MSE1C-IEC NI - VI - EI - LTI － SEF1 IEC Inverse Curve Type -- (NI) NI

101 SEF MSE1C-IEEE MI - VI - EI － SEF1 IEEE Inverse Curve Type -- (MI) MI

102 SEF MSE1C-US CO2 - CO8 － SEF1 US Inverse Curve Type -- (CO2) CO2

103 SEF SE1R DEF - DEP － SEF1 Reset Characteristic -- (DEF) DEF

 368 
 6 F 2 T 0 1 7 7

Default Value
No. Name Range Units Contents Model Model
400, 401, 402 420, 421, 422
（700, 701, 702） (720, 721, 722)
104 SEF SE1S2 Off - On － SEF1 Stage 2 Timer Enable -- (Off) Off

105 SEF SE1-2F NA - Block － 2f Block Enable -- (NA) NA

106 SEF VTF-SE1BLK Off - On － VTF block enable -- (Off) Off

107 SEF SE2EN Off - On － SEF2 Enable -- (Off) Off

108 SEF SE2-DIR FWD - REV - NON － SEF2 Directional Characteristic -- (FWD) FWD

109 SEF MSE2C-IEC NI - VI - EI - LTI － SEF2 IEC Inverse Curve Type -- (NI) NI

110 SEF MSE2C-IEEE MI - VI - EI － SEF2 IEEE Inverse Curve Type -- (MI) MI

111 SEF MSE2C-US CO2 - CO8 － SEF2 US Inverse Curve Type -- (CO2) CO2

112 SEF SE2R DEF - DEP － SEF2 Reset Characteristic -- (DEF) DEF

113 SEF SE2-2F NA - Block － 2f Block Enable -- (NA) NA

114 SEF VTF-SE2BLK Off - On － VTF block enable -- (Off) Off

115 SEF SE3EN Off - On － SEF3 Enable -- (Off) Off

116 SEF SE3-DIR FWD - REV - NON － SEF3 Directional Characteristic -- (FWD) FWD

117 SEF SE3-2F NA - Block － 2f Block Enable -- (NA) NA

118 SEF VTF-SE3BLK Off - On － VTF block enable -- (Off) Off

119 SEF SE4EN Off - On － SEF4 Enable -- (Off) On

120 SEF SE4-DIR FWD - REV - NON － SEF4 Directional Characteristic -- (FWD) FWD

121 SEF SE4-2F NA - Block － 2f Block Enable -- (NA) NA

122 SEF VTF-SE4BLK Off - On － VTF block enable -- (Off) Off

123 SEF ZPEN Off - On － Residual Power block Enable -- (Off) Off

124 NOC NC1EN Off - On － NOC1 Enable Off Off

125 NOC NC1-DIR FWD - REV - NON － NOC1 Directional Characteristic FWD FWD

126 NOC MNC1C-IEC NI - VI - EI - LTI － NOC1 IEC InverNC Curve Type NI NI

127 NOC MNC1C-IEEE MI - VI - EI － NOC1 IEEE InverNC Curve Type MI MI

128 NOC MNC1C-US CO2 - CO8 － NOC1 US InverNC Curve Type CO2 CO2

129 NOC NC1R DEF - DEP － NOC1 ReNCt Characteristic DEF DEF

130 NOC NC1-2F NA - Block － 2f Block Enable NA NA

131 NOC CTF-NC1BLK Off - On － CTF block enable Off Off

132 NOC VTF-NC1BLK Off - On － VTF block enable Off Off

133 NOC NC2EN Off - On － NOC2 Enable Off Off

134 NOC NC2-DIR FWD - REV - NON － NOC2 Directional Characteristic FWD FWD

135 NOC MNC2C-IEC NI - VI - EI - LTI － NOC2 IEC InverNC Curve Type NI NI

136 NOC MNC2C-IEEE MI - VI - EI － NOC2 IEEE InverNC Curve Type MI MI

137 NOC MNC2C-US CO2 - CO8 － NOC2 US InverNC Curve Type CO2 CO2

138 NOC NC2R DEF - DEP － NOC2 ReNCt Characteristic DEF DEF

139 NOC NC2-2F NA - Block － 2f Block Enable NA NA

140 NOC CTF-NC2BLK Off - On － CTF block enable Off Off

141 NOC VTF-NC2BLK Off - On － VTF block enable Off Off

142 UC UC1EN Off - On － UC1 Enable Off Off

143 UC CTF-UC1BLK Off - On － CTF block enable Off Off

144 UC UC2EN Off - On － UC2 Enable Off Off

145 UC CTF-UC2BLK Off - On － CTF block enable Off Off

146 Thermal THMEN Off - On － Thermal OL Enable Off Off

147 Thermal THMAEN Off - On － Thermal Alarm Enable Off Off

148 BCD BCDEN Off - On － Broken Conductor Enable Off Off

149 BCD BCD-2F NA - Block － 2f Block Enable NA NA

150 CBF BTC Off - On － Back-trip control Off Off

151 CBF RTC Off - DIR - OC － Re-trip control Off Off

152 Cold Load CLEN Off - On － Cold Load Protection Enable Off Off

153 Cold Load CLDOEN Off - On － Cold Load drop-off Enable Off Off

154 RP RPCB Use - Nouse － CB condition use Use Use

155 RP RP-UVBLK NA - Block － UV Block Enable NA NA

 369 
 6 F 2 T 0 1 7 7

Default Value
No. Name Range Units Contents Model Model
400, 401, 402 420, 421, 422
（700, 701, 702） (720, 721, 722)
156 RP RP-Power Disable - Enable － Power Direction Enable Disable Disable

157 RP Power Send - Receive － Power Direction Send Send

158 RP RP1EN Off - On － Reverse Power1 Enable Off Off

159 RP RP1-2F NA - Block － 2f Block Enable NA NA

160 RP CTF-RP1BLK Off - On － CTF block enable Off Off

161 RP VTF-RP1BLK Off - On － VTF block enable Off Off

162 RP RP2EN Off - On － Reverse Power1 Enable Off Off

163 RP RP2-2F NA - Block － 2f Block Enable NA NA

164 RP CTF-RP2BLK Off - On － CTF block enable Off Off

165 RP VTF-RP2BLK Off - On － VTF block enable Off Off

166 OCD OCDEN NA - Up -Down - Both － OCD Enable NA NA

167 OV OV1EN Off - DT - IDMT - C － OV1 Enable Off Off

168 OV OV2EN Off - DT - IDMT - C － OV2 Enable Off Off

169 OV OV3EN Off - On － OV3 Enable Off Off

170 OV OV4EN Off - On － OV4 Enable Off Off

171 UV UV1EN Off - DT - IDMT - C － UV1 Enable DT DT

172 UV VTF-UV1BLK Off - On － VTF block enable Off Off

173 UV UV2EN Off - DT - IDMT - C － UV2 Enable DT DT

174 UV VTF-UV2BLK Off - On － VTF block enable Off Off

175 UV UV3EN Off - On － UV3 Enable Off Off

176 UV VTF-UV3BLK Off - On － VTF block enable Off Off

177 UV UV4EN Off - On － UV4 Enable Off Off

178 UV VTF-UV4BLK Off - On － VTF block enable Off Off

179 UV VBLKEN Off - On － UV Block Enable Off Off

180 UV UVHSSEN Off - On － UVHSS Enable -- (Off) -- (Off)

181 UV UVHSGEN Off - On － UVHSG Enable -- (Off) -- (Off)

182 UV UVDEN Off - On － UVD Enable -- (Off) -- (Off)

183 ZOV ZOV1EN Off - DT - IDMT - C － ZOV1 Enable DT DT

184 ZOV VTF-ZV1BLK Off - On － VTF block enable Off Off

185 ZOV ZOV2EN Off - DT - IDMT - C － ZOV2 Enable Off Off

186 ZOV VTF-ZV2BLK Off - On － VTF block enable Off Off

187 NOV NOV1EN Off - DT - IDMT - C － NOV1 Enable Off Off

188 NOV VTF-NV1BLK Off - On － VTF block enable Off Off

189 NOV NOV2EN Off - DT - IDMT - C － NOV2 Enable Off Off

190 NOV VTF-NV2BLK Off - On － VTF block enable Off Off

191 FRQ FRQ1EN Off - OF - UF － FRQ1 Enable Off Off

192 FRQ FRQ2EN Off - OF - UF － FRQ2 Enable Off Off

193 FRQ FRQ3EN Off - OF - UF － FRQ3 Enable Off Off

193 FRQ FRQ4EN Off - OF - UF － FRQ4 Enable Off Off

193 DFRQ DFRQ1EN Off - R - D － DFRQ1 Enable Off Off

193 DFRQ DFRQ2EN Off - R - D － DFRQ2 Enable Off Off

193 DFRQ DFRQ3EN Off - R - D － DFRQ3 Enable Off Off

194 DFRQ DFRQ4EN Off - R - D － DFRQ4 Enable Off Off

195 MOT EXSTEN Off - On － Start Protection Enable -- (Off) -- (Off)

196 MOT STRTEN Off - On － 50S Enable -- (Off) -- (Off)

197 MOT LKRTEN Off - On － Locked Rotor Enable -- (Off) -- (Off)

198 MOT RSIHEN Off - On － Restart Inhibit Protection Enable -- (Off) -- (Off)

199 MOT STPHEN Off - On － Starts per hour Enable -- (Off) -- (Off)

200 OC OCTH -95 - 95 deg OC Characteristic Angle -45 -45

201 OC OC1 0.10 - 25.00 A OC1 Threshold setting 1.00 1.00

202 OC TOC1 0.00 - 300.00 s OC1 Definite time setting 0.00 0.00

 370 
 6 F 2 T 0 1 7 7

Default Value
No. Name Range Units Contents Model Model
400, 401, 402 420, 421, 422
（700, 701, 702） (720, 721, 722)
203 OC TOC1M 0.010 - 1.500 － OC1 Time multiplier setting 1.000 1.000

204 OC TOC1R 0.0 - 300.0 s OC1 Definite time reset delay 0.0 0.0

205 OC TOC1RM 0.010 - 1.500 － OC1 Dependent time reset time multiplier 1.000 1.000

206 OC OC2 0.10 - 25.00 A OC2 Threshold setting 5.00 5.00

207 OC TOC2 0.00 - 300.00 s OC2 Definite time setting 0.00 0.00

208 OC TOC2M 0.010 - 1.500 － OC2 Time multiplier setting 1.000 1.000

209 OC TOC2R 0.0 - 300.0 s OC2 Definite time reset delay 0.0 0.0

210 OC TOC2RM 0.010 - 1.500 － OC2 Dependent time reset time multiplier 1.000 1.000

211 OC OC3 0.10 - 150.00 A OC3 Threshold setting 10.00 10.00

212 OC TOC3 0.00 - 300.00 s OC3 Definite time setting 0.00 0.00

213 OC OC4 0.10 - 150.00 A OC4 Threshold setting 20.00 20.00

214 OC TOC4 0.00 - 300.00 s OC4 Definite time setting 0.00 0.00

215 OC OC1-k 0.00 - 300.00 － Configurable IDMT Curve setting of OC1 0.14 0.14

216 OC OC1-a 0.00 - 5.00 － ditto 0.02 0.02

217 OC OC1-C 0.000 - 5.000 － ditto 0.000 0.000

218 OC OC1-kr 0.00 - 300.00 － ditto 2.00 2.00

219 OC OC1-b 0.00 - 5.00 － ditto 2.00 2.00

220 OC OC2-k 0.00 - 300.00 － Configurable IDMT Curve setting of OC2 0.14 0.14

221 OC OC2-a 0.00 - 5.00 － ditto 0.02 0.02

222 OC OC2-C 0.000 - 5.000 － ditto 0.000 0.000

223 OC OC2-kr 0.00 - 300.00 － ditto 2.00 2.00

224 OC OC2-b 0.00 - 5.00 － ditto 2.00 2.00

225 EF EFTH -95 - 95 deg EF Characteristic Angle -45 -45

226 EF EFV 0.5 - 100.0 V EF ZPS voltage level 3.0 3.0

227 EF EF1 0.05 - 25.00 A EF1 Threshold setting 0.30 0.30

228 EF TEF1 0.00 - 300.00 s EF1 EFinite time setting 0.00 0.00

229 EF TEF1M 0.010 - 1.500 － EF1 Time multiplier setting 1.000 1.000

230 EF TEF1R 0.0 - 300.0 s EF1 EFinite time reset delay 0.0 0.0

231 EF TEF1RM 0.010 - 1.500 － EF1 Dependent time reset time multiplier 1.000 1.000

232 EF EF2 0.05 - 25.00 A EF2 Threshold setting 3.00 3.00

233 EF TEF2 0.00 - 300.00 s EF2 EFinite time setting 0.00 0.00

234 EF TEF2M 0.010 - 1.500 － EF2 Time multiplier setting 1.000 1.000

235 EF TEF2R 0.0 - 300.0 s EF2 EFinite time reset delay 0.0 0.0

236 EF TEF2RM 0.010 - 1.500 － EF2 Dependent time reset time multiplier 1.000 1.000

237 EF EF3 0.05 - 100.00 A EF3 Threshold setting 5.00 5.00

238 EF TEF3 0.00 - 300.00 s EF3 EFinite time setting 0.00 0.00

239 EF EF4 0.05 - 100.00 A EF4 Threshold setting 5.00 5.00

240 EF TEF4 0.00 - 300.00 s EF4 EFinite time setting 0.00 0.00

241 EF TREBK 0.00 - 10.00 s Current reverse blocking time 0.10 0.10

242 EF EF1-k 0.00 - 300.00 － Configurable IDMT Curve setting of EF1 0.14 0.14

243 EF EF1-a 0.00 - 5.00 － ditto 0.02 0.02

244 EF EF1-C 0.000 - 5.000 － ditto 0.000 0.000

245 EF EF1-kr 0.00 - 300.00 － ditto 2.00 2.00

246 EF EF1-b 0.00 - 5.00 － ditto 2.00 2.00

247 EF EF2-k 0.00 - 300.00 － Configurable IDMT Curve setting of EF2 0.14 0.14

248 EF EF2-a 0.00 - 5.00 － ditto 0.02 0.02

249 EF EF2-C 0.000 - 5.000 － ditto 0.000 0.000

250 EF EF2-kr 0.00 - 300.00 － ditto 2.00 2.00

251 EF EF2-b 0.00 - 5.00 － ditto 2.00 2.00

252 SEF SETH -95 - 95 deg SEF Characteristic Angle -- (0) 0

253 SEF SEV 0.5 - 100.0 V SEF ZPS voltage level -- (3.0) 3.0

254 SEF SE1 0.025 - 2.500 A SEF1 Threshold setting --(0.100) 0.005

255 SEF TSE1 0.00 - 300.00 s SEF1 Definite time setting --(1.00) 0.00

 371 
 6 F 2 T 0 1 7 7

Default Value
No. Name Range Units Contents Model Model
400, 401, 402 420, 421, 422
（700, 701, 702） (720, 721, 722)
256 SEF TSE1M 0.010 - 1.500 － SEF1 Time multiplier setting --(1.000) 1.000

257 SEF TSE1R 0.0 - 300.0 s SEF1 Definite time reset delay --(0.0) 0.0

258 SEF TSE1RM 0.010 - 1.500 － SEF1 Dependent time reset time multiplier --(1.000) 1.000

259 SEF TSE1S2 0.00 - 300.00 s SEF1 Stage 2 definite timer settings --(0.00) 0.00

260 SEF SE2 0.025 - 2.500 A SEF2 Threshold setting --(0.500) 0.010

261 SEF TSE2 0.00 - 300.00 s SEF2 Definite time setting --(0.00) 0.00

262 SEF TSE2M 0.010 - 1.500 － SEF2 Time multiplier setting --(1.000) 1.000

263 SEF TSE2R 0.0 - 300.0 s SEF2 Definite time reset delay --(0.0) 0.0

264 SEF TSE2RM 0.010 - 1.500 － SEF2 Dependent time reset time multiplier --(1.000) 1.000

265 SEF SE3 0.025 - 2.500 A SEF3 Threshold setting --(0.500) 0.100

266 SEF TSE3 0.00 - 300.00 s SEF3 Definite time setting --(0.00) 0.00

267 SEF SE4 0.025 - 2.500 A SEF4 Threshold setting --(0.500) 0.500

268 SEF TSE4 0.00 - 300.00 s SEF4 Definite time setting --(0.00) 0.00

269 SEF ZP 0.00 - 100.00 W Residual Power Threshold --(0.00) 0.00

270 SEF SE1-k 0.00 - 300.00 － Configurable IDMT Curve setting of SEF1 0.14 0.14

271 SEF SE1-a 0.00 - 5.00 － ditto 0.02 0.02

272 SEF SE1-C 0.000 - 5.000 － ditto 0.000 0.000

273 SEF SE1-kr 0.00 - 300.00 － ditto 2.00 2.00

274 SEF SE1-b 0.00 - 5.00 － ditto 2.00 2.00

275 SEF SE2-k 0.00 - 300.00 － Configurable IDMT Curve setting of SEF2 0.14 0.14

276 SEF SE2-a 0.00 - 5.00 － ditto 0.02 0.02

277 SEF SE2-C 0.000 - 5.000 － ditto 0.000 0.000

278 SEF SE2-kr 0.00 - 300.00 － ditto 2.00 2.00

279 SEF SE2-b 0.00 - 5.00 － ditto 2.00 2.00

280 NOC NCTH -95 - 95 deg NOC Characteristic Angle -45 -45

281 NOC NCV 0.5 - 25.0 V NOC NPS voltage level 3.0 3.0

282 NOC NC1 0.10 - 10.00 A NOC1 Threshold setting 0.40 0.40

283 NOC TNC1 0.00 - 300.00 s NOC1 Definite time setting 1.00 1.00

284 NOC TNC1M 0.010 - 1.500 － NOC1 Time multiplier setting 1.000 1.000

285 NOC TNC1R 0.0 - 300.0 s NOC1 Definite time reset delay 0.0 0.0

286 NOC TNC1RM 0.010 - 1.500 － NOC1 Dependent time reset time multiplier 1.000 1.000

287 NOC NC2 0.10 - 10.00 A NOC2 Threshold setting 0.20 0.20

288 NOC TNC2 0.00 - 300.00 s NOC2 Definite time setting 0.00 0.00

289 NOC TNC2M 0.010 - 1.500 － NOC2 Time multiplier setting 1.000 1.000

290 NOC TNC2R 0.0 - 300.0 s NOC2 Definite time reset delay 0.0 0.0

291 NOC TNC2RM 0.010 - 1.500 － NOC2 Dependent time reset time multiplier 1.000 1.000

292 NOC NC1-k 0.00 - 300.00 － Configurable IDMT Curve setting of NOC1 0.14 0.14

293 NOC NC1-a 0.00 - 5.00 － ditto 0.02 0.02

294 NOC NC1-C 0.000 - 5.000 － ditto 0.000 0.000

295 NOC NC1-kr 0.00 - 300.00 － ditto 2.00 2.00

296 NOC NC1-b 0.00 - 5.00 － ditto 2.00 2.00

297 NOC NC2-k 0.00 - 300.00 － Configurable IDMT Curve setting of NOC2 0.14 0.14

298 NOC NC2-a 0.00 - 5.00 － ditto 0.02 0.02

299 NOC NC2-C 0.000 - 5.000 － ditto 0.000 0.000

300 NOC NC2-kr 0.00 - 300.00 － ditto 2.00 2.00

301 NOC NC2-b 0.00 - 5.00 － ditto 2.00 2.00

302 UC UC1 0.10 - 10.00 A UC1 Threshold setting 0.40 0.40

303 UC TUC1 0.00 - 300.00 s UC1 Definite time setting 0.00 0.00

304 UC UC2 0.10 - 10.00 A UC2 Threshold setting 0.20 0.20

305 UC TUC2 0.00 - 300.00 s UC2 Definite time setting 0.00 0.00

306 Thermal THM 0.40 - 10.00 A Thermal overload setting 1.00 1.00

307 Thermal THMIP 0.00 - 5.00 A Pre Current value 0.00 0.00

308 Thermal TTHM 0.5 - 500.0 min Thermal Time Constant 10.0 10.0

 372 
 6 F 2 T 0 1 7 7

Default Value
No. Name Range Units Contents Model Model
400, 401, 402 420, 421, 422
（700, 701, 702） (720, 721, 722)
309 Thermal THMA 50 - 99 % Thermal alarm setting 80 80

310 BCD BCD 0.10 - 1.00 － Broken Conductor Threshold setting 0.20 0.20

311 BCD TBCD 0.00 - 300.00 s Broken Conductor Definite time setting 0.00 0.00

312 CBF CBF 0.10 - 10.00 A CBF Threshold setting 0.50 0.50

313 CBF TBTC 0.00 - 300.00 s Back trip Definite time setting 1.00 1.00

314 CBF TRTC 0.00 - 300.00 s Re-trip Definite time setting 0.50 0.50

315 Inrush ICD-2f 10 - 50 % Sensitivity of 2f 15 15

316 Inrush ICDOC 1.00 - 25.00 A Threshold of fundamental current 1.00 1.00

317 Cold Load OC1 0.10 - 25.00 A OC1 Threshold setting in CLP mode 2.00 2.00

318 Cold Load OC2 0.10 - 25.00 A OC2 Threshold setting in CLP mode 5.00 5.00

319 Cold Load OC3 0.10 - 150.00 A OC3 Threshold setting in CLP mode 20.00 20.00

320 Cold Load OC4 0.10 - 150.00 A OC4 Threshold setting in CLP mode 40.00 40.00

321 Cold Load EF1 0.05 - 25.00 A EF1 Threshold setting in CLP mode 2.00 2.00

322 Cold Load EF2 0.05 - 25.00 A EF2 Threshold setting in CLP mode 5.00 5.00

323 Cold Load EF3 0.05 - 100.00 A EF3 Threshold setting in CLP mode 20.00 20.00

324 Cold Load EF4 0.05 - 100.00 A EF4 Threshold setting in CLP mode 40.00 40.00

325 Cold Load SE1 0.025 - 2.500 A SEF1 Threshold setting in CLP mode --(0.025) 0.02

326 Cold Load SE2 0.025 - 2.500 A SEF2 Threshold setting in CLP mode --(0.025) 0.02

327 Cold Load SE3 0.025 - 2.500 A SEF3 Threshold setting in CLP mode --(0.025) 0.02

328 Cold Load SE4 0.025 - 2.500 A SEF4 Threshold setting in CLP mode --(0.025) 0.02

329 Cold Load NC1 0.10 - 10.00 A NOC1 Threshold setting in CLP mode 0.80 0.80

330 Cold Load NC2 0.10 - 10.00 A NOC2 Threshold setting in CLP mode 0.40 0.40

331 Cold Load BCD 0.10 - 1.00 － Broken Conductor Threshold setting in CLP mode 0.40 0.40

332 Cold Load TCLE 0 - 10000 s Cold load enable timer 100 100

333 Cold Load TCLR 0 - 10000 s Cold load reset timer 100 100

334 Cold Load ICLDO 0.10 - 10.00 A Cold load drop-out threshold setting 0.50 0.50

335 Cold Load TCLDO 0.00 - 100.00 s Cold load drop-out timer 0.00 0.00

336 RP RP1 -1500.0 - -1.0 W Reverse Power Threshold setting -30.0 -30.0

337 RP RP1DPR 50 - 98 % Reverse Power DO/PU ratio 95 95

338 RP TRP1 0.00 - 300.00 s Reverse Power Definite time setting 0.20 0.20

339 RP TCBRP1 0.0 - 60.0 s wait time after CB closeing 5.0 5.0

340 RP RP2 -1500.0 - -1.0 W Reverse Power Threshold setting -30.0 -30.0

341 RP RP2DPR 50 - 98 % Reverse Power DO/PU ratio 95 95

342 RP TRP2 0.00 - 300.00 s Reverse Power Definite time setting 1.00 1.00

343 RP TCBRP2 0.0 - 60.0 s wait time after CB closeing 5.0 5.0

344 RP RPVBLK 40.0 - 100.0 V UV Blocking threshold 40.0 40.0

34A RQ RQ1 -1500.0 - -1.0 Var Reverse Reactive Power Threshold setting -30.0 -30.0

34B RQ RQ1DPR 50 - 98 % Reverse Reactive Power DO/PU ratio 95 95

34C RQ TRQ1 0.00 - 300.00 s Reverse Reactive Power Definite time setting 0.20 0.20

34D RQ TCBRQ1 0.0 - 60.0 s wait time after CB closeing 5.0 5.0

34E RQ RQ2 -1500.0 - -1.0 Var Reverse Reactive Power Threshold setting -30.0 -30.0

34F RQ RQ2DPR 50 - 98 % Reverse Reactive Power DO/PU ratio 95 95

34G RQ TRQ2 0.00 - 300.00 s Reverse Reactive Power Definite time setting 1.00 1.00

34H RQ TCBRQ2 0.0 - 60.0 s wait time after CB closeing 5.0 5.0

34I RQ RQVBLK 40.0 - 100.0 V UV Blocking threshold 40.0 40.0

345 OCD OCD 0.10 - 5.00 A OCD Threshold setting 1.00 1.00

346 OCD TOCD 0.00 - 20.00 s OCD Off-delay time. 0.00 0.00

347 OV OV1 10.0 - 200.0 V OV1 Threshold setting 120.0 120.0

348 OV TOV1 0.00 - 300.00 s OV1 Definite time setting 0.10 0.10

349 OV TOV1M 0.05 - 100.00 － OV1 Time multiplier setting 10.00 10.00

350 OV TOV1R 0.0 - 300.0 s OV1 Definite time reset delay 0.0 0.0

351 OV OV1DPR 10 - 98 % OV1 DO/PU ratio 95 95

 373 
 6 F 2 T 0 1 7 7

Default Value
No. Name Range Units Contents Model Model
400, 401, 402 420, 421, 422
（700, 701, 702） (720, 721, 722)
352 OV OV2 10.0 - 200.0 V OV2 Threshold setting 140.0 140.0

353 OV TOV2 0.00 - 300.00 s OV2 Definite time setting 0.10 0.10

354 OV TOV2M 0.05 - 100.00 － OV2 Time multiplier setting 10.00 10.00

355 OV TOV2R 0.0 - 300.0 s OV2 Definite time reset delay 0.0 0.0

356 OV OV2DPR 10 - 98 % OV2 DO/PU ratio 95 95

357 OV OV3 10.0 - 200.0 V OV3 Threshold setting 160.0 160.0

358 OV TOV3 0.00 - 300.00 s OV3 Definite time setting 0.10 0.10

359 OV OV3DPR 10 - 98 % OV3 DO/PU ratio 95 95

360 OV OV4 10.0 - 200.0 V OV4 Threshold setting 180.0 180.0

361 OV TOV4 0.00 - 300.00 s OV4 Definite time setting 0.10 0.10

362 OV OV4DPR 10 - 98 % OV4 DO/PU ratio 95 95

363 OV OV1-k 0.00 - 300.00 － Configurable IDMT Curve setting of OV1 1.00 1.00

364 OV OV1-a 0.00 - 5.00 － ditto 1.00 1.00

365 OV OV1-C 0.000 - 5.000 － ditto 0.000 0.000

366 OV OV2-k 0.00 - 300.00 － Configurable IDMT Curve setting of OV2 1.00 1.00

367 OV OV2-a 0.00 - 5.00 － ditto 1.00 1.00

368 OV OV2-C 0.000 - 5.000 － ditto 0.000 0.000

369 UV UV1 5.0 - 130.0 V UV1 Threshold setting 20.0 20.0

370 UV TUV1 0.00 - 300.00 s UV1 Definite time setting 0.00 0.00

371 UV TUV1M 0.05 - 100.00 － UV1 Time multiplier setting 10.00 10.00

372 UV TUV1R 0.0 - 300.0 s UV1 Definite time reset delay 0.0 0.0

373 UV UV2 5.0 - 130.0 V UV2 Threshold setting 15.0 15.0

374 UV TUV2 0.00 - 300.00 s UV2 Definite time setting 0.10 0.10

375 UV TUV2M 0.05 - 100.00 － UV2 Time multiplier setting 10.00 10.00

376 UV TUV2R 0.0 - 300.0 s UV2 Definite time reset delay 0.0 0.0

377 UV UV3 5.0 - 130.0 V UV3 Threshold setting 10.0 10.0

378 UV TUV3 0.00 - 300.00 s UV3 Definite time setting 0.10 0.10

379 UV UV4 5.0 - 130.0 V UV4 Threshold setting 20.0 20.0

380 UV TUV4 0.00 - 300.00 s UV4 Definite time setting 0.10 0.10

381 UV VBLK 5.0 - 20.0 V UV Blocking threshold 10.0 10.0

382 UV UV1-k 0.00 - 300.00 － Configurable IDMT Curve setting of UV1 1.00 1.00

383 UV UV1-a 0.00 - 5.00 － ditto 1.00 1.00

384 UV UV1-C 0.000 - 5.000 － ditto 0.000 0.000

385 UV UV2-k 0.00 - 300.00 － Configurable IDMT Curve setting of UV2 1.00 1.00

386 UV UV2-a 0.00 - 5.00 － ditto 1.00 1.00

387 UV UV2-C 0.000 - 5.000 － ditto 0.000 0.000

388 ZOV ZOV1 1.0 - 160.0 V ZOV1 Threshold setting 20.0 20.0

389 ZOV TZOV1 0.00 - 300.00 s ZOV1 Definite time setting 0.00 0.00

390 ZOV TZOV1M 0.05 - 100.00 － ZOV1 Time multiplier setting 10.00 10.00

391 ZOV TZOV1R 0.0 - 300.0 s ZOV1 Definite time reset delay 0.0 0.0

392 ZOV ZOV2 1.0 - 160.0 V ZOV2 Threshold setting 40.0 40.0

393 ZOV TZOV2 0.00 - 300.00 s ZOV2 Definite time setting 0.00 0.00

394 ZOV TZOV2M 0.05 - 100.00 － ZOV2 Time multiplier setting 10.00 10.00

395 ZOV TZOV2R 0.0 - 300.0 s ZOV2 Definite time reset delay 0.0 0.0

396 ZOV ZOV1-k 0.00 - 300.00 － Configurable IDMT Curve setting of ZOV1 1.00 1.00

397 ZOV ZOV1-a 0.00 - 5.00 － ditto 1.00 1.00

398 ZOV ZOV1-C 0.000 - 5.000 － ditto 0.000 0.000

399 ZOV ZOV2-k 0.00 - 300.00 － Configurable IDMT Curve setting of ZOV2 1.00 1.00

400 ZOV ZOV2-a 0.00 - 5.00 － ditto 1.00 1.00

401 ZOV ZOV2-C 0.000 - 5.000 － ditto 0.000 0.000

402 NOV NOV1 1.0 - 160.0 V NOV1 Threshold setting 20.0 20.0

403 NOV TNOV1 0.00 - 300.00 s NOV1 Definite time setting 0.00 0.00

 374 
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Default Value
No. Name Range Units Contents Model Model
400, 401, 402 420, 421, 422
（700, 701, 702） (720, 721, 722)
404 NOV TNOV1M 0.05 - 100.00 － NOV1 Time multiplier setting 10.00 10.00

405 NOV TNOV1R 0.0 - 300.0 s NOV1 Definite time reset delay 0.0 0.0

406 NOV NOV2 1.0 - 160.0 V NOV2 Threshold setting 40.0 40.0

407 NOV TNOV2 0.00 - 300.00 s NOV2 Definite time setting 0.00 0.00

408 NOV TNOV2M 0.05 - 100.00 － NOV2 Time multiplier setting 10.00 10.00

409 NOV TNOV2R 0.0 - 300.0 s NOV2 Definite time reset delay 0.0 0.0

410 NOV NOV1-k 0.00 - 300.00 － Configurable IDMT Curve setting of NOV1 1.00 1.00

411 NOV NOV1-a 0.00 - 5.00 － ditto 1.00 1.00

412 NOV NOV1-C 0.000 - 5.000 － ditto 0.000 0.000

413 NOV NOV2-k 0.00 - 300.00 － Configurable IDMT Curve setting of NOV2 1.00 1.00

414 NOV NOV2-a 0.00 - 5.00 － ditto 1.00 1.00

415 NOV NOV2-C 0.000 - 5.000 － ditto 0.000 0.000

416 FRQ FRQ1 -10.00 - 10.00 Hz FRQ1 Threshold setting -1.00 -1.00

417 FRQ TFRQ1 0.00 - 300.00 s FRQ1 Definite time setting 1.00 1.00

418 FRQ FRQ2 -10.00 - 10.00 Hz FRQ2 Threshold setting -1.00 -1.00

419 FRQ TFRQ2 0.00 - 300.00 s FRQ2 Definite time setting 1.00 1.00

420 FRQ FRQ3 -10.00 - 10.00 Hz FRQ3 Threshold setting -1.00 -1.00

421 FRQ TFRQ3 0.00 - 300.00 s FRQ3 Definite time setting 1.00 1.00

422 FRQ FRQ4 -10.00 - 10.00 Hz FRQ4 Threshold setting -1.00 -1.00

423 FRQ TFRQ4 0.00 - 300.00 s FRQ4 Definite time setting 1.00 1.00

424 FRQ FVBLK 40.0 - 100.0 V UV Blocking threshold 40.0 40.0

425 DFRQ DFRQ1 0.1 - 15.0 Hzs DFRQ1 Threshold setting. 0.5 0.5

426 DFRQ DFRQ2 0.1 - 15.0 Hzs DFRQ2 Threshold setting. 0.5 0.5

427 DFRQ DFRQ3 0.1 - 15.0 Hzs DFRQ3 Threshold setting. 0.5 0.5

428 DFRQ DFRQ4 0.1 - 15.0 Hzs DFRQ4 Threshold setting. 0.5 0.5

429 MOT TEXST 0.1 - 300.0 s Motor Start Pro. Time. -- (60.0) -- (60.0)

430 MOT TMTST 0.1 - 300.0 s Motor Start_up Time. -- (60.0) -- (60.0)

431 MOT LKRTIS 0.10 - 100.00 A Motor Start Current. -- (7.50) -- (7.50)

432 MOT TLKRT 1 - 300 s Rotor Restraint Time. -- (120) -- (120)

433 MOT RTTHM 50 - 500 % Rotor Permissible Heat Range. -- (200) -- (200)

434 MOT IMOT 0.20 - 10.00 A Motor rated current -- (1.00) -- (1.00)

435 MOT STRT 0.10 - 50.00 A 50S Threshold setting -- (5.00) -- (5.00)

436 MOT TSTRT 0.00 - 300.00 s 50S Definite time setting. -- (0.00) -- (0.00)

437 MOT TTHM2 0.5 - 500.0 min Thermal Radiation Time Constant. -- (30.0) -- (30.0)

438 MOT LIMNUM 1 - 60 － limit number for Starts per hour -- (5) -- (5)

439 CTF/VTF EFF 0.05 - 25.00 A EF Threshold setting for CTF/VTF scheme. 0.20 0.20

440 CTF/VTF OCDF 0.1(Fixed) A OCD Threshold setting for CTF/VTF scheme. -- --

441 CTF/VTF ZOVF 5.0 - 130.0 V ZOV Threshold setting for CTF/VTF scheme. 20.0 20.0

442 CTF/VTF UVF 5.0 - 130.0 V UV(Ph-G) Threshold setting for VTF scheme. 51.0 51.0

443 ARC ARCEN Off - On － Autoreclosing Enable. On On

444 ARC ARC-NUM S1 - S2 - S3 - S4 - S5 － Reclosing shot max. number S1 S1

445 ARC VCHK Off - LD - DL - DD - S － Autoreclosing volatge check Off Off

446 ARC DfEN Off - On － Frequency difference checking enable Off Off

447 ARC VTPHSEL A-B-C － VT phase selection A A

448 ARC VT-RATE PH-G - PH-PH － VT rating PH-G PH-G

449 ARC 3PH-VT Bus - Line － 3ph. VT location Line Line

450 ARC OC1-INIT NA - On - Block － Autoreclosing initiation by OC1 enable NA NA

451 ARC OC1-TP1 Off - Inst - Set － OC1 trip mode of 1st trip Set Set

452 ARC OC1-TP2 Off - Inst - Set － OC1 trip mode of 2nd trip Set Set

453 ARC OC1-TP3 Off - Inst - Set － OC1 trip mode of 3rd trip Set Set

454 ARC OC1-TP4 Off - Inst - Set － OC1 trip mode of 4th trip Set Set

455 ARC OC1-TP5 Off - Inst - Set － OC1 trip mode of 5th trip Set Set

 375 
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Default Value
No. Name Range Units Contents Model Model
400, 401, 402 420, 421, 422
（700, 701, 702） (720, 721, 722)
456 ARC OC1-TP6 Off - Inst - Set － OC1 trip mode of 6th trip Set Set

457 ARC OC2-INIT NA - On - Block － Autoreclosing initiation by OC2 enable NA NA

458 ARC OC2-TP1 Off - Inst - Set － OC2 trip mode of 1st trip Set Set

459 ARC OC2-TP2 Off - Inst - Set － OC2 trip mode of 2nd trip Set Set

460 ARC OC2-TP3 Off - Inst - Set － OC2 trip mode of 3rd trip Set Set

461 ARC OC2-TP4 Off - Inst - Set － OC2 trip mode of 4th trip Set Set

462 ARC OC2-TP5 Off - Inst - Set － OC2 trip mode of 5th trip Set Set

463 ARC OC2-TP6 Off - Inst - Set － OC2 trip mode of 6th trip Set Set

464 ARC OC3-INIT NA - On - Block － Autoreclosing initiation by OC3 enable NA NA

465 ARC OC3-TP1 Off - Inst - Set － OC3 trip mode of 1st trip Set Set

466 ARC OC3-TP2 Off - Inst - Set － OC3 trip mode of 2nd trip Set Set

467 ARC OC3-TP3 Off - Inst - Set － OC3 trip mode of 3rd trip Set Set

468 ARC OC3-TP4 Off - Inst - Set － OC3 trip mode of 4th trip Set Set

469 ARC OC3-TP5 Off - Inst - Set － OC3 trip mode of 5th trip Set Set

470 ARC OC3-TP6 Off - Inst - Set － OC3 trip mode of 6th trip Set Set

471 ARC OC4-INIT NA - On - Block － Autoreclosing initiation by OC4 enable NA NA

472 ARC OC4-TP1 Off - Inst - Set － OC4 trip mode of 1st trip Set Set

473 ARC OC4-TP2 Off - Inst - Set － OC4 trip mode of 2nd trip Set Set

474 ARC OC4-TP3 Off - Inst - Set － OC4 trip mode of 3rd trip Set Set

475 ARC OC4-TP4 Off - Inst - Set － OC4 trip mode of 4th trip Set Set

476 ARC OC4-TP5 Off - Inst - Set － OC4 trip mode of 5th trip Set Set

477 ARC OC4-TP6 Off - Inst - Set － OC4 trip mode of 6th trip Set Set

478 ARC COORD-OC Off - On － OC relay for Co-ordination Enable Off Off

479 ARC EF1-INIT NA - On - Block － Autoreclosing initiation by EF1 enable NA NA

480 ARC EF1-TP1 Off - Inst - Set － EF1 trip mode of 1st trip Set Set

481 ARC EF1-TP2 Off - Inst - Set － EF1 trip mode of 2nd trip Set Set

482 ARC EF1-TP3 Off - Inst - Set － EF1 trip mode of 3rd trip Set Set

483 ARC EF1-TP4 Off - Inst - Set － EF1 trip mode of 4th trip Set Set

484 ARC EF1-TP5 Off - Inst - Set － EF1 trip mode of 5th trip Set Set

485 ARC EF1-TP6 Off - Inst - Set － EF1 trip mode of 6th trip Set Set

486 ARC EF2-INIT NA - On - Block － Autoreclosing initiation by EF2 enable NA NA

487 ARC EF2-TP1 Off - Inst - Set － EF2 trip mode of 1st trip Set Set

488 ARC EF2-TP2 Off - Inst - Set － EF2 trip mode of 2nd trip Set Set

489 ARC EF2-TP3 Off - Inst - Set － EF2 trip mode of 3rd trip Set Set

490 ARC EF2-TP4 Off - Inst - Set － EF2 trip mode of 4th trip Set Set

491 ARC EF2-TP5 Off - Inst - Set － EF2 trip mode of 5th trip Set Set

492 ARC EF2-TP6 Off - Inst - Set － EF2 trip mode of 6th trip Set Set

493 ARC EF3-INIT NA - On - Block － Autoreclosing initiation by EF3 enable NA NA

494 ARC EF3-TP1 Off - Inst - Set － EF3 trip mode of 1st trip Set Set

495 ARC EF3-TP2 Off - Inst - Set － EF3 trip mode of 2nd trip Set Set

496 ARC EF3-TP3 Off - Inst - Set － EF3 trip mode of 3rd trip Set Set

497 ARC EF3-TP4 Off - Inst - Set － EF3 trip mode of 4th trip Set Set

498 ARC EF3-TP5 Off - Inst - Set － EF3 trip mode of 5th trip Set Set

499 ARC EF3-TP6 Off - Inst - Set － EF3 trip mode of 6th trip Set Set

500 ARC EF4-INIT NA - On - Block － Autoreclosing initiation by EF4 enable NA NA

501 ARC EF4-TP1 Off - Inst - Set － EF4 trip mode of 1st trip Set Set

502 ARC EF4-TP2 Off - Inst - Set － EF4 trip mode of 2nd trip Set Set

503 ARC EF4-TP3 Off - Inst - Set － EF4 trip mode of 3rd trip Set Set

504 ARC EF4-TP4 Off - Inst - Set － EF4 trip mode of 4th trip Set Set

505 ARC EF4-TP5 Off - Inst - Set － EF4 trip mode of 5th trip Set Set

506 ARC EF4-TP6 Off - Inst - Set － EF4 trip mode of 6th trip Set Set

507 ARC COORD-EF Off - On － EF relay for Co-ordination Enable Off Off

508 ARC SE1-INIT NA - On - Block － Autoreclosing initiation by SEF1 enable -- (NA) NA

 376 
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Default Value
No. Name Range Units Contents Model Model
400, 401, 402 420, 421, 422
（700, 701, 702） (720, 721, 722)
509 ARC SE1-TP1 Off - Inst - Set － SEF1 trip mode of 1st trip -- (Set) Set

510 ARC SE1-TP2 Off - Inst - Set － SEF1 trip mode of 2nd trip -- (Set) Set

511 ARC SE1-TP3 Off - Inst - Set － SEF1 trip mode of 3rd trip -- (Set) Set

512 ARC SE1-TP4 Off - Inst - Set － SEF1 trip mode of 4th trip -- (Set) Set

513 ARC SE1-TP5 Off - Inst - Set － SEF1 trip mode of 5th trip -- (Set) Set

514 ARC SE1-TP6 Off - Inst - Set － SEF1 trip mode of 6th trip -- (Set) Set

515 ARC SE2-INIT NA - On - Block － Autoreclosing initiation by SEF2 enable -- (NA) NA

516 ARC SE2-TP1 Off - Inst - Set － SEF2 trip mode of 1st trip -- (Set) Set

517 ARC SE2-TP2 Off - Inst - Set － SEF2 trip mode of 2nd trip -- (Set) Set

518 ARC SE2-TP3 Off - Inst - Set － SEF2 trip mode of 3rd trip -- (Set) Set

519 ARC SE2-TP4 Off - Inst - Set － SEF2 trip mode of 4th trip -- (Set) Set

520 ARC SE2-TP5 Off - Inst - Set － SEF2 trip mode of 5th trip -- (Set) Set

521 ARC SE2-TP6 Off - Inst - Set － SEF2 trip mode of 6th trip -- (Set) Set

522 ARC SE3-INIT NA - On - Block － Autoreclosing initiation by SEF3 enable -- (NA) NA

523 ARC SE3-TP1 Off - Inst - Set － SEF3 trip mode of 1st trip -- (Set) Set

524 ARC SE3-TP2 Off - Inst - Set － SEF3 trip mode of 2nd trip -- (Set) Set

525 ARC SE3-TP3 Off - Inst - Set － SEF3 trip mode of 3rd trip -- (Set) Set

526 ARC SE3-TP4 Off - Inst - Set － SEF3 trip mode of 4th trip -- (Set) Set

527 ARC SE3-TP5 Off - Inst - Set － SEF3 trip mode of 5th trip -- (Set) Set

528 ARC SE3-TP6 Off - Inst - Set － SEF3 trip mode of 6th trip -- (Set) Set

529 ARC SE4-INIT NA - On - Block － Autoreclosing initiation by SEF4 enable -- (NA) NA

530 ARC SE4-TP1 Off - Inst - Set － SEF4 trip mode of 1st trip -- (Set) Set

531 ARC SE4-TP2 Off - Inst - Set － SEF4 trip mode of 2nd trip -- (Set) Set

532 ARC SE4-TP3 Off - Inst - Set － SEF4 trip mode of 3rd trip -- (Set) Set

533 ARC SE4-TP4 Off - Inst - Set － SEF4 trip mode of 4th trip -- (Set) Set

534 ARC SE4-TP5 Off - Inst - Set － SEF4 trip mode of 5th trip -- (Set) Set

535 ARC SE4-TP6 Off - Inst - Set － SEF4 trip mode of 6th trip -- (Set) Set

536 ARC COORD-SE Off - On － SEF relay for Co-ordination Enable -- (Off) Off
Autoreclosing initiation by External Trip
537 ARC EXT-INIT NA - On - Block － NA NA
Command enable
538 ARC TRDY 0.0 - 600.0 s Reclaim timer 60.0 60.0

539 ARC TD1 0.01 - 300.00 s 1st shot Dead timer of Stage1 10.00 10.00

540 ARC TR1 0.01 - 310.00 s 1st shot Reset timer of Stage1 310.00 310.00

541 ARC TD2 0.01 - 300.00 s 2nd shot Dead timer of Stage1 10.00 10.00

542 ARC TR2 0.01 - 310.00 s 2nd shot Reset timer of Stage1 310.00 310.00

543 ARC TD3 0.01 - 300.00 s 3rd shot Dead timer of Stage1 10.00 10.00

544 ARC TR3 0.01 - 310.00 s 3rd shot Reset timer of Stage1 310.00 310.00

545 ARC TD4 0.01 - 300.00 s 4th shot Dead timer of Stage1 10.00 10.00

546 ARC TR4 0.01 - 310.00 s 4th shot Reset timer of Stage1 310.00 310.00

547 ARC TD5 0.01 - 300.00 s 5th shot Dead timer of Stage1 10.00 10.00

548 ARC TR5 0.01 - 310.00 s 5th shot Reset timer of Stage1 310.00 310.00

549 ARC TW 0.01 - 10.00 s Out put pulse timer 2.00 2.00

550 ARC TSUC 0.0 - 600.0 s Autoreclosing Pause Time after manually close 3.0 3.0

551 ARC TRCOV 0.1 - 600.0 s Autoreclosing Recovery time after Final Trip 10.0 10.0

552 ARC TARCP 0.1 - 600.0 s Autoreclosing Pause Time after manually close 10.0 10.0

553 ARC TRSET 0.01 - 300.00 s ARC reset time in CB closing mode. 3.00 3.00

554 ARC OVB 10 - 150 V OV element of bus-voltage check 51 51

555 ARC UVB 10 - 150 V UV element of bus-voltage check 13 13

556 ARC OVL 10 - 150 V OV element of line-voltage check 51 51

557 ARC UVL 10 - 150 V UV element of line-voltage check 13 13

558 ARC SYNUV 10 - 150 V UV element of Synchro. check 83 83

559 ARC SYNOV 10 - 150 V OV element of Synchro. check 51 51

560 ARC SYNDV 0 - 150 V Voltage difference for SYN 150 150

561 ARC SYNTH 5 - 75 deg Synchro. check (ph. diff.) 30 30

 377 
 6 F 2 T 0 1 7 7

Default Value
No. Name Range Units Contents Model Model
400, 401, 402 420, 421, 422
（700, 701, 702） (720, 721, 722)
562 ARC SYNDf 0.01 - 2.00 Hz Frequency difference checking for SYN 1.00 1.00

563 ARC TSYN 0.01 - 10.00 s Synchronism check timer (Live-bus & Live-line) 1.00 1.00

564 ARC TLBDL 0.01 - 10.00 s Voltage check timer (Live-bus & Dead-line) 0.05 0.05

565 ARC TDBLL 0.01 - 10.00 s Voltage check timer (Dead-bus & Live-line) 0.05 0.05

566 ARC TDBDL 0.01 - 10.00 s Voltage check timer (Dead-bus & Dead-line) 0.05 0.05

567 ARC OC-CO 0.10 - 150.00 A For Co-ordination 2.00 2.00

568 ARC EF-CO 0.05 - 100.00 A ditto 0.60 0.60

569 ARC SE-CO 0.001 - 1.000 A ditto -- (0.010) 0.010

570 A.M.F. Off - On － Automatic monitoring function On On

571 UVTST Off - On － Disable / Enable VBLK in UV trip scheme. Off Off

572 CLPTST Off - S0 - S3 － Forcibly control of CLP State. Off Off

573 THMRST Off - On － Forcibly Reset of Thermal-θ value. Off Off

574 SHOTNUM Off-S1-S2-S3-S4-S5-S6 － Forcibly control of Trip/ARC shot number. Off Off

575 IECTST Off - On － IEC103 Test Mode Off Off

576 STPHRST Off - On － Reset of Motor Start Time for STPH Off Off

577 BITHR1 V1 - V2 - V3 － Binary Input Threshold setting1 V2 V2

578 BITHR2 V1 - V2 － Binary Input Threshold setting2 V1 V1

579 BI1 PUD 0.00 - 300.00 s Binary Input Pick-up delay 0.00 0.00

580 BI1 DOD 0.00 - 300.00 s Binary Input Drop-off delay 0.00 0.00

581 BI1 SNS Norm - Inv － Binary Input Sense Norm Norm

582 BI2 PUD 0.00 - 300.00 s Binary Input Pick-up delay 0.00 0.00

583 BI2 DOD 0.00 - 300.00 s Binary Input Drop-off delay 0.00 0.00

584 BI2 SNS Norm - Inv － Binary Input Sense Norm Norm

585 BI3 PUD 0.00 - 300.00 s Binary Input Pick-up delay 0.00 0.00

586 BI3 DOD 0.00 - 300.00 s Binary Input Drop-off delay 0.00 0.00

587 BI3 SNS Norm - Inv － Binary Input Sense Norm Norm

588 BI4 PUD 0.00 - 300.00 s Binary Input Pick-up delay 0.00 0.00

589 BI4 DOD 0.00 - 300.00 s Binary Input Drop-off delay 0.00 0.00

590 BI4 SNS Norm - Inv － Binary Input Sense Norm Norm

591 BI5 PUD 0.00 - 300.00 s Binary Input Pick-up delay 0.00 0.00

592 BI5 DOD 0.00 - 300.00 s Binary Input Drop-off delay 0.00 0.00

593 BI5 SNS Norm - Inv － Binary Input Sense Norm Norm

594 BI6 PUD 0.00 - 300.00 s Binary Input Pick-up delay 0.00 0.00

595 BI6 DOD 0.00 - 300.00 s Binary Input Drop-off delay 0.00 0.00

596 BI6 SNS Norm - Inv － Binary Input Sense Norm Norm

597 BI7 PUD 0.00 - 300.00 s Binary Input Pick-up delay ― ―

598 BI7 DOD 0.00 - 300.00 s Binary Input Drop-off delay ― ―

599 BI7 SNS Norm - Inv － Binary Input Sense ― ―

600 BI8 PUD 0.00 - 300.00 s Binary Input Pick-up delay ― ―

601 BI8 DOD 0.00 - 300.00 s Binary Input Drop-off delay ― ―

602 BI8 SNS Norm - Inv － Binary Input Sense ― ―

603 BI9 PUD 0.00 - 300.00 s Binary Input Pick-up delay ― ―

604 BI9 DOD 0.00 - 300.00 s Binary Input Drop-off delay ― ―

605 BI9 SNS Norm - Inv － Binary Input Sense ― ―

606 BI10 PUD 0.00 - 300.00 s Binary Input Pick-up delay ― ―

607 BI10 DOD 0.00 - 300.00 s Binary Input Drop-off delay ― ―

608 BI10 SNS Norm - Inv － Binary Input Sense ― ―

609 BI11 PUD 0.00 - 300.00 s Binary Input Pick-up delay ― ―

610 BI11 DOD 0.00 - 300.00 s Binary Input Drop-off delay ― ―

611 BI11 SNS Norm - Inv － Binary Input Sense ― ―

612 BI12 PUD 0.00 - 300.00 s Binary Input Pick-up delay ― ―

613 BI12 DOD 0.00 - 300.00 s Binary Input Drop-off delay ― ―

614 BI12 SNS Norm - Inv － Binary Input Sense ― ―

 378 
 6 F 2 T 0 1 7 7

Default Value
No. Name Range Units Contents Model Model
400, 401, 402 420, 421, 422
（700, 701, 702） (720, 721, 722)
615 BI13 PUD 0.00 - 300.00 s Binary Input Pick-up delay ― ―

616 BI13 DOD 0.00 - 300.00 s Binary Input Drop-off delay ― ―

617 BI13 SNS Norm - Inv － Binary Input Sense ― ―

618 BI14 PUD 0.00 - 300.00 s Binary Input Pick-up delay ― ―

619 BI14 DOD 0.00 - 300.00 s Binary Input Drop-off delay ― ―

620 BI14 SNS Norm - Inv － Binary Input Sense ― ―

621 BI15 PUD 0.00 - 300.00 s Binary Input Pick-up delay ― ―

622 BI15 DOD 0.00 - 300.00 s Binary Input Drop-off delay ― ―

623 BI15 SNS Norm - Inv － Binary Input Sense ― ―

624 BI16 PUD 0.00 - 300.00 s Binary Input Pick-up delay ― ―

625 BI16 DOD 0.00 - 300.00 s Binary Input Drop-off delay ― ―

626 BI16 SNS Norm - Inv － Binary Input Sense ― ―

627 BI17 PUD 0.00 - 300.00 s Binary Input Pick-up delay ― ―

628 BI17 DOD 0.00 - 300.00 s Binary Input Drop-off delay ― ―

629 BI17 SNS Norm - Inv － Binary Input Sense ― ―

630 BI18 PUD 0.00 - 300.00 s Binary Input Pick-up delay ― ―

631 BI18 DOD 0.00 - 300.00 s Binary Input Drop-off delay ― ―

632 BI18 SNS Norm - Inv － Binary Input Sense ― ―

633 BO1 Logic OR - AND － Logic gate OR OR

634 BO1 Reset Ins - Dl - Dw - Lat － Reset application Dl Dl

635 BO1 In #1 0 - 3071 － Output signal 0 0

636 BO1 In #2 0 - 3071 － ditto 0 0

637 BO1 In #3 0 - 3071 － ditto 0 0

638 BO1 In #4 0 - 3071 － ditto 0 0

639 BO1 In #5 0 - 3071 － ditto 0 0

640 BO1 In #6 0 - 3071 － ditto 0 0

641 BO1 TBO 0.00 - 10.00 s Dl/Dw timer 0.20 0.20

642 BO2 Logic OR - AND － Logic gate OR OR

643 BO2 Reset Ins - Dl - Dw - Lat － Reset application Dl Dl

371(GEN.TRIP
644 BO2 In #1 0 - 3071 － Output signal 371(GEN.TRIP)
)
645 BO2 In #2 0 - 3071 － ditto 0 0

646 BO2 In #3 0 - 3071 － ditto 0 0

647 BO2 In #4 0 - 3071 － ditto 0 0

648 BO2 In #5 0 - 3071 － ditto 0 0

649 BO2 In #6 0 - 3071 － ditto 0 0

650 BO2 TBO 0.00 - 10.00 s Dl/Dw timer 0.20 0.20

651 BO3 Logic OR - AND － Logic gate OR OR

652 BO3 Reset Ins - Dl - Dw - Lat － Reset application Dl Dl

380(GEN.ALAR 380(GEN.ALA
653 BO3 In #1 0 - 3071 － Output signal
M) RM)
654 BO3 In #2 0 - 3071 － ditto 0 0

655 BO3 In #3 0 - 3071 － ditto 0 0

656 BO3 In #4 0 - 3071 － ditto 0 0

657 BO3 In #5 0 - 3071 － ditto 0 0

658 BO3 In #6 0 - 3071 － ditto 0 0

659 BO3 TBO 0.00 - 10.00 s Dl/Dw timer 0.20 0.20

660 BO4 Logic OR - AND － Logic gate OR OR

661 BO4 Reset Ins - Dl - Dw - Lat － Reset application Dl Dl

662 BO4 In #1 0 - 3071 － Output signal 536(UVB) 536(UVB)

663 BO4 In #2 0 - 3071 － ditto 0 0

664 BO4 In #3 0 - 3071 － ditto 0 0

665 BO4 In #4 0 - 3071 － ditto 0 0

666 BO4 In #5 0 - 3071 － ditto 0 0

667 BO4 In #6 0 - 3071 － ditto 0 0

 379 
 6 F 2 T 0 1 7 7

Default Value
No. Name Range Units Contents Model Model
400, 401, 402 420, 421, 422
（700, 701, 702） (720, 721, 722)
668 BO4 TBO 0.00 - 10.00 s Dl/Dw timer 0.20 0.20

669 BO5 Logic OR - AND － Logic gate ― ―

670 BO5 Reset Ins - Dl - Dw - Lat － Reset application ― ―

671 BO5 In #1 0 - 3071 － Output signal ― ―

672 BO5 In #2 0 - 3071 － ditto ― ―

673 BO5 In #3 0 - 3071 － ditto ― ―

674 BO5 In #4 0 - 3071 － ditto ― ―

675 BO5 In #5 0 - 3071 － ditto ― ―

676 BO5 In #6 0 - 3071 － ditto ― ―

677 BO5 TBO 0.00 - 10.00 s Dl/Dw timer ― ―

678 BO6 Logic OR - AND － Logic gate ― ―

679 BO6 Reset Ins - Dl - Dw - Lat － Reset application ― ―

680 BO6 In #1 0 - 3071 － Output signal ― ―

681 BO6 In #2 0 - 3071 － ditto ― ―

682 BO6 In #3 0 - 3071 － ditto ― ―

683 BO6 In #4 0 - 3071 － ditto ― ―

684 BO6 In #5 0 - 3071 － ditto ― ―

685 BO6 In #6 0 - 3071 － ditto ― ―

686 BO6 TBO 0.00 - 10.00 s Dl/Dw timer ― ―

687 BO7 Logic OR - AND － Logic gate ― ―

688 BO7 Reset Ins - Dl - Dw - Lat － Reset application ― ―

689 BO7 In #1 0 - 3071 － Output signal ― ―

690 BO7 In #2 0 - 3071 － ditto ― ―

691 BO7 In #3 0 - 3071 － ditto ― ―

692 BO7 In #4 0 - 3071 － ditto ― ―

693 BO7 In #5 0 - 3071 － ditto ― ―

694 BO7 In #6 0 - 3071 － ditto ― ―

695 BO7 TBO 0.00 - 10.00 s Dl/Dw timer ― ―

696 BO8 Logic OR - AND － Logic gate ― ―

697 BO8 Reset Ins - Dl - Dw - Lat － Reset application ― ―

698 BO8 In #1 0 - 3071 － Output signal ― ―

699 BO8 In #2 0 - 3071 － ditto ― ―

700 BO8 In #3 0 - 3071 － ditto ― ―

701 BO8 In #4 0 - 3071 － ditto ― ―

702 BO8 In #5 0 - 3071 － ditto ― ―

703 BO8 In #6 0 - 3071 － ditto ― ―

704 BO8 TBO 0.00 - 10.00 s Dl/Dw timer ― ―

705 BO9 Logic OR - AND － Logic gate ― ―

706 BO9 Reset Ins - Dl - Dw - Lat － Reset application ― ―

707 BO9 In #1 0 - 3071 － Output signal ― ―

708 BO9 In #2 0 - 3071 － ditto ― ―

709 BO9 In #3 0 - 3071 － ditto ― ―

710 BO9 In #4 0 - 3071 － ditto ― ―

711 BO9 In #5 0 - 3071 － ditto ― ―

712 BO9 In #6 0 - 3071 － ditto ― ―

713 BO9 TBO 0.00 - 10.00 s Dl/Dw timer ― ―

714 BO10 Logic OR - AND － Logic gate ― ―

715 BO10 Reset Ins - Dl - Dw - Lat － Reset application ― ―

716 BO10 In #1 0 - 3071 － Output signal ― ―

717 BO10 In #2 0 - 3071 － ditto ― ―

718 BO10 In #3 0 - 3071 － ditto ― ―

719 BO10 In #4 0 - 3071 － ditto ― ―

720 BO10 In #5 0 - 3071 － ditto ― ―

 380 
 6 F 2 T 0 1 7 7

Default Value
No. Name Range Units Contents Model Model
400, 401, 402 420, 421, 422
（700, 701, 702） (720, 721, 722)
721 BO10 In #6 0 - 3071 － ditto ― ―

722 BO10 TBO 0.00 - 10.00 s Dl/Dw timer ― ―

723 BO11 Logic OR - AND － Logic gate ― ―

724 BO11 Reset Ins - Dl - Dw - Lat － Reset application ― ―

725 BO11 In #1 0 - 3071 － Output signal ― ―

726 BO11 In #2 0 - 3071 － ditto ― ―

727 BO11 In #3 0 - 3071 － ditto ― ―

728 BO11 In #4 0 - 3071 － ditto ― ―

729 BO11 In #5 0 - 3071 － ditto ― ―

730 BO11 In #6 0 - 3071 － ditto ― ―

731 BO11 TBO 0.00 - 10.00 s Dl/Dw timer ― ―

732 BO12 Logic OR - AND － Logic gate ― ―

733 BO12 Reset Ins - Dl - Dw - Lat － Reset application ― ―

734 BO12 In #1 0 - 3071 － Output signal ― ―

735 BO12 In #2 0 - 3071 － ditto ― ―

736 BO12 In #3 0 - 3071 － ditto ― ―

737 BO12 In #4 0 - 3071 － ditto ― ―

738 BO12 In #5 0 - 3071 － ditto ― ―

739 BO12 In #6 0 - 3071 － ditto ― ―

740 BO12 TBO 0.00 - 10.00 s Dl/Dw timer ― ―

741 BO13 Logic OR - AND － Logic gate ― ―

742 BO13 Reset Ins - Dl - Dw - Lat － Reset application ― ―

743 BO13 In #1 0 - 3071 － Output signal ― ―

744 BO13 In #2 0 - 3071 － ditto ― ―

745 BO13 In #3 0 - 3071 － ditto ― ―

746 BO13 In #4 0 - 3071 － ditto ― ―

747 BO13 In #5 0 - 3071 － ditto ― ―

748 BO13 In #6 0 - 3071 － ditto ― ―

749 BO13 TBO 0.00 - 10.00 s Dl/Dw timer ― ―

750 BO14 Logic OR - AND － Logic gate ― ―

751 BO14 Reset Ins - Dl - Dw - Lat － Reset application ― ―

752 BO14 In #1 0 - 3071 － Output signal ― ―

753 BO14 In #2 0 - 3071 － ditto ― ―

754 BO14 In #3 0 - 3071 － ditto ― ―

755 BO14 In #4 0 - 3071 － ditto ― ―

756 BO14 In #5 0 - 3071 － ditto ― ―

757 BO14 In #6 0 - 3071 － ditto ― ―

758 BO14 TBO 0.00 - 10.00 s Dl/Dw timer ― ―

759 BO15 Logic OR - AND － Logic gate ― ―

760 BO15 Reset Ins - Dl - Dw - Lat － Reset application ― ―

761 BO15 In #1 0 - 3071 － Output signal ― ―

762 BO15 In #2 0 - 3071 － ditto ― ―

763 BO15 In #3 0 - 3071 － ditto ― ―

764 BO15 In #4 0 - 3071 － ditto ― ―

765 BO15 In #5 0 - 3071 － ditto ― ―

766 BO15 In #6 0 - 3071 － ditto ― ―

767 BO15 TBO 0.00 - 10.00 s Dl/Dw timer ― ―

768 BO16 Logic OR - AND － Logic gate ― ―

769 BO16 Reset Ins - Dl - Dw - Lat － Reset application ― ―

770 BO16 In #1 0 - 3071 － Output signal ― ―

771 BO16 In #2 0 - 3071 － ditto ― ―

772 BO16 In #3 0 - 3071 － ditto ― ―

773 BO16 In #4 0 - 3071 － ditto ― ―

 381 
 6 F 2 T 0 1 7 7

Default Value
No. Name Range Units Contents Model Model
400, 401, 402 420, 421, 422
（700, 701, 702） (720, 721, 722)
774 BO16 In #5 0 - 3071 － ditto ― ―

775 BO16 In #6 0 - 3071 － ditto ― ―

776 BO16 TBO 0.00 - 10.00 s Dl/Dw timer ― ―

777 LED1 Logic OR - AND － LED1 Logic Gate Type OR OR

778 LED1 Reset Inst - Latch － LED1 Reset operation Inst Inst

779 LED1 In #1 0 - 3071 － LED1 Functions 0 0

780 LED1 In #2 0 - 3071 － ditto 0 0

781 LED1 In #3 0 - 3071 － ditto 0 0

782 LED1 In #4 0 - 3071 － ditto 0 0

783 LED2 Logic OR - AND － LED2 Logic Gate Type OR OR

784 LED2 Reset Inst - Latch － LED2 Reset operation Inst Inst

785 LED2 In #1 0 - 3071 － LED2 Functions 0 0

786 LED2 In #2 0 - 3071 － ditto 0 0

787 LED2 In #3 0 - 3071 － ditto 0 0

788 LED2 In #4 0 - 3071 － ditto 0 0

789 LED3 Logic OR - AND － LED3 Logic Gate Type OR OR

790 LED3 Reset Inst - Latch － LED3 Reset operation Inst Inst

791 LED3 In #1 0 - 3071 － LED3 Functions 0 0

792 LED3 In #2 0 - 3071 － ditto 0 0

793 LED3 In #3 0 - 3071 － ditto 0 0

794 LED3 In #4 0 - 3071 － ditto 0 0

795 LED4 Logic OR - AND － LED4 Logic Gate Type OR OR

796 LED4 Reset Inst - Latch － LED4 Reset operation Inst Inst

797 LED4 In #1 0 - 3071 － LED4 Functions 0 0

798 LED4 In #2 0 - 3071 － ditto 0 0

799 LED4 In #3 0 - 3071 － ditto 0 0

800 LED4 In #4 0 - 3071 － ditto 0 0

801 LED5 Logic OR - AND － LED5 Logic Gate Type OR OR

802 LED5 Reset Inst - Latch － LED5 Reset operation Inst Inst

803 LED5 In #1 0 - 3071 － LED5 Functions 0 0

804 LED5 In #2 0 - 3071 － ditto 0 0

805 LED5 In #3 0 - 3071 － ditto 0 0

806 LED5 In #4 0 - 3071 － ditto 0 0

807 LED6 Logic OR - AND － LED6 Logic Gate Type OR OR

808 LED6 Reset Inst - Latch － LED6 Reset operation Inst Inst

809 LED6 In #1 0 - 3071 － LED6 Functions 0 0

810 LED6 In #2 0 - 3071 － ditto 0 0

811 LED6 In #3 0 - 3071 － ditto 0 0

812 LED6 In #4 0 - 3071 － ditto 0 0

813 LED1 Color R/G/Y － LED1 Color

R R
814 LED2 Color R/G/Y － LED2 Color
R R
815 LED3 Color R/G/Y － LED3 Color
R R
816 LED4 Color R/G/Y － LED4 Color
R R
817 LED5 Color R/G/Y － LED5 Color
R R
818 LED6 Color R/G/Y － LED6 Color
R R
CB CLOSED CB LED Color
819 Color R/G/Y －
Color R R
820 IND1 Reset Inst - Latch － Virtual LED1 Reset operation Inst Inst

821 IND1 BIT1 0 - 3071 － Virtual LED1 Functions 0 0

822 IND1 BIT2 0 - 3071 － ditto 0 0

823 IND1 BIT3 0 - 3071 － ditto 0 0

824 IND1 BIT4 0 - 3071 － ditto 0 0

825 IND1 BIT5 0 - 3071 － ditto 0 0

826 IND1 BIT6 0 - 3071 － ditto 0 0

 382 
 6 F 2 T 0 1 7 7

Default Value
No. Name Range Units Contents Model Model
400, 401, 402 420, 421, 422
（700, 701, 702） (720, 721, 722)
827 IND1 BIT7 0 - 3071 － ditto 0 0

828 IND1 BIT8 0 - 3071 － ditto 0 0

829 IND2 Reset Inst - Latch － Virtual LED2 Reset operation Inst Inst

830 IND2 BIT1 0 - 3071 － Virtual LED2 Functions 0 0

831 IND2 BIT2 0 - 3071 － ditto 0 0

832 IND2 BIT3 0 - 3071 － ditto 0 0

833 IND2 BIT4 0 - 3071 － ditto 0 0

834 IND2 BIT5 0 - 3071 － ditto 0 0

835 IND2 BIT6 0 - 3071 － ditto 0 0

836 IND2 BIT7 0 - 3071 － ditto 0 0

837 IND2 BIT8 0 - 3071 － ditto 0 0

Plant name Specified by
838 Plant name Specified by user － Specified by user
user
Memorandum for user Specified by
839 Description Specified by user － Specified by user
user
Alarm1 Text
840 Alarm1 Specified by user － ALARM1 ALARM1
Alarm2 Text
841 Alarm2 Specified by user － ALARM2 ALARM2
Alarm3 Text
842 Alarm3 Specified by user － ALARM3 ALARM3
Alarm4 Text
843 Alarm4 Specified by user － ALARM4 ALARM4

844 Modbus 1 - 247 － Relay ID No. for Modbus 1 1

845 Modbus2 1 - 247 － Relay ID No. for Modbus2 1 1

846 IEC 0 - 254 － Station address for IEC103 1 1

847 IEC2 0 - 254 － Station address for IEC103 1 1

848 RS485BR 9.6 - 19.2 － Baud rate for RS485 Port1 19.2 19.2

849 RS485BR2 9.6 - 19.2 － Baud rate for RS485 Port2 19.2 19.2

850 IECBLK Normal - Blocked － Monitor direction blocked Normal Normal

851 RS485P Off - Modbus - IEC103 － Protocol on RS485 Port1 Modbus Modbus

852 RS485P2 Off - Modbus - IEC103 － Protocol on RS485 Port2 Modbus Modbus

853 EtherP Off - IEC61850 － Protocol on Ethernet1 Off Off

854 EtherP2 Off - IEC61850 － Protocol on Ethernet1 Off Off

855 61850BLK Normal - Blocked － IEC61850 block Normal Normal

856 TSTMOD Off - On － IEC61850 test mode Off Off

857 GSECHK Off - On － GOOSE receive check Off Off

858 PINGCHK Off - On － ping check Off Off

859 IP1-1 0 - 254 － IP address of Ethernet port1 1 192 192

860 IP1-2 0 - 254 － IP address of Ethernet port1 2 168 168

861 IP1-3 0 - 254 － IP address of Ethernet port1 3 19 19

862 IP1-4 0 - 254 － IP address of Ethernet port1 4 172 172

863 SM1-1 0 - 255 － subnet mask of Ethernet port1 1 255 255

864 SM1-2 0 - 255 － subnet mask of Ethernet port1 2 255 255

865 SM1-3 0 - 255 － subnet mask of Ethernet port1 3 255 255

866 SM1-4 0 - 255 － subnet mask of Ethernet port1 4 0 0

867 GW1-1 0 - 254 － default gateway of Ethernet port1 1 192 192

868 GW1-2 0 - 254 － default gateway of Ethernet port1 2 168 168

869 GW1-3 0 - 254 － default gateway of Ethernet port1 3 19 19

870 GW1-4 0 - 254 － default gateway of Ethernet port1 4 1 1

871 IP2-1 0 - 254 － IP address of Ethernet port2 1 192 192

872 IP2-2 0 - 254 － IP address of Ethernet port2 2 168 168

873 IP2-3 0 - 254 － IP address of Ethernet port2 3 19 19

874 IP2-4 0 - 254 － IP address of Ethernet port2 4 173 173

875 SM2-1 0 - 255 － subnet mask of Ethernet port2 1 255 255

876 SM2-2 0 - 255 － subnet mask of Ethernet port2 2 255 255

877 SM2-3 0 - 255 － subnet mask of Ethernet port2 3 255 255

878 SM2-4 0 - 255 － subnet mask of Ethernet port2 4 0 0

 383 
 6 F 2 T 0 1 7 7

Default Value
No. Name Range Units Contents Model Model
400, 401, 402 420, 421, 422
（700, 701, 702） (720, 721, 722)
879 GW2-1 0 - 254 － default gateway of Ethernet port2 1 192 192

880 GW2-2 0 - 254 － default gateway of Ethernet port2 2 168 168

881 GW2-3 0 - 254 － default gateway of Ethernet port2 3 19 19

882 GW2-4 0 - 254 － default gateway of Ethernet port2 4 1 1

883 SI1-1 0 - 254 － SNTP server1 IP address 1 0 0

884 SI1-2 0 - 254 － SNTP server1 IP address 2 0 0

885 SI1-3 0 - 254 － SNTP server1 IP address 3 0 0

886 SI1-4 0 - 254 － SNTP server1 IP address 4 0 0

887 SI2-1 0 - 254 － SNTP server2 IP address 1 0 0

888 SI2-2 0 - 254 － SNTP server2 IP address 2 0 0

889 SI2-3 0 - 254 － SNTP server2 IP address 3 0 0

890 SI2-4 0 - 254 － SNTP server2 IP address 4 0 0

891 PG1-1 0 - 254 － Ping check addrs port#1 1 0 0

892 PG1-2 0 - 254 － Ping check addrs port#1 2 0 0

893 PG1-3 0 - 254 － Ping check addrs port#1 3 0 0

894 PG1-4 0 - 254 － Ping check addrs port#1 4 0 0

895 PG2-1 0 - 254 － Ping check addrs port#2 1 0 0

896 PG2-2 0 - 254 － Ping check addrs port#2 2 0 0

897 PG2-3 0 - 254 － Ping check addrs port#2 3 0 0

898 PG2-4 0 - 254 － Ping check addrs port#2 4 0 0

899 SMODE 0-1 － SNTP mode 0 0

900 DEADT 1 - 43200 sec Keep-alive timeout 7200 7200

901 GOINT 1 - 60 sec GOOSE receive check interval 60 60

902 FL Off - On － FL function use or not Off Off

903 BITRN 0 - 128 － Number of bi-trigger (on/off) events 100 100

904 EV1 0 - 3071 － Event record signal No 768 768

905 EV2 0 - 3071 － ditto 769 769

906 EV3 0 - 3071 － ditto 770 770

907 EV4 0 - 3071 － ditto 771 771

908 EV5 0 - 3071 － ditto 772 772

909 EV6 0 - 3071 － ditto 773 773

910 EV7 0 - 3071 － ditto 0 0

911 EV8 0 - 3071 － ditto 0 0

912 EV9 0 - 3071 － ditto 0 0

913 EV10 0 - 3071 － ditto 0 0

914 EV11 0 - 3071 － ditto 0 0

915 EV12 0 - 3071 － ditto 0 0

916 EV13 0 - 3071 － ditto 0 0

917 EV14 0 - 3071 － ditto 0 0

918 EV15 0 - 3071 － ditto 0 0

919 EV16 0 - 3071 － ditto 0 0

920 EV17 0 - 3071 － ditto 0 0

921 EV18 0 - 3071 － ditto 0 0

922 EV19 0 - 3071 － ditto 371 371

923 EV20 0 - 3071 － ditto 380 380

924 EV21 0 - 3071 － ditto 355 355

925 EV22 0 - 3071 － ditto 318 318

926 EV23 0 - 3071 － ditto 403 403

927 EV24 0 - 3071 － ditto 1251 1251

928 EV25 0 - 3071 － ditto 1266 1266

 384 
 6 F 2 T 0 1 7 7

Default Value
No. Name Range Units Contents Model Model
400, 401, 402 420, 421, 422
（700, 701, 702） (720, 721, 722)

929 EV26 0 - 3071 － ditto 1268 1268

930 EV27 0 - 3071 － ditto 1269 1269

931 EV28 0 - 3071 － ditto 1270 1270

932 EV29 0 - 3071 － ditto 1271 1271

933 EV30 0 - 3071 － ditto 1275 1275

934 EV31 0 - 3071 － ditto 1276 1276

935 EV32 0 - 3071 － ditto 1277 1277

936 EV33 0 - 3071 － ditto 1639 1639

937 EV34 0 - 3071 － ditto 0 0

938 EV35 0 - 3071 － ditto 0 0

939 EV36 0 - 3071 － ditto 0 0

940 EV37 0 - 3071 － ditto 0 0

941 EV38 0 - 3071 － ditto 0 0

942 EV39 0 - 3071 － ditto 0 0

943 EV40 0 - 3071 － ditto 0 0

944 EV41 0 - 3071 － ditto 0 0

945 EV42 0 - 3071 － ditto 0 0

946 EV43 0 - 3071 － ditto 0 0

947 EV44 0 - 3071 － ditto 0 0

948 EV45 0 - 3071 － ditto 0 0

949 EV46 0 - 3071 － ditto 0 0

950 EV47 0 - 3071 － ditto 0 0

951 EV48 0 - 3071 － ditto 0 0

952 EV49 0 - 3071 － ditto 1258 1258

953 EV50 0 - 3071 － ditto 1438 1438

954 EV51 0 - 3071 － ditto 0 0

955 EV52 0 - 3071 － ditto 0 0

956 EV53 0 - 3071 － ditto 0 0

957 EV54 0 - 3071 － ditto 0 0

958 EV55 0 - 3071 － ditto 0 0

959 EV56 0 - 3071 － ditto 0 0

960 EV57 0 - 3071 － ditto 0 0

961 EV58 0 - 3071 － ditto 0 0

962 EV59 0 - 3071 － ditto 0 0

963 EV60 0 - 3071 － ditto 0 0

964 EV61 0 - 3071 － ditto 0 0

965 EV62 0 - 3071 － ditto 0 0

966 EV63 0 - 3071 － ditto 0 0

967 EV64 0 - 3071 － ditto 0 0

968 EV65 0 - 3071 － ditto 0 0

969 EV66 0 - 3071 － ditto 0 0

970 EV67 0 - 3071 － ditto 0 0

971 EV68 0 - 3071 － ditto 0 0

972 EV69 0 - 3071 － ditto 0 0

973 EV70 0 - 3071 － ditto 0 0

974 EV71 0 - 3071 － ditto 0 0

975 EV72 0 - 3071 － ditto 0 0

 385 
 6 F 2 T 0 1 7 7

Default Value
No. Name Range Units Contents Model Model
400, 401, 402 420, 421, 422
（700, 701, 702） (720, 721, 722)

976 EV73 0 - 3071 － ditto 0 0

977 EV74 0 - 3071 － ditto 0 0

978 EV75 0 - 3071 － ditto 0 0

979 EV76 0 - 3071 － ditto 0 0

980 EV77 0 - 3071 － ditto 0 0

981 EV78 0 - 3071 － ditto 0 0

982 EV79 0 - 3071 － ditto 0 0

983 EV80 0 - 3071 － ditto 0 0

984 EV81 0 - 3071 － ditto 0 0

985 EV82 0 - 3071 － ditto 0 0

986 EV83 0 - 3071 － ditto 0 0

987 EV84 0 - 3071 － ditto 0 0

988 EV85 0 - 3071 － ditto 0 0

989 EV86 0 - 3071 － ditto 0 0

990 EV87 0 - 3071 － ditto 0 0

991 EV88 0 - 3071 － ditto 0 0

992 EV89 0 - 3071 － ditto 471 471

993 EV90 0 - 3071 － ditto 472 472

994 EV91 0 - 3071 － ditto 473 473

995 EV92 0 - 3071 － ditto 474 474

996 EV93 0 - 3071 － ditto 0 0

997 EV94 0 - 3071 － ditto 0 0

998 EV95 0 - 3071 － ditto 0 0

999 EV96 0 - 3071 － ditto 0 0

1000 EV97 0 - 3071 － ditto 0 0

1001 EV98 0 - 3071 － ditto 0 0

1002 EV99 0 - 3071 － ditto 0 0

1003 EV100 0 - 3071 － ditto 0 0

1004 EV101 0 - 3071 － ditto 0 0

1005 EV102 0 - 3071 － ditto 0 0

1006 EV103 0 - 3071 － ditto 0 0

1007 EV104 0 - 3071 － ditto 0 0

1008 EV105 0 - 3071 － ditto 0 0

1009 EV106 0 - 3071 － ditto 0 0

1010 EV107 0 - 3071 － ditto 2640 2640

1011 EV108 0 - 3071 － ditto 2641 2641

1012 EV109 0 - 3071 － ditto 1448 1448

1013 EV110 0 - 3071 － ditto 1449 1449

1014 EV111 0 - 3071 － ditto 1450 1450

1015 EV112 0 - 3071 － ditto 0 0

1016 EV113 0 - 3071 － ditto 1272 1272

1017 EV114 0 - 3071 － ditto 1273 1273

1018 EV115 0 - 3071 － ditto 1274 1274

1019 EV116 0 - 3071 － ditto 0 0

1020 EV117 0 - 3071 － ditto 0 0

1021 EV118 0 - 3071 － ditto 0 0

1022 EV119 0 - 3071 － ditto 1445 1445

 386 
 6 F 2 T 0 1 7 7

Default Value
No. Name Range Units Contents Model Model
400, 401, 402 420, 421, 422
（700, 701, 702） (720, 721, 722)

1023 EV120 0 - 3071 － ditto 0 0

1024 EV121 0 - 3071 － ditto 1409 1409

1025 EV122 0 - 3071 － ditto 1435 1435

1026 EV123 0 - 3071 － ditto 1436 1436

1027 EV124 0 - 3071 － ditto 1437 1437

1028 EV125 0 - 3071 － ditto 1439 1439

1029 EV126 0 - 3071 － ditto 1440 1440

1030 EV127 0 - 3071 － ditto 1441 1441

1031 EV128 0 - 3071 － ditto 1442 1442

1032 Time1 0.1 - 4.9 s Disturbance record 0.3 0.3

1033 Time2 0.1 - 4.9 s Disturbance record 2.0 2.0

1034 OC 0.10 - 150.00 A Realy element for disturbance record initiation 2.00 2.00

1035 EF 0.10 - 100.00 A ditto 0.60 0.60

1036 SEF 0.025 - 2.500 A ditto --(0.200) 0.200

1037 NOC 0.10 - 10.00 A ditto 0.40 0.40

1038 OV 10.0 - 200.0 V ditto 120.0 120.0

1039 UV 5.0 - 130.0 V ditto 60.0 60.0

1040 ZOV 1.0 - 160.0 V ditto 20.0 20.0

1041 NOV 1.0 - 160.0 V ditto 20.0 20.0

1042 TRIP Off - On － Disturbance record trigger use or not On On

1043 OC Off - On － ditto On On

1044 EF Off - On － ditto On On

1045 SEF Off - On － ditto --(Off) On

1046 NOC Off - On － ditto On On

1047 OV Off - On － ditto On On

1048 UV Off - On － ditto On On

1049 ZOV Off - On － ditto On On

1050 NOV Off - On － ditto On On

1051 SIG1 0 - 3071 － Signal No 101 101

1052 SIG2 0 - 3071 － ditto 102 102

1053 SIG3 0 - 3071 － ditto 103 103

1054 SIG4 0 - 3071 － ditto 261 261

1055 SIG5 0 - 3071 － ditto 131 131

1056 SIG6 0 - 3071 － ditto 281 281

1057 SIG7 0 - 3071 － ditto 0 141

1058 SIG8 0 - 3071 － ditto 0 291

1059 SIG9 0 - 3071 － ditto 201 201

1060 SIG10 0 - 3071 － ditto 202 202

1061 SIG11 0 - 3071 － ditto 203 203

1062 SIG12 0 - 3071 － ditto 341 341

1063 SIG13 0 - 3071 － ditto 211 211

1064 SIG14 0 - 3071 － ditto 351 351

1065 SIG15 0 - 3071 － ditto 0 0

1066 SIG16 0 - 3071 － ditto 371 371

1067 SIG17 0 - 3071 － ditto 401 401

1068 SIG18 0 - 3071 － ditto 1604 1604

1069 SIG19 0 - 3071 － ditto 403 403

1070 SIG20 0 - 3071 － ditto 0 0

1071 SIG21 0 - 3071 － ditto 0 0

1072 SIG22 0 - 3071 － ditto 0 0

1073 SIG23 0 - 3071 － ditto 0 0

1074 SIG24 0 - 3071 － ditto 0 0

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Default Value
No. Name Range Units Contents Model Model
400, 401, 402 420, 421, 422
（700, 701, 702） (720, 721, 722)
1075 SIG25 0 - 3071 － ditto 0 0

1076 SIG26 0 - 3071 － ditto 0 0

1077 SIG27 0 - 3071 － ditto 0 0

1078 SIG28 0 - 3071 － ditto 0 0

1079 SIG29 0 - 3071 － ditto 0 0

1080 SIG30 0 - 3071 － ditto 0 0

1081 SIG31 0 - 3071 － ditto 0 0

1082 SIG32 0 - 3071 － ditto 0 0

1083 TCSPEN Off - On - Opt-On － Trip Circuit Supervision Enable Off Off

1084 CBSMEN Off - On － CB condition super visor enable Off Off

1085 TCAEN Off - On － Trip CounterAlarm Enable Off Off

1086 ¥xf6IyAEN Off - On － ΣI^y Alarm Enable Off Off

1087 OPTAEN Off - On － Operate Time Alarm Enable Off Off

1088 TCALM 1 - 10000 － Trip Count Alarm Threshold 10000 10000

1089 ¥xf6IyALM 10 - 10000 E6 ΣI^y Alarm 10000 10000

1090 YVALUE 1.0 - 2.0 － Y value 2.0 2.0

1091 OPTALM 100 - 5000 ms Operate Time Alarm Threshold 1000 1000

1092 Display Pri - Sec - Pri-A － Metering Pri Pri

1093 Power Send - Receive － Metering Send Send

1094 Current Lag - Lead － Metering Lead Lead

1095 Time sync. Of-BI-Mod-IRI-IEC-SNTP － Time sync Off Off

1096 GMT -12 - 12 hrs Time zone (hours) 0 0

1097 GMTm -59 - 59 min Time zone (minutes) 0 0

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5. PLC default setting

INPUT OUTPUT

773 BI6_COMMAND 1604 ARC BLOCK

772 BI5_COMMAND 1605 ARC READY

770 BI3_COMMAND 1633 CB N/O CONT

771 BI4_COMMAND 1634 CB N/C CONT

768 BI1_COMMAND 1639 IND RESET

412 VCHK 1648 ARC-S1 COND

412 VCHK 1649 ARC-S2 COND

412 VCHK 1650 ARC-S3 COND

412 VCHK 1651 ARC-S4 COND

412 VCHK 1652 ARC-S5 COND

371 GEN.TRIP 1663 CBF_INIT

371 GEN.TRIP 1667 TP_COUNT

371 GEN.TRIP 1672 SGM_IY-A

371 GEN.TRIP 1673 SGM_IY-B

371 GEN.TRIP 1674 SGM_IY-C

371 GEN.TRIP 1676 OT_ALARM-A

371 GEN.TRIP 1677 OT_ALARM-B

371 GEN.TRIP 1678 OT_ALARM-C

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INPUT OUTPUT

356 FRQ1_TRIP 1680 FRQ_S1_TRIP

≥1
360 DFREQ1_TRIP

357 FRQ2_TRIP 1681 FRQ_S2_TRIP

≥1
361 DFRQ2_TRIP

358 FRQ3_TRIP 1682 FRQ_S3_TRIP

≥1
362 DFRQ3_TRIP

359 FRQ4_TRIP 1683 FRQ_S4_TRIP

≥1
363 DFRQ4_TRIP

769 BI2_COMMAND 1646 SPEED_SW

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6. Disturbance record setting

Default setting User Setting

Name Range Unit Signal Model Model
No. Signal Name 110D 400D 420D
SIG1 0 - 3071 － 101 OC1-A -- x
SIG2 0 - 3071 － 102 OC1-B -- x
SIG3 0 - 3071 － 103 OC1-C -- x
SIG4 0 - 3071 － 261 OC1 TRIP -- x
SIG5 0 - 3071 － 131 EF1 x x
SIG6 0 - 3071 － 281 EF1 TRIP x x
SIG7 0 - 3071 － 141 SEF1 x -- x
SIG8 0 - 3071 － 291 SEF1-S1 TRIP x -- x
SIG9 0 - 3071 － 201 UV1-A -- x
SIG10 0 - 3071 － 202 UV1-B -- x
SIG11 0 - 3071 － 203 UV1-C -- x
SIG12 0 - 3071 － 341 UV1 TRIP -- x
SIG13 0 - 3071 － 211 ZOV1 x x
SIG14 0 - 3071 － 351 ZOV1 TRIP x x
SIG15 0 - 3071 － 0 NA --
SIG16 0 - 3071 － 371 GEN.TRIP x --
SIG17 0 - 3071 － 401 ARC READY T x --
SIG18 0 - 3071 － 1604 ARC BLOCK x --
SIG19 0 - 3071 － 403 ARC SHOT x --
SIG20 0 - 3071 － 0 NA --
SIG21 0 - 3071 － 0 NA --
SIG22 0 - 3071 － 0 NA --
SIG23 0 - 3071 － 0 NA --
SIG24 0 - 3071 － 0 NA --
SIG25 0 - 3071 － 0 NA --
SIG26 0 - 3071 － 0 NA --
SIG27 0 - 3071 － 0 NA --
SIG28 0 - 3071 － 0 NA --
SIG29 0 - 3071 － 0 NA --
SIG30 0 - 3071 － 0 NA --
SIG31 0 - 3071 － 0 NA --

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Appendix I
Commissioning Test Sheet (sample)
1. Relay identification
2. Preliminary check
3. Hardware check
4. Function test
5. Protection scheme test
6. Metering and recording check
7. Conjunctive test

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1. Relay identification

Type Serial number

Model System frequency
Station Date
Circuit Engineer
Protection scheme Witness
Active settings group number

2. Preliminary check

Ratings
CT shorting contacts
DC power supply
Power up
Wiring
Relay inoperative
alarm contact
Calendar and clock

3. Hardware check
3.1 User interface check

3.2 Binary input/binary output circuit check

Binary input circuit

Binary output circuit

3.3 AC input circuit

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4. Function test
4.1 Overcurrent elements test
(1) Operating value test

Element Current setting Measured current Element Current setting Measured current
OC1-A UC1-A
OC2-A UC2-A
OC3-A THM-A
OC4-A THM-T
EF1 NOC1
EF2 NOC2
EF3 CBF-A
EF4
SEF1
SEF2
SEF3
SEF4

(2) Operating time test (IDMT)

Element Curve setting Multiplier setting Changed current Measured time

OC1-A × Current setting
× Current setting
× Current setting
EF1 × Current setting
× Current setting
× Current setting
SEF1 × Current setting
× Current setting
× Current setting

(3) Directional characteristic element operation test

Element Current setting Measured current Element Current setting Measured current
OC1-A SEF1
OC2-A SEF2
OC3-A SEF3
OC4-A SEF4
EF1 NOC1
EF2 NOC2
EF3
EF4

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4.2 Overvoltage and undervoltage elements test

(1) Operating value test

Element Voltage Measured Element Voltage Measured

setting voltage setting voltage
OV1 ZOV1
OV2 ZOV2
OV3 NOV1
OV4 NOV2
UV1
UV2
UV3
UV4

(2) Operating time test (IDMT)

Element Voltage setting Multiplier setting Changed voltage Measured time

OV1 × Voltage setting
× Voltage setting
× Voltage setting
UV1 × Voltage setting
× Voltage setting
× Voltage setting
ZOV1 × Voltage setting
× Voltage setting
× Voltage setting
NOV1 × Voltage setting
× Voltage setting
× Voltage setting

4.3 BCD element check

4.4 Cold load function check

4.5 Reverse power element check

4.6 Frequency elements test

Element Frequency setting Measured frequency

FRQ1
FRQ2
FRQ3
FRQ4

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5. Protection scheme test

6. Metering and recording check

7. Conjunctive test

Scheme Results
On load check
Tripping circuit
Reclosing circuit

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Appendix J
Return Repair Form

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RETURN / REPAIR FORM

Please fill in this form and return it to Toshiba Energy Systems & Solutions Corporation with
the GRE140 to be repaired.

Toshiba Energy Systems & Solutions Corporation

Fuchu Operations
1, Toshiba-cho, Fuchu-shi, Tokyo, Japan
For: Power Systems Protection & Control Department
Quality Assurance Section

Type: GRE140 Model:

(Example: Type: GRE140 Model: 400A )

Product No.:
Serial No.:
Date:

1. Reason for returning the relay

 mal-function
 does not operate
 increased error
 investigation
 others

2. Fault records, event records or disturbance records stored in the relay and relay settings
are very helpful information to investigate the incident.
Please provide relevant information regarding the incident on electronic media or fill in
the attached fault record sheet and relay setting sheet.

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Fault Record
Date/Month/Year Time / /
/ : : .
(Example: 04/ Jul./ 2002 15:09:58.442)
Faulty phase:
Prefault values
Ia: A Va : V
Ib: A Vb : V
Ic: A Vc : V
Ie: A Ves: V
Ise: A Vab: V
I1: A Vbc: V
I2: A Vca: V
I2 / I1 : V0: V
V1: V
V2: V
f: Hz

Fault values
Ia: A Va : V
Ib: A Vb : V
Ic: A Vc : V
Ie: A Ves: V
Ise: A Vab: V
I1: A Vbc: V
I2: A Vca: V
I2 / I1 : V0: V
THM: % V1: V
V2: V
f: Hz

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3. What was the message on the LCD display at the time of the incident?

4. Describe the details of the incident:

5. Date incident occurred

Day/Month/Year: / / /
(Example: 10/July/2011)

6. Give any comments about the GRE140, including documents:

Customer

Name:
Company Name:
Address:

Telephone No.:
e-mail:
Signature:

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Appendix K
Technical Data

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TECHNICAL DATA
Ratings
AC current In: 1/5A
AC voltage Vn: 63.5V / 110V
Frequency: 50 / 60Hz
Auxiliary supply: 110 – 250Vdc / 100-220Vac
(Operative range: 88 – 300Vdc / 80 – 264Vac)
48－110Vdc (Operative range: 38.4 – 132Vdc)
24 – 48Vdc (Operative range: 19.2 – 60.0Vdc)
Superimposed AC ripple on DC supply: maximum 12%
DC supply interruption: maximum 50ms at 110V
Binary input circuit DC voltage: For alarm indication
110 – 250Vdc (Operative range: 88 – 300Vdc)
48-110Vdc (Operative range: 38.4 – 132Vdc)
24V – 48Vdc (Operative range: 19.2 – 60.0Vdc)
For trip circuit surpervision
Operative range: ≥38.4V (for 110Vdc rating)
≥88V (for 220/250Vdc rating)
≥19.2V (for 48Vdc rating)
≥9.6V (for 24Vdc rating)
Overload Ratings
AC current inputs: 4 times rated current continuous
100 times rated current for 1 second
AC voltage inputs: 2 times rated voltage continuous
Burden
AC phase current inputs: ≤ 0.3VA
AC earth current inputs: ≤ 0.5VA
AC sensitive earth inputs: ≤ 1.2VA
AC voltage inputs: ≤ 0.1VA (at rated voltage)
Power supply: ≤ 10W (quiescent)
≤ 15W (maximum)
Binary input circuit: ≤ 0.5W per input at 220Vdc
Measuring input capability
Full scale
3 phase current input ≥ 196.6A
Earth fault current input ≥ 22.11A
Sensitive earth fault current input ≥ 2.010A
Voltage input ≥ 245.76V
Sampling rate 48 samplings / Cycle
Current Transformer Requirements
Phase Inputs Typically 5P20 with rated burden according to load.
(refer to manual for detailed instructions)
Standard Earth Inputs: Core balance CT or residual connection of phase CTs.
Sensitive Earth Inputs: Core balance CT.
Directional Phase Overcurrent Protection (67)
P/F 1st Overcurrent threshold: OFF, 0.10 – 25.00A in 0.01A steps
Delay type: DTL, IDMTL (IEC 60255-151): IEC NI, IEC VI, IEC EI, UK LTI,
IEEE MI, IEEE VI, IEEE EI, US CO8 I, US CO2 STI
IDMTL Time Multiplier Setting TMS: 0.010 – 1.500 in 0.001 steps
DTL delay: 0.00 – 300.00s in 0.01s steps
Reset Type: Definite Time or Dependent Time(IEC 60255-151)

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Reset Definite Delay: 0.0 – 300.0s in 0.1s steps

Reset Time Multiplier Setting RTMS: 0.010 – 1.500 in 0.001 steps
P/F 2nd Overcurrent threshold: OFF, 0.10 – 25.00A in 0.01A steps
P/F 3rd, 4th Overcurrent thresholds: OFF, 0.10 – 150.00A in 0.01A steps
DTL delay: 0.00 – 300.00s in 0.01s steps
P/F Characteristic Angle: −95° to +95° in 1° steps
Directional Earth Fault Protection (67N)
E/F 1st Overcurrent threshold: OFF, 0.05 – 25.00A in 0.01A steps
Delay type: DTL, IDMTL(IEC 60255-151): IEC NI, IEC VI, IEC EI, UK LTI,
IEEE MI, IEEE VI, IEEE EI, US CO8 I, US CO2 STI
IDMTL Time Multiplier Setting TMS: 0.010 – 1.500 in 0.001 steps
DTL delay: 0.00 – 300.00s in 0.01s steps
Reset Type: Definite Time or Dependent Time(IEC 60255-151)
Reset Definite Delay: 0.0 – 300.00s in 0.01s steps
Reset Time Multiplier Setting RTMS: 0.010 – 1.500 in 0.001 steps
E/F 2nd threshold: OFF, 0.05 – 25.00A in 0.01A steps
E/F 3rd, 4th thresholds: OFF, 0.05 – 100.00A in 0.01A steps
DTL delay: 0.00 – 300.00s in 0.01s steps
E/F Characteristic angle: −95° to +95° in 1° steps
E/F directional voltage threshold: 0.5 – 100.0V in 0.1V steps
Directional Sensitive Earth Fault Protection (67SEF)
SEF 1st Overcurrent threshold: OFF, 0.001 – 0.2500A in 0.001A steps
Delay Type: DTL, IDMTL(IEC 60255-151): IEC NI, IEC VI, IEC EI, UK LTI,
IEEE MI, IEEE VI, IEEE EI, US CO8 I, US CO2 STI
IDMTL Time Multiplier Setting TMS: 0.010 – 1.500 in 0.001 steps
DTL delay: 0.00 – 300.00s in 0.01s steps
Reset Type: Definite Time or Dependent Time(IEC 60255-151)
Reset Definite Delay: 0.0 – 300.0s in 0.1s steps
Reset Time Multiplier Setting RTMS: 0.010 – 1.500 in 0.001 steps
DTL delay (back-up timer): 0.00 – 300.00s in 0.01s steps
SEF 2nd, 3rd, 4th threshold: OFF, 0.001 – 0.250A in 0.001A steps
DTL delay: 0.00 – 300.00s in 0.01s steps
SEF Characteristic angle: −95° to +95° in 1° steps
SEF Boundary of operation: ±87.5°, ±90°
SEF directional voltage threshold: 0.5 – 100.0V in 0.1V steps
Residual power threshold: OFF, 0.00 – 100.00W in 0.01W steps
Phase Undercurrent Protection (37)
Undercurrent 1st, 2nd threshold: OFF, 0.10 – 10.00A in 0.01A steps
DTL Delay: 0.00 – 300.00s in 0.01s steps
Thermal Overload Protection (49)
Iθ = k.IFLC (Thermal setting): OFF, 0.50 – 10.00A in 0.01A steps
Previous load current (IP) 0.00 – 5.00A in 0.01A steps
Time constant (τ): 0.5 – 500.0mins in 0.1min steps
Thermal alarm: OFF, 50% to 99% in 1% steps
Inrush Current Detector
Second harmonic ratio setting 10 – 50% in 1% steps
Overcurrent threshold 0.1 – 25.0A in 0.1A steps
Reverse Power Protection (32P)
Reverse Power 1st, 2nd threshold: OFF, -1500.0 - -5.0W in 0.1W steps
DTL Delay: 0.00 – 300.00s in 0.01s steps

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DO/PU ratio 5 – 98% in 1% steps

Reverse Reactive Power Protection (32Q)
Reverse Reactive Power 1st, 2nd threshold: OFF, -1500.0 - -5.0 Var in 0.1 Var steps
DTL Delay: 0.00 – 300.00s in 0.01s steps
DO/PU ratio 5 – 98% in 1% steps
Broken Conductor Protection (46BC)
Broken conductor threshold (I2/I1): OFF, 0.10 – 1.00 in 0.01 steps
DTL delay: 0.00 – 300.00s in 0.01s steps
CBF Protection (50BF)
CBF threshold: OFF, 0.10 – 10.00A in 0.01A steps
CBF stage 1 (Backup trip) DTL: 0.00 – 300.00s in 0.01s steps
CBF stage 2 (Re-trip) DTL: 0.00 – 300.00s in 0.01s steps
Directional Negative Phase Sequence Overcurrent Protection (67/46)
NOC 1st, 2nd threshold: OFF, 0.10 – 10.00A in 0.01A steps
Delay type: DTL, IDMTL(IEC 60255-151): IEC NI, IEC VI, IEC EI, UK LTI,
IEEE MI, IEEE VI, IEEE EI, US CO8 I, US CO2 STI
IDMTL Time Multiplier Setting TMS: 0.010 – 1.500 in 0.001 steps
DTL delay: 0.00 – 300.00s in 0.01s steps
Reset Type: Definite Time or Dependent Time(IEC 60255-151)
Reset Definite Delay: 0.0 – 300.0s in 0.1s steps
Reset Time Multiplier Setting RTMS: 0.010 – 1.500 in 0.001 steps
NOC Characteristic angle: −95° to +95° in 1° steps
NOC Directional voltage threshold 0.5 – 25.0V in 0.1V steps
Current-change detecor
Change current OFF, 0.10 – 5.00 A in 0.01A steps
DTL delay 0.00 – 20.00s in 0.01s steps
Overvoltage Protection (59)
1st, 2nd Overvoltage thresholds: OFF, 10.0 – 200.0V in 0.1V steps
Delay type (1st threshold only): DTL, IDMTL(complied with IEC 60255-127)
IDMTL Time Multiplier Setting TMS: 0.05 – 100.00 in 0.01 steps
DTL delay: 0.00 – 300.00s in 0.01s steps
DO/PU ratio 10 – 98% in 1% steps
Reset Delay: 0.0 – 300.0s in 0.1s steps
Undervoltage Protection (27)
1st, 2nd Undervoltage thresholds: OFF, 5.0 – 130.0V in 0.1V steps
Delay type (1st threshold only): DTL, IDMTL(complied with IEC 60255-127)
IDMTL Time Multiplier Setting TMS: 0.05 – 100.00 in 0.01 steps
DTL delay: 0.00 – 300.00s in 0.01s steps
Reset Delay: 0.0 – 300.0s in 0.1s steps
Undervoltage Block 5.0 – 20.0Vin 0.1V steps
Zero Phase Sequence Overvoltage Protection (59N)
1st, 2nd ZOV Overvoltage thresholds: OFF, 1.0 – 160.0V in 0.1V steps
Delay type (1st threshold only): DTL, IDMTL(complied with IEC 60255-127)
IDMTL Time Multiplier Setting TMS: 0.05 – 100.00 in 0.01 steps
DTL delay: 0.00 – 300.00s in 0.01s steps
Reset Delay: 0.0 – 300.0s in 0.1s steps
Negative Phase Sequence Overvoltage Protection (47)
1st, 2nd NOV Overvoltage thresholds: OFF, 1.0 – 160.0V in 0.1V steps
Delay type (1st threshold only): DTL, IDMTL(complied with IEC 60255-127)

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IDMTL Time Multiplier Setting TMS: 0.05 – 100.00 in 0.01 steps

DTL delay: 0.00 – 300.00s in 0.01s steps
Reset Delay: 0.0 – 300.0s in 0.1s steps
Under/Over Frequency Protection (81U/O)
1st - 4th under/overfrequency threshold (Fnom − 10.00Hz) – (Fnom + 10.00Hz) in 0.01Hz steps
Fnom: nominal frequency
DTL delay: 0.00 – 300.00s in 0.01s steps
Frequency UV Block 40.0 – 100.0V in 0.1V steps
Frequency rate-of-change 0.1 – 15.0Hz/s in 0.1Hz/s steps
Autoreclose (79) for GRE140-40x and 42x model
ARC Reclaim Time 0.0– 600.0s in 0.1s steps
Close Pulse Width 0.01 – 10.00s in 0.01s steps
Lock-out Recovery Time OFF, 0.1 – 600.0s in 0.1s steps
Sequences 1 – 5 Shots to Lock-out, each trip programmable for inst or
Delayed operation
Dead Times(programmable for each shot) 0.01 – 300.00s in 0.01s steps
Voltage and Synchronizm Check (25) for GRE140-40x and 42x model
Synchronism check angle (θS) 5 to 75° in 1° steps
UV element (SYUV) 10 to 150V in 1V steps
OV element (SYOV) 10 to 150V in 1V steps
Voltage difference check (ΔV) 0 to 150V in 1V steps
Busbar or line dead check (VB) 10 to 150V in 1V steps
Busbar or line live check (VL) 10 to 150V in 1V steps
Frequency difference check (Δf) 0.01 to 2.00Hz in 0.01 steps
Synchronism check time (TSYN) 0.01 to 10.00s in 0.01s steps
Voltage check time 0.01 to 10.00s in 0.01s steps
Start Protection (48) for GRE140-70x and 72x model
Motor start protection time: 0.0 - 300.0s in 0.1s steps
Stalled Motor Protection (50S) for GRE140-70x and 72x model
50S threshold: OFF, 0.10 - 50.00A in 0.01A steps
DTL delay: 0.00 - 300.00s in 0.01s steps
Locked Rotor Protection (51LR) for GRE140-70x and 72x model
Motor start-up current: OFF, 0.10 – 100.00A in 0.01A steps
Rotor restraint permissible time: 1 – 300s in 1s steps
Rotor permissible heat range: 50 – 500% in 1% steps
the ratio from THM1 (stator)
Restart Inhibit (66) for GRE140-70x and 72x model
Motor start-up time: 1 – 300s in 1s steps
Rotor restraint permissible time: 1 – 300s in 1s steps (Common setting as 51LR)
Rotor permissible heat range: 50 – 500% in 1% steps (Common setting as 51LR)
the ratio from THM1 (stator)
Starts per hour: limit number-of-start-up 1 – 60 in 1 steps
Accuracy
Overcurrent Pick-ups: 100% of setting ± 5% (Gs>0.2A)
Overcurrent PU/DO ratio: approx, 100%
Undercurrent Pick-up: 100% of setting ± 5% (Gs>0.2A)
Undercurrent PU/DO ratio: approx, 100%
Overvoltage Pick-ups: 100% of setting ± 5%
Undervoltage Pick-ups: 100% of setting ± 5%

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Over Frequency Pick-ups: Frequency threshold ± 0.05Hz (setting: ≤ 5.00Hz )

Under Frequency Pick-ups: Frequency threshold ± 0.05Hz (setting: ≤ 5.00Hz )
Frequency rate-of-change Pick-ups: 100% of setting ± 0.05Hz/s (setting: ≤ 5.00Hz/s)
Inverse OC Operate Time: IEC60255-151, ±5% or 50ms (2 ≤ G/Gs ≤ 20)
GT = 1.1Gs
GD = 20Gs (Gs ≤ 10A), 200A (Gs > 10A)
DOC Definite Operate Time; ≤DTL + 45ms (DT, input: ≥ 200% of setting)
DEF Definite Operate Time; ≤DTL + 45ms (DT, input: ≥ 200% of setting)
CBF Operate Time; ≤DTL + 40ms (input: ≥ 200% of setting)
Inverse OV Operate Time: IEC60255-127, ±5% or 50ms
(OV; 1.2 ≤ G/Gs ≤ GD/Gs , UV; 0 ≤ G/Gs ≤ 1) GD = 300V
OV Definite Operate Time; ≤DTL + 45ms (DT, input: ≥ 200% of setting)
UV Definite Operate Time; ≤DTL + 50ms (DT, input: ≤ 80% of setting)
NOV Definite Operate Time; ≤DTL + 50ms (DT, input: ≥ 200% of setting)
Under/Over Frequency Operating Time 90-190ms (rated freguency: 50Hz)
70-160ms (rated frequency: 60Hz)
Frequency rate-of-change Operating Time 160-310ms (rated frequency: 50Hz, input: ≥ 200% of setting)
130-260ms (rated frequency: 60Hz, input: ≥ 200% of setting)
Transient Overreach for instantaneous <−5% for X/R = 100.
elements
Time delays includes operating time of trip contacts.
Front Communication port - local PC (USB)
Connector type: USB-Type B
Cable length: 5m (max.)
Rear Communication port (RS485)
RS485 I/F for Modbus and IEC60870-5-103:
Connection Multidrop (max. 32 relays)
Cable type Twisted pair cable with shield
Cable length 1200m (max.)
Connection Screw terminals
Isolation 1kVac for 1 min.
Transmission rate 9.6, 19.2kbps
Rear Communication port (Ethernet)
100BASE-TX RJ-45 connector
100BASE-FX SC connector

Time synchronization port (IRIG-B port)

IRIG Time Code IRIG-B122
Input impedance 4k-ohm
Input voltage range 4Vp-p to 10Vp-p
Connector type Screw terminal
Cable type 50 ohm coaxial cable
Binary Inputs
Number 6 (4x0/7x0 model) / 12 (4x1/7x1 model) / 18 (4x2/7x2 model)
Operating voltage For indication
Typical 154Vdc (min. 110Vdc) for 220Vdc rating
Typical 77Vdc(min. 70Vdc) for 110Vdc rating
Typical 33.6Vdc(min. 24Vdc) for 48Vdc rating
Typical 16.8Vdc(min. 12Vdc) for 24Vdc rating
For trip circuit supervision
≥88V for 220Vdc rating
≥38.4V for 110Vdc rating
≥19.2V for 48Vdc rating

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≥9.6V for 24Vdc rating

Binary Outputs
Number 4 (4x0/7x0 model) / 10 (4x1/7x1 model) / 16 (4x2/7x2 model)
Ratings: model 4∗0 and 7 ∗0: BO1 and BO2 Make and carry: 5A continuously
model 4 ∗1 and 7 ∗1: BO1, BO2, BO5 and Contac : 0.4A 250Vdc, 8A 380Vac, 3040VA, 150W
BO6 Make and carry: 30A, 250Vdc for 0.5s (L/R≥40ms)
model 4∗2 and 7 ∗2: BO1, BO2, BO5, BO6, Break: 0.1A, 250Vdc (L/R=40ms)
BO11 and BO12
Make and carry: 4A continuously
other BOs
Contact: 0.2A 110Vdc, 8A 250Vac, 2000VA, 240W
Durability: Loaded contact: ≥1,000 operations
Unloaded contact: ≥10,000 operations
Pickup time Less than 15ms
Reset time Less than 10ms
Mechanical design
Weight 2.5kg (4x0 /7x0 model) 3.0kg (4x2/7x2 model)
Width 223mm
Height 177mm
Depth 180mm
Case colour Munsell No. 10YR8/0.5
Installation Flush mounting with attachment kits

ENVIROMENTAL PERFORMANCE
Test Standards Details
Atmospheric Environment
Temperature IEC60068-2-1/2 Operating range: -20°C to +60°C.
IEC60068-2-30 Storage / Transit: -25°C to +70°C.
Humidity IEC60068-2-78 56 days at 40°C and 93% relative humidity.
Enclosure Protection IEC60529 IP52(front), IP20 (rear), IP40 (top)
Mechanical Environment
Vibration IEC60255-21-1 Response - Class 1
Endurance - Class 1
Shock and Bump IEC60255-21-2 Shock Response Class 1
Shock Withstand Class 1
Bump Class 1
Seismic IEC60255-21-3 Class 1
Electrical Environment
Dielectric Withstand IEC60255-5 2kVrms for 1 minute between all terminals and earth.
2kVrms for 1 minute between independent circuits.
1kVrms for 1 minute across normally open contacts.
High Voltage Impulse IEC60255-5 Three positive and three negative impulses of 5kV(peak), for
CT, Power Supply Unit , BI and BO circuits; between
terminals and earth, and between independent circuits.
3kV (peak) for RS485 circuit; between terminals and earth
3kV (peal) for BO circuit ; across normally open contacts
1.2/50µs, 0.5J between all terminals and between all
terminals and earth.
Electromagnetic Environment
High Frequency IEC60255-22-1 Class 3, 1MHz 2.5kV to 3kV (peak) applied to all ports without
Disturbance / Damped IEC61000-4-12 communication ports in common mode.
Oscillatory Wave IEEE C37. 90. 1
1MHz 1.0kV applied to communication ports in common
IEC 61000-4-18 mode.
IEC 60255-26 Ed.3 1MHz 1.0kV applied to all ports without communication

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Test Standards Details

ports in differential mode.
Electrostatic IEC60255-22-2 Class 3, 6kV contact discharge, 8kV air discharge.
Discharge IEC61000-4-2
IEC 60255-26 Ed.3
Radiated RF IEC60255-22-3 Class 3, Field strength 10V/m for frequency sweeps of 80MHz to
Electromagnetic IEC61000-4-3 1GHz and 1.4GHz to 2.7GHz. Additional spot tests at 80,
Disturbance IEC 60255-26 Ed.3 160, 450, 900 ,1850 and 2150MHz.
Fast Transient IEC60255-22-4 Class A, 5 kHz, 5/50ns disturbance
Disturbance IEC61000-4-4 All inputs without Communication ports:4kV
IEEE C37. 90. 1
Communication ports:2kV
IEC 60255-26 Ed.3
Surge Immunity IEC60255-22-5, 1.2/50µs surge in common/differential modes:
IEC61000-4-5
Communication port: 2kV/1kV/0.5kV, line to earth
IEC 60255-26 Ed.3
Other ports: 2kV/1kV/0.5kV, line to earth
1kV/0.5kV, line to line
Conducted RF IEC60255-22-6 Class 3, 10Vrms applied over frequency range 150kHz to 100MHz.
Electromagnetic IEC61000-4-6 Additional spot tests at 27 and 68MHz.
Disturbance IEC 60255-26 Ed.3
Power Frequency IEC60255-22-7 Class A, 300V 50Hz for 10s applied to ports in common mode.
Disturbance IEC61000-4-16 150V 50Hz for 10s applied to ports in differential mode.
IEC 60255-26 Ed.3 Not applicable to AC inputs.
Conducted and IEC60255-25 Class A, Conducted emissions:
Radiated Emissions EN55022 Class A, 0.15 to 0.50MHz: <79dB (peak) or <66dB (mean)
IEC61000-6-4 0.50 to 30MHz: <73dB (peak) or <60dB (mean)
IEC 60255-26 Ed.3 Radiated emissions (at 10m):
30 to 230MHz: <40dB
230 to 1000MHz: <47dB
1G to 3GHz: <56dB
European Commission Directives
2014/30/EU Compliance with the European Commission
Electromagnetic Compatibility Directive is demonstrated
according to EN 60255-26: 2013.
2014/35/EU Compliance with the European Commission Low Voltage
Directive is demonstrated according to EN 60255-27: 2014.

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Appendix L
Symbols Used in Scheme Logic

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Symbols used in the scheme logic and their meanings are as follows:

Signal names
Marked with : Measuring element output signal
Marked with : Signal number
Marked with : Signal number and name of binary input by PLC function

Signal No. Signal name

Marked with [ ] : Scheme switch
Marked with " " : Scheme switch position
Unmarked : Internal scheme logic signal

AND gates

A B C Output
A
1 1 1 1
B & Output Other cases 0
C
A
A B C Output
B & Output 1 1 0 1
C Other cases 0

A A B C Output
1 0 0 1
B & Output Other cases 0
C

OR gates

A A B C Output
B ≥1 Output 0 0 0 0
C Other cases 1

A A B C Output
B ≥1 Output 0 0 1 0
Other cases 1
C
A
A B C Output
B ≥1 Output 0 1 1 0
C Other cases 1

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Signal inversion
A Output
A 1 Output 0 1
1 0

Timer

t 0 Delayed pick-up timer with fixed setting

XXX: Set time
XXX

0 t Delayed drop-off timer with fixed setting

XXX: Set time
XXX

t 0 Delayed pick-up timer with variable setting

XXX - YYY: Setting range
XXX - YYY

0 t Delayed drop-off timer with variable setting

XXX - YYY: Setting range
XXX - YYY

One-shot timer
A
A Output

Output
XXX - YYY

XXX - YYY: Setting range

Flip-flop
S R Output
S 0 0 No change
F/F Output 1 0 1
R 0 1 0
1 1 0
Scheme switch
A Switch Output
A Output
1 ON 1
ON
Other cases 0

Switch Output
+ Output ON 1
ON OFF 0

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Appendix M
IEC60870-5-103: Interoperability

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IEC60870-5-103 Configurator
IEC103 configurator software is included in the same CD as RSM100, and can be installed
easily as follows:
Installation of IEC103 Configurator
Insert the CD-ROM (RSM100) into a CDROM drive to install this software on a PC.
Double click the “Setup.exe” of the folder “¥IEC103Conf” under the root directory, and
operate it according to the message.
When installation has been completed, the IEC103 Configurator will be registered in the start
menu.
Starting IEC103 Configurator
Click [Start]→[Programs]→[IEC103 Configurator]→[IECConf] to the IEC103 Configurator
software.
Note: The instruction manual for the IEC103 Configurator can be viewed by clicking the
[Help]→[Manual] in the IEC103 Configurator.
Requirements for IEC60870-5-103 master station
Polling cycle: 150ms or more
IEC103 master GR relay

Data request

Polling cycle: Response frame

150ms or more

Data request

Response frame

IEC60870-5-103: Interoperability
1. Physical Layer
1.1 Electrical interface: EIA RS-485
Number of devices, 32 for one protection equipment
1.2 Optical interface
1.3 Transmission speed
User setting: 9600 or 19200 bit/s
2. Application Layer
COMMON ADDRESS of ASDU
One COMMON ADDRESS OF ASDU (identical with station address)
3. List of Information
The following items can be customized with the original software tool “IEC103 configurator”.
(For details, refer to “IEC103 configurator” manual No.6F2S0839.)
- Items for “Time-tagged message”: Type ID(1/2), INF, FUN, Transmission
condition(Signal number), COT

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CAUTION: Register Items into No.1 – 64. It becomes invalid when it registers after No.65.
- Items for “Time-tagged measurands”: INF, FUN, Transmission condition(Signal number),
COT, Type of measurand quantities
- Items for “General command”: INF, FUN, Control condition(Signal number)
- Items for “Measurands”: Type ID(3/9), INF, FUN, Number of measurand, Type of
measurand quantities
- Common setting
• Transmission cycle of Measurand frame
• FUN of System function
• Test mode, etc.
CAUTION: To be effective the setting data written via USB, turn off the DC supply to the
relay and turn on again.
3. 1 IEC60870-5-103 Interface
3.1.1 Spontaneous events
The events created by the relay will be sent using Function type (FUN) / Information numbers
(INF) to the IEC60870-5-103 master station.
3.1.2 General interrogation
The GI request can be used to read the status of the relay, the Function types and Information
numbers that will be returned during the GI cycle are shown in the table below.
For details, refer to the standard IEC60870-5-103 section 7.4.3.
3.1.3 Cyclic measurements
The relay will produce measured values using Type ID=3 or 9 on a cyclical basis, this can be
read from the relay using a Class 2 poll. The rate at which the relay produces new measured
values can be customized.
3.1.4 Commands
The supported commands can be customized. The relay will respond to non-supported
commands with a cause of transmission (COT) negative acknowledgement of a command.
For details, refer to the standard IEC60870-5-103 section 7.4.4.
3.1.5 Test mode
In test mode, both spontaneous messages and polled measured values, intended for processing
in the control system, are designated by means of the CAUSE OF TRANSMISSION ‘test
mode’. This means that the CAUSE OF TRANSMISSION = 7 ‘test mode’ is used for
messages normally transmitted with COT=1 (spontaneous) or COT=2 (cyclic).
For details, refer to the standard IEC60870-5-103 section 7.4.5.
3.1.6 Blocking of monitor direction
If blocking of the monitor direction is activated in the protection equipment, all indications and
measurands are no longer transmitted.
For details, refer to the standard IEC60870-5-103 section 7.4.6.

3.2 List of Information

The following are the default settings.

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IEC103 Configurator Default setting

INF Description Contents GI Type COT FUN DPI
ID Signal No. OFF ON
Standard Information numbers in monitor direction
System Function
0 End of General Interrogation Transmission completion of GI items. -- 8 10 255 -- -- --
0 Time Synchronization Time Synchronization ACK. -- 6 8 255 -- -- --
2 Reset FCB Reset FCB(toggle bit) ACK -- 5 3 219 -- -- --
3 Reset CU Reset CU ACK -- 5 4 219 -- -- --
4 Start/Restart Relay start/restart -- 5 5 219 -- -- --
5 Power On Relay power on. Not supported
Status Indications
If it is possible to use auto-recloser, this item is set
16 Auto-recloser active GI 1 1, 7, 11, 12 219 1411 1 2
active, if impossible, inactive.
If protection using telecommunication is available,
17 Teleprotection active Not supported
this item is set to active. If not, set to inactive.
If the protection is available, this item is set to
18 Protection active GI 1 1, 7, 12 219 1413 1 2
active. If not, set to inactive.

19 LED reset Reset of latched LEDs -- 1 1, 7, 11, 12 219 1409 -- 2

Block the 103 transmission from a relay to control

20 Monitor direction blocked GI 1 11 219 1241 1 2
system. IECBLK: "Blocked" settimg.
Transmission of testmode situation froma relay to
21 Test mode GI 1 11 219 1242 1 2
control system. IECTST "ON" setting.
When a setting change has done at the local, the
22 Local parameter Setting Not supported
event is sent to control system.

23 Characteristic1 Setting group 1 active GI 1 1, 7, 11, 12 219 1243 1 2

24 Characteristic2 Setting group 2 active GI 1 1, 7, 11, 12 219 1244 1 2

25 Characteristic3 Setting group 3 active Not supported

26 Characteristic4 Setting group 4 active Not supported

27 Auxiliary input1 Binary input 1 No set

28 Auxiliary input2 Binary input 2 No set
29 Auxiliary input3 Binary input 3 No set
30 Auxiliary input4 Binary input 4 No set
Supervision Indications
32 Measurand supervision I Zero sequence current supervision GI 1 1, 7 219 1266 1 2
33 Measurand supervision V Zero sequence voltage supervision GI 1 1, 7 219 1268 1 2
35 Phase sequence supervision Negative sequence voltage supevision GI 1 1, 7 219 1269 1 2
36 Trip circuit supervision Output circuit supervision GI 1 1, 7 219 1270 1 2
37 I>>backup operation Not supported
38 VT fuse failure VT failure GI 1 1, 7 219 386 1 2
39 Teleprotection disturbed CF(Communication system Fail) supervision Not supported
46 Group warning Only alarming GI 1 1, 7 219 1259 1 2
47 Group alarm Trip blocking and alarming GI 1 1, 7 219 1252 1 2
Earth Fault Indications
48 Earth Fault L1 A phase earth fault GI 1 1, 7 219 800 1 2
49 Earth Fault L2 B phase earth fault GI 1 1, 7 219 801 1 2
50 Earth Fault L3 C phase earth fault GI 1 1, 7 219 802 1 2
51 Earth Fault Fwd Earth fault forward GI 1 1, 7 219 803 1 2
52 Earth Fault Rev Earth fault reverse GI 1 1, 7 219 804 1 2

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IEC103 Configurator Default setting

INF Description Contents GI Type COT FUN DPI
ID Signal NO. OFF ON
Fault Indications
64 Start/pick-up L1 A phase, A-B phase or C-A phase element pick-up GI 2 1, 7 219 805 1 2
65 Start/pick-up L2 B phase, A-B phase or B-C phase element pick-up GI 2 1, 7 219 806 1 2
66 Start/pick-up L3 C phase, B-C phase or C-A phase element pick-up GI 2 1, 7 219 807 1 2
67 Start/pick-up N Earth fault element pick-up GI 2 1, 7 219 808 1 2
68 General trip Any trip -- 2 1, 7 219 371 -- 2
69 Trip L1 A phase, A-B phase or C-A phase trip -- 2 1, 7 219 372 -- 2
70 Trip L2 B phase, A-B phase or B-C phase trip -- 2 1, 7 219 373 -- 2
71 Trip L3 C phase, B-C phase or C-A phase trip -- 2 1, 7 219 374 -- 2
72 Trip I>>(back-up) Back up trip No set
73 Fault location X In ohms Fault location -- 4 1, 7 219 1048 -- --
74 Fault forw ard/line Forw ard fault -- 2 1, 7 219 816 -- 2
75 Fault reverse/Busbar Reverse fault -- 2 1, 7 219 817 -- 2

76 Teleprotection Signal transmitted Carrier signal sending Not supported

77 Teleprotection Signal received Carrier signal receiving Not supported

78 Zone1 Zone 1 trip Not supported

79 Zone2 Zone 2 trip Not supported
80 Zone3 Zone 3 trip Not supported
81 Zone4 Zone 4 trip Not supported
82 Zone5 Zone 5 trip Not supported
83 Zone6 Zone 6 trip Not supported
84 General Start/Pick-up Any elements pick-up GI 2 1, 7 219 1279 1 2
85 Breaker Failure CBF trip or CBF retrip -- 2 1, 7 219 818 -- 2
86 Trip measuring system L1 Not supported
87 Trip measuring system L2 Not supported
88 Trip measuring system L3 Not supported
89 Trip measuring system E Not supported
90 Trip I> Inverse time OC trip -- 2 1, 7 219 819 -- 2
91 Trip I>> Definite time OC trip -- 2 1, 7 219 820 -- 2
92 Trip IN> Inverse time earth fault OC trip -- 2 1, 7 219 821 -- 2
93 Trip IN>> Definite time earth fault OC trip -- 2 1, 7 219 822 -- 2

Autoreclose indications
128 CB 'ON' by Autoreclose CB close command output -- 1 1, 7 219 403 -- 2
CB 'ON' by long-time
129 Not supported
Autoreclose
130 Autoreclose Blocked Autoreclose block GI 1 1, 7 219 400 2 1

Details of Fault location settings in the IEC103 configurator

INF Tbl Offset Data type Coeff
219 5 26 short 0.1

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IEC103 configurator Default setting

INF Description Contents Type
GI COT FUN Max. No.
ID
Measurands
144 Measurand I Ib <meaurand I> -- 3 2, 7 219 1
145 Measurand I,V Ib, Vab <meaurand I> -- 3 2, 7 219 2
146 Measurand I,V,P,Q Ib, Vab <meaurand I> -- 3 2, 7 219 4
147 Measurand IN,VEN Ie, Ve <meaurand I> -- 3 2, 7 219 2
Measurand IL1,2,3, VL1,2,3,
148 Ia, Ib, Ic, Va, Vb, Vc, P, Q, f measurand <meaurand II> -- 9 2, 7 219 9
P,Q,f
Generic Function
240 Read Headings Not supported
Read attributes of all entries of
241 Not supported
a group
243 Read directory of entry Not supported
244 Real attribute of entry Not supported
245 End of GGI Not supported
249 Write entry w ith confirm Not supported
250 Write entry w ith execute Not supported
251 Write entry aborted Not supported

Details of MEA settings in IEC103 configurator

INF MEA Tbl Offset Data type Limit Coeff
Lower Upper
144 Ib 1 80 long 0 4095 0.4096
145 Ib 1 80 long 0 4095 0.4096
Vab 1 24 long 0 4095 1.86182
146 Ib 1 80 long 0 4095 1.70667
Vab 1 24 long 0 4095 1.8618
P 1 216 long -4096 4095 0.000387
Q 1 224 long -4096 4095 0.000387
147 Ie 1 152 long 0 4095 0.04608
Ve 1 144 long 0 4095 1.07507
148 Ia 1 72 long 0 4095 0.4096
Ib 1 80 long 0 4095 0.4096
Ic 1 88 long 0 4095 0.4096
Va 1 0 long 0 4095 3.2252
Vb 1 8 long 0 4095 3.2252
Vc 1 16 long 0 4095 3.2252
P 1 216 long -4096 4095 0.000387
Q 1 224 long -4096 4095 0.000387
f 1 184 long 0 4095 0.68267

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IEC103 Configurator Default setting

INF Description Contents Control Type
direction
COT FUN
ID
Selection of standard information numbers in control direction
System functions
Initiation of general
0 -- 7 9 255
interrogation
0 Time synchronization -- 6 8 255
General commands
16 Auto-recloser on/off ON/OFF 20 20 219
17 Teleprotection on/off Not supported
18 Protection on/off (*1) ON/OFF 20 20 219
19 LED reset Reset indication of latched LEDs. ON 20 20 219
23 Activate characteristic 1 Setting Group 1 ON 20 20 219
24 Activate characteristic 2 Setting Group 2 ON 20 20 219
25 Activate characteristic 3 Setting Group 3 Not supported
26 Activate characteristic 4 Setting Group 4 Not supported
27 CB OPEN ON 20 20 219
28 CB CLOSE ON 20 20 219
29 INTERLOCK ON / OFF ON 20 20 219
30 OPERATION ENABLE ON 20 20 219
Generic functions
Read headings of all defined
240 Not supported
groups
Read values or attributes of all
241 Not supported
entries of one group
Read directory of a single
243 Not supported
entry
Read values or attributes of a
244 Not supported
single entry
General Interrogation of
245 Not supported
generic data
248 Write entry Not supported
249 Write entry with confirmation Not supported
250 Write entry with execution Not supported

(∗1) Note: While the relay receives the "Protection off" command, the "IN SERVICE LED" is off.

Details of Command settings in the IEC103 configurator

INF DCO
Sig off Sig on Rev Valid time
16 2684 2684 ✓ 0
17 2686 2686 ✓ 0
18 2686 2686 ✓ 0
19 0 2688 200
23 0 2640 1000
24 0 2641 1000
27 0 2690 200
29 0 2691 200
30 2692 2692 ✓ 0
31 2693 2693 ✓ 0

✓: signal reverse

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GRE140
Description Contents Comment
supported
Basic application functions
Test mode Yes
Blocking of monitor direction Yes
Disturbance data No
Generic services No
Private data No
Miscellaneous
Max. MVAL = rated
Measurand
value times
Current L1 Ia Configurable
Current L2 Ib Configurable
Current L3 Ic Configurable
Voltage L1-E Va Configurable
Voltage L2-E Vb Configurable
Voltage L3-E Vc Configurable
Active power P P Configurable
Reactive power Q Q Configurable
Frequency f f Configurable
Voltage L1 - L2 Vab No set

Details of Common settings in the IEC103 configurator

- Setting file’s remark: IGRE140AA000
- Remote operation valid time [ms]: 4000
- Local operation valid time [ms]: 4000
- Measurand period [s]: 2
- Function type of System functions: 219
- Signal No. of Test mode: 1242
- Signal No. for Real time and Fault number: 1279

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[Legend]
GI: General Interrogation (refer to IEC60870-5-103 section 7.4.3)
Type ID: Type Identification (refer to IEC60870-5-103 section 7.2.1)
1 : time-tagged message
2 : time-tagged message with relative time
3 : measurands I
4 : time-tagged measurands with relative time
5 : identification
6 : time synchronization
8 : general interrogation termination
9 : measurands II
10: generic data
11: generic identification
20: general command
23: list of recorded disturbances
26: ready for transmission for disturbance data
27: ready for transmission of a channel
28: ready for transmission of tags
29: transmission of tags
30: transmission of disturbance values
31: end of transmission
COT: Cause of Transmission (refer to IEC60870-5-103 section 7.2.3)
1: spontaneous
2: cyclic
3: reset frame count bit (FCB)
4: reset communication unit (CU)
5: start / restart
6: power on
7: test mode
8: time synchronization
9: general interrogation
10: termination of general interrogation
11: local operation
12: remote operation
20: positive acknowledgement of command
21: negative acknowledgement of command
31: transmission of disturbance data
40: positive acknowledgement of generic write command
41: negative acknowledgement of generic write command
42: valid data response to generic read command
43: invalid data response to generic read command
44: generic write confirmation
FUN: Function type (refer to IEC60870-5-103 section 7.2.5.1)
DPI: Double-point Information (refer to IEC60870-5-103 section 7.2.6.5)
DCO: Double Command (refer to IEC60870-5-103 section 7.2.6.4)

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IEC103 setting data is recommended to be saved as follows:

(1) Naming for IEC103setting data

The file extension of IEC103 setting data is “.csv”. It is recommended that the version name is
provided with a revision number in order to be able to accommodate future changes as follows:
First draft: ∗∗∗∗∗∗_01.csv
Second draft: ∗∗∗∗∗∗_02.csv
Third draft: ∗∗∗∗∗∗_03.csv
Revision number
The name “∗∗∗∗∗∗” is recommended in order to be able to discriminate the relay type such as
GRE110 or GRE140, etc. The setting file’s remark field for IEC103 can accept up to 12
one-byte characters. It is utilized for control of IEC103 setting data.

(2) Saving the IEC103 setting data

It is recommended that IEC103 setting data is saved on electronic media, and should not be left
in a folder.

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Appendix N
Modbus: Interoperability

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Modbus: Interoperability
1. Physical and Data Link Layer
- RS485(EIA/TIA-485) 2-wire interface
- RTU mode only
- Coding System:
8–bit binary (1 start bit, 8 data bits, 1 parity bit, 1 stop bit)
Even parity
- Address setting range: 1-247
- Baud rate setting range: 9600 or 19200

2. Application Layer

(1) Modbus response format

FC Description Supplementary explanation

01 Read Coils Returns remote control enable flag
02 Read Discrete Inputs Returns BIs or LED lamp status, etc.
03 Read Holding Registers -
04 Read Input Register Returns value of analog inputs
05 Write Single Coil Remote command and Time synchronization
06 Write Single Register Need to specify record number
07 Read Exception status Returns relay and CB status
08 Diagnostic -
16 Write Multiple Registers Current time setting, etc.
17 Report Slave ID Returns device ID
43 Read device Identification (SC:14) Returns device information

For FC (Function Code) = 01, 02, 03, 04, 05, 06 and 16, the response format is the same as described
in "Modbus Application Protocol Specification V1.1b".

For other FCs, the response format is as following:

07 Read Exception status

Response Data
Output Data (1byte)
bit Description
0 IN SERVICE (LED)
1 TRIP (LED)
2 ALARM (LED)
3 RELAY FAIL (LED)
4 CB CLOSED (LED)
5 CB OPEN (LED)
6 Relay fail output (BO)
7 <Reserved>

08 Diagnostic
Response Data

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SC Response Data Field Description

00 Echo Request Data (2Bytes) Return Query Data
01 <not supported>
02 Diagnostic Register Contents (2Bytes) Return Diagnostic Register
bit0 IN SERVICE (LED)
bit1 TRIP (LED)
bit2 ALARM (LED)
bit3 RELAY FAIL (LED)
bit4 <Reserved>
bit5 <Reserved>
bit6 <Reserved>
bit7 <Reserved>
bit8 3-phase current balance alarm
bit9
bit10 CB contact status alarm
bit11 CB operation number alarm
bit12 CB operating time alarm
bit13 ∑Iy monitoring alarm
bit14 Measure circuit alarm If model type is “GRE140-6xx”
bit15 Measure circuit alarm (light fail) If model type is “GRE140-6xx”
03,04 <not supported>
10 counter number reset (SC:11～15)
11 “OK” number of CRC
12 “NG” number of CRC
13 <Reserved>
14 Normal response number
15 Broad cast receive number
16 Abnormal response number
17 Report Slave ID
Response Data
Byte Count (1byte) 18bytes
Slave ID (17bytes) Relay type and model ID
GRE140-400A-10-11 ASCII
Run Indicator Status (1byte) 0x00=out of service, 0xFF=in service

43 Read Device Identification (SC:14)

Response Data
Param OID
01 Basic device identification
00 TOSHIBA Vendor Name
01 GRE140-400 Product Code
02 A Major Minor Revision
02 Regular device identification
03 <Non> Vendor URL
04 GRE140 Product Name
05 400A-10-11 Model Name
06 DIRECTIONAL OVERCURRENT PROTECTION RELAY User Application Name
07- <Reserved> Reserved
03 Extended device identification
80 <SPASE>
81 GS1EM1-04-A Software version

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(2) Modbus address map group

Modbus data model Address(ID) Number Data specification
Coils 0x0200 1 Remote control (enable flag)
Remote control (command, interlock), Time
(Read/Write) 0x0400 4
synchronization, Clear command (write only)
Discrete Input 0x1000 18 BI
0x1016 17 Relay fail output, BO
(Read Only) 0x1040 14 LED(Relay status, R/L, CB on/off status)
0x1080 16 Virtual LED
0x1200 3072 Signal list (see Appendix B for detail)
0x1E00 32 Digest Coils
Input Registers Analog data (Ia, Ib, Ic, Ie, Thermal, Ia max etc.,
0x2000 158
unconverted to engineering units)
(Read Only) 2-word long
0x2700 4 Time sync status
0x3C00 32 Digest Registers
Fault record (No., Time), max. 10 records, write
0x2800 52
protected
Holding Registers
Fault record (No., Time, Phase, Type), max. 4 records,
0x3000 273
write protected
Event record (No., Time, ID, Status), 10 out of max. 200
(Read/Write) 0x3400 72
records, write protected
0x3800 4 Current time data (IEC format)
0x3810 30 Counter data (number of trips, ∑Iy, etc), 2-word long
0x3E00 64 Digest Alias
0x3E80 4 Password for remote control
0x3F00 2 Setting value for remote
0x4000 3952 Setting value (see Appendix H for detail)

Discrete Inputs Single bit Read-Only

Coils Single bit Read-Write
Input Registers 16-bit word Read-Only
Holding Registers 16-bit word Read-Write

(3)Modbus address map

Address Description Supplementary explanation
Coils
Remote control (R/W)
Remote control enable
0200
flag
0400 Remote control command Write (control) is enabled only 0x0200=1 (on/off)
Remote interlock
0401 Write (control) is enabled only 0x0200=1 (on/off)
command
0402 Remote reset command Write (control) is enabled only 0x0200=1 (on)
Time synchronization
0403 Call time synchronization task (on)
command
Clears counters, start-up time, operating time and peak current
0404 Clear motor parameters
(on)
Parameter clear for Motor Formatting parameter (Counter, start time, operation time,
0405
protection maximum current value). If model is GRE140-7xx.

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Address Description Supplementary explanation

Discrete Input
BI status (R)
1000 BI1
1001 BI2
1002 BI3
1003 BI4
1004 BI5
1005 BI6
1006 BI7 Only for GRE140-xx1 and GRE140-xx2
1007 BI8 Only for GRE140-xx1 and GRE140-xx2
1008 BI9 Only for GRE140-xx1 and GRE140-xx2
1009 BI10 Only for GRE140-xx1 and GRE140-xx2
100A BI11 Only for GRE140-xx1 and GRE140-xx2
100B BI12 Only for GRE140-xx1 and GRE140-xx2
100C BI13 Only for GRE140-xx2
100D BI14 Only for GRE140-xx2
100E BI15 Only for GRE140-xx2
100F BI16 Only for GRE140-xx2
1010 BI17 Only for GRE140-xx2
1011 BI18 Only for GRE140-xx2
BO status (R)
1016 Relay fail output
1017 BO1
1018 BO2
1019 BO3
101A BO4
101B BO5 Only for GRE140-xx1 and GRE140-xx2
101C BO6 Only for GRE140-xx1 and GRE140-xx2
101D BO7 Only for GRE140-xx1 and GRE140-xx2
101E BO8 Only for GRE140-xx1 and GRE140-xx2
101F BO9 Only for GRE140-xx1 and GRE140-xx2
1020 BO10 Only for GRE140-xx1 and GRE140-xx2
1021 BO11 Only for GRE140-xx2
1022 BO12 Only for GRE140-xx2
1023 BO13 Only for GRE140-xx2
1024 BO14 Only for GRE140-xx2
1025 BO15 Only for GRE140-xx2
1026 BO16 Only for GRE140-xx2
LED lamp status (R)
1040 IN SERVICE
1041 TRIP
1042 ALARM
1043 RELAY FAIL
1044 CB CLOSED
1045 CB OPEN

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Address Description Supplementary explanation

1046 LOCAL
1047 REMOTE
1048 LED1
1049 LED2
104A LED3
104B LED4
104C LED5
104D LED6
Virtual LED status (R)
1080 IND1 BIT1
1081 IND1 BIT2
1082 IND1 BIT3
1083 IND1 BIT4
1084 IND1 BIT5
1085 IND1 BIT6
1086 IND1 BIT7
1087 IND1 BIT8
1088 IND2 BIT1
… IND2 BITn Address forIND2 BIT No.n = 0x1087 + n.
Signal list (R)
1200 Signal No.0 See Appendix B
1201 Signal No.1 See Appendix B
1202 Signal No.2 See Appendix B
… Signal No.n Address for signal No.n = 0x1200 + n. See Appendix B
1DFF Signal No.3071 Digest Alias
1E00 Ailias coil #1
…1E1F Ailias coil #32
Input Registers
Analog data (R) The following are NOT converted to engineering units.
2000 Ia (H) Primary: value×0.0012×OCCT_RATIO/1000(kA)
2001 Ia (L) Secondary: Value×0.0012(A)
2002 Ia phase (H) I×0.01(rad)
2003 Ia phase (L) In case of under 0.5(A), Value is “0xFFFF”
2004 Ib (H) Primary: value×0.0012×OCCT_RATIO/1000(kA)
2005 Ib (L) Secondary: Value×0.0012(A)
2006 Ib phase (H) I×0.01(rad)
2007 Ib phase (L) In case of under 0.5(A), Value is “0xFFFF”
2008 Ic (H) Primary: value×0.0012×OCCT_RATIO/1000(kA)
2009 Ic (L) Secondary: Value×0.0012(A)
200A Ic phase (H) I×0.01(rad)
200B Ic phase (L) In case of under 0.5(A), Value is “0xFFFF”
200C Ie (H) Primary: value×0.000135×EFCT_RATIO/1000(kA)
200D Ie (L) Secondary: value×0.000135(A)
200E Ie phase (H) I×0.01(rad)
200F Ie phase (L) In case of under 0.5(A), Value is “0xFFFF”
2010 Ise (H) Only for GRE140-42xA Primary: value×0.00001227×SEFCT_RATIO/1000(kA)

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Address Description Supplementary explanation

2011 Ise (L) Only for GRE110-42xA Secondary: value×0.00001227(A)
2012 Ise phase (H) I×0.01(rad)
2013 Ise phase (L) In case of under 0.5(A), Value is “0xFFFF”
2014 I0(H) Primary: value×0.0012×OCCT_RATIO/1000(kA)
2015 I0(L) Secondary: Value×0.0012(A)
2016 I0 phase (H) I×0.01(rad)
2017 I0 phase (L) In case of under 0.5(A), Value is “0xFFFF”
2018 I1 (H) Primary: value×0.0012×OCCT_RATIO/1000(kA)
2019 I1 (L) Secondary: Value×0.0012(A)
201A I1 phase (H) I×0.01(rad)
201B I1 phase (L) In case of under 0.5(A), Value is “0xFFFF”
201C I2 (H) Primary: value×0.0012×OCCT_RATIO/1000(kA)
201D I2 (L) Secondary: Value×0.0012(A)
201E I2 phase (H) I×0.01(rad)
201F I2 phase (L) In case of under 0.5(A), Value is “0xFFFF”
2020 I2/I1 (H)
1000x displayed value
2021 I2/I1 (L)
2022 Thermal (H)
Value×0.01(%)
2023 Thermal (L)
2024 Va (H) Primary: value×0.06×PVT_RATIO/1000(kV)
2025 Va (L) Secondary: Value×0.06(V)
2026 Va phase (H) V×0.01(rad)
2027 Va phase (L) In case of under 0.5(V), Value is “0xFFFF”
2028 Vb (H) Primary: value×0.06×PVT_RATIO/1000(kV)
2029 Vb (L) Secondary: Value×0.06(V)
202A Vb phase (H) V×0.01(rad)
202B Vb phase (L) In case of under 0.5(V), Value is “0xFFFF”
202C Vc (H) Primary: value×0.06×PVT_RATIO/1000(kV)
202D Vc (L) Secondary: Value×0.06(V)
202E Vc phase (H) V×0.01(rad)
202F Vc phase (L) In case of under 0.5(V), Value is “0xFFFF”
2030 Ve (H) Primary: value×0.06×PVT_RATIO/1000(kV)
2031 Ve (L) Secondary: Value×0.06(V)
2032 Ve phase (H) V×0.01(rad)
2033 Ve phase (L) In case of under 0.5(V), Value is “0xFFFF”
2034 Vab (H) Primary: value×0.06×PVT_RATIO/1000(kV)
2035 Vab (L) Secondary: Value×0.06(V)
2036 Vab phase (H) V×0.01(rad)
2037 Vab phase (L) In case of under 0.5(V), Value is “0xFFFF”
2038 Vbc (H) Primary: value×0.06×PVT_RATIO/1000(kV)
2039 Vbc (L) Secondary: Value×0.06(V)
203A Vbc phase (H) V×0.01(rad)
203B Vbc phase (L) In case of under 0.5(V), Value is “0xFFFF”
203C Vca (H) Primary: value×0.06×PVT_RATIO/1000(kV)
203D Vca (L) Secondary: Value×0.06(V)
203E Vca phase (H) V×0.01(rad)

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Address Description Supplementary explanation

203F Vca phase (L) In case of under 0.5(V), Value is “0xFFFF”
2040 V0 (H) Primary: value×0.06×PVT_RATIO/1000(kV)
2041 V0 (L) Secondary: Value×0.06(V)
2042 V0 phase (H) V×0.01(rad)
2043 V0 phase (L) In case of under 0.5(V), Value is “0xFFFF”
2044 V1 (H) Primary: value×0.06×PVT_RATIO/1000(kV)
2045 V1 (L) Secondary: Value×0.06(V)
2046 V1 phase (H) V×0.01(rad)
2047 V1 phase (L) In case of under 0.5(V), Value is “0xFFFF”
2048 V2 (H) Primary: value×0.06×PVT_RATIO/1000(kV)
2049 V2 (L) Secondary: Value×0.06(V)
204A V2 phase (H) V×0.01(rad)
204B V2 phase (L) In case of under 0.5(V), Value is “0xFFFF”
204C Vs (H) Primary: value×0.06×PVT_RATIO/1000(kV)
204D Vs (L) Secondary: Value×0.06(V)
204E Vs phase (H) V×0.01(rad)
204F Vs phase (L) In case of under 0.5(V), Value is “0xFFFF”
2050 f (H)
f×0.01(Hz)
2051 f (L)
2052 df (H)
f×0.01(Hz)
2053 df (L)
2054 PF (H)
PF×0.01
2055 PF (L)
2056 P (H)
P×0.0012×0.06×OCCT_RATIO×PVT_RATIO/1000(kW)
2057 P (L)
2058 Q (H)
Q×0.0012×0.06×OCCT_RATIO×PVT_RATIO/1000(kvar)
2059 Q (L)
205A S (H)
S×0.0012×0.06×OCCT_RATIO×PVT_RATIO/1000(kVA)
205B S (L)
205C Ia max (H)
205D Ia max (L)
205E Ib max (H)
205F Ib max (L)
2060 Ic max (H)
2061 Ic max (L)
2062 Ie max (H)
2063 Ie max (L)
2064 Ise max (H)
Only for GRE140-42xA
2065 Ise max (L)
2066 I2 max (H)
2067 I2 max (L)
2068 I2/I1 max (H)
100x displayed value
2069 I2/I1 max (L)
206A Va max (H)
206B Va max (L)
206C Va min (H)

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Address Description Supplementary explanation

206D Va min (L)
206E Vb max (H)
206F Vb max (L)
2070 Vb min (H)
2071 Vb min (L)
2072 Vc max (H)
2073 Vc max (L)
2074 Vc min (H)
2075 Vc min (L)
2076 Ve max (H)
2077 Ve max (L)
2078 Ve min (H)
2079 Ve min (L)
207A Vs max (H)
207B Vs max (L)
207C Vs min (H)
207D Vs min (L)
207E V0 max (H)
207F V0 max (L)
2080 V0 min (H)
2081 V0 min (L)
2082 f max (H)
2083 f max (L)
2084 f min (H)
2085 f min (L)
2086 P max (H)
2087 P max (L)
2088 Q max (H)
2089 Q max (L)
208A S max (H)
208B S max (L)
208C Ia dir (H) Direction current (0:Briably, 1:Forward, 2:Reverse)
208D Ia dir (L)
208E Ib dir (H) Direction current (0:Briably, 1:Forward, 2:Reverse)
208F Ib dir (L)
2090 Ic dir (H) Direction current (0:Briably, 1:Forward, 2:Reverse)
2091 Ic dir (L)
2092 Ie dir (H) Direction current (0:Briably, 1:Forward, 2:Reverse)
2093 Ie dir (L)
2094 Ise dir (H) Only for GRE140-42x
2095 Ise dir (L)
2096 I2 dir (H) Direction current (0:Briably, 1:Forward, 2:Reverse)
2097 I2 dir (L)
2098 Not in use.
2099 Not in use.
209A Not in use.

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Address Description Supplementary explanation

209B Not in use.
209C Not in use.
209D Not in use.
209E Thermal 2 (H)
Value×0.01(%) Only for GRE140-7xx
209F Thermal 2 (L)
20A0 WH+ (H)
20A1 WH+ (L)
20A2 WH+ count (H)
20A3 WH+ count (L)
20A4 WH- (H)
20A5 WH- (L)
20A6 WH- count (H)
20A7 WH- count (L)
20A8 VARH+ (H)
20A9 VARH+ (L)
20AA VARH+ count (H)
20AB VARH+ count (L)
20AC VARH- (H)
20AD VARH- (L)
20AE VARH- count (H)
20AF VARH- count (L)
Holding Registers
Disturbance record (R) 10 records are obtained at a time.
Number of records saved (maximum save number is changed by
2800 records count
save time)
Requesting first record number (If 1, returns the latest 20
2801 set No. (R/W)
records)
2802 No.X Returns "Set No.". If no data, all of the following data is set to 0.
2803 milliseconds 0-59999 (millisecond)
2804 hours/minutes 0-23(h)、0-59(m)
2805 months/days 1-12(m)、1-31(d)
2806 year 0-99(y)
Returns "Set No.+1". If no data, all of the following data is set to
2807 No.X+1
0.
2808 milliseconds 0-59999 (millisecond)
2809 hours/minutes 0-23(h)、0-59(m)
280A months/days 1-12(m)、1-31(d)
280B year 0-99(y)
Returns "Set No.+2". If no data, all of the following data is set to
280C No.X+2
0.
280D milliseconds 0-59999 (millisecond)
280E hours/minutes 0-23(h)、0-59(m)
280F months/days 1-12(m)、1-31(d)
2810 Action 1:on 、2:off
Returns "Set No.+3". If no data, all of the following data is set to
2811 No.X+3
0.
2812 milliseconds 0-59999 (millisecond)
2813 hours/minutes 0-23(h)、0-59(m)

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Address Description Supplementary explanation

2814 months/days 1-12(m)、1-31(d)
2815 year 0-99(y)
Returns "Set No.+4". If no data, all of the following data is set to
2816 No.X+4
0.
2817 milliseconds 0-59999 (millisecond)
2818 hours/minutes 0-23(h)、0-59(m)
2819 months/days 1-12(m)、1-31(d)
281A year 0-99(y)
Returns "Set No.+5". If no data, all of the following data is set to
281B No.X+5
0.
281C milliseconds 0-59999 (millisecond)
281D hours/minutes 0-23(h)、0-59(m)
281E months/days 1-12(m)、1-31(d)
281F year 0-99(y)
Returns "Set No.+6". If no data, all of the following data is set to
2820 No.X+6
0.
2821 milliseconds 0-59999 (millisecond)
2822 hours/minutes 0-23(h)、0-59(m)
2823 months/days 1-12(m)、1-31(d)
2824 year 0-99(y)
Returns "Set No.+7". If no data, all of the following data is set to
2825 No.X+7
0.
2826 milliseconds 0-59999 (millisecond)
2827 hours/minutes 0-23(h)、0-59(m)
2828 months/days 1-12(m)、1-31(d)
2829 year 0-99(y)
Returns "Set No.+8". If no data, all of the following data is set to
282A No.X+8
0.
282B milliseconds 0-59999 (millisecond)
282C hours/minutes 0-23(h)、0-59(m)
282D months/days 1-12(m)、1-31(d)
282E year 0-99(y)
Returns "Set No.+9". If no data, all of the following data is set to
282F No.X+9
0.
2830 milliseconds 0-59999 (millisecond)
2831 hours/minutes 0-23(h)、0-59(m)
2832 months/days 1-12(m)、1-31(d)
2833 year 0-99(y)
Returns "Set No.+5". If no data, all of the following data is set to
2834 No.X+10
0.
2835 milliseconds 0-59999 (millisecond)
2836 hours/minutes 0-23(h)、0-59(m)
2837 months/days 1-12(m)、1-31(d)
2838 year 0-99(y)
Returns "Set No.+6". If no data, all of the following data is set to
2839 No.X+11
0.
283A milliseconds 0-59999 (millisecond)
283B hours/minutes 0-23(h)、0-59(m)

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Address Description Supplementary explanation

283C months/days 1-12(m)、1-31(d)
283D year 0-99(y)
Returns "Set No.+7". If no data, all of the following data is set to
283E No.X+12
0.
283F milliseconds 0-59999 (millisecond)
2840 hours/minutes 0-23(h)、0-59(m)
2841 months/days 1-12(m)、1-31(d)
2842 year 0-99(y)
Returns "Set No.+8". If no data, all of the following data is set to
2843 No.X+13
0.
2844 milliseconds 0-59999 (millisecond)
2845 hours/minutes 0-23(h)、0-59(m)
2846 months/days 1-12(m)、1-31(d)
2847 year 0-99(y)
Returns "Set No.+9". If no data, all of the following data is set to
2848 No.X+14
0.
2849 milliseconds 0-59999 (millisecond)
284A hours/minutes 0-23(h)、0-59(m)
284B months/days 1-12(m)、1-31(d)
284C year 0-99(y)
Returns "Set No.+5". If no data, all of the following data is set to
284D No.X+15
0.
284E milliseconds 0-59999 (millisecond)
284F hours/minutes 0-23(h)、0-59(m)
2850 months/days 1-12(m)、1-31(d)
2851 year 0-99(y)
Returns "Set No.+6". If no data, all of the following data is set to
2852 No.X+16
0.
2853 milliseconds 0-59999 (millisecond)
2854 hours/minutes 0-23(h)、0-59(m)
2855 months/days 1-12(m)、1-31(d)
2856 year 0-99(y)
Returns "Set No.+7". If no data, all of the following data is set to
2857 No.X+17
0.
2858 milliseconds 0-59999 (millisecond)
2859 hours/minutes 0-23(h)、0-59(m)
285A months/days 1-12(m)、1-31(d)
285B year 0-99(y)
Returns "Set No.+8". If no data, all of the following data is set to
285C No.X+18
0.
285D milliseconds 0-59999 (millisecond)
285E hours/minutes 0-23(h)、0-59(m)
285F months/days 1-12(m)、1-31(d)
2860 year 0-99(y)
Returns "Set No.+9". If no data, all of the following data is set to
2861 No.X+19
0.
2862 milliseconds 0-59999 (millisecond)
2863 hours/minutes 0-23(h)、0-59(m)

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Address Description Supplementary explanation

2864 months/days 1-12(m)、1-31(d)
2865 year 0-99(y)
Fault record (R)
3000 records count Number of record saved (max. 8)
3001 No. (R/W) Indication of record #1. If no data, all following data are set to 0.
3002 milliseconds 0-59999 (millisecond)
3003 hours/minutes 0-23(h)、0-59(m)
3004 months/days 1-12(m)、1-31(d)
3005 year 0-99(y)
3006 <Reserved>
3007 Trip mode1 (H)
3008 Trip mode1 (L)
3009 Trip mode2 (H)
300A Trip mode2 (L)
300B Trip phase
300C FL error information Fault Location error information
300D Trip mode
Pre-fault value
300E Ia (H) Primary: value×0.0012×OCCT_RATIO/1000(kA)
300F Ia (L) Secondary: Value×0.0012(A)
3010 Ia phase (H) I×0.01(rad)
3011 Ia phase (L) In case of under 0.5(A), Value is “0xFFFF”
3012 Ib (H) Primary: value×0.0012×OCCT_RATIO/1000(kA)
3013 Ib (L) Secondary: Value×0.0012(A)
3014 Ib phase (H) I×0.01(rad)
3015 Ib phase (L) In case of under 0.5(A), Value is “0xFFFF”
3016 Ic (H) Primary: value×0.0012×OCCT_RATIO/1000(kA)
3017 Ic (L) Secondary: Value×0.0012(A)
3018 Ic phase (H) I×0.01(rad)
3019 Ic phase (L) In case of under 0.5(A), Value is “0xFFFF”
301A Ie (H) Primary: value×0.000135×EFCT_RATIO/1000(kA)
301B Ie (L) Secondary: value×0.000135(A)
301C Ie phase (H) I×0.01(rad)
301D Ie phase (L) In case of under 0.5(A), Value is “0xFFFF”
301E Ise (H) Only for GRE110-42xA Primary: value×0.00001227×SEFCT_RATIO/1000(kA)
301F Ise (L) Only for GRE110-42xA Secondary: value×0.00001227(A)
3020 Ise phase (H) I×0.01(rad)
3021 Ise phase (L) In case of under 0.5(A), Value is “0xFFFF”
3022 I0(H) Primary: value×0.0012×OCCT_RATIO/1000(kA)
3023 I0(L) Secondary: Value×0.0012(A)
3024 I0 phase (H) I×0.01(rad)
3025 I0 phase (L) In case of under 0.5(A), Value is “0xFFFF”
3026 I1 (H) Primary: value×0.0012×OCCT_RATIO/1000(kA)
3027 I1 (L) Secondary: Value×0.0012(A)
3028 I1 phase (H) I×0.01(rad)
3029 I1 phase (L) In case of under 0.5(A), Value is “0xFFFF”

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Address Description Supplementary explanation

302A I2 (H) Primary: value×0.0012×OCCT_RATIO/1000(kA)
302B I2 (L) Secondary: Value×0.0012(A)
302C I2 phase (H) I×0.01(rad)
302D I2 phase (L) In case of under 0.5(A), Value is “0xFFFF”
302E I2/I1 (H)
1000x displayed value
302F I2/I1 (L)
3030 Va (H) Primary: value×0.06×PVT_RATIO/1000(kV)
3031 Va (L) Secondary: Value×0.06(V)
3032 Va phase (H) V×0.01(rad)
3033 Va phase (L) In case of under 0.5(V), Value is “0xFFFF”
3034 Vb (H) Primary: value×0.06×PVT_RATIO/1000(kV)
3035 Vb (L) Secondary: Value×0.06(V)
3036 Vb phase (H) V×0.01(rad)
3037 Vb phase (L) In case of under 0.5(V), Value is “0xFFFF”
3038 Vc (H) Primary: value×0.06×PVT_RATIO/1000(kV)
3039 Vc (L) Secondary: Value×0.06(V)
303A Vc phase (H) V×0.01(rad)
303B Vc phase (L) In case of under 0.5(V), Value is “0xFFFF”
303C Ve (H) Primary: value×0.06×PVT_RATIO/1000(kV)
303D Ve (L) Secondary: Value×0.06(V)
303E Ve phase (H) V×0.01(rad)
303F Ve phase (L) In case of under 0.5(V), Value is “0xFFFF”
3040 Vab (H) Primary: value×0.06×PVT_RATIO/1000(kV)
3041 Vab (L) Secondary: Value×0.06(V)
3042 Vab phase (H) V×0.01(rad)
3043 Vab phase (L) In case of under 0.5(V), Value is “0xFFFF”
3044 Vbc (H) Primary: value×0.06×PVT_RATIO/1000(kV)
3045 Vbc (L) Secondary: Value×0.06(V)
3046 Vbc phase (H) V×0.01(rad)
3047 Vbc phase (L) In case of under 0.5(A), Value is “0xFFFF”
3048 Vca (H) Primary: value×0.06×PVT_RATIO/1000(kV)
3049 Vca (L) Secondary: Value×0.06(V)
304A Vca phase (H) V×0.01(rad)
304B Vca phase (L) In case of under 0.5(V), Value is “0xFFFF”
304C V0 (H) Primary: value×0.06×PVT_RATIO/1000(kV)
304D V0 (L) Secondary: Value×0.06(V)
304E V0 phase (H) V×0.01(rad)
304F V0 phase (L) In case of under 0.5(A), Value is “0xFFFF”
3050 V1 (H) Primary: value×0.06×PVT_RATIO/1000(kA)
3051 V1 (L) Secondary: Value×0.06(V)
3052 V1 phase (H) V×0.01(rad)
3053 V1 phase (L) In case of under 0.5(V), Value is “0xFFFF”
3054 V2 (H) Primary: value×0.06×PVT_RATIO/1000(kV)
3055 V2 (L) Secondary: Value×0.06(V)
3056 V2 phase (H) V×0.01(rad)
3057 V2 phase (L) In case of under 0.5(V), Value is “0xFFFF”

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Address Description Supplementary explanation

3058 Vs (H) Primary: value×0.06×PVT_RATIO/1000(kV)
3059 Vs (L) Secondary: Value×0.06(V)
305A Vs phase (H) V×0.01(rad)
305B Vs phase (L) In case of under 0.5(V), Value is “0xFFFF”
305C f (H)
305D f (L)
305E df (H)
305F df (L)
3060 PF (H)
3061 PF (L)
Fault value
3062 Ia (H) Primary: value×0.0012×OCCT_RATIO/1000(kA)
3063 Ia (L) Secondary: Value×0.0012(A)
3064 Ia phase (H) I×0.01(rad)
3065 Ia phase (L) In case of under 0.5(A), Value is “0xFFFF”
3066 Ib (H) Primary: value×0.0012×OCCT_RATIO/1000(kA)
3067 Ib (L) Secondary: Value×0.0012(A)
3068 Ib phase (H) I×0.01(rad)
3069 Ib phase (L) In case of under 0.5(A), Value is “0xFFFF”
306A Ic (H) Primary: value×0.0012×OCCT_RATIO/1000(kA)
306B Ic (L) Secondary: Value×0.0012(A)
306C Ic phase (H) I×0.01(rad)
306D Ic phase (L) In case of under 0.5(A), Value is “0xFFFF”
306E Ie (H) Primary: value×0.000135×EFCT_RATIO/1000(kA)
306F Ie (L) Secondary: value×0.000135(A)
3070 Ie phase (H) I×0.01(rad)
3071 Ie phase (L) In case of under 0.5(A), Value is “0xFFFF”
3072 Ise (H) Only for GRE140-42xA Primary: value×0.00001227×SEFCT_RATIO/1000(kA)
3073 Ise (L) Only for GRE140-42xA Secondary: value×0.00001227(A)
3074 Ise phase (H) I×0.01(rad)
3075 Ise phase (L) In case of under 0.5(A), Value is “0xFFFF”
3076 I0(H) Primary: value×0.0012×OCCT_RATIO/1000(kA)
3077 I0(L) Secondary: Value×0.0012(A)
3078 I0 phase (H) I×0.01(rad)
3079 I0 phase (L) In case of under 0.5(A), Value is “0xFFFF”
307A I1 (H) Primary: value×0.0012×OCCT_RATIO/1000(kA)
307B I1 (L) Secondary: Value×0.0012(A)
307C I1 phase (H) I×0.01(rad)
307D I1 phase (L) In case of under 0.5(A), Value is “0xFFFF”
307E I2 (H) Primary: value×0.0012×OCCT_RATIO/1000(kA)
307F I2 (L) Secondary: Value×0.0012(A)
3080 I2 phase (H) I×0.01(rad)
3081 I2 phase (L) In case of under 0.5(A), Value is “0xFFFF”
3082 I2/I1 (H)
1000x displayed value
3083 I2/I1 (L)
2084 Thermal (H) Value×0.01(%)

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Address Description Supplementary explanation

2085 Thermal (L)
3086 Va (H) Primary: value×0.06×PVT_RATIO/1000(kV)
3087 Va (L) Secondary: Value×0.06(V)
3088 Va phase (H) V×0.01(rad)
3089 Va phase (L) In case of under 0.5(V), Value is “0xFFFF”
308A Vb (H) Primary: value×0.06×PVT_RATIO/1000(kV)
308B Vb (L) Secondary: Value×0.06(V)
308C Vb phase (H) V×0.01(rad)
308D Vb phase (L) In case of under 0.5(V), Value is “0xFFFF”
308E Vc (H) Primary: value×0.06×PVT_RATIO/1000(kV)
308F Vc (L) Secondary: Value×0.06(V)
3090 Vc phase (H) V×0.01(rad)
3091 Vc phase (L) In case of under 0.5(V), Value is “0xFFFF”
3092 Ve (H) Primary: value×0.06×PVT_RATIO/1000(kV)
3093 Ve (L) Secondary: Value×0.06(V)
2094 Ve phase (H) V×0.01(rad)
2095 Ve phase (L) In case of under 0.5(V), Value is “0xFFFF”
3096 Vab (H) Primary: value×0.06×PVT_RATIO/1000(kV)
3097 Vab (L) Secondary: Value×0.06(V)
3098 Vab phase (H) V×0.01(rad)
3099 Vab phase (L) In case of under 0.5(V), Value is “0xFFFF”
309A Vbc (H) Primary: value×0.06×PVT_RATIO/1000(kV)
309B Vbc (L) Secondary: Value×0.06(V)
309C Vbc phase (H) V×0.01(rad)
309D Vbc phase (L) In case of under 0.5(A), Value is “0xFFFF”
309E Vca (H) Primary: value×0.06×PVT_RATIO/1000(kV)
309F Vca (L) Secondary: Value×0.06(V)
30A0 Vca phase (H) V×0.01(rad)
30A1 Vca phase (L) In case of under 0.5(V), Value is “0xFFFF”
30A2 V0 (H) Primary: value×0.06×PVT_RATIO/1000(kV)
30A3 V0 (L) Secondary: Value×0.06(V)
20A4 V0 phase (H) V×0.01(rad)
20A5 V0 phase (L) In case of under 0.5(A), Value is “0xFFFF”
30A6 V1 (H) Primary: value×0.06×PVT_RATIO/1000(kA)
30A7 V1 (L) Secondary: Value×0.06(V)
30A8 V1 phase (H) V×0.01(rad)
30A9 V1 phase (L) In case of under 0.5(V), Value is “0xFFFF”
30AA V2 (H) Primary: value×0.06×PVT_RATIO/1000(kV)
30AB V2 (L) Secondary: Value×0.06(V)
30AC V2 phase (H) V×0.01(rad)
30AD V2 phase (L) In case of under 0.5(V), Value is “0xFFFF”
30AE Vs (H) Primary: value×0.06×PVT_RATIO/1000(kV)
30AF Vs (L) Secondary: Value×0.06(V)
30B0 Vs phase (H) V×0.01(rad)
30B1 Vs phase (L) In case of under 0.5(V), Value is “0xFFFF”
30B2 f (H)

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Address Description Supplementary explanation

30B3 f (L)
20B4 df (H)
20B5 df (L)
30B6 PF (H)
30B7 PF (L)
30B8 Following Fault information
30B9 milliseconds 0-59999 (millisecond) Following Fault information 1
30BA hours/minutes 0-23(h)、0-59(m)
30BB months/days 1-12(m)、1-31(d)
30BC year 0-99(y)
30BD Trip mode1 (H)
30BE Trip mode1 (L)
30BF Trip mode2 (H)
30C0 Trip mode2 (L)
30C1 Trip phase b3:e phase, b2:C phase, b1:B phase, b0:A phase
30C2 Auto Reclosing mode (H)
30C3 Auto Reclosing mode (L)
20C4 milliseconds Following Fault information 2
20C5 hours/minutes
30C6 months/days
30C7 year
30C8 Trip mode1 (H)
30C9 Trip mode1 (L)
30CA Trip mode2 (H)
30CB Trip mode2 (L)
30CC Trip phase
30CD Auto Reclosing mode (H)
30CE Auto Reclosing mode (L)
30CF milliseconds Following Fault information 3
30D0 hours/minutes
30D1 months/days
30D2 year
30D3 Trip mode1 (H)
20D4 Trip mode1 (L)
20D5 Trip mode2 (H)
30D6 Trip mode2 (L)
30D7 Trip phase
30D8 Auto Reclosing mode (H)
30D9 Auto Reclosing mode (L)
30DA milliseconds Following Fault information 4
30DB hours/minutes
30DC months/days
30DD year
30DE Trip mode1 (H)
30DF Trip mode1 (L)
30E0 Trip mode2 (H)

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Address Description Supplementary explanation

30E1 Trip mode2 (L)
30E2 Trip phase
30E3 Auto Reclosing mode (H)
20E4 Auto Reclosing mode (L)
20E5 milliseconds Following Fault information 5
30E6 hours/minutes
30E7 months/days
30E8 year
30E9 Trip mode1 (H)
30EA Trip mode1 (L)
30EB Trip mode2 (H)
30EC Trip mode2 (L)
30ED Trip phase
30EE Auto Reclosing mode (H)
30EF Auto Reclosing mode (L)
30F0 milliseconds Following Fault information 6
30F1 hours/minutes
30F2 months/days
30F3 year
20F4 Trip mode1 (H)
20F5 Trip mode1 (L)
30F6 Trip mode2 (H)
30F7 Trip mode2 (L)
30F8 Trip phase
30F9 Auto Reclosing mode (H)
30FA Auto Reclosing mode (L)
30FB milliseconds Following Fault information 7
30FC hours/minutes
30FD months/days
30FE year
30FF Trip mode1 (H)
3100 Trip mode1 (L)
3101 Trip mode2 (H)
3102 Trip mode2 (L)
3103 Trip phase
3104 Auto Reclosing mode (H)
3105 Auto Reclosing mode (L)
3106 milliseconds Following Fault information 8
3107 hours/minutes
3108 months/days
3109 year
310A Trip mode1 (H)
310B Trip mode1 (L)
310C Trip mode2 (H)
310D Trip mode2 (L)
310E Trip phase

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Address Description Supplementary explanation

310F Auto Reclosing mode (H)
3110 Auto Reclosing mode (L)
3111 milliseconds Following Fault information 9
3112 hours/minutes
3113 months/days
3114 year
3115 Trip mode1 (H)
3116 Trip mode1 (L)
3117 Trip mode2 (H)
3118 Trip mode2 (L)
3119 Trip phase
311A Auto Reclosing mode (H)
311B Auto Reclosing mode (L)
311C milliseconds Following Fault information 10
311D hours/minutes
311E months/days
311F year
3120 Trip mode1 (H)
3121 Trip mode1 (L)
3122 Trip mode2 (H)
3123 Trip mode2 (L)
3124 Trip phase
3125 Auto Reclosing mode (H)
3126 Auto Reclosing mode (L)
3127 milliseconds Following Fault information 11
3128 hours/minutes
3129 months/days
312A year
312B Trip mode1 (H)
312C Trip mode1 (L)
312D Trip mode2 (H)
312E Trip mode2 (L)
312F Trip phase
3130 Auto Reclosing mode (H)
3131 Auto Reclosing mode (L)
3132 milliseconds Following Fault information 12
3133 hours/minutes
3134 months/days
3135 year
3136 Trip mode1 (H)
3137 Trip mode1 (L)
3138 Trip mode2 (H)
3139 Trip mode2 (L)
313A Trip phase
313B Auto Reclosing mode (H)
313C Auto Reclosing mode (L)

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Address Description Supplementary explanation

313D milliseconds Following Fault information 13
313E hours/minutes
313F months/days
3140 year
3141 Trip mode1 (H)
3142 Trip mode1 (L)
3143 Trip mode2 (H)
3144 Trip mode2 (L)
3145 Trip phase
3146 Auto Reclosing mode (H)
3147 Auto Reclosing mode (L)
3148 milliseconds Following Fault information 14
3149 hours/minutes
314A months/days
314B year
314C Trip mode1 (H)
314D Trip mode1 (L)
314E Trip mode2 (H)
314F Trip mode2 (L)
3150 Trip phase
3151 Auto Reclosing mode (H)
3152 Auto Reclosing mode (L)
3153 milliseconds Following Fault information 15
3154 hours/minutes
3155 months/days
3156 year
3157 Trip mode1 (H)
3158 Trip mode1 (L)
3159 Trip mode2 (H)
315A Trip mode2 (L)
315B Trip phase
315C Auto Reclosing mode (H)
315D Auto Reclosing mode (L)
315E milliseconds Following Fault information 16
315F hours/minutes
3160 months/days
3161 year
3162 Trip mode1 (H)
3163 Trip mode1 (L)
3164 Trip mode2 (H)
3165 Trip mode2 (L)
3166 Trip phase
3167 Auto Reclosing mode (H)
3168 Auto Reclosing mode (L)
3169 seconds 0-59 (millisecond) Motor Start Time Only for GRE140-7xx
316A hours/minutes 0-23(h)、0-59(m) Only for GRE140-7xx

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Address Description Supplementary explanation

316B months/dyas 1-12(m)、1-31(d) Only for GRE140-7xx
316C year 0-99(y) Only for GRE140-7xx
316D Thermal2 (H)
Thm×0.01(%) Only for GRE140-7xx
316E Thermal2 (L)
316F Hotst (H)
Hot Start number Only for GRE140-7xx
3170 Hotst (L)
3171 Coldst (H)
Cold Start number Only for GRE140-7xx
3172 Coldst (L)
3173 Peakst (H)
Peak Current I×0.0012(A) Only for GRE140-7xx
3174 Peakst (L)
3175 P(H) Primary:value×0.0012×OCCT_RATIO×PVT RATIO/1000(kW)
3176 P(L) Secondary: Value×0.0012×0.06 (W)
3177 Q(H) Primary:value×0.0012×OCCT_RATIO×PVT RATIO/1000(kvar)
3178 Q(L) Secondary: Value×0.0012×0.06 (var)
3179 P(H) Primary:value×0.0012×OCCT_RATIO×PVT RATIO/1000(kW)
317A P(L) Secondary: Value×0.0012×0.06 (W)
317B Q(H) Primary:value×0.0012×OCCT_RATIO×PVT RATIO/1000(kvar)
317C Q(L) Secondary: Value×0.0012×0.06 (var)
Event record (R) 10 records are obtained at a time.
3400 records count Number of records saved (max. 200)
Requesting first record number (If 1, returns the latest 10
3401 set No. (R/W)
records)
3402 No.X Returns "Set No.". If no data, all of the following data is set to 0.
3403 milliseconds 0-59999 (millisecond)
3404 hours/minutes 0-23(h)、0-59(m)
3405 months/days 1-12(m)、1-31(d)
3406 year 0-99(y)
3407 Event ID See Appendix C
3408 Action 1:on 、2:off
Returns "Set No.+1". If no data, all of the following data is set to
3409 No.X+1
0.
340A milliseconds 0-59999 (millisecond)
340B hours/minutes 0-23(h)、0-59(m)
340C months/days 1-12(m)、1-31(d)
340D year 0-99(y)
340E Event ID See Appendix C
340F Action 1:on 、2:off
Returns "Set No.+2". If no data, all of the following data is set to
3410 No.X+2
0.
3411 milliseconds 0-59999 (millisecond)
3412 hours/minutes 0-23(h)、0-59(m)
3413 months/days 1-12(m)、1-31(d)
3414 year 0-99(y)
3415 Event ID See Appendix C
3416 Action 1:on 、2:off
Returns "Set No.+3". If no data, all of the following data is set to
3417 No.X+3
0.

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Address Description Supplementary explanation

3418 milliseconds 0-59999 (millisecond)
3419 hours/minutes 0-23(h)、0-59(m)
341A months/days 1-12(m)、1-31(d)
341B year 0-99(y)
341C Event ID See Appendix C
341D Action 1:on 、2:off
Returns "Set No.+4". If no data, all of the following data is set to
341E No.X+4
0.
341F milliseconds 0-59999 (millisecond)
3420 hours/minutes 0-23(h)、0-59(m)
3421 months/days 1-12(m)、1-31(d)
3422 year 0-99(y)
3423 Event ID See Appendix C
3424 Action 1:on 、2:off
Returns "Set No.+5". If no data, all of the following data is set to
3425 No.X+5
0.
3426 milliseconds 0-59999 (millisecond)
3427 hours/minutes 0-23(h)、0-59(m)
3428 months/days 1-12(m)、1-31(d)
3429 year 0-99(y)
342A Event ID See Appendix C
342B Action 1:on 、2:off
Returns "Set No.+6". If no data, all of the following data is set to
342C No.X+6
0.
342D milliseconds 0-59999 (millisecond)
342E hours/minutes 0-23(h)、0-59(m)
342F months/days 1-12(m)、1-31(d)
3430 year 0-99(y)
3431 Event ID See Appendix C
3432 Action 1:on 、2:off
Returns "Set No.+7". If no data, all of the following data is set to
3433 No.X+7
0.
3434 milliseconds 0-59999 (millisecond)
3435 hours/minutes 0-23(h)、0-59(m)
3436 months/days 1-12(m)、1-31(d)
3437 year 0-99(y)
3438 Event ID See Appendix C
3439 Action 1:on 、2:off
Returns "Set No.+8". If no data, all of the following data is set to
343A No.X+8
0.
343B milliseconds 0-59999 (millisecond)
343C hours/minutes 0-23(h)、0-59(m)
343D months/days 1-12(m)、1-31(d)
343E year 0-99(y)
343F Event ID See Appendix C
3440 Action 1:on 、2:off
Returns "Set No.+9". If no data, all of the following data is set to
3441 No.X+9
0.

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Address Description Supplementary explanation

3442 milliseconds 0-59999 (millisecond)
3443 hours/minutes 0-23(h)、0-59(m)
3444 months/days 1-12(m)、1-31(d)
3445 year 0-99(y)
3446 Event ID See Appendix C
3447 Action 1:on 、2:off
Current time data (R/W) Current time in IEC60870-5-4 format
3800 milliseconds 0-59999 (millisecond)
3801 hours/minutes 0-23(h)、0-59(m)
3802 months/days 1-12(m)、1-31(d)
3803 year 0-99(y)
Counters (R/W)
3810 Trips any phase (H)
Can be set initial value.
3811 Trips any phase (L)
3812 Trips Phase-A (H)
Can be set initial value.
3813 Trips Phase-A (L)
3814 Trips Phase-B (H)
Can be set initial value.
3815 Trips Phase-B (L)
3816 Trips Phase-C (H)
Can be set initial value.
3817 Trips Phase-C (L)
3818 ∑Iy A (H)
Can be set initial value.
3819 ∑Iy A (L)
381A ∑Iy B (H)
Can be set initial value.
381B ∑Iy B (L)
381C ∑Iy C (H)
Can be set initial value.
381D ∑Iy C (L)
381E ARCs (H)
381F ARCs (L)
3820 Hot Starts (H)
3821 Hot Starts (L)
3822 Cold Starts (H)
3823 Cold Starts (L)
3824 <Reserved>
3825 <Reserved>
3826 <Reserved>
3827 <Reserved>
Motor Start Time (R)
3830 milliseconds 0-59999 (millisecond) Only for GRE140-7xx
3831 hours/minutes 0-23(h)、0-59(m) Only for GRE140-7xx
3832 months/days 1-12(m)、1-31(d) Only for GRE140-7xx
3833 year 0-99(y) Only for GRE140-7xx
Motor Operation Time (R)
3834 seconds 0-59(m) Only for GRE140-7xx
3835 minutes 0-59(m) Only for GRE140-7xx
3836 hours (H) Time in total (superior 2 byte on integer) Only for GRE140-7xx
3837 hours (L) Time in total (hypostasis 2 byte on integer) Only for GRE140-7xx

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Address Description Supplementary explanation

Maximum Start Current (R)
3838 Peak starting current (H) Primary: Ia×0.0012×CT_RATIO/1000(kA) Only for GRE140-7xx
3839 Peak starting current (L) Secondary: Ia×0.0012(A) Only for GRE140-7xx
Motor operation status (R)
383A Motor LED 1:Stop, 2:Startup, 3:In Operation
Digest (Alias) (R)
3C00
Alias Register #1
....
3C1F Alias Register #32
Alias Setting (R/W)
3E00
Alias set data (Coil) #1 Address Setting
....
3E1F Alias set data (Coil) #32
3E20 Alias set data (Register)
Address Setting (2 Words data must setting 2 address)
.... #1
Alias set data (Register)
3C3F
#32
Password
3E80 Setting (H) Pass word for Setting
3E81 Setting (L) Pass word for Setting
3E82 Control (H) Pass word for Control
3E83 Control (L) Pass word for Control
3F00 Setting Start flag 0:In operation, 1:Setting start, 2:Setting execution
3F01 Setting error Address
Setting values
See the next table for
4000 4000
setting values.

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(4) Modbus address for setting values

Setting Group
Address Name Contents
(Menu)
48E4 FL FL function use or not
48D8 BITRN Number of bi-trigger (on/off) events
Event Record 4940 EV1 Event record signal No.1
4941... EV2 Event record signal No.2～
49BF EV128 Event record signal No.128
48C0 Time1 Disturbance record period before fault
48C1 Time2 Disturbance record period after fault
48C2 OC OC element for disturbance
48C3 EF EF element for disturbance
48C4 SEF SEF element for disturbance
48C5 NOC NPS element for disturbance
48FC OV Disturbance trigger
48FD UV Disturbance trigger
48FE ZOV Disturbance trigger
48FF NOV Disturbance trigger
48C6 TRIP Disturbance trigger
48C7 OC Disturbance trigger
48C8 EF Disturbance trigger
48C9 SEF Disturbance trigger
48CA NOC Disturbance trigger
4900 OV Disturbance trigger
4901 UV Disturbance trigger
4902 ZOV Disturbance trigger
4903 NOV Disturbance trigger
4910 SIG1 Disturbance trigger signal
4911 SIG2 Disturbance trigger signal
4912 SIG3 Disturbance trigger signal
4913 SIG4 Disturbance trigger signal
Disturbance
4914 SIG5 Disturbance trigger signal
Record
4915 SIG6 Disturbance trigger signal
4916 SIG7 Disturbance trigger signal
4917 SIG8 Disturbance trigger signal
4918 SIG9 Disturbance trigger signal
4919 SIG10 Disturbance trigger signal
491A SIG11 Disturbance trigger signal
491B SIG12 Disturbance trigger signal
491C SIG13 Disturbance trigger signal
491D SIG14 Disturbance trigger signal
491E SIG15 Disturbance trigger signal
491F SIG16 Disturbance trigger signal
4920 SIG17 Disturbance trigger signal
4921 SIG18 Disturbance trigger signal
4922 SIG19 Disturbance trigger signal
4923 SIG20 Disturbance trigger signal
4924 SIG21 Disturbance trigger signal
4925 SIG22 Disturbance trigger signal
4926 SIG23 Disturbance trigger signal
4927 SIG24 Disturbance trigger signal
4928 SIG25 Disturbance trigger signal
4929 SIG26 Disturbance trigger signal
492A SIG27 Disturbance trigger signal
492B SIG28 Disturbance trigger signal

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492C SIG29 Disturbance trigger signal

492D SIG30 Disturbance trigger signal
492E SIG31 Disturbance trigger signal
492F SIG32 Disturbance trigger signal

Setting Group
Address Name Contents
(Menu)
48EB TCSPEN Trip Circuit Supervision Enable
48EC CBSMEN Circuit Breaker State Monitoring Alarm Enable
48ED TCAEN Trip Count Alarm Enable
48EE ΣIyAEN ΣIy Alarm Enable
Counter 48EF OPTAEN Operate Time Alarm Enable
48F0 TCALM Trip Count Alarm Threshold setting
48F1 ΣIyALM ΣIy Alarm Threshold setting
48F2 YVALUE Y value of ΣIy monitoring
48F3 OPTALM Operating Time Alarm Threshold setting
4B40 Display Metering
4B41 Power Metering
4B42 Current Metering
Status
4B48 Time sync. Time synchronization method
4B49 GMT Time synchronization method (hours)
4B4A GMTm Time synchronization method (minutes)

Setting Group
Address Name Contents
(Menu)
4C54 BITHR1 BI threshold for BI1 & BI2
4C55 BITHR2 BI threshold for BI3-6
4C68 BI1 BI1PUD Binary Input 1 Pick-up delay
4C69 BI1 BI1DOD Binary Input 1 Drop-off delay
4C40 BI1 BI1SNS Binary Input 1 Sense
4C6A BI2 BI2PUD Binary Input 2 Pick-up delay
4C6B BI2 BI2DOD Binary Input 2 Drop-off delay
4C41 BI2 BI2SNS Binary Input 2 Sense
4C6C BI3 BI3PUD Binary Input 3 Pick-up delay
4C6D BI3 BI3DOD Binary Input 3 Drop-off delay
4C42 BI3 BI3SNS Binary Input 3 Sense
4C6E BI4 BI4PUD Binary Input 4 Pick-up delay
4C6F BI4 BI4DOD Binary Input 4 Drop-off delay
4C43 BI4 BI4SNS Binary Input 4 Sense
4C70 BI5 BI5PUD Binary Input 5 Pick-up delay
Binary Input
4C71 BI5 BI5DOD Binary Input 5 Drop-off delay
4C44 BI5 BI5SNS Binary Input 5 Sense
4C72 BI6 BI6PUD Binary Input 6 Pick-up delay
4C73 BI6 BI6DOD Binary Input 6 Drop-off delay
4C45 BI6 BI6SNS Binary Input 6 Sense
4C74 BI7 BI7PUD Binary Input 7 Pick-up delay
4C75 BI7 BI7DOD Binary Input 7 Drop-off delay
4C46 BI7 BI7SNS Binary Input 7 Sense
4C76 BI8 BI8PUD Binary Input 8 Pick-up delay
4C77 BI8 BI8DOD Binary Input 8 Drop-off delay
4C47 BI8 BI8SNS Binary Input 8 Sense
4C78 BI9 BI9PUD Binary Input 9 Pick-up delay
4C79 BI9 BI9DOD Binary Input 9 Drop-off delay
4C48 BI9 BI9SNS Binary Input 9 Sense
4C7A BI10 BI10PUD Binary Input 10 Pick-up delay

 447 
 6 F 2 T 0 1 7 7

4C7B BI10 BI10DOD Binary Input 10 Drop-off delay

4C49 BI10 BI10SNS Binary Input 10 Sense
4C7C BI11 BI11PUD Binary Input 10 Pick-up delay
4C7D BI11 BI11DOD Binary Input 10 Drop-off delay
4C4A BI11 BI11SNS Binary Input 10 Sense
4C7E BI12 BI12PUD Binary Input 10 Pick-up delay
4C7F BI12 BI12DOD Binary Input 10 Drop-off delay
4C4B BI12 BI12SNS Binary Input 10 Sense
4C80 BI13 BI13PUD Binary Input 10 Pick-up delay
4C81 BI13 BI13DOD Binary Input 10 Drop-off delay
4C4C BI13 BI13SNS Binary Input 10 Sense
4C82 BI14 BI14PUD Binary Input 10 Pick-up delay
4C83 BI14 BI14DOD Binary Input 10 Drop-off delay
4C4D BI14 BI14SNS Binary Input 10 Sense
4C84 BI15 BI15PUD Binary Input 10 Pick-up delay
4C85 BI15 BI15DOD Binary Input 10 Drop-off delay
4C4E BI15 BI15SNS Binary Input 10 Sense
4C86 BI16 BI16PUD Binary Input 10 Pick-up delay
4C87 BI16 BI16DOD Binary Input 10 Drop-off delay
4C4F BI16 BI16SNS Binary Input 10 Sense
4C88 BI17 BI16PUD Binary Input 10 Pick-up delay
4C89 BI17 BI16DOD Binary Input 10 Drop-off delay
4C50 BI17 BI16SNS Binary Input 10 Sense
4C8A BI18 BI16PUD Binary Input 10 Pick-up delay
4C8B BI18 BI16DOD Binary Input 10 Drop-off delay
4C51 BI18 BI16SNS Binary Input 10 Sense

 448 
 6 F 2 T 0 1 7 7

Setting Group
Address Name Contents
(Menu)
4DC2 BO1 Logic Logic Gate Type
4DC3 BO1 Reset Reset operation
4D40 BO1 In #1 Functions
4D41 BO1 In #2 Functions
4D42 BO1 In #3 Functions
4D43 BO1 In #4 Functions
4D44 BO1 In #5 Functions
4D45 BO1 In #6 Functions
4D46 BO1 TBO Delay/Pulse Width
4DC4 BO2 Logic Logic Gate Type
4DC5 BO2 Reset Reset operation
4D48 BO2 In #1 Functions
4D49 BO2 In #2 Functions
4D4A BO2 In #3 Functions
4D4B BO2 In #4 Functions
4D4C BO2 In #5 Functions
4D4D BO2 In #6 Functions
4D4E BO2 TBO Delay/Pulse Width
4DC6 BO3 Logic Logic Gate Type
4DC7 BO3 Reset Reset operation
4D50 BO3 In #1 Functions
4D51 BO3 In #2 Functions
4D52 BO3 In #3 Functions
4D53 BO3 In #4 Functions
4D54 BO3 In #5 Functions
4D55 BO3 In #6 Functions
Binary Output
4D56 BO3 TBO Delay/Pulse Width
4DC8 BO4 Logic Logic Gate Type
4DC9 BO4 Reset Reset operation
4D58 BO4 In #1 Functions
4D59 BO4 In #2 Functions
4D5A BO4 In #3 Functions
4D5B BO4 In #4 Functions
4D5C BO4 In #5 Functions
4D5D BO4 In #6 Functions
4D5E BO4 TBO Delay/Pulse Width
4DCA BO5 Logic Logic Gate Type
4DCB BO5 Reset Reset operation
4D60 BO5 In #1 Functions
4D61 BO5 In #2 Functions
4D62 BO5 In #3 Functions
4D63 BO5 In #4 Functions
4D64 BO5 In #5 Functions
4D65 BO5 In #6 Functions
4D66 BO5 TBO Delay/Pulse Width
4DCC BO6 Logic Logic Gate Type
4DCD BO6 Reset Reset operation
4D68 BO6 In #1 Functions
4D69 BO6 In #2 Functions
4D6A BO6 In #3 Functions
4D6B BO6 In #4 Functions
4D6C BO6 In #5 Functions

 449 
 6 F 2 T 0 1 7 7

4D6D BO6 In #6 Functions

4D6E BO6 TBO Delay/Pulse Width
4DCE BO7 Logic Logic Gate Type
4DCF BO7 Reset Reset operation
4D70 BO7 In #1 Functions
4D71 BO7 In #2 Functions
4D72 BO7 In #3 Functions
4D73 BO7 In #4 Functions
4D74 BO7 In #5 Functions
4D75 BO7 In #6 Functions
4D76 BO7 TBO Delay/Pulse Width
4DD0 BO8 Logic Logic Gate Type
4DD1 BO8 Reset Reset operation
4D78 BO8 In #1 Functions
4D79 BO8 In #2 Functions
4D7A BO8 In #3 Functions
4D7B BO8 In #4 Functions
4D7C BO8 In #5 Functions
4D7D BO8 In #6 Functions
4D7E BO8 TBO Delay/Pulse Width
4DD2 BO9 Logic Logic Gate Type
4DD3 BO9 Reset Reset operation
4D80 BO9 In #1 Functions
4D81 BO9 In #2 Functions
4D82 BO9 In #3 Functions
4D83 BO9 In #4 Functions
4D84 BO9 In #5 Functions
4D85 BO9 In #6 Functions
4D86 BO9 TBO Delay/Pulse Width
4DD4 BO10 Logic Logic Gate Type
4DD5 BO10 Reset Reset operation
4D88 BO10 In #1 Functions
4D89 BO10 In #2 Functions
4D8A BO10 In #3 Functions
4D8B BO10 In #4 Functions
4D8C BO10 In #5 Functions
4D8D BO10 In #6 Functions
4D8E BO10 TBO Delay/Pulse Width
4DD6 BO11 Logic Logic Gate Type
4DD7 BO11 Reset Reset operation
4D90 BO11 In #1 Functions
4D91 BO11 In #2 Functions
4D92 BO11 In #3 Functions
4D93 BO11 In #4 Functions
4D94 BO11 In #5 Functions
4D95 BO11 In #6 Functions
4D96 BO11 TBO Delay/Pulse Width
4DD8 BO12 Logic Logic Gate Type
4DD9 BO12 Reset Reset operation
4D98 BO12 In #1 Functions
4D99 BO12 In #2 Functions
4D9A BO12 In #3 Functions
4D9B BO12 In #4 Functions
4D9C BO12 In #5 Functions
4D9D BO12 In #6 Functions
4D9E BO12 TBO Delay/Pulse Width

 450 
 6 F 2 T 0 1 7 7

4DDA BO13 Logic Logic Gate Type

4DDB BO13 Reset Reset operation
4DA0 BO13 In #1 Functions
4DA1 BO13 In #2 Functions
4DA2 BO13 In #3 Functions
4DA3 BO13 In #4 Functions
4DA4 BO13 In #5 Functions
4DA5 BO13 In #6 Functions
4DA6 BO13 TBO Delay/Pulse Width
4DDC BO14 Logic Logic Gate Type
4DDD BO14 Reset Reset operation
4DA8 BO14 In #1 Functions
4DA9 BO14 In #2 Functions
4DAA BO14 In #3 Functions
4DAB BO14 In #4 Functions
4DAC BO14 In #5 Functions
4DAD BO14 In #6 Functions
4DAE BO14 TBO Delay/Pulse Width
4DDE BO15 Logic Logic Gate Type
4DDF BO15 Reset Reset operation
4DB0 BO15 In #1 Functions
4DB1 BO15 In #2 Functions
4DB2 BO15 In #3 Functions
4DB3 BO15 In #4 Functions
4DB4 BO15 In #5 Functions
4DB5 BO15 In #6 Functions
4DB6 BO15 TBO Delay/Pulse Width
4DE0 BO16 Logic Logic Gate Type
4DE1 BO16 Reset Reset operation
4DB8 BO16 In #1 Functions
4DB9 BO16 In #2 Functions
4DBA BO16 In #3 Functions
4DBB BO16 In #4 Functions
4DBC BO16 In #5 Functions
4DBD BO16 In #6 Functions
4DBE BO16 TBO Delay/Pulse Width

 451 
 6 F 2 T 0 1 7 7

Setting Group
Address Name Contents
(Menu)
4CE0 LED1 Logic LED1 Logic Gate Type
4CE1 LED1 Reset LED1 Reset operation
4CC0 LED1 In #1 LED1 Functions
4CC1 LED1 In #2 LED1 Functions
4CC2 LED1 In #3 LED1 Functions
4CC3 LED1 In #4 LED1 Functions
4CE2 LED2 Logic LED2 Logic Gate Type
4CE3 LED2 Reset LED2 Reset operation
4CC4 LED2 In #1 LED2 Functions
4CC5 LED2 In #2 LED2 Functions
4CC6 LED2 In #3 LED2 Functions
4CC7 LED2 In #4 LED2 Functions
4CE4 LED3 Logic LED3 Logic Gate Type
4CE5 LED3 Reset LED3 Reset operation
4CC8 LED3 In #1 LED3 Functions
4CC9 LED3 In #2 LED3 Functions
4CCA LED3 In #3 LED3 Functions
4CCB LED3 In #4 LED3 Functions
4CE6 LED4 Logic LED4 Logic Gate Type
4CE7 LED4 Reset LED4 Reset operation
4CCC LED4 In #1 LED4 Functions
4CCD LED4 In #2 LED4 Functions
4CCE LED4 In #3 LED4 Functions
4CCF LED4 In #4 LED4 Functions
4CE8 LED5 Logic LED5 Logic Gate Type
4CE9 LED5 Reset LED5 Reset operation
4CD0 LED5 In #1 LED5 Functions
Configurable LED 4CD1 LED5 In #2 LED5 Functions
4CD2 LED5 In #3 LED5 Functions
4CD3 LED5 In #4 LED5 Functions
4CEA LED6 Logic LED6 Logic Gate Type
4CEB LED6 Reset LED6 Reset operation
4CD4 LED6 In #1 LED6 Functions
4CD5 LED6 In #2 LED6 Functions
4CD6 LED6 In #3 LED6 Functions
4CD7 LED6 In #4 LED6 Functions
4D00 LED1 Color LED Color
4D01 LED2 Color LED Color
4D02 LED3 Color LED Color
4D03 LED4 Color LED Color
4D04 LED5 Color LED Color
4D05 LED6 Color LED Color
CB CLOSED
4D06 CB LED Color
Color
IND1
4D10 IND1 IND1 Reset operation
Reset
4CF0 IND1 BIT1 Virtual LED
4CF1 IND1 BIT2 Virtual LED
4CF2 IND1 BIT3 Virtual LED
4CF3 IND1 BIT4 Virtual LED
4CF4 IND1 BIT5 Virtual LED
4CF5 IND1 BIT6 Virtual LED
4CF6 IND1 BIT7 Virtual LED
4CF7 IND1 BIT8 Virtual LED

 452 
 6 F 2 T 0 1 7 7

IND2
4D11 IND2 IND2 Reset operation
Reset
4CF8 IND2 BIT1 Virtual LED
4CF9 IND2 BIT2 Virtual LED
4CFA IND2 BIT3 Virtual LED
4CFB IND2 BIT4 Virtual LED
4CFC IND2 BIT5 Virtual LED
4CFD IND2 BIT6 Virtual LED
4CFE IND2 BIT7 Virtual LED
4CFF IND2 BIT8 Virtual LED

Setting Group
Address Name Contents
(Menu)
4BC0 Active gp. Active setting group
4BC1 APPLCT Application setting of CT
4BCA APPLVT Application setting of VT
4BC2 APPLVE Application setting of VT-Ve
4BC4 APPLVS Application setting of VT-Vbus
4BC3 CTFEN CTF Enable
4BC5 VTF1EN VTF1 Enable
4BC6 VTF2EN VTF2 Enable
Active group/
4BC7 CTSVEN AC input imbalance Super Visor Enable
Common
4BC8 V0SVEN ditto
4BC9 V2SVEN ditto
4BCB AOLED ALARM LED lighting control at alarm output
50F0 Control Control enable
50F1 Interlock Interlock enable
5110 Control Kind Control Hierarchy (if Control = Enable)
5120 Frequency Frequency
4BD0 MOTEN Motor condition Enable

 453 
 6 F 2 T 0 1 7 7

Setting Group Address

Name Contents
(Menu) Gr.1 Gr.2
47D0 4810 OCCT CT ratio of OC
47D1 4811 EFCT CT ratio of EF
47D3 4813 SEFCT CT ratio of SEF (for SEF model)
47D4 4814 PVT Phase VT ratio
47D5 4815 VEVT Ve VT ratio
47D6 4816 VSVT Vbus VT ratio
4740 4780 FL X1 Fault location
4741 4781 FL X0 ditto
4742 4782 FL R1 ditto
4743 4783 FL R0 ditto
4744 4784 FL Kab ditto
4745 4785 FL Kbc ditto
4746 4786 FL Kca ditto
4747 4787 FL Ka ditto
4748 4788 FL Kb ditto
4749 4789 FL Kc ditto
474A 478A FL Line ditto
42C0 4380 MOC1 OC1 Delay Type
42C0 4380 MOC2 OC2 Delay Type
42C1 4381 MEF1 EF1 Delay Type
42C1 4381 MEF2 EF2 Delay Type
42C2 4382 MSE1 SEF1 Delay Type
42C2 4382 MSE2 SEF2 Delay Type
42C3 4383 MNC1 NOC1 Delay Type
42C3 4383 MNC2 NOC2 Delay Type
42C4 4384 OC OC1EN OC1 Enable
Protection 42C4 4384 OC OC1-DIR OC1 Directional Characteristic
42C5 4385 OC MOC1C-IEC OC1 IEC Inverse Curve Type
42C5 4385 OC MOC1C-IEEE OC1 IEEE Inverse Curve Type
42C6 4386 OC MOC1C-US OC1 US Inverse Curve Type
42C6 4386 OC OC1R OC1 Reset Characteristic
4328 43E8 OC OC1-2F 2f Block Enable
42C7 4387 OC VTF-OC1BLK VTF block enable
42C7 4387 OC OC2EN OC2 Enable
42C8 4388 OC OC2-DIR OC2 Directional Characteristic
42C8 4388 OC MOC2C-IEC OC2 IEC Inverse Curve Type
42C9 4389 OC MOC2C-IEEE OC2 IEEE Inverse Curve Type
42C9 4389 OC MOC2C-US OC2 US Inverse Curve Type
42CA 438A OC OC2R OC2 Reset Characteristic
4328 43E8 OC OC2-2F 2f Block Enable
42CA 438A OC VTF-OC2BLK VTF block enable
42CB 438B OC OC3EN OC3 Enable
42CB 438B OC OC3-DIR OC3 Directional Characteristic
4329 43E9 OC OC3-2F 2f Block Enable
42CC 438C OC VTF-OC3BLK VTF block enable
42CC 438C OC OC4EN OC4 Enable
42CD 438D OC OC4-DIR OC4 Directional Characteristic
4329 43E9 OC OC4-2F 2f Block Enable
42CD 438D OC VTF-OC4BLK VTF block enable
42CE 438E OC OCTP OC trip mode
42CE 438E EF EF1EN EF1 Enable
42CF 438F EF EF1-DIR EF1 Directional Characteristic
42CF 438F EF MEF1C-IEC EF1 IEC Inverse Curve Type

 454 
 6 F 2 T 0 1 7 7

42D0 4390 EF MEF1C-IEEE EF1 IEEE Inverse Curve Type

42D0 4390 EF MEF1C-US EF1 US Inverse Curve Type
42D1 4391 EF EF1R EF1 Reset Characteristic
432A 43EA EF EF1-2F 2f Block Enable
42D1 4391 EF CTF-EF1BLK CTF block enable
42D2 4392 EF VTF-EF1BLK VTF block enable
42D2 4392 EF EF2EN EF2 Enable
42D3 4393 EF EF2-DIR EF2 Directional Characteristic
42D3 4393 EF MEF2C-IEC EF2 IEC Inverse Curve Type
42D4 4394 EF MEF2C-IEEE EF2 IEEE Inverse Curve Type
42D4 4394 EF MEF2C-US EF2 US Inverse Curve Type
42D5 4395 EF EF2R EF2 Reset Characteristic
432A 43EA EF EF2-2F 2f Block Enable
42D5 4395 EF CTF-EF2BLK CTF block enable
42D6 4396 EF VTF-EF2BLK VTF block enable
42D6 4396 EF EF3EN EF3 Enable
42D7 4397 EF EF3-DIR EF3 Directional Characteristic
432B 43EB EF EF3-2F 2f Block Enable
42D7 4397 EF CTF-EF3BLK CTF block enable
42D8 4398 EF VTF-EF3BLK VTF block enable
42D8 4398 EF EF4EN EF4 Enable
42D9 4399 EF EF4-DIR EF4 Directional Characteristic
432B 43EB EF EF4-2F 2f Block Enable
42D9 4399 EF CTF-EF4BLK CTF block enable
42DA 439A EF VTF-EF4BLK VTF block enable
42DA 439A EF CURREV Current reverse detection
42DB 439B SEF SE1EN SEF1 Enable
42DB 439B SEF SE1-DIR SEF1 Directional Characteristic
42DC 439C SEF MSE1C-IEC SEF1 IEC Inverse Curve Type
42DC 439C SEF MSE1C-IEEE SEF1 IEEE Inverse Curve Type
42DD 439D SEF MSE1C-US SEF1 US Inverse Curve Type
42DD 439D SEF SE1R SEF1 Reset Characteristic
42DE 439E SEF SE1S2 SEF1 Stage 2 Timer Enable
432C 43EC SEF SE1-2F 2f Block Enable
42DE 439E SEF VTF-SE1BLK VTF block enable
42DF 439F SEF SE2EN SEF2 Enable
42DF 439F SEF SE2-DIR SEF2 Directional Characteristic
42E0 43A0 SEF MSE2C-IEC SEF2 IEC Inverse Curve Type
42E0 43A0 SEF MSE2C-IEEE SEF2 IEEE Inverse Curve Type
42E1 43A1 SEF MSE2C-US SEF2 US Inverse Curve Type
42E1 43A1 SEF SE2R SEF2 Reset Characteristic
432C 43EC SEF SE2-2F 2f Block Enable
42E2 43A2 SEF VTF-SE2BLK VTF block enable
42E2 43A2 SEF SE3EN SEF3 Enable
42E3 43A3 SEF SE3-DIR SEF3 Directional Characteristic
432D 43ED SEF SE3-2F 2f Block Enable
42E3 43A3 SEF VTF-SE3BLK VTF block enable
42E4 43A4 SEF SE4EN SEF4 Enable
42E4 43A4 SEF SE4-DIR SEF4 Directional Characteristic
432D 43ED SEF SE4-2F 2f Block Enable
42E5 43A5 SEF VTF-SE4BLK VTF block enable
42E5 43A5 SEF RPEN Residual Power block Enable
42E6 43A6 NOC NC1EN NOC1 Enable
42E6 43A6 NOC NC1-DIR NOC1 Directional Characteristic
42E7 43A7 NOC MNC1C-IEC NOC1 IEC InverNC Curve Type
42E7 43A7 NOC MNC1C-IEEE NOC1 IEEE InverNC Curve Type

 455 
 6 F 2 T 0 1 7 7

42E8 43A8 NOC MNC1C-US NOC1 US InverNC Curve Type

42E8 43A8 NOC NC1R NOC1 ReNCt Characteristic
432E 43EE NOC NC1-2F 2f Block Enable
42E9 43A9 NOC CTF-NC1BLK CTF block enable
42E9 43A9 NOC VTF-NC1BLK VTF block enable
42EA 43AA NOC NC2EN NOC2 Enable
42EA 43AA NOC NC2-DIR NOC2 Directional Characteristic
432E 43EE NOC MNC2C-IEC NOC2 IEC InverNC Curve Type
432F 43EF NOC MNC2C-IEEE NOC2 IEEE InverNC Curve Type
432F 43EF NOC MNC2C-US NOC2 US InverNC Curve Type
4330 43F0 NOC NC2R NOC2 ReNCt Characteristic
4330 43F0 NOC NC2-2F 2f Block Enable
42EB 43AB NOC CTF-NC2BLK CTF block enable
42EB 43AB NOC VTF-NC2BLK VTF block enable
42EC 43AC UC UC1EN UC1 Enable
42EC 43AC UC CTF-UC1BLK CTF block enable
42ED 43AD UC UC2EN UC2 Enable
42ED 43AD UC CTF-UC2BLK CTF block enable
42EE 43AE Thermal THMEN Thermal OL Enable
42EE 43AE Thermal THMAEN Thermal Alarm Enable
42EF 43AF BCD BCDEN Broken Conductor Enable
4331 43F1 BCD BCD-2F 2f Block Enable
42EF 43AF CBF BTC Back-trip control
42F0 43B0 CBF RTC Re-trip control
42F0 43B0 Cold Load CLEN Cold Load Protection Enable
42F1 43B1 Cold Load CLDOEN Cold Load drop-off Enable
433A 43FA RP RPCB CB condition use
433F 43FF RP RP-UVBLK UV Block Enable
433F 43FF RP RP-Power Power Direction Enable
4340 4400 RP Power Power Direction
433B 43FB RP RP1EN Reverse Power1 Enable
433B 43FB RP RP1-2F 2f Block Enable
433C 43FC RP CTF-RP1BLK CTF block enable
433C 43FC RP VTF-RP1BLK VTF block enable
433D 43FD RP RP2EN Reverse Power1 Enable
433D 43FD RP RP2-2F 2f Block Enable
433E 43FE RP CTF-RP2BLK CTF block enable
433E 43FE RP VTF-RP2BLK VTF block enable
4343 4403 OCD OCDEN OCD Enable
42F1 43B1 OV OV1EN OV1 Enable
42F2 43B2 OV OV2EN OV2 Enable
4331 43F1 OV OV3EN OV3 Enable
4332 43F2 OV OV4EN OV4 Enable
42F2 43B2 UV UV1EN UV1 Enable
42F3 43B3 UV VTF-UV1BLK VTF block enable
42F3 43B3 UV UV2EN UV2 Enable
42F4 43B4 UV VTF-UV2BLK VTF block enable
42F4 43B4 UV UV3EN UV3 Enable
4338 43F8 UV VTF-UV3BLK VTF block enable
4332 43F2 UV UV4EN UV4 Enable
4333 43F3 UV VTF-UV4BLK VTF block enable
4333 43F3 UV VBLKEN UV Block Enable
42F5 43B5 ZOV ZOV1EN ZOV1 Enable
42F5 43B5 ZOV VTF-ZV1BLK VTF block enable
42F6 43B6 ZOV ZOV2EN ZOV2 Enable
42F6 43B6 ZOV VTF-ZV2BLK VTF block enable

 456 
 6 F 2 T 0 1 7 7

42F7 43B7 NOV NOV1EN NOV1 Enable

42F7 43B7 NOV VTF-NV1BLK VTF block enable
42F8 43B8 NOV NOV2EN NOV2 Enable
42F8 43B8 NOV VTF-NV2BLK VTF block enable
42F9 43B9 FRQ FRQ1EN FRQ1 Enable
42F9 43B9 FRQ FRQ2EN FRQ2 Enable
42FA 43BA FRQ FRQ3EN FRQ3 Enable
42FA 43BA FRQ FRQ4EN FRQ4 Enable
4334 43F4 DFRQ DFRQ1EN DFRQ1 Enable
4334 43F4 DFRQ DFRQ2EN DFRQ2 Enable
4335 43F5 DFRQ DFRQ3EN DFRQ3 Enable
4335 43F5 DFRQ DFRQ4EN DFRQ4 Enable
4340 4400 MOT EXSTEN Start Protection Enable
4341 4401 MOT STRTEN 50S Enable
4341 4401 MOT LKRTEN Locked Rotor Enable
4342 4402 MOT RSIHEN Restart Inhibit Protection Enable
4342 4402 MOT STPHEN Starts per hour Enable
4540 4640 OC OCTH OC Characteristic Angle
4541 4641 OC OC1 OC1 Threshold setting
4440 44C0 OC TOC1 OC1 Definite time setting
4542 4642 OC TOC1M OC1 Time multiplier setting
4543 4643 OC TOC1R OC1 Definite time reset delay
4544 4644 OC TOC1RM OC1 Dependent time reset time multiplier
4545 4645 OC OC2 OC2 Threshold setting
4441 44C1 OC TOC2 OC2 Definite time setting
4546 4646 OC TOC2M OC2 Time multiplier setting
4547 4647 OC TOC2R OC2 Definite time reset delay
4548 4648 OC TOC2RM OC2 Dependent time reset time multiplier
4549 4649 OC OC3 OC3 Threshold setting
4442 44C2 OC TOC3 OC3 Definite time setting
454A 464A OC OC4 OC4 Threshold setting
4443 44C3 OC TOC4 OC4 Definite time setting
454B 464B OC OC1-k Configurable IDMT Curve setting of OC1
454C 464C OC OC1-a ditto
454D 464D OC OC1-C ditto
454E 464E OC OC1-kr ditto
454F 464F OC OC1-b ditto
4550 4650 OC OC2-k Configurable IDMT Curve setting of OC2
4551 4651 OC OC2-a ditto
4552 4652 OC OC2-C ditto
4553 4653 OC OC2-kr ditto
4554 4654 OC OC2-b ditto
4555 4655 EF EFTH EF Characteristic Angle
4556 4656 EF EFV EF ZPS voltage level
4557 4657 EF EF1 EF1 Threshold setting
4444 44C4 EF TEF1 EF1 EFinite time setting
4558 4658 EF TEF1M EF1 Time multiplier setting
4559 4659 EF TEF1R EF1 EFinite time reset delay
455A 465A EF TEF1RM EF1 Dependent time reset time multiplier
455B 465B EF EF2 EF2 Threshold setting
4445 44C5 EF TEF2 EF2 EFinite time setting
455C 465C EF TEF2M EF2 Time multiplier setting
455D 465D EF TEF2R EF2 EFinite time reset delay
455E 465E EF TEF2RM EF2 Dependent time reset time multiplier
455F 465F EF EF3 EF3 Threshold setting
4446 44C6 EF TEF3 EF3 EFinite time setting

 457 
 6 F 2 T 0 1 7 7

4560 4660 EF EF4 EF4 Threshold setting

4447 44C7 EF TEF4 EF4 EFinite time setting
4448 44C8 EF TREBK Current reverse blocking time
4561 4661 EF EF1-k Configurable IDMT Curve setting of EF1
4562 4662 EF EF1-a ditto
4563 4663 EF EF1-C ditto
4564 4664 EF EF1-kr ditto
4565 4665 EF EF1-b ditto
4566 4666 EF EF2-k Configurable IDMT Curve setting of EF2
4567 4667 EF EF2-a ditto
4568 4668 EF EF2-C ditto
4569 4669 EF EF2-kr ditto
456A 466A EF EF2-b ditto
456B 466B SEF SETH SEF Characteristic Angle
456C 466C SEF SEV SEF ZPS voltage level
456D 466D SEF SE1 SEF1 Threshold setting
4449 44C9 SEF TSE1 SEF1 Definite time setting
456E 466E SEF TSE1M SEF1 Time multiplier setting
456F 466F SEF TSE1R SEF1 Definite time reset delay
4570 4670 SEF TSE1RM SEF1 Dependent time reset time multiplier
444A 44CA SEF TSE1S2 SEF1 Stage 2 definite timer settings
4571 4671 SEF SE2 SEF2 Threshold setting
444B 44CB SEF TSE2 SEF2 Definite time setting
4572 4672 SEF TSE2M SEF2 Time multiplier setting
4573 4673 SEF TSE2R SEF2 Definite time reset delay
4574 4674 SEF TSE2RM SEF2 Dependent time reset time multiplier
4575 4675 SEF SE3 SEF3 Threshold setting
444C 44CC SEF TSE3 SEF3 Definite time setting
4576 4676 SEF SE4 SEF4 Threshold setting
444D 44CD SEF TSE4 SEF4 Definite time setting
4577 4677 SEF RP Residual Power Threshold
4578 4678 SEF SE1-k Configurable IDMT Curve setting of SEF1
4579 4679 SEF SE1-a ditto
457A 467A SEF SE1-C ditto
457B 467B SEF SE1-kr ditto
457C 467C SEF SE1-b ditto
457D 467D SEF SE2-k Configurable IDMT Curve setting of SEF2
457E 467E SEF SE2-a ditto
457F 467F SEF SE2-C ditto
4580 4680 SEF SE2-kr ditto
4581 4681 SEF SE2-b ditto
4582 4682 NOC NCTH NOC Characteristic Angle
4583 4683 NOC NCV NOC NPS voltage level
4584 4684 NOC NC1 NOC1 Threshold setting
444E 44CE NOC TNC1 NOC1 Definite time setting
4585 4685 NOC TNC1M NOC1 Time multiplier setting
4586 4686 NOC TNC1R NOC1 Definite time reset delay
4587 4687 NOC TNC1RM NOC1 Dependent time reset time multiplier
4588 4688 NOC NC2 NOC2 Threshold setting
444F 44CF NOC TNC2 NOC2 Definite time setting
45C4 46C4 NOC TNC2M NOC2 Time multiplier setting
45DE 46DE NOC TNC2R NOC2 Definite time reset delay
45C5 46C5 NOC TNC2RM NOC2 Dependent time reset time multiplier
4589 4689 NOC NC1-k Configurable IDMT Curve setting of NOC1
458A 468A NOC NC1-a ditto
458B 468B NOC NC1-C ditto

 458 
 6 F 2 T 0 1 7 7

458C 468C NOC NC1-kr ditto

458D 468D NOC NC1-b ditto
45C6 46C6 NOC NC2-k Configurable IDMT Curve setting of NOC2
45C7 46C7 NOC NC2-a ditto
45C8 46C8 NOC NC2-C ditto
45C9 46C9 NOC NC2-kr ditto
45CA 46CA NOC NC2-b ditto
458E 468E UC UC1 UC1 Threshold setting
4450 44D0 UC TUC1 UC1 Definite time setting
458F 468F UC UC2 UC2 Threshold setting
4451 44D1 UC TUC2 UC2 Definite time setting
4590 4690 Thermal THM Thermal overload setting
4591 4691 Thermal THMIP Pre Current value
4592 4692 Thermal TTHM Thermal Time Constant
4593 4693 Thermal THMA Thermal alarm setting
4594 4694 BCD BCD Broken Conductor Threshold setting
4452 44D2 BCD TBCD Broken Conductor Definite time setting
4595 4695 CBF CBF CBF Threshold setting
4453 44D3 CBF TBTC Back trip Definite time setting
4454 44D4 CBF TRTC Re-trip Definite time setting
45DF 46DF Inrush ICD-2f Sensitivity of 2f
45CB 46CB Inrush ICDOC Threshold of fundamental current
4596 4696 Cold Load OC1 OC1 Threshold setting in CLP mode
4597 4697 Cold Load OC2 OC2 Threshold setting in CLP mode
4598 4698 Cold Load OC3 OC3 Threshold setting in CLP mode
4599 4699 Cold Load OC4 OC4 Threshold setting in CLP mode
459A 469A Cold Load EF1 EF1 Threshold setting in CLP mode
459B 469B Cold Load EF2 EF2 Threshold setting in CLP mode
459C 469C Cold Load EF3 EF3 Threshold setting in CLP mode
459D 469D Cold Load EF4 EF4 Threshold setting in CLP mode
459E 469E Cold Load SE1 SEF1 Threshold setting in CLP mode
459F 469F Cold Load SE2 SEF2 Threshold setting in CLP mode
45A0 46A0 Cold Load SE3 SEF3 Threshold setting in CLP mode
45A1 46A1 Cold Load SE4 SEF4 Threshold setting in CLP mode
45A2 46A2 Cold Load NC1 NOC1 Threshold setting in CLP mode
45A3 46A3 Cold Load NC2 NOC2 Threshold setting in CLP mode
Broken Conductor Threshold setting in CLP
45A4 46A4 Cold Load BCD
mode
4455 44D5 Cold Load TCLE Cold load enable timer
4456 44D6 Cold Load TCLR Cold load reset timer
45A5 46A5 Cold Load ICLDO Cold load drop-out threshold setting
4457 44D7 Cold Load TCLDO Cold load drop-out timer
4605 4705 RP RP1 Reverse Power Threshold setting
4607 4707 RP RP1DPR Reverse Power DO/PU ratio
4486 4506 RP TRP1 Reverse Power Definite time setting
4487 4507 RP TCBRP1 wait time after CB closeing
4606 4706 RP RP2 Reverse Power Threshold setting
4608 4708 RP RP2DPR Reverse Power DO/PU ratio
4488 4508 RP TRP2 Reverse Power Definite time setting
4489 4509 RP TCBRP2 wait time after CB closeing
4609 4709 RP RPVBLK UV Blocking threshold
4614 4714 RQ RQ1 Reverse Reactive Power Threshold setting
4616 4716 RQ RQ1DPR Reverse Reactive Power DO/PU ratio
448C 450C RQ TRQ1 Reverse Reactive Power Definite time setting
448D 450D RQ TCBRQ1 wait time after CB closeing
4615 4715 RQ RQ2 Reverse Reactive Power Threshold setting

 459 
 6 F 2 T 0 1 7 7

4617 4717 RQ RQ2DPR Reverse Reactive Power DO/PU ratio

448E 450E RQ TRQ2 Reverse Reactive Power Definite time setting
448F 450F RQ TCBRQ2 wait time after CB closeing
4618 4718 RQ RQVBLK UV Blocking threshold
4613 4713 OCD OCD OCD Threshold setting
448B 450B OCD TOCD OCD Off-delay time.
45A6 46A6 OV OV1 OV1 Threshold setting
4458 44D8 OV TOV1 OV1 Definite time setting
45A7 46A7 OV TOV1M OV1 Time multiplier setting
45A8 46A8 OV TOV1R OV1 Definite time reset delay
45A9 46A9 OV OV1DPR OV1 DO/PU ratio
45AA 46AA OV OV2 OV2 Threshold setting
4459 44D9 OV TOV2 OV2 Definite time setting
45CC 46CC OV TOV2M OV2 Time multiplier setting
45CD 46CD OV TOV2R OV2 Definite time reset delay
45AB 46AB OV OV2DPR OV2 DO/PU ratio
45CE 46CE OV OV3 OV3 Threshold setting
4481 4501 OV TOV3 OV3 Definite time setting
45E0 46E0 OV OV3DPR OV3 DO/PU ratio
45CF 46CF OV OV4 OV4 Threshold setting
4482 4502 OV TOV4 OV4 Definite time setting
45D0 46D0 OV OV4DPR OV4 DO/PU ratio
45EA 46EA OV OV1-k Configurable IDMT Curve setting of OV1
45EB 46EB OV OV1-a ditto
45EC 46EC OV OV1-C ditto
45ED 46ED OV OV2-k Configurable IDMT Curve setting of OV2
45EE 46EE OV OV2-a ditto
45EF 46EF OV OV2-C ditto
45AC 46AC UV UV1 UV1 Threshold setting
445A 44DA UV TUV1 UV1 Definite time setting
45AD 46AD UV TUV1M UV1 Time multiplier setting
45AE 46AE UV TUV1R UV1 Definite time reset delay
45AF 46AF UV UV2 UV2 Threshold setting
445B 44DB UV TUV2 UV2 Definite time setting
45D1 46D1 UV TUV2M UV2 Time multiplier setting
45D2 46D2 UV TUV2R UV2 Definite time reset delay
45D3 46D3 UV UV3 UV3 Threshold setting
4483 4503 UV TUV3 UV3 Definite time setting
45D4 46D4 UV UV4 UV4 Threshold setting
4484 4504 UV TUV4 UV4 Definite time setting
45B0 46B0 UV VBLK UV Blocking threshold
45F0 46F0 UV UV1-k Configurable IDMT Curve setting of UV1
45F1 46F1 UV UV1-a ditto
45F2 46F2 UV UV1-C ditto
45F3 46F3 UV UV2-k Configurable IDMT Curve setting of UV2
45F4 46F4 UV UV2-a ditto
45F5 46F5 UV UV2-C ditto
45B1 46B1 ZOV ZOV1 ZOV1 Threshold setting
445C 44DC ZOV TZOV1 ZOV1 Definite time setting
45B2 46B2 ZOV TZOV1M ZOV1 Time multiplier setting
45B3 46B3 ZOV TZOV1R ZOV1 Definite time reset delay
45B4 46B4 ZOV ZOV2 ZOV2 Threshold setting
445D 44DD ZOV TZOV2 ZOV2 Definite time setting
45D5 46D5 ZOV TZOV2M ZOV2 Time multiplier setting
45D6 46D6 ZOV TZOV2R ZOV2 Definite time reset delay
45F6 46F6 ZOV ZOV1-k Configurable IDMT Curve setting of ZOV1

 460 
 6 F 2 T 0 1 7 7

45F7 46F7 ZOV ZOV1-a ditto

45F8 46F8 ZOV ZOV1-C ditto
45F9 46F9 ZOV ZOV2-k Configurable IDMT Curve setting of ZOV2
45FA 46FA ZOV ZOV2-a ditto
45FB 46FB ZOV ZOV2-C ditto
45B5 46B5 NOV NOV1 NOV1 Threshold setting
445E 44DE NOV TNOV1 NOV1 Definite time setting
45B6 46B6 NOV TNOV1M NOV1 Time multiplier setting
45B7 46B7 NOV TNOV1R NOV1 Definite time reset delay
45B8 46B8 NOV NOV2 NOV2 Threshold setting
445F 44DF NOV TNOV2 NOV2 Definite time setting
45D7 46D7 NOV TNOV2M NOV2 Time multiplier setting
45D8 46D8 NOV TNOV2R NOV2 Definite time reset delay
45FC 46FC NOV NOV1-k Configurable IDMT Curve setting of NOV1
45FD 46FD NOV NOV1-a ditto
45FE 46FE NOV NOV1-C ditto
45FF 46FF NOV NOV2-k Configurable IDMT Curve setting of NOV2
4600 4700 NOV NOV2-a ditto
4601 4701 NOV NOV2-C ditto
45B9 46B9 FRQ FRQ1 FRQ1 Threshold setting
4460 44E0 FRQ TFRQ1 FRQ1 Definite time setting
45BA 46BA FRQ FRQ2 FRQ2 Threshold setting
4461 44E1 FRQ TFRQ2 FRQ2 Definite time setting
45BB 46BB FRQ FRQ3 FRQ3 Threshold setting
4462 44E2 FRQ TFRQ3 FRQ3 Definite time setting
45BC 46BC FRQ FRQ4 FRQ4 Threshold setting
4463 44E3 FRQ TFRQ4 FRQ4 Definite time setting
45BD 46BD FRQ FVBLK UV Blocking threshold
45D9 46D9 DFRQ DFRQ1 DFRQ1 Threshold setting.
45DA 46DA DFRQ DFRQ2 DFRQ2 Threshold setting.
45DB 46DB DFRQ DFRQ3 DFRQ3 Threshold setting.
45DC 46DC DFRQ DFRQ4 DFRQ4 Threshold setting.
460A 470A MOT TEXST Motor Start Pro. Time.
460B 470B MOT TMTST Motor Start_up Time.
460C 470C MOT LKRTIS Motor Start Current.
460D 470D MOT TLKRT Rotor Restraint Time.
460E 470E MOT RTTHM Rotor Permissible Heat Range.
460F 470F MOT IMOT Motor rated current
4610 4710 MOT STRT 50S Threshold setting
448A 450A MOT TSTRT 50S Definite time setting.
4611 4711 MOT TTHM2 Thermal Radiation Time Constant.
4612 4712 MOT LIMNUM limit number for Starts per hour
45BE 46BE CTF/VTF EFF EF Threshold setting for CTF/VTF scheme.
45BF 46BF CTF/VTF ZOVF ZOV Threshold setting for CTF/VTF scheme.
45C0 46C0 CTF/VTF UVF UV(Ph-G) Threshold setting for VTF scheme.
42FB 43BB ARC ARCEN Autoreclosing Enable.
42FB 43BB ARC ARC-NUM Reclosing shot max. number
42FC 43BC ARC VCHK Autoreclosing volatge check
42FC 43BC ARC DfEN Frequency difference checking enable
42FD 43BD ARC VTPHSEL VT phase selection
4336 43F6 ARC VT-RATE VT rating
4336 43F6 ARC 3PH-VT 3ph. VT location
42FD 43BD ARC OC1-INIT Autoreclosing initiation by OC1 enable
42FE 43BE ARC OC1-TP1 OC1 trip mode of 1st trip
42FE 43BE ARC OC1-TP2 OC1 trip mode of 2nd trip
42FF 43BF ARC OC1-TP3 OC1 trip mode of 3rd trip

 461 
 6 F 2 T 0 1 7 7

42FF 43BF ARC OC1-TP4 OC1 trip mode of 4th trip

4300 43C0 ARC OC1-TP5 OC1 trip mode of 5th trip
4300 43C0 ARC OC1-TP6 OC1 trip mode of 6th trip
4301 43C1 ARC OC2-INIT Autoreclosing initiation by OC2 enable
4301 43C1 ARC OC2-TP1 OC2 trip mode of 1st trip
4302 43C2 ARC OC2-TP2 OC2 trip mode of 2nd trip
4302 43C2 ARC OC2-TP3 OC2 trip mode of 3rd trip
4303 43C3 ARC OC2-TP4 OC2 trip mode of 4th trip
4303 43C3 ARC OC2-TP5 OC2 trip mode of 5th trip
4304 43C4 ARC OC2-TP6 OC2 trip mode of 6th trip
4304 43C4 ARC OC3-INIT Autoreclosing initiation by OC3 enable
4305 43C5 ARC OC3-TP1 OC3 trip mode of 1st trip
4305 43C5 ARC OC3-TP2 OC3 trip mode of 2nd trip
4306 43C6 ARC OC3-TP3 OC3 trip mode of 3rd trip
4306 43C6 ARC OC3-TP4 OC3 trip mode of 4th trip
4307 43C7 ARC OC3-TP5 OC3 trip mode of 5th trip
4307 43C7 ARC OC3-TP6 OC3 trip mode of 6th trip
4308 43C8 ARC OC4-INIT Autoreclosing initiation by OC4 enable
4308 43C8 ARC OC4-TP1 OC4 trip mode of 1st trip
4309 43C9 ARC OC4-TP2 OC4 trip mode of 2nd trip
4309 43C9 ARC OC4-TP3 OC4 trip mode of 3rd trip
430A 43CA ARC OC4-TP4 OC4 trip mode of 4th trip
430A 43CA ARC OC4-TP5 OC4 trip mode of 5th trip
430B 43CB ARC OC4-TP6 OC4 trip mode of 6th trip
4337 43F7 ARC COORD-OC OC relay for Co-ordination Enable
430B 43CB ARC EF1-INIT Autoreclosing initiation by EF1 enable
430C 43CC ARC EF1-TP1 EF1 trip mode of 1st trip
430C 43CC ARC EF1-TP2 EF1 trip mode of 2nd trip
430D 43CD ARC EF1-TP3 EF1 trip mode of 3rd trip
430D 43CD ARC EF1-TP4 EF1 trip mode of 4th trip
430E 43CE ARC EF1-TP5 EF1 trip mode of 5th trip
430E 43CE ARC EF1-TP6 EF1 trip mode of 6th trip
430F 43CF ARC EF2-INIT Autoreclosing initiation by EF2 enable
430F 43CF ARC EF2-TP1 EF2 trip mode of 1st trip
4310 43D0 ARC EF2-TP2 EF2 trip mode of 2nd trip
4310 43D0 ARC EF2-TP3 EF2 trip mode of 3rd trip
4311 43D1 ARC EF2-TP4 EF2 trip mode of 4th trip
4311 43D1 ARC EF2-TP5 EF2 trip mode of 5th trip
4312 43D2 ARC EF2-TP6 EF2 trip mode of 6th trip
4312 43D2 ARC EF3-INIT Autoreclosing initiation by EF3 enable
4313 43D3 ARC EF3-TP1 EF3 trip mode of 1st trip
4313 43D3 ARC EF3-TP2 EF3 trip mode of 2nd trip
4314 43D4 ARC EF3-TP3 EF3 trip mode of 3rd trip
4314 43D4 ARC EF3-TP4 EF3 trip mode of 4th trip
4315 43D5 ARC EF3-TP5 EF3 trip mode of 5th trip
4315 43D5 ARC EF3-TP6 EF3 trip mode of 6th trip
4316 43D6 ARC EF4-INIT Autoreclosing initiation by EF4 enable
4316 43D6 ARC EF4-TP1 EF4 trip mode of 1st trip
4317 43D7 ARC EF4-TP2 EF4 trip mode of 2nd trip
4317 43D7 ARC EF4-TP3 EF4 trip mode of 3rd trip
4318 43D8 ARC EF4-TP4 EF4 trip mode of 4th trip
4318 43D8 ARC EF4-TP5 EF4 trip mode of 5th trip
4319 43D9 ARC EF4-TP6 EF4 trip mode of 6th trip
4337 43F7 ARC COORD-EF EF relay for Co-ordination Enable
4319 43D9 ARC SE1-INIT Autoreclosing initiation by SEF1 enable
431A 43DA ARC SE1-TP1 SEF1 trip mode of 1st trip

 462 
 6 F 2 T 0 1 7 7

431A 43DA ARC SE1-TP2 SEF1 trip mode of 2nd trip

431B 43DB ARC SE1-TP3 SEF1 trip mode of 3rd trip
431B 43DB ARC SE1-TP4 SEF1 trip mode of 4th trip
431C 43DC ARC SE1-TP5 SEF1 trip mode of 5th trip
431C 43DC ARC SE1-TP6 SEF1 trip mode of 6th trip
431D 43DD ARC SE2-INIT Autoreclosing initiation by SEF2 enable
431D 43DD ARC SE2-TP1 SEF2 trip mode of 1st trip
431E 43DE ARC SE2-TP2 SEF2 trip mode of 2nd trip
431E 43DE ARC SE2-TP3 SEF2 trip mode of 3rd trip
431F 43DF ARC SE2-TP4 SEF2 trip mode of 4th trip
431F 43DF ARC SE2-TP5 SEF2 trip mode of 5th trip
4320 43E0 ARC SE2-TP6 SEF2 trip mode of 6th trip
4320 43E0 ARC SE3-INIT Autoreclosing initiation by SEF3 enable
4321 43E1 ARC SE3-TP1 SEF3 trip mode of 1st trip
4321 43E1 ARC SE3-TP2 SEF3 trip mode of 2nd trip
4322 43E2 ARC SE3-TP3 SEF3 trip mode of 3rd trip
4322 43E2 ARC SE3-TP4 SEF3 trip mode of 4th trip
4323 43E3 ARC SE3-TP5 SEF3 trip mode of 5th trip
4323 43E3 ARC SE3-TP6 SEF3 trip mode of 6th trip
4324 43E4 ARC SE4-INIT Autoreclosing initiation by SEF4 enable
4324 43E4 ARC SE4-TP1 SEF4 trip mode of 1st trip
4325 43E5 ARC SE4-TP2 SEF4 trip mode of 2nd trip
4325 43E5 ARC SE4-TP3 SEF4 trip mode of 3rd trip
4326 43E6 ARC SE4-TP4 SEF4 trip mode of 4th trip
4326 43E6 ARC SE4-TP5 SEF4 trip mode of 5th trip
4327 43E7 ARC SE4-TP6 SEF4 trip mode of 6th trip
4338 43F8 ARC COORD-SE SEF relay for Co-ordination Enable
Autoreclosing initiation by External Trip
4327 43E7 ARC EXT-INIT
Command enable
4464 44E4 ARC TRDY Reclaim timer
4465 44E5 ARC TD1 1st shot Dead timer of Stage1
4466 44E6 ARC TR1 1st shot Reset timer of Stage1
4467 44E7 ARC TD2 2nd shot Dead timer of Stage1
4468 44E8 ARC TR2 2nd shot Reset timer of Stage1
4469 44E9 ARC TD3 3rd shot Dead timer of Stage1
446A 44EA ARC TR3 3rd shot Reset timer of Stage1
446B 44EB ARC TD4 4th shot Dead timer of Stage1
446C 44EC ARC TR4 4th shot Reset timer of Stage1
446D 44ED ARC TD5 5th shot Dead timer of Stage1
446E 44EE ARC TR5 5th shot Reset timer of Stage1
446F 44EF ARC TW Out put pulse timer
Autoreclosing Pause Time after manually
4470 44F0 ARC TSUC
close
4471 44F1 ARC TRCOV Autoreclosing Recovery time after Final Trip
Autoreclosing Pause Time after manually
4472 44F2 ARC TARCP
close
4473 44F3 ARC TRSET ARC reset time in CB closing mode.
45E1 46E1 ARC OVB OV element of bus-voltage check
45E2 46E2 ARC UVB UV element of bus-voltage check
45E3 46E3 ARC OVL OV element of line-voltage check
45E4 46E4 ARC UVL UV element of line-voltage check
45E5 46E5 ARC SYNUV UV element of Synchro. check
45E6 46E6 ARC SYNOV OV element of Synchro. check
45E7 46E7 ARC SYNDV Voltage difference for SYN
45E8 46E8 ARC SYNTH Synchro. check (ph. diff.)
45E9 46E9 ARC SYNDf Frequency difference checking for SYN

 463 
 6 F 2 T 0 1 7 7

Synchronism check timer (Live-bus &

4474 44F4 ARC TSYN
Live-line)
4475 44F5 ARC TLBDL Voltage check timer (Live-bus & Dead-line)
4476 44F6 ARC TDBLL Voltage check timer (Dead-bus & Live-line)
4477 44F7 ARC TDBDL Voltage check timer (Dead-bus & Dead-line)
45C1 46C1 ARC OC-CO For Co-ordination
45C2 46C2 ARC EF-CO ditto
45C3 46C3 ARC SE-CO ditto

 464 
 6 F 2 T 0 1 7 7

Setting Group
Address Name Contents
(Menu)
49E0 Modbus Relay ID No. for Modbus
49E1 Modbus2 Relay ID No. for Modbus2
49E2 IEC Station address for IEC103
49E3 IEC2 Station address for IEC103
49E4 RS485BR Baud rate for RS485 Port1
49E5 RS485BR2 Baud rate for RS485 Port2
49E6 IECBLK Monitor direction blocked
49E7 RS485P Protocol on RS485 Port1
49E8 RS485P2 Protocol on RS485 Port2
49E9 EtherP Protocol on Ethernet1
49EA EtherP2 Protocol on Ethernet1
4A04 61850BLK IEC61850 block
4A06 TSTMOD IEC61850 test mode
4A07 GSECHK GOOSE receive check
4A09 PINGCHK ping check
4A40 IP1-1 IP address of Ethernet port1 1
4A41 IP1-2 IP address of Ethernet port1 2
4A42 IP1-3 IP address of Ethernet port1 3
4A43 IP1-4 IP address of Ethernet port1 4
4A44 SM1-1 subnet mask of Ethernet port1 1
4A45 SM1-2 subnet mask of Ethernet port1 2
4A46 SM1-3 subnet mask of Ethernet port1 3
4A47 SM1-4 subnet mask of Ethernet port1 4
4A48 GW1-1 default gateway of Ethernet port1 1
4A49 GW1-2 default gateway of Ethernet port1 2
4A4A GW1-3 default gateway of Ethernet port1 3
Commnication
4A4B GW1-4 default gateway of Ethernet port1 4
4A34 IP2-1 IP address of Ethernet port2 1
4A35 IP2-2 IP address of Ethernet port2 2
4A36 IP2-3 IP address of Ethernet port2 3
4A37 IP2-4 IP address of Ethernet port2 4
4A38 SM2-1 subnet mask of Ethernet port2 1
4A39 SM2-2 subnet mask of Ethernet port2 2
4A3A SM2-3 subnet mask of Ethernet port2 3
4A3B SM2-4 subnet mask of Ethernet port2 4
4A3C GW2-1 default gateway of Ethernet port2 1
4A3D GW2-2 default gateway of Ethernet port2 2
4A3E GW2-3 default gateway of Ethernet port2 3
4A3F GW2-4 default gateway of Ethernet port2 4
4A4C SI1-1 SNTP server1 IP address 1
4A4D SI1-2 SNTP server1 IP address 2
4A4E SI1-3 SNTP server1 IP address 3
4A4F SI1-4 SNTP server1 IP address 4
4A50 SI2-1 SNTP server2 IP address 1
4A51 SI2-2 SNTP server2 IP address 2
4A52 SI2-3 SNTP server2 IP address 3
4A53 SI2-4 SNTP server2 IP address 4
4A2C PG1-1 Ping check addrs port#1 1
4A2D PG1-2 Ping check addrs port#1 2
4A2E PG1-3 Ping check addrs port#1 3
4A2F PG1-4 Ping check addrs port#1 4
4A30 PG2-1 Ping check addrs port#2 1

 465 
 6 F 2 T 0 1 7 7

4A31 PG2-2 Ping check addrs port#2 2

4A32 PG2-3 Ping check addrs port#2 3
4A33 PG2-4 Ping check addrs port#2 4
4A5C SMODE SNTP mode
4A0A DEADT Keep-alive timeout
49F9 GOINT GOOSE receive check interval

 466 
 6 F 2 T 0 1 7 7

3. CB remote control

To control the CB at remote site with the Modbus communication, do the following.

･Operation item
- Remote control (CB on / off)
- Change of interlock position
- LED reset

・Operating procedure
To control the CB at remote site with Modbus communication is require the following three steps.
- Pass word authentication
- Enable flag setting for remote control
- Remote control

CAUTION
To control the CB at remote site, set the control hierarchy setting of relay to “Remote”.

A. Pass word authentication

To authenticate the password, enter the password for control function to the address of “3E82” . The
password is the same as that of control function.
The password retention is 1 minute.
If no password is set, please enter “0000” as password.

The sending messages transmitted with ASCII code.

Ex. “0000” -> “303030303”

Message example (Relay address:01, Password:0000, need CRC frame)

to relay 01103E8200020430303030
from relay 01103E820002

 467 
 6 F 2 T 0 1 7 7

B. Enable flag setting for remote control

To enable the remote control, turn on the address of “0200 : Remote control enable flag”.
When the operation completed or time-out occurs, the flag is reset.
Flag state can be checked in the command of “FC=01 Read Coils”.

Message example
to relay 02050200FF00
from relay 02050200FF00

C. Remote control
To control the CB at remote site, turn on or off the address of “0400: Remote control
command”, ”0401: Remote interlock command” or “0402: Remote reset command”.
The “On” operation command is “FF00”. The “Off” operation command is “0000”.
The operation reply is checked by the “BO” or “LED” signals according to the relay settings.

Message example (Relay address:01、CB on, need CRC frame)

to relay 01050400FF00
from relay 01050400FF00

Message example (Relay address:01、CB off, need CRC frame)

to relay 010504000000
from relay 010504000000

 468 
 6 F 2 T 0 1 7 7

Appendix O
Inverse Time Characteristics

 469 
 6 F 2 T 0 1 7 7

IEC/UK Inverse Curves (NI) IEC/UK Inverse Curves (VI)

(Time Multiplier TMS = 0.1 - 1.5) (Time Multiplier TMS = 0.1 - 1.5)
100 100

10

10

Operating Time (s)

Operating Time (s)

TMS TMS

1.5 1 1.5
1.0
1.

0.5
0.5
1
0.2
0.1
0.2 0.1

0.1

0.1 0.01
1 10 100 1 10 100
Current (Multiple of Setting) Current (Multiple of Setting)

Normal Inverse Very Inverse

 470 
 6 F 2 T 0 1 7 7

IEC/UK Inverse Curves (EI)

(Time Multiplier TMS = 0.1 - 1.5)
1000

100

UK Inverse Curves (LTI)

(Time Multiplier TMS = 0.1 - 1.5)
1000

10
Operating Time (s)

100
Operating Time (s)

1
TMS

TMS
10 1.5

1.5 1.0

1.0
0.5

0.1 0.5
0.2
1
0.1
0.2

0.1

0.01 0.1
1 10 100 1 10 100
Current (Multiple of Setting) Current (Multiple of Setting)

Extremely Inverse Long Time Inverse

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IEEE Inverse Curves (MI) IEEE Inverse Curves (VI)

(Time Multiplier TMS = 0.1 - 1.5) (Time Multiplier TMS = 0.1 - 1.5)
100 100

10 10

Operating Time (s)

Operating Time (s)

TMS
TM
1.5
1 1
1.0 1.5

1.0
0.5
0.5

0.2

0.1 0.1 0.2

0.1
0.1

0.01 0.01
1 10 100 1 10 100
Current (Multiple of Setting) Current (Multiple of Setting)

Moderately Inverse Very Inverse

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IEEE Inverse Curves (EI)

(Time Multiplier TMS = 0.1 - 1.5)
100

10
Operating Time (s)

TMS

1.5
1.0
0.1
0.5

0.2

0.1
0.01
1 10 100
Current (Multiple of Setting)

Extremely Inverse

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US Inverse Curves (CO8) US Inverse Curves (CO2)

(Time Multiplier TMS = 0.1 - 1.5) (Time Multiplier TMS = 0.1 - 1.5)
100 10

10

1
TMS

Operating Time (s)

Operating Time (s)

1.5

1 1.0

TMS
0.5
1.5
0.1
1.0
0.2
0.1 0.5

0.1
0.2

0.1

0.01 0.01
1 10 100 1 10 100
Current (Multiple of Setting) Current (Multiple of Setting)

CO8 Inverse CO2 Short Time Inverse

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Appendix P
IEC61850: Interoperability

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1. IEC61850 Documentation
IEC61850 Model Implementation Conformance Statement (MICS) for GRE140

The GRE140 relay supports IEC 61850 logical nodes and common data classes as indicated in the
following tables.

Logical nodes in IEC 61850-7-4

Logical Nodes GRE140
L: System Logical Nodes
LPHD Yes
Common Logical Node Yes
LLN0 Yes
P: Logical Nodes for Protection functions
PDIF ---
PDIR ---
PDIS ---
PDOP ---
PDUP ---
PFRC Yes
PHAR Yes
PHIZ ---
PIOC ---
PMRI ---
PMSS ---
POPE ---
PPAM ---
PSCH ---
PSDE ---
PTEF ---
PTOC Yes
PTOF Yes
PTOV Yes
PTRC Yes
PTTR Yes
PTUC Yes
PTUV Yes
PUPF ---
PTUF Yes
PVOC ---
PVPH ---
PZSU ---
R: Logical Nodes for protection related functions
RDRE ---
RADR ---
RBDR ---
RDRS ---
RBRF Yes
RDIR ---
RFLO Yes
RPSB ---
RREC Yes
RSYN Yes
C: Logical Nodes for Control
CALH ---
CCGR ---
CILO Yes
CPOW ---
CSWI Yes

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Logical Nodes GRE140

G: Logical Nodes for Generic references
GAPC ---
GGIO Yes
GGIO_GOOSE Yes
GSAL ---
I: Logical Nodes for Interfacing and archiving
IARC ---
IHMI ---
ITCI ---
ITMI ---
A: Logical Nodes for Automatic control
ANCR ---
ARCO ---
ATCC ---
AVCO ---
M: Logical Nodes for Metering and measurement
MDIF ---
MHAI ---
MHAN ---
MMTR ---
MMXN ---
MMXU Yes
MSQI Yes
MSTA ---
S: Logical Nodes for Sensors and monitoring
SARC ---
SIMG ---
SIML ---
SPDC ---
X: Logical Nodes for Switchgear
XCBR Yes
XSWI ---
T: Logical Nodes for Instrument transformers
TCTR ---
TVTR ---
Y: Logical Nodes for Power transformers
YEFN ---
YLTC ---
YPSH ---
YPTR ---
Z: Logical Nodes for Further power system equipment
ZAXN ---
ZBAT ---
ZCAB ---
ZCAP ---
ZCON ---
ZGEN ---
ZGIL ---
ZLIN ---
ZMOT ---
ZREA ---
Logical Nodes GRE140
ZRRC ---
ZSAR ---
ZTCF ---
ZTCR ---

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Common data classes in IEC61850-7-3

Common data classes GRE140

Status information
SPS Yes
DPS ---
INS Yes
ACT Yes
ACD Yes
SEC ---
BCR ---
Measured information
MV Yes
CMV Yes
SAV ---
WYE Yes
DEL Yes
SEQ Yes
HMV ---
HWYE ---
HDEL ---
Controllable status information
SPC Yes
DPC Yes
INC Yes
BSC ---
ISC ---
Controllable analogue information
APC ---
Status settings
SPG ---
ING Yes
Analogue settings
ASG Yes
CURVE ---
Description information
DPL Yes
LPL Yes
CSD ---

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LPHD class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC 61850-7-2)
Data
PhyName DPL Physical device name plate M Y
PhyHealth INS Physical device health M Y
OutOv SPS Output communications buffer overflow O N
Proxy SPS Indicates if this LN is a proxy M Y
InOv SPS Input communications buffer overflow O N
NumPwrUp INS Number of Power ups O N
WrmStr INS Number of Warm Starts O N
WacTrg INS Number of watchdog device resets detected O N
PwrUp SPS Power Up detected O N
PwrDn SPS Power Down detected O N
PwrSupAlm SPS External power supply alarm O N
RsStat SPC Reset device statistics T O N

Common Logical Node class

Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC 61850-7-2)
Data
Mandatory Logical Node Information (Shall be inherited by ALL LN but LPHD)
Mod INC Mode M Y
Beh INS Behaviour M Y
Health INS Health M Y
NamPlt LPL Name plate M Y
Optional Logical Node Information
Loc SPS Local operation O N
EEHealth INS External equipment health O N
EEName DPL External equipment name plate O N
OpCntRs INC Operation counter resetable O N
OpCnt INS Operation counter O N
OpTmh INS Operation time O N
Data Sets (see IEC 61850-7-2)
Inherited and pecialized from Logical Node class (see IEC 61850-7-2)
Control Blocks (see IEC 61850-7-2)
Inherited and pecialized from Logical Node class (see IEC 61850-7-2)
Services (see IEC 61850-7-2)
Inherited and pecialized from Logical Node class (see IEC 61850-7-2)

LLNO class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC 61850-7-2)
Data
Common Logical Node Information
LN shall inherit all Mandatory Data from Common Logical Node Class M
Loc SPS Local operation for complete logical device O Y
OpTmh INS Operation time O N
Controls
Diag SPC Run Diagnostics O Y
LEDRs SPC LED reset T O Y

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PFRC class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC 61850-7-2)
Data
Common Logical Node Information
LN shall inherit all Mandatory Data from Common Logical Node Class M
OpCntRs INC Resetable operation counter O N
Status Information
Str ACD Start M Y
Op ACT Operate T M Y
BlkV SPS Blocked because of voltage O Y
Settings
StrVal ASG Start Value df/dt O Y
BlkVal ASG Voltage Block Value O Y
OpDlTmms ING Operate Delay Time O N
RsDlTmms ING Reset Delay Time O N

PHAR class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC 61850-7-2)
Data
Common Logical Node Information
LN shall inherit all Mandatory Data from Common Logical Node M
Class
OpCntRs INC Resetable operation counter O N
Status Information
Str ACD Start M Y
Settings
HarRst ING Number of harmonic restrained O N
PhStr ASG Start Value O Y
PhStop ASG Stop Value O N
OpDlTmms ING Operate Delay Time O N
RsDlTmms ING Reset Delay Time O N

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PTOC class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC 61850-7-2)
Data
Common Logical Node Information
LN shall inherit all Mandatory Data from Common Logical Node Class M
OpCntRs INC Resetable operation counter O N
Status Information
Str ACD Start M Y
Op ACT Operate T M Y
TmASt CSD Active curve characteristic O N
Settings
TmACrv CURVE Operating Curve Type O N
StrVal ASG Start Value O Y
TmMult ASG Time Dial Multiplier O N
MinOpTmms ING Minimum Operate Time O N
MaxOpTmms ING Maximum Operate Time O N
OpDITmms ING Operate Delay Time O Y
TypRsCrv ING Type of Reset Curve O N
RsDITmms ING Reset Delay Time O N
DirMod ING Directional Mode O N

PTOF class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC 61850-7-2)
Data
Common Logical Node Information
LN shall inherit all Mandatory Data from Common Logical Node Class M
OpCntRs INC Resetable operation counter O N
Status Information
Str ACD Start M Y
Op ACT Operate T M Y
BlkV SPS Blocked because of voltage O Y
Settings
StrVal ASG Start Value (frequency) O Y
BlkVal ASG Voltage Block Value O Y
OpDITmms ING Operate Delay Time O Y
RsDITmms ING Reset Delay Time O N

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PTOV class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC 61850-7-2)
Data
Common Logical Node Information
LN shall inherit all Mandatory Data from Common Logical Node Class M
OpCntRs INC Resetable operation counter O N
Status Information
Str ACD Start M Y
Op ACT Operate T O Y
TmVSt CSD Active curve characteristic O N
Settings
TmVCrv CURVE Operating Curve Type O N
StrVal ASG Start Value O Y
TmMult ASG Time Dial Multiplier O N
MinOpTmms ING Minimum Operate Time O N
MaxOpTmms ING Maximum Operate Time O N
OpDlTmms ING Operate Delay Time O Y
RsDlTmms ING Reset Delay Time O N

PTRC class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC 61850-7-2)
Data
Common Logical Node Information
LN shall inherit all Mandatory Data from Common Logical Node Class M
OpCntRs INC Resetable operation counter O N
Status Information
Tr ACT Trip C Y
Op ACT Operate (combination of subscribed Op from protection functions) C N
Str ACD Sum of all starts of all connected Logical Nodes O N
Settings
TrMod ING Trip Mode O N
TrPlsTmms ING Trip Pulse Time O N

Condition C: At least one of the two status information (Tr, Op) shall be used.

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PTTR class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC 61850-7-2)
Data
Common Logical Node Information
LN shall inherit all Mandatory Data from Common Logical Node Class M
OpCntRs INC Resetable operation counter O N
Measured Values
Amp MV Current for thermal load model O N
Tmp MV Temperature for thermal load O N
TmpRl MV Relation between temperature and max. temperature O N
LodRsvAlm MV Load reserve to alarm O N
LodRsvTr MV Load reserve to trip O N
AgeRat MV Ageing rate O N
Status Information
Str ACD Start O Y
Op ACT Operate T M Y
AlmThm ACT Thermal Alarm O Y
TmTmpSt CSD Active curve characteristic O N
TmASt CSD Active curve characteristic O N
Settings
TmTmpCrv CURVE Characteristic Curve for temperature measurement O N
TmACrv CURVE Characteristic Curve for current measurement /Thermal model O N
TmpMax ASG Maximum allowed temperature O N
StrVal ASG Start Value O Y
OpDlTmms ING Operate Delay Time O N
MinOpTmms ING Minimum Operate Time O N
MaxOpTmms ING Maximum Operate Time O N
RsDlTmms ING Reset Delay Time O N
ConsTms ING Time constant of the thermal model O N
AlmVal ASG Alarm Value O N

PTUC class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC 61850-7-2)
Data
Common Logical Node Information
LN shall inherit all Mandatory Data from Common Logical Node Class M
OpCntRs INC Resetable operation counter O N
Status Information
Str ACD Start M Y
Op ACT Operate T O Y
TmVSt CSD Active curve characteristic O N
Settings
TmACrv CURVE Operating Curve Type O N
StrVal ASG Start Value O Y
OpDlTmms ING Operate Delay Time O Y
TmMult ASG Time Dial Multiplier O N
MinOpTmms ING Minimum Operate Time O N
MaxOpTmms ING Maximum Operate Time O N
TypRsCrv ING Type of Reset Curve O N
RsDlTmms ING Reset Delay Time O N
DirMod ING Directional Mode O N

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PTUV class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC 61850-7-2)
Data
Common Logical Node Information
LN shall inherit all Mandatory Data from Common Logical Node Class M
OpCntRs INC Resetable operation counter O N
Status Information
Str ACD Start M Y
Op ACT Operate T M Y
TmVSt CSD Active curve characteristic O N
Settings
TmVCrv CURVE Operating Curve Type O N
StrVal ASG Start Value O Y
TmMult ASG Time Dial Multiplier O N
MinOpTmms ING Minimum Operate Time O N
MaxOpTmms ING Maximum Operate Time O N
OpDlTmms ING Operate Delay Time O Y
RsDlTmms ING Reset Delay Time O N

PTUF class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC 61850-7-2)
Data
Common Logical Node Information
LN shall inherit all Mandatory Data from Common Logical Node Class M
OpCntRs INC Resetable operation counter O N
Status Information
Str ACD Start M Y
Op ACT Operate T M Y
BlkV SPS Blocked because of voltage O Y
Settings
StrVal ASG Start Value (frequency) O Y
BlkVal ASG Voltage Block Value O Y
OpDlTmms ING Operate Delay Time O Y
RsDlTmms ING Reset Delay Time O N

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RBRF class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC 61850-7-2)
Data
Common Logical Node Information
LN shall inherit all Mandatory Data from Common Logical Node Class M
OpCntRs INC Resetable operation counter O N
Status Information
Str ACD Start, timer running O Y
OpEx ACT Breaker failure trip (“external trip”) T C Y
OpIn ACT Operate, retrip (“internal trip”) T C Y
Setting
Breaker Failure Detection Mode (current, breaker status, both,
FailMod ING O Y
other)
FailTmms ING Breaker Failure Time Delay for bus bar trip O Y
SPlTrTmms ING Single Pole Retrip Time Delay O N
TPTrTmms ING Three Pole Retrip Time Delay O N
DetValA ASG Current Detector Value O Y
ReTrMod ING Retrip Mode O N
Condition C: At least one of either data shall be used depending on the applied tripping schema.

RFLO class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC 61850-7-2)
Data
Common Logical Node Information
LN shall inherit all Mandatory Data from Common Logical Node Class M
OpCntRs INC Resetable operation counter O N
Measured values
FltZ CMV Fault Impedance M Y
FltDiskm MV Fault Distance in km M Y
Status Information
FltLoop INS Fault Loop O Y
Setting
LinLenKm ASG Line length in km O Y
R1 ASG Positive-sequence line resistance O Y
X1 ASG Positive-sequence line reactance O Y
R0 ASG Zero-sequence line resistance O Y
X0 ASG Zero-sequence line reactance O Y
Z1Mod ASG Positive-sequence line impedance value O N
Z1Ang ASG Positive-sequence line impedance angle O N
Z0Mod ASG Zero-sequence line impedance value O N
Z0Ang ASG Zero-sequence line impedance angle O N
Rm0 ASG Mutual resistance O N
Xm0 ASG Mutual reactance O N
Zm0Mod ASG Mutual impedance value O N
Zm0Ang ASG Mutual impedance angle O N

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RREC class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC 61850-7-2)
Data
Common Logical Node Information
LN shall inherit all Mandatory Data from Common Logical Node Class M
OpCntRs INC Resetable operation counter O N
Controls
BlkRec SPC Block Reclosing O N
ChkRec SPC Check Reclosing O N
Status Information
Auto SPS Automatic Operation (external switch status) O N
Op ACT Operate (used here to provide close to XCBR) T M Y
AutoRecSt INS Auto Reclosing Status M Y
Setting
Rec1Tmms ING First Reclose Time O Y
Rec2Tmms ING Second Reclose Time O Y
Rec3Tmms ING Third Reclose Time O Y
PlsTmms ING Close Pulse Time O Y
RclTmms ING Reclaim Time O Y

RSYN class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC 61850-7-2)
Data
Common Logical Node Information
LN shall inherit all Mandatory Data from Common Logical Node Class M
OpCntRs INC Resetable operation counter O N
Controls
RHz SPC Raise Frequency O N
LHz SPC Lower Frequency O N
RV SPC Raise Voltage O N
LV SPC Lower Voltage O N
Status Information
Rel SPS Release M Y
VInd SPS Voltage Difference Indicator O N
AngInd SPS Angle Difference Indicator O N
HzInd SPS Frequency Difference Indicator O N
SynPrg SPS Synchronising in progress O N
Measured values
DifVClc MV Calculated Difference in Voltage O N
DifHzClc MV Calculated Difference in Frequency O N
DifAngClc MV Calculated Difference of Phase Angle O N
Setting
DifV ASG Difference Voltage O Y
DifHz ASG Difference Frequency O Y
DifAng ASG Difference Phase Angle O Y
LivDeaMod ING Live Dead Mode O N
DeaLinVal ASG Dead Line Value O N
LivLinVal ASG Live Line Value O N
DeaBusVal ASG Dead Bus Value O N
LivBusVal ASG Live Bus Value O N
PlsTmms ING Close Pulse Time O N
BkrTmms ING Closing time of breaker O N

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CILO class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC 61850-7-2)
Data
Common Logical Node Information
LN shall inherit all Mandatory Data from Common Logical Node Class M
Status Information
EnaOpn SPS Enable Open M Y
EnaCls SPS Enable Close M Y

CSWI class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC 61850-7-2)
Data
Common Logical Node Information
LN shall inherit all Mandatory Data from Common Logical Node Class M
Loc SPS Local operation O N
OpCntRs INC Resetable operation counter O N
Controls
Pos DPC Switch, general M Y
PosA DPC Switch L1 O N
PosB DPC Switch L2 O N
PosC DPC Switch L3 O N
OpOpn ACT Operation “Open Switch” T O N
OpCls ACT Operation “Close Switch” T O N

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GGIO class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC 61850-7-2)
Data
Common Logical Node Information
LN shall inherit all Mandatory Data from Common Logical Node Class M
EEHealth INS External equipment health (external sensor) O N
EEName DPL External equipment name plate O N
Loc SPS Local operation O N
OpCntRs INC Resetable operation counter O N
Measured values
AnIn MV Analogue input O N
Controls
SPCSO SPC Single point controllable status output O N
DPCSO DPC Double point controllable status output O N
ISCSO INC Integer status controllable status output O N
Status Information
IntIn INS Integer status input O N
Alm SPS General single alarm O N
Ind01 SPS General indication (binary input) O Y
Ind02 SPS General indication (binary input) O Y
Ind03 SPS General indication (binary input) O Y
Ind04 SPS General indication (binary input) O Y
Ind05 SPS General indication (binary input) O Y
Ind06 SPS General indication (binary input) O Y
Ind07 SPS General indication (binary input) O Y
Ind08 SPS General indication (binary input) O Y
Ind09 SPS General indication (binary input) O Y
Ind10 SPS General indication (binary input) O Y
:
:
:
Ind32 SPS General indication (binary input) O Y

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GGIO (for GOOSE) class

Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC 61850-7-2)
Data
Common Logical Node Information
LN shall inherit all Mandatory Data from Common Logical Node Class M
EEHealth INS External equipment health (external sensor) O N
EEName DPL External equipment name plate O N
Loc SPS Local operation O N
OpCntRs INC Resetable operation counter O N
Measured values
AnIn MV Analogue input O N
Controls
SPCSO SPC Single point controllable status output O N
DPCSO DPC Double point controllable status output O N
ISCSO INC Integer status controllable status output O N
Status Information
IntIn INS Integer status input O N
Alm SPS General single alarm O N
Ind01 SPS General indication (binary input) O Y
Ind02 SPS General indication (binary input) O Y
Ind03 SPS General indication (binary input) O Y
Ind04 SPS General indication (binary input) O Y
Ind05 SPS General indication (binary input) O Y
Ind06 SPS General indication (binary input) O Y
Ind07 SPS General indication (binary input) O Y
Ind08 SPS General indication (binary input) O Y
Ind09 SPS General indication (binary input) O Y
Ind10 SPS General indication (binary input) O Y
Ind11 SPS General indication (binary input) O Y
Ind12 SPS General indication (binary input) O Y
Ind13 SPS General indication (binary input) O Y
Ind14 SPS General indication (binary input) O Y
Ind15 SPS General indication (binary input) O Y
Ind16 SPS General indication (binary input) O Y

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MMXU class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC 61850-7-2)
Data
Common Logical Node Information
LN shall inherit all Mandatory Data from Common Logical Node Class M
EEHealth INS External equipment health (external sensor) O N
Measured values
TotW MV Total Active Power (Total P) O N
TotVAr MV Total Reactive Power (Total Q) O N
TotVA MV Total Apparent Power (Total S) O N
TotPF MV Average Power factor (Total PF) O N
Hz MV Frequency O Y
PPV DEL Phase to phase voltages (VL1VL2, …) O Y
PhV WYE Phase to ground voltages (VL1ER, …) O Y
A WYE Phase currents (IL1, IL2, IL3) O Y
W WYE Phase active power (P) O N
VAr WYE Phase reactive power (Q) O N
VA WYE Phase apparent power (S) O N
PF WYE Phase power factor O N
Z WYE Phase Impedance O N

MSQI class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC 61850-7-2)
Data
Common Logical Node Information
LN shall inherit all Mandatory Data from Common Logical Node Class M
EEHealth INS External equipment health (external sensor) O N
EEName DPL External equipment name plate O N
Measured values
SeqA SEQ Positive, Negative and Zero Sequence Current C Y
SeqV SEQ Positive, Negative and Zero Sequence Voltage C Y
DQ0Seq SEQ DQ0 Sequence O N
ImbA WYE Imbalance current O N
ImbNgA MV Imbalance negative sequence current O N
ImbNgV MV Imbalance negative sequence voltage O N
ImbPPV DEL Imbalance phase-phase voltage O N
ImbV WYE Imbalance voltage O N
ImbZroA MV Imbalance zero sequence current O N
ImbZroV MV Imbalance zero sequence voltage O N
MaxImbA MV Maximum imbalance current O N
MaxImbPPV MV Maximum imbalance phase-phase voltage O N
MaxImbV MV Maximum imbalance voltage O N
Condition C: At least one of either data shall be used.

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XCBR class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC 61850-7-2)
Data
Common Logical Node Information
LN shall inherit all Mandatory Data from Common Logical Node Class M
EEHealth INS External equipment health (external sensor) O N
EEName DPL External equipment name plate O N
OpCnt INS Operation counter M Y
Controls
Pos DPC Switch position M Y
BlkOpn SPC Block opening M Y
BlkCls SPC Block closing M Y
ChaMotEna SPC Charger motor enabled O N
Metered Values
SumSwARs BCR Sum of Switched Amperes, resetable O N
Status Information
CBOpCap INS Circuit breaker operating capability M Y
POWCap INS Point On Wave switching capability O N
MaxOpCap INS Circuit breaker operating capability when fully charged O N

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SPS class
Attribute Attribute Type FC TrgOp Value/Value Range M/O/C GRE140
Name
DataName Inherited from Data Class (see IEC 61850-7-2)
DataAttribute
status
stVal BOOLEAN ST dchg TRUE | FALSE M Y
q Quality ST qchg M Y
t TimeStamp ST M Y
substitution
subEna BOOLEAN SV PICS_SUBST N
subVal BOOLEAN SV TRUE | FALSE PICS_SUBST N
subQ Quality SV PICS_SUBST N
subID VISIBLE STRING64 SV PICS_SUBST N
configuration, description and extension
d VISIBLE STRING255 DC Text O N
dU UNICODE STRING255 DC O N
cdcNs VISIBLE STRING255 EX AC_DLNDA_M N
cdcName VISIBLE STRING255 EX AC_DLNDA_M N
dataNs VISIBLE STRING255 EX AC_DLN_M N
Services
As defined in Table 13 (see IEC 61850-7-3)

INS class
Attribute Attribute Type FC TrgOp Value/Value Range M/O/C GRE140
Name
DataName Inherited from Data Class (see IEC 61850-7-2)
DataAttribute
status
stVal INT32 ST dchg M Y
q Quality ST qchg M Y
t TimeStamp ST M Y
Substitution
subEna BOOLEAN SV PICS_SUBST N
subVal INT32 SV PICS_SUBST N
subQ Quality SV PICS_SUBST N
subID VISIBLE STRING64 SV PICS_SUBST N
configuration, description and extension
d VISIBLE STRING255 DC Text O N
dU UNICODE STRING255 DC O N
cdcNs VISIBLE STRING255 EX AC_DLNDA_M N
cdcName VISIBLE STRING255 EX AC_DLNDA_M N
dataNs VISIBLE STRING255 EX AC_DLN_M N
Services
As defined in Table 13 (see IEC 61850-7-3)

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ACT class
Attribute Attribute Type FC TrgOp Value/Value Range M/O/C GRE140
Name
DataName Inherited from Data Class (see IEC 61850-7-2)
DataAttribute
status
general BOOLEAN ST dchg M Y
phsA BOOLEAN ST dchg O Y
phsB BOOLEAN ST dchg O Y
phsC BOOLEAN ST dchg O Y
neut BOOLEAN ST dchg O Y
q Quality ST qchg M Y
t TimeStamp ST M Y
configuration, description and extension
operTm TimeStamp CF O N
d VISIBLE STRING255 DC Text O N
dU UNICODE STRING255 DC O N
cdcNs VISIBLE STRING255 EX AC_DLNDA_M N
cdcName VISIBLE STRING255 EX AC_DLNDA_M N
dataNs VISIBLE STRING255 EX AC_DLN_M N
Services
As defined in Table 13 (see IEC 61850-7-3)

ACD class
Attribute Attribute Type FC TrgOp Value/Value Range M/O/C GRE140
Name
DataName Inherited from Data Class (see IEC 61850-7-2)
DataAttribute
status
general BOOLEAN ST dchg M Y
dirGeneral ENUMERATED ST dchg unknown | forward | backward | both M Y
phsA BOOLEAN ST dchg GC_2 (1) Y
dirPhsA ENUMERATED ST dchg unknown | forward | backward GC_2 (1) Y
phsB BOOLEAN ST dchg GC_2 (2) Y
dirPhsB ENUMERATED ST dchg unknown | forward | backward GC_2 (2) Y
phsC BOOLEAN ST dchg GC_2 (3) Y
dirPhsC ENUMERATED ST dchg unknown | forward | backward GC_2 (3) Y
neut BOOLEAN ST dchg GC_2 (4) Y
dirNeut ENUMERATED ST dchg unknown | forward | backward GC_2 (4) Y
q Quality ST qchg M Y
t TimeStamp ST M Y
configuration, description and extension
d VISIBLE STRING255 DC Text O N
dU UNICODE STRING255 DC O N
cdcNs VISIBLE STRING255 EX AC_DLNDA_M N
cdcName VISIBLE STRING255 EX AC_DLNDA_M N
dataNs VISIBLE STRING255 EX AC_DLN_M N
Services
As defined in Table 13 (see IEC 61850-7-3)

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MV class
Attribute Attribute Type FC TrgOp Value/Value Range M/O/C GRE140
Name
DataName Inherited from Data Class (see IEC 61850-7-2)

DataAttribute
measured values
instMag AnalogueValue MX O N
mag AnalogueValue MX dchg M Y
range ENUMERATED MX dchg normal | high | low | high-high | low-low |… O N
q Quality MX qchg M Y
t TimeStamp MX M Y
substitution
subEna BOOLEAN SV PICS_SUBST N
subVal AnalogueValue SV PICS_SUBST N
subQ Quality SV PICS_SUBST N
subID VISIBLE STRING64 SV PICS_SUBST N
configuration, description and extension
units Unit CF see Annex A O Y
db INT32U CF 0 … 100 000 O N
zeroDb INT32U CF 0 … 100 000 O N
sVC ScaledValueConfig CF AC_SCAV Y
rangeC RangeConfig CF GC_CON N
smpRate INT32U CF O N
d VISIBLE STRING255 DC Text O N
dU UNICODE STRING255 DC O N
cdcNs VISIBLE STRING255 EX AC_DLNDA_M N
cdcName VISIBLE STRING255 EX AC_DLNDA_M N
dataNs VISIBLE STRING255 EX AC_DLN_M N

Services
As defined in Table 21 (see IEC 61850-7-3)

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CMV class
Attribute Attribute Type FC TrgOp Value/Value Range M/O/C GRE140
Name
DataName Inherited from Data Class (see IEC 61850-7-2)
DataAttribute
measured values
instCVal Vector MX O N
cVal Vector MX dchg M Y
range ENUMERATED MX dchg normal | high | low | high-high | low-low |… O N
q Quality MX qchg M Y
t TimeStamp MX M Y
substitution
subEna BOOLEAN SV PICS_SUBST N
subVal Vector SV PICS_SUBST N
subQ Quality SV PICS_SUBST N
subID VISIBLE STRING64 SV PICS_SUBST N
configuration, description and extension
units Unit CF see Annex A O Y
db INT32U CF 0 … 100 000 O N
zeroDb INT32U CF 0 … 100 000 O N
rangeC RangeConfig CF GC_CON N
magSVC ScaledValueConfig CF AC_SCAV Y
angSVC ScaledValueConfig CF AC_SCAV N
angRef ENUMERATED CF V | A | other … O N
smpRate INT32U CF O N
d VISIBLE STRING255 DC Text O N
dU UNICODE STRING255 DC O N
cdcNs VISIBLE STRING255 EX AC_DLNDA_M N
cdcName VISIBLE STRING255 EX AC_DLNDA_M N
dataNs VISIBLE STRING255 EX AC_DLN_M N
Services
As defined in Table 21 (see IEC 61850-7-3)

WYE class
Attribute Attribute Type FC TrgOp Value/Value Range M/O/C GRE140
Name
DataName Inherited from Data Class (see IEC 61850-7-2)
Data
phsA CMV GC_1 Y
phsB CMV GC_1 Y
phsC CMV GC_1 Y
neut CMV GC_1 Y
net CMV GC_1 N
res CMV GC_1 N
DataAttribute
configuration, description and extension
angRef ENUMERATED CF Va | Vb | Vc | Aa | Ab | Ac | Vab | O N
Vbc | Vca | Vother | Aother
d VISIBLE STRING255 DC Text O N
dU UNICODE STRING255 DC O N
cdcNs VISIBLE STRING255 EX AC_DLNDA_M N
cdcName VISIBLE STRING255 EX AC_DLNDA_M N
dataNs VISIBLE STRING255 EX AC_DLN_M N
Services
As defined in Table 21 (see IEC 61850-7-3)

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DEL class
Attribute Attribute Type FC TrgOp Value/Value Range M/O/C GRE140
Name
DataName Inherited from Data Class (see IEC 61850-7-2)
Data
phsAB CMV GC_1 Y
phsBC CMV GC_1 Y
phsCA CMV GC_1 Y
DataAttribute
configuration, description and extension
angRef ENUMERATED CF Va | Vb | Vc | Aa | Ab | Ac | Vab | O N
Vbc | Vca | Vother | Aother
d VISIBLE STRING255 DC Text O N
dU UNICODE STRING255 DC O N
cdcNs VISIBLE STRING255 EX AC_DLNDA_M N
cdcName VISIBLE STRING255 EX AC_DLNDA_M N
dataNs VISIBLE STRING255 EX AC_DLN_M N
Services
As defined in Table 21 (see IEC 61850-7-3)

SEQ class
Attribute Attribute Type FC TrgOp Value/Value Range M/O/C GRE140
Name
DataName Inherited from Data Class (see IEC 61850-7-2)
Data
c1 CMV M Y
c2 CMV M Y
c3 CMV M Y
DataAttribute
measured attributes
seqT ENUMERATED MX pos-neg-zero | dir-quad-zero M Y
configuration, description and extension
phsRef ENUMERATED CF A|B|C|… O N
d VISIBLE STRING255 DC Text O N
dU UNICODE STRING255 DC O N
cdcNs VISIBLE STRING255 EX AC_DLNDA_M N
cdcName VISIBLE STRING255 EX AC_DLNDA_M N
dataNs VISIBLE STRING255 EX AC_DLN_M N
Services
As defined in Table 21 (see IEC 61850-7-3)

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SPC class
Attribute Attribute Type FC TrgOp Value/Value Range M/O/C GRE140
Name
DataName Inherited from Data Class (see IEC 61850-7-2)
DataAttribute
control and status
ctlVal BOOLEAN CO off (FALSE) | on (TRUE) AC_CO_M N
operTm TimeStamp CO AC_CO_O N
origin Originator_RO CO, ST AC_CO_O N
ctlNum INT8U_RO CO, ST 0..255 AC_CO_O N
SBO VISIBLE STRING65 CO AC_CO_SBO_N_ N
M
SBOw SBOW CO AC_CO_SBOW_ N
E_M
Oper Oper CO AC_CO _M Y
Cancel Cancel CO AC_CO_SBO_N_ N
M and
AC_CO_SBOW_
E_M and
AC_CO_TA_E_
M
stVal BOOLEAN ST dchg FALSE | TRUE AC_ST Y
q Quality ST qchg AC_ST Y
t TimeStamp ST AC_ST Y
stSeld BOOLEAN ST dchg AC_CO_O N
Substitution
subEna BOOLEAN SV PICS_SUBST N
subVal BOOLEAN SV FALSE | TRUE PICS_SUBST N
subQ Quality SV PICS_SUBST N
subID VISIBLE STRING64 SV PICS_SUBST N
configuration, description and extension
pulseConfig PulseConfig CF AC_CO_O N
CtlModel CtlModels CF M Y
sboTimeout INT32U CF AC_CO_O N
sboClass SboClasses CF AC_CO_O N
d VISIBLE STRING255 DC Text O N
dU UNICODE STRING255 DC O N
cdcNs VISIBLE STRING255 EX AC_DLNDA_M N
cdcName VISIBLE STRING255 EX AC_DLNDA_M N
dataNs VISIBLE STRING255 EX AC_DLN_M N
Services
As defined in Table 31 (see IEC 61850-7-3) and Table E.2 (see IEC 61850-8-1)

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DPC class
Attribute Attribute Type FC TrgOp Value/Value Range M/O/C GRE140
Name
DataName Inherited from Data Class (see IEC 61850-7-2)
DataAttribute
control and status
ctlVal BOOLEAN CO off (FALSE) | on (TRUE) AC_CO_M N
operTm TimeStamp CO AC_CO_O N
origin Originator CO, ST AC_CO_O N
ctlNum INT8U CO, ST 0..255 AC_CO_O N
SBO VISIBLE STRING65 CO AC_CO_SBO_N_ Y
M
SBOw SBOW CO AC_CO_SBOW_ N
E_M
Oper Oper CO AC_CO _M Y
Cancel Cancel CO AC_CO_SBO_N_ Y
M and
AC_CO_SBOW_
E_M and
AC_CO_TA_E_
M
stVal CODED ENUM ST dchg intermediate-state | off | on | bad-state M Y
q Quality ST qchg M Y
t TimeStamp ST M Y
stSeld BOOLEAN ST dchg AC_CO_O N
substitution
subEna BOOLEAN SV PICS_SUBST N
subVal CODED ENUM SV intermediate-state | off | on | bad-state PICS_SUBST N
subQ Quality SV PICS_SUBST N
subID VISIBLE STRING64 SV PICS_SUBST N
configuration, description and extension
pulseConfig PulseConfig CF AC_CO_O N
ctlModel CtlModels CF M Y
sboTimeout INT32U CF AC_CO_O N
sboClass SboClasses CF AC_CO_O N
d VISIBLE STRING255 DC Text O N
dU UNICODE STRING255 DC O N
cdcNs VISIBLE STRING255 EX AC_DLNDA_M N
cdcName VISIBLE STRING255 EX AC_DLNDA_M N
dataNs VISIBLE STRING255 EX AC_DLN_M N
Services
As defined in Table 31 (see IEC 61850-7-3) and Table E.3 (see IEC 61850-8-1)

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INC class
Attribute Attribute Type FC TrgOp Value/Value Range M/O/C GRE140
Name
DataName Inherited from Data Class (see IEC 61850-7-2)
DataAttribute
control and status
ctlVal INT32 CO AC_CO_M N
operTm TimeStamp CO AC_CO_O N
origin Originator CO, ST AC_CO_O N
ctlNum INT8U CO, ST 0..255 AC_CO_O N
SBO VISIBLE STRING65 CO AC_CO_SBO_N_ N
M
SBOw SBOW CO AC_CO_SBOW_ N
E_M
Oper Oper CO AC_CO _M N
Cancel Cancel CO AC_CO_SBO_N_ N
M and
AC_CO_SBOW_
E_M and
AC_CO_TA_E_
M
stVal INT32 ST dchg M Y
Q Quality ST qchg M Y
T TimeStamp ST M Y
stSeld BOOLEAN ST dchg AC_CO_O N
substitution
subEna BOOLEAN SV PICS_SUBST N
subVal INT32 SV FALSE | TRUE PICS_SUBST N
subQ Quality SV PICS_SUBST N
subID VISIBLE STRING64 SV PICS_SUBST N
configuration, description and extension
CtlModel CtlModels CF M Y
sboTimeout INT32U CF AC_CO_O N
sboClass SboClasses CF AC_CO_O N
minVal INT32 CF O N
maxVal INT32 CF O N
stepSize INT32U CF 1 … (maxVal – minVal) O N
D VISIBLE STRING255 DC Text O N
dU UNICODE STRING255 DC O N
cdcNs VISIBLE STRING255 EX AC_DLNDA_M N
cdcName VISIBLE STRING255 EX AC_DLNDA_M N
dataNs VISIBLE STRING255 EX AC_DLN_M N
Services
As defined in Table 31 (see IEC 61850-7-3) and Table E.4 (see IEC 61850-8-1)

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ING class
Attribute Attribute Type FC TrgOp Value/Value Range M/O/C GRE140
Name
DataName Inherited from Data Class (see IEC 61850-7-2)
DataAttribute
setting
setVal INT32 SP AC_NSG_M Y
setVal INT32 SG, SE AC_SG_M N
configuration, description and extension
minVal INT32 CF O N
maxVal INT32 CF O N
stepSize INT32U CF 1 … (maxVal – minVal) O N
d VISIBLE STRING255 DC Text O N
dU UNICODE DC O N
STRING255
cdcNs VISIBLE STRING255 EX AC_DLNDA_M N
cdcName VISIBLE STRING255 EX AC_DLNDA_M N
dataNs VISIBLE STRING255 EX AC_DLN_M N
Services
As defined in Table 39 (see IEC 61850-7-3)

ASG class
Attribute Attribute Type FC TrgOp Value/Value Range M/O/C GRE140
Name
DataName Inherited from Data Class (see IEC 61850-7-2)
DataAttribute
setting
setMag AnalogueValue SP AC_NSG_M Y
setMag AnalogueValue SG, SE AC_SG_M N
configuration, description and extension
units Unit CF see Annex A O Y
sVC ScaledValueConfig CF AC_SCAV Y
minVal AnalogueValue CF O N
maxVal AnalogueValue CF O N
stepSize AnalogueValue CF 1 … (maxVal – minVal) O N
d VISIBLE STRING255 DC Text O N
dU UNICODE STRING255 DC O N
cdcNs VISIBLE STRING255 EX AC_DLNDA_M N
cdcName VISIBLE STRING255 EX AC_DLNDA_M N
dataNs VISIBLE STRING255 EX AC_DLN_M N
Services
As defined in Table 42 (see IEC 61850-7-3)

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DPL class
Attribute Attribute Type FC TrgOp Value/Value Range M/O/C GRE140
Name
DataName Inherited from Data Class (see IEC 61850-7-2)
DataAttribute
configuration, description and extension
vendor VISIBLE STRING255 DC M Y
hwRev VISIBLE STRING255 DC O N
swRev VISIBLE STRING255 DC O Y
serNum VISIBLE STRING255 DC O N
model VISIBLE STRING255 DC O Y
location VISIBLE STRING255 DC O N
cdcNs VISIBLE STRING255 EX AC_DLNDA_M N
cdcName VISIBLE STRING255 EX AC_DLNDA_M N
dataNs VISIBLE STRING255 EX AC_DLN_M N
Services
As defined in Table 45 (see IEC 61850-7-3)

LPL class
Attribute Attribute Type FC TrgOp Value/Value Range M/O/C GRE140
Name
DataName Inherited from Data Class (see IEC 61850-7-2)
DataAttribute
configuration, description and extension
vendor VISIBLE STRING255 DC M Y
swRev VISIBLE STRING255 DC M Y
d VISIBLE STRING255 DC M Y
dU UNICODE STRING255 DC O N
configRev VISIBLE STRING255 DC AC_LN0_M Y
ldNs VISIBLE STRING255 EX shall be included in LLN0 only; AC_LN0_EX N
for example "IEC 61850-7-4:2003"
lnNs VISIBLE STRING255 EX AC_DLD_M N
cdcNs VISIBLE STRING255 EX AC_DLNDA_M N
cdcName VISIBLE STRING255 EX AC_DLNDA_M N
dataNs VISIBLE STRING255 EX AC_DLN_M N
Services
As defined in Table 45 (see IEC 61850-7-3)

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Logical nodes for GRE140

Logical Nodes Relay Element
PFRC
PFRC1 DFRQ1
PFRC2 DFRQ2
PFRC3 DFRQ3
PFRC4 DFRQ4
PHAR
PHAR1 ICD (2f)
PTOC
PTOC11 OC1
PTOC12 OC2
PTOC13 OC3
PTOC14 OC4
PTOC21 EF1
PTOC22 EF2
PTOC23 EF3
PTOC24 EF4
PTOC31 SEF1
PTOC32 SEF2
PTOC33 SEF3
PTOC34 SEF4
PTOC41 NOC1
PTOC42 NOC2
PTOC5 BCD
PTOF
PTOF1 FRQ1 (FRQ1EN=OF)
PTOF2 FRQ2 (FRQ2EN=OF)
PTOF3 FRQ3 (FRQ3EN=OF)
PTOF4 FRQ4 (FRQ4EN=OF)
PTOV
PTOV11 OV1
PTOV12 OV2
PTOV13 OV3
PTOV14 OV4
PTOV21 ZOV1
PTOV22 ZOV2
PTOV31 NOV1
PTOV32 NOV2
PTRC
PTRC1 General Trip
PTTR
PTTR1 THM-A, THM-T
PTUC
PTUC1 UC1
PTUC2 UC2
PTUV
PTUV11 UV1
PTUV12 UV2
PTUV13 UV3
PTUV14 UV4
PTUF
PTUF1 FRQ1 (FRQ1EN=UF)
PTUF2 FRQ2 (FRQ2EN=UF)
PTUF3 FRQ3 (FRQ3EN=UF)
PTUF4 FRQ4 (FRQ4EN=UF)

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Logical Nodes Relay Element

RBRF
RBRF1 CBF trip / CBF retrip
RFLO
RFLO1 FL
RREC
RREC1 Auto reclose
RSYN
RSYN1 SYN

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IEC61850 ACSI Conformance Statement for GRE series IED

・NTRODUCTION
This document specifies the Protocol Implementation Conformance Statement (PICS) of the IEC
61850 interface in GRE series IED with communication firmware MVM850-01 series.

Together with the MICS, the PICS forms the basis for a conformance test according to IEC
61850-10.

・CONTENTS OF THIS DOCUMENT

Each tables of this document is specified in IEC 61850-7-2 Annex A.3 “ACSI models conformance
statement”.

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Client/ Server/ IED Remarks

subscriber publisher
Client-server roles
B11 Server side (of TWO-PARTY- - c1 Y
APPLICATION-ASSOCIATION)
B12 Client side of (TWO-PARTY- c1 - -
APPLICATION-ASSOCIATION)
SCSMs supported
B21 SCSM: IEC61850-8-1 used Y
B22 SCSM: IEC61850-9-1 used N
B23 SCSM: IEC61850-9-2 used N
B24 SCSM: other -
Generic substation event model (GSE)
B31 Publisher side - O Y
B32 Subscriber side O - Y
Transmission of sampled value model (SVC)
B41 Publisher side - O N
B42 Subscriber side O - N

If Server side (B11) supported

M1 Logical device c2 c2 Y
M2 Logical node c3 c3 Y
M3 Data c4 c4 Y
M4 Data set c5 c5 Y
M5 Substitution O O N
M6 Setting group control O O Y
Reporting
M7 Buffered report control O O Y
M7-1 sequence-number Y
M7-2 report-time-stamp Y
M7-3 reason-for-inclusion Y
M7-4 data-set-name Y
M7-5 data-reference Y
M7-6 buffer-overflow Y
M7-7 entryID Y
M7-8 BufTm Y
M7-9 IntgPd Y
M7-10 GI Y
M8 Unbuffered report control O O Y
M8-1 sequence-number Y
M8-2 report-time-stamp Y
M8-3 reason-for-inclusion Y
M8-4 data-set-name Y
M8-5 data-reference Y
M8-6 BufTm Y
M8-7 IntgPd Y
M8-8 GI Y
Logging O O N
M9 Log control O O N
M9-1 IntgPd N
M10 Log O O N
M11 Control M M Y
If GSE (B31/B32) is supported
GOOSE O O Y
M12-1 entryID
M12-2 DataRefInc
M13 GSSE O O N
If SVC (B41/B42) is supported

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M14 Multicast SVC O O N

M15 Unicast SVC O O N
M16 Time M M Y
M17 File Transfer O O N
Server
S1 GetServerDirectory M Y
Application association
S2 Associate M M Y
S3 Abort M M Y
S4 Release M M Y
Logical device
S5 GetLogicalDeviceDirectory M M Y
Logical node
S6 GetLogicalNodeDirectory M M Y
S7 GetAllDataValues O M Y
Data
S8 GetDataValues M M Y
S9 SetDataValues O O N
S10 GetDataDirectory O M Y
S11 GetDataDefinition O M Y
Data set
S12 GetDataSetValues O M Y
S13 SetDataSetValues O O N
S14 CreateDataSet O O N
S15 DeleteDataSet O O N
S16 GetDataSetDirectory O O Y
Substitution
S17 SetDataValues M M N
Setting group control
S18 SelectActiveSG O O Y
S19 SelectEditSG O O N
S20 SetSGValues O O N
S21 ConfirmEditSGValues O O N
S22 GetSGValues O O N
S23 GetSGCBValues O O Y
Reporting
Buffered report control block (BRCB)
S24 Report c6 c6 Y
S24-1 data-change (dchg) Y
S24-2 quality-change (qchg) Y
S24-3 data-update (dupd) N
S25 GetBRCBValues c6 c6 Y
S26 SetBRCBValues c6 c6 Y
Unbuffered report control block (URCB)
S27 Report c6 c6 Y
S27-1 data-change (dchg) Y
S27-2 quality-change (qchg) Y
S27-3 data-update (dupd) N
S28 GetURCBValues c6 c6 Y
S29 SetURCBValues c6 c6 Y
Logging
Log control block
S30 GetLCBValues M M N
S31 SetLCBValues O M N
Log
S32 QueryLogByTime c7 M N
S33 QueryLogAfter c7 M N
S34 GetLogStatusValues M M N
Generic substation event model (GSE)

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GOOSE-CONTROL-BLOCK
S35 SendGOOSEMessage c8 c8 Y
S36 GetGoReference O c9 N
S37 GetGOOSEElementNumber O c9 N
S38 GetGoCBValues O O Y
S39 SetGoCBValues O O Y
GSSE-CONTROL-BLOCK
S40 SendGSSEMessage c8 c8 N
S41 GetGsReference O c9 N
S42 GetGSSEDataOffset O c9 N
S43 GetGsCBValues O O N
S44 SetGsCBValues O O N
Transmission of sampled value model (SVC)
Multicast SVC
S45 SendMSVMessage c10 c10 N
S46 GetMSVCBValues O O N
S47 SetMSVCBValues O O N
Unicast SVC
S48 SendUSVMessage c10 c10 N
S49 GetUSVCBValues O O N
S50 SetUSVCBValues O O N
Control
S51 Select M O Y
S52 SelectWithValue M O Y
S53 Cancel O O Y
S54 Operate M M Y
S55 CommandTermination M O N
S56 TimeActivatedOperate O O N
File Transfer
S57 GetFile O M N
S58 SetFile O O N
S59 DeleteFile O O N
S60 GetFileAttributeValues O O N
Time
T1 Time resolution of internal clock 100ms
T2 Time accuracy of internal clock 100ms
T3 Supported TimeStamp resolution 100ms
M – Mandatory
O – Optional
c1 – shall be ‘M’ if support for LOGICAL-DEVICE model has been declared.
c2 – shall be ‘M’ if support for LOGICAL-NODE model has been declared.
c3 – shall be ‘M’ if support for DATA model has been declared.
c4 – shall be ‘M’ if support for DATA-SET, Substitution, Report, Log Control, or Time model has
been declared.
c5 – shall be ‘M’ if support for Report, GSE, or SV models has been declared.
c6 – shall declare support for at least one (BRCB or URCB)
c7 – shall declare support for at least one (QueryLogByTime or QueryLogAfter).
c8 – shall declare support for at least one (SendGOOSEMessage or SendGSSEMessage)
c9 – shall declare support if TWO-PARTY association is available.
c10 – shall declare support for at least one (SendMSVMessage or SendUSVMessage).

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PICS for A-Profile support

A-Profile Profile Description Client Server IED Remarks
shortcut F/S F/S
A1 Client/server A-Profile c1 c1 Y
A2 GOOSE/GSE c2 c2 Y
management A-Profile
A3 GSSE A-Profile c3 c3 N
A4 TimeSync A-Profile c4 c4 Y
c1 Shall be ‘m’ if support for any service specified in Table 2 are declared within the ACSI basic conformance statement.
c2 Shall be ‘m’ if support for any service specified in Table 6 are declared within the ACSI basic conformance statement.
c3 Shall be ‘m’ if support for any service specified in Table 9 are declared within the ACSI basic conformance statement.
c4 Support for at least one other A-Profile shall be declared (e.g. in A1-A3) in order to claim conformance to IEC 61850-8-1.

PICS for T-Profile support

A-Profile Profile Description Client Server IED Remarks
shortcut F/S F/S
T1 TCP/IP T-Profile c1 c1 Y
T2 OSI T-Profile c2 c2 N
T3 GOOSE/GSE T-Profile c3 c3 Y
T4 GSSE T-Profile c4 c4 N
T5 TimeSync T-Profile o o Y
c1 Shall be ‘m’ if support for A1 is declared. Otherwise, shall be 'i'.
c2 Shall be ‘o’ if support for A1 is declared. Otherwise, shall be 'i'.
c3 Shall be ‘m’ if support for A2 is declared. Otherwise, shall be 'i'.
c4 Shall be ‘m’ if support for A3 is declared. Otherwise, shall be 'i'.

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Protcol Implementation eXtra Information for Testing (PIXIT) for IEC61850 interface in GRE series IED

・Introduction
This document specifies the protocol implementation extra information for testing (PIXIT) of the
IEC 61850 interface in GRE series IED with communication firmware MVM850-01 series version
upper than A (MVM850-01-A).

Together with the PICS and the MICS the PIXIT forms the basis for a conformance test according
to IEC 61850-10.

・Contents of this document

Each chapter specifies the PIXIT for each applicable ACSI service model as structured in IEC
61850-10.

PIXIT for Association model

ID Description Value / Clarification

As1 Maximum number of clients that can set-up 6
an association simultaneously
As2 TCP_KEEPALIVE value 7200 seconds at the default setting.
Setting range is from 1s to 43200s.
As3 Lost connection detection time After the KEEPALIVE is no response, retrying 9 times
every “X” seconds until declaring that the association
has been lost.
“X” is one tenth of TCP_KEEPALIVE value.
Ex. The lost connection detection time is 18s
(9 times x 2 s), when TCP_KEEPALIVE value is 20 s.
As4 Is authentication supported N
As5 What association parameters are necessary for Transport selector N
successful association Session selector N
Presentation selector N
AP Title N
AE Qualifier N
As6 If association parameters are necessary for N.A.
association, describe the correct values e.g.
As7 What is the maximum and minimum MMS Max MMS PDU size 8172
PDU size Min MMS PDU size Not limited. It
depends on a request.
As8 What is the maximum startup time after a 180 seconds
power supply interrupt Check the start-up signal
(No.1062)

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PIXIT for Server model

ID Description Value / Clarification

Sr1 Which analogue value (MX) quality bits are Validity:
supported (can be set by server) Y Good,
Y Invalid,
N Reserved,
Y Questionable
N Overflow
Y OutofRange
N BadReference
N Oscillatory
Y Failure
N OldData
N Inconsistent
N Inaccurate (Only Hz)
Source:
N Process
N Substituted
Y Test
N OperatorBlocked
Sr2 Which status value (ST) quality bits are Validity:
supported (can be set by server) Y Good,
Y Invalid,
N Reserved,
Y Questionable
N BadReference
N Oscillatory
Y Failure
N OldData
N Inconsistent
N Inaccurate
Source:
N Process
N Substituted
Y Test
N OperatorBlocked
Sr3 What is the maximum number of data values in Not restricted; depend on the max. MAX PDU size
one GetDataValues request given in previous page.
Sr4 What is the maximum number of data values in N.A.
one SetDataValues request
Sr5 Which Mode / Behavior values are supported On Y
Blocked N
Test Y
Test/Blocked N
Off N

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PIXIT for Data set model

ID Description Value / Clarification

Ds1 What is the maximum number of data Not limited by an internal configuration parameter.
elements in one data set (compare ICD
setting) This IED does not have CreateDataSet service. But
any DataSet can be defined by using engineering
tool. The maximum number depends on the memory
size of IED.
Ds2 How many persistent data sets can be created Not limited by an internal configuration parameter.
by one or more clients
(this number includes predefined datasets) The maximum number depends on the memory size
of IED.
Ds3 How many non-persistent data sets can be N.A.
created by one or more clients

PIXIT for Substitution model

ID Description Value / Clarification

Sb1 Are substituted values stored in volatile N.A.
memory?

PIXIT for Setting group control model

ID Description Value / Clarification

Sg1 What is the number of supported setting 2
groups for each logical device (compare
NumSG in the SGCB)
Sg2 What is the effect of when and how the Just SelectActiveSG service will be supported
non-volatile storage is updated according to PICS.
(compare IEC 61850-8-1 $16.2.4) After changing setting group number with LCD
panel, you can see new setting group with
GetSGCBValue service.
Sg3 Can multiple clients edit the same setting N.A.
group
Sg4 What happens if the association is lost while N.A.
editing a setting group
Sg5 Is EditSG value 0 allowed? N.A.

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PIXIT for Reporting model

ID Description Value / Clarification

Rp1 The supported trigger conditions are integrity Y
(compare PICS) data change Y
quality change Y
data update N
general interrogation Y
Rp2 The supported optional fields are sequence-number Y
report-time-stamp Y
reason-for-inclusion Y
data-set-name Y
data-reference Y
buffer-overflow Y
entryID Y
conf-rev Y
segmentation Y
Rp3 Can the server send segmented reports Y
Rp4 Mechanism on second internal data change Send report immediately
notification of the same analogue data value
within buffer period (Compare IEC 61850-7-2
$14.2.2.9)
Rp5 Multi client URCB approach Each URCB is visible to all clients
(compare IEC 61850-7-2 $14.2.1)
Rp6 What is the format of EntryID It is made up of the circular buffer counter at the
time the event was entered.
Rp7 What is the buffer size for each BRCB or how For example, LLN0$ST$Health can be stored 40
many reports can be buffered events.
Rp8 Pre-configured RCB attributes that cannot be N.A.
changed online when RptEna = FALSE
(see also the ICD report settings)
Rp9 May the reported data set contain:
- structured data objects? Y
- data attributes? Y
Rp10 What is the scan cycle for binary events? More than 200 milliseconds
Is this fixed, configurable Fixed
Rp11 Does the device support to pre-assign a RCB N
to a specific client in the SCL

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PIXIT for Logging model

ID Description Value / Clarification

Lg1 What is the default value of LogEna N.A.
(Compare IEC 61850-8-1 $17.3.3.2.1, the
default value should be FALSE)
Lg2 What is the format of EntryID N.A.
(Compare IEC 61850-8-1 $17.3.3.3.1)
Lg3 If there are multiple Log Control Blocks that N.A.
specify the Journaling of the same MMS
NamedVariable and TrgOps and the Event
Condition
(Compare IEC 61850-8-1 $17.3.3.3.2)
Lg4 Pre-configured LCB attributes that cannot be N.A.
changed online

PIXIT for Generic substation events model

ID Description Value / Clarification
Go1 What elements of a subscribed GOOSE N source MAC address
header are checked to decide the message Y destination MAC address
is valid and the allData values are = as configured
accepted? If yes, describe the conditions. Y Ethertype = 0x88B8
Note: the VLAN tag may be removed by Y APPID = as configured and 0
a ethernet switch and should not be Y gocbRef = as configured
checked N timeAllowedtoLive
N datSet
Y goID = as configured
N t
N stNum
Y sqNum
Y test
N confRev
Y ndsCom
N numDatSetEntries
Go2 Can the test flag in the published GOOSE N
be turned on / off
Go3 What is the behavior when the GOOSE If the configuration is incorrect, the GOOSE isn’t
publish configuration is incorrect published.
Go4 When is a subscribed GOOSE marked as Message does not arrive prior to TAL.
lost?
(TAL = time allowed to live value from
the last received GOOSE message)
Go5 What is the behavior when one or more [stNum is out-of-order, or missed]
subscribed GOOSE messages isn’t No fail will be detected.
received or syntactically incorrect
(missing GOOSE) [sqNum is out-of-order, or missed]
GOOSE subscribe quality information will become
QUESTIONABLE | INCONSISTENT (=1100 0000
1000 0). After receiving message with correct sqNum
order, the quality information is set to GOOD (=0000
0000 0000 0).
Go6 What is the behavior when a subscribed Refer to Go5.
GOOSE message is out-of-order
Go7 What is the behavior when a subscribed GOOSE subscribe quality information will become
GOOSE message is duplicated QUESTIONABLE | INCONSISTENT (=1100 0000 1000 0).

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ID Description Value / Clarification

Go8 Does the device subscribe to GOOSE Y, with the VLAN tag
messages with/without the VLAN tag? Y, without the VLAN tag
Go9 May the GOOSE data set contain: Subscribed Published
- structured data objects (FCD)? Y N
- timestamp data attributes? N N
Note: data attributes (FCDA) is
mandatory
Go10 Published FCD supported common data -
classes / data types are
Go11 Subscribed FCD supported common data -
classes / data types are
Go12 What is the slow retransmission time? 60 seconds with TAL = 120 seconds
Is it fixed or configurable? Fixed.
Go13 What is the minimum supported <minTime>
retransmission time? 300 milliseconds
What is the maximum supported <maxTime>
retransmission time? -
Is it fixed or configurable? Fixed
Go14 Can the Goose publish be turned on / off Y
by using SetGoCBValues(GoEna)
Go15 What is the fast retransmission scheme? 300 milliseconds with TAL = 600 milliseconds
Is it fixed or configurable? Fixed.
Go16 What is the behavior when one When expected time (TAL) spends without GOOSE
subscribed GOOSE message exceeds the message, GOOSE subscribe quality information will
previous time Allowed to Live (TAL) become QUESTIONABLE (=1100 0000 0000 0).

After that, when IED receive time exceeded GOOSE with

SqNum=0, GOOSE subscribe quality information will
become GOOD (=0000 0000 0000 0).

When IED receive time exceeded GOOSE with

SqNum!=0, GOOSE subscribe quality information will
become QUESTIONABLE | INCONSISTENT (=1100
0000 1000 0)

When GOOSE with TAL=0 is received, GOOSE subscribe

quality information will become QUESTIONABLE |
INCONSISTENT (=1100 0000 1000 0)

Payload data consistency is not used to determine if TAL is

exceeded.
Go17 What is the behavior when a subscribed GOOSE subscribe quality information will become
GOOSE message is “test” QUESTIONABLE | TEST (=1100 0000 0001 0).
Payload data is not received.
Go18 What is the behavior when a subscribed GOOSE subscribe quality information will become
GOOSE message is “ndsCom” QUESTIONABLE | INACCURATE (=1100 0000 0100
0).
Payload data is not received.
Go19 Acceptable data type Boolean
BitSring
Integer
Unsigned Integer

But each data size shall be less than 32 bits.

Other types (TimeStamp, OctetString, etc) will be

ignored by IED.
When GOOSE subscribe quality information is GOOD,

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ID Description Value / Clarification

the IED receives the payload data.
Go20 Dataset structure of a subscribed GOOSE This is not checked. Two GOOSEs, which have same
header (e.g.GoID) and different dataset structure, are
treated as the same GOOSEs.

And if received GOOSEs have same header, the fixed

position of the GOOSE dataset is read. E.g. the 1st
element of the dataset is set to read, it keeps reading the
1st element even if the dataset structure is different.

Note:
Subscribed payload data structure is checked to
determine if IED accepts/discards the data; however the
TAL timeout is reset even when such data is discarded.
Go21 What is the behavior when the device The device starts sending GOOSE from stNum=1 and
starts up? sqNum=1.
Go22 Is it supported to set the “ndsCom” as N
TRUE?

TAL = Time Allowed to Live

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PIXIT for Control model

ID Description Value / Clarification

Ct1 What control models are supported Y status-only
(compare PICS) Y direct-with-normal-security
Y sbo-with-normal-security
N direct-with-enhanced-security
N sbo-with-enhanced-security
Ct2 Is the control model fixed, configurable Configurable
and/or online changeable? (need to restart after configuration)
Ct3 Is Time activated operate supported N
Ct4 Is “operate-many” supported N
Ct5 Will the DUT activate the control output N
when the test attribute is set in the Test flag FALSE TRUE
SelectWithValue and/or Operate request IED
(when N test procedure Ctl2 is applicable) Mode
Normal Accepted Rejected
Test Rejected Accepted
Accepted:
The control request is accepted by IED.
Rejected:
The control request is rejected by IED with
AddCause “Blocked-by-Mode”.
Ct6 What are the conditions for the time (T) N.A.
attribute in the SelectWithValue and/or
Operate request?
Ct7 Is pulse configuration supported N
Ct8 What is the behavior of the DUT when the Only interlock bit is checked.
check conditions are set? This behavior is fixed.
Is this behavior fixed, configurable, online
changeable? Note:
When interlock is an enable, the control request is
rejected by IED with AddCause
“Blocked-by-Interlocking”.
Ct9 What additional cause diagnosis are Y Not-supported
supported? N Blocked-by-switching-hierarchy
Y Select-failed
N Invalid-position
N Position-reached
N Parameter-change-in-execution
N Step-limit
Y Blocked-by-Mode
N Blocked-by-process
Y Blocked-by-interlocking
N Blocked-by-synchrocheck
N Command-already-in-execution
N Blocked-by-health
N 1-of-n-control
N Abortion-by-cancel
N Time-limit-over
N Abortion-by-trip (only for BCPU)
Y Object-non-selected
Ct10 How to force a “test-not-ok” respond with Set orCat with unsupported value.
SelectWithValue request?
Ct11 How to force a “test-not-ok” respond with N.A.
Select request?
Ct12 How to force a “test-not-ok” respond with DOns, SBOns:

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ID Description Value / Clarification

Operate request? Set orCat with unsupported value.
DOes, SBOes: N.A.
Ct13 Which origin categories are supported? N
Ct14 What happens if the orCat is not supported? DOns, SBOns:
“test-not-ok” IED respond
DOes, SBOes: N.A.
Ct15 Does the IED accept a SelectWithValue/Operate DOns, SBOns: N
with the same ctlVal as the current status value? The control request is rejected by IED with
AddCause “Blocked-by-Interlocking”.
DOes, SBOes: N.A.
Ct16 Does the IED accept a select/operate on the DOns,: Y
same control object from 2 different clients at SBOns: N
the same time? DOes, SBOes: N.A.
Ct17 Does the IED accept a Select/SelectWithValue SBOns: N
from the same client when the control object SBOes: N.A.
is already selected (tissue 334)
Ct18 Is for SBOes the internal validation N.A.
performed during the SelectWithValue and/or
Operate step?
Ct19 Can a control operation be blocked by Y
Mod=Off or Blocked
Ct20 Does the IED support local / remote operation? Y
Ct21 Does the IED send an InformationReport with DOns: N
LastApplError as part of the Operate SBOns: Y
response- for control with normal security?

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PIXIT for TIME AND TIME SYNCHONISATION model

ID Description Value / Clarification

Tm1 What quality bits are supported (may be set N LeapSecondsKnown
by the IED) N ClockFailure
Y ClockNotSynchronized
Tm2 Describe the behavior when the time The quality attribute “ClockNotSynchronized” will be
synchronization signal/messages are lost set to TRUE.
Tm3 When is the time quality bit "Clock failure" N.A.
set?
Tm4 When is the time quality bit "Clock not It depends on the condition of synchronization.
synchronised” set? Typically 120 seconds
Tm5 Is the timestamp of a binary event adjusted N
to the configured scan cycle?
Tm6 Does the device support time zone and Y
daylight saving? Support time zone only.
Tm7 Which attibutes of the SNTP response Y Leap indicator not equal to 3?
packet are validated? N Mode is equal to SERVER
N OriginateTimestamp is equal to
value sent by the SNTP client as
Transmit Timestamp
Y RX/TX timestamp fields are checked for
reasonableness
Y SNTP version 3 and/or 4
N other (describe)

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PIXIT for FILE TRANSFER model

ID Description Value / Clarification

Ft1 What is structure of files and directories? N.A.

Where are the COMTRADE files stored?

Are comtrade files zipped and what files are

included in each zip file?
Ft2 Directory names are separated from the file N.A.
name by
Ft3 The maximum file name size including path N.A.
(recommended 64 chars)
Ft4 Are directory/file name case sensitive? N.A.
Ft5 Maximum file size N.A.
Ft6 Is the requested file path included in the file N.A.
name of the MMS fileDirectory respond?
Ft7 Is the wild char supported MMS fileDirectory N.A.
request?
Ft8 Is it allowed that 2 client get a file at the same N.A.
time?

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IEC61850 Tissues conformance statement (TICS) of the IEC61850 communication interface GRE series IED

・Introduction

According to the UCA IUG QAP the tissue conformance statement is required to perform a
conformance test and is referenced on the certificate.

This document is applicable for GRE series IED with communication firmware MVM850-01 series
version upper than A (MVM850-01-A).

・Mandatory Intop Tissues

During the October 2006 meeting IEC TC57 working group 10 decided that:
• green Tissues with the category “IntOp” are mandatory for IEC 61850 edition 1
• Tissues with the category “Ed.2” Tissues should not be implemented.
Below table gives an overview of the implemented IntOp Tissues.

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Part Tissue Description

Nr Implemented Y/n.a.

8-1 116 GetNameList with empty response? Y

165 Improper Error Response for GetDataSetValues Y
183 GetNameList error handling Y
7-4 None
7-3 28 Definition of APC n.a.
54 Point def xVal, not cVal n.a.
55 Ineut = Ires ? n.a.
60 Services missing in tables Y
63 mag in CDC CMV Y
65 Deadband calculation of a Vector and trigger option Y
219 operTm in ACT n.a.
270 WYE and DEL rms values Y
7-2 30 control parameter T n.a
31 Typo n.a.
32 Typo in syntax n.a.
35 Typo Syntax Control time n.a.
36 Syntax parameter DSet-Ref missing n.a.
37 Syntax GOOSE "T" type n.a.
39 Add DstAddr to GoCB Y
40 GOOSE Message “AppID” to “GoID” Y
41 GsCB “AppID” to “GsID” n.a.
42 SV timestamp: “EntryTime” to “TimeStamp" n.a.
43 Control "T" semantic n.a.
44 AddCause - Object not sel n.a.
45 Missing AddCauses (neg range) Y
46 Synchro check cancel n.a.
47 "." in LD Name? Y
49 BRCB TimeOfEntry (part of #453) Y
50 LNName start with number? Y
51 ARRAY [0..num] missing n.a.
52 Ambiguity GOOSE SqNum Y
53 Add DstAddr to GsCB, SV n.a.
151 Name constraint for control blocks etc. Y
166 DataRef attribute in Log n.a.
185 Logging - Integrity periode n.a.
189 SV Format n.a.
190 BRCB: EntryId and TimeOfEntry (part of #453) Y
191 BRCB: Integrity and buffering reports (part of #453) Y
234 New type CtxInt (Enums are mapped to 8 bit integer) n.a.
275 Confusing statement on GI usage (part of #453) Y
278 EntryId not valid for a server (part of #453) Y
Part 6 1 Syntax Y
5 tExtensionAttributeNameEnum is restricted Y
8 SIUnit enumeration for W n.a.
10 Base type for bitstring usage Y
17 DAI/SDI elements syntax Y
169 Ordering of enum differs from 7-3 Y

NOTE: Tissue 49, 190, 191, 275 and 278 are part of the optional tissue #453, all other technical
tissues in the table are mandatory if applicable.

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Optional IntOp Tissues

After the approval of the server conformance test procedures version 2.2 the following IntOp
tissues were added or changed. It is optional to implement these tissues.

Part Tissue Nr Description Implemented

Y/N/n.a.
8-1 246 Control negative response (SBOns) with LastApplError Y
8-1 545 Skip file directories with no files n.a
7-2 333 Enabling of an incomplete GoCB n.a.
7-2 453 Combination of all reporting and logging tissues N
6 245 Attribute RptId in SCL N
6 529 Replace sev - Unknown by unknown n.a.

Other Implemented Tissues

Part Tissue Nr Description Implemented

Y/N/n.a.
8-1 109 GOOSE, GSE, SV Addresses Y
118 File directory n.a.
121 GOOSE subscriber behavior Y
344 TimeOfEntry misspelled Y
7-4 76 CBOpCap and SwOpCap N
7-2 38 Syntax "AppID" or "GoID" Y
6 3 Missing ENUMs Y
6 ReportControl/OptFields N
7 Duplication of attributes N
11 Schema for IP Addr? N
15 bufOvfl in Schema? Y

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2. CB remote control

To control the CB at remote site with the IEC 61850 communication, do the following.

･Operation item
- Remote control by the Select Before Operate or Direct Operate (CB Open / CB Close)
- Change of interlock position (BlkOpn or BlkCls)
- Trip LED reset

・Operating procedure
To control the CB at remote site with ICE 61850 communication is require the following three
steps.
- get Logical nodes by using IEC 61850 data setting tools (such as TAMARACK tool).
- change the control logical node (XCBR, CILO or CSWI).

When CB is remote controlled from PC, showing below the control reaction depending on the CB
Status.

CB Status Response
BI-b CB LED
BI-a (CB_CLC_BI CB Open Operation CB Close Operation
(CB_OPC_BI)
)
lighting
・Unlock: operate ・Unlock: not operate
0 0 CLOSE
・Lock※: not operate ・Lock: not operate
・Unlock: operate ・Unlock: not operate
1 0 CLOSE
・Lock: not operate ・Lock: not operate
・Unlock: not operate ・Unlock: not operate
1 1 CLOSE
・Lock: not operate ・Lock: not operate
・Unlock: not operate ・Unlock: operate
0 1 OPEN
・Lock: not operate ・Lock: not operate

※Lock condition is as follows.

• Setting the Inter lock in the Control screen of front panel LCD (see chapter 4.2.6.11) and
remote setting the CB open lock and CB close lock from PC.
• Occurring Relay Trip.
• When Local/Remote status is “Local” (see chapter 4.2.7.1).
When Control status is “Disable” (see chapter 4.2.6.11).

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3. Setting for the report (Dead band feature)

The data collected in the metering function will be sent to the network upward, but the
data sent may give the network a heavy burden because the amount of the data sent
could be larger. Thus, the dead band (SD) feature is designed not to send unnecessary
data will not be sent (say, the dead band feature regulates not to send the same data
repeatedly). In practice the analog values in the metering are not always the same; hence,
the regulation for not sending is defined by the user can change it using a setting in each
power quantity.

Counting operation in SD feature

Figure 3.1 illustrates the operation for the SD feature about entering a current. At
Time=0, the current enters into the VCT and it is observed (Time=0). When the entering
current is being beyond the upper limit (Time=a), a repeated number is set for ‘1’. If the
entering current is out of the upper and lower limits (Time=b), the repeat number gets to
have ‘2’. Note that the repeated number is kept to have ‘2’ even if the entering current
goes back within the upper and lower limits (Time=c). The repeated number gets to be
larger than the setting [Period SD]=3 (Time=d), when the entering current is above the
upper and lower limits again. Then, at Time=e, the value of the entering current will be
sent to the network, because the repeated number is incremented. After that, the
repeated number will be set zero (0); the new positon for the SD feature is set (i.e., from
Time=e).
Entering current (I)

Following SD position with [ISD]

Upper limit

First SD position with [ISD] First SD standardization level

Lower limit

Repeat number
4
3
2
1
0 Time
a b c d e f g h i j k
Figure 3.1 Dead band operation with [PeriodSD]=3

Check cycle in SD feature

The check cycle is defined for 500 milliseconds in the SD feature. (i.e., interval ab in
Figure 3.1 is equal to 500ms). If the entering current, in Figure 3.1, is required to send
promptly when the entering current is beyond the limits, set 0 for the setting [Period SD].

Setting bands for the operation

As illustrated in Figure 3.1, with regard to the entering current the user can define the
upper limit and lower limit using the setting [ISD] in %. The limit-size of the SD feature is
calculated based on the amount of the entering current. Table 0-1 shows respective
settings for the power quantities.
Table 0-1 SD settings for respective quantities
Units for
Quantities SD settings Setting ranges
settings

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Units for
Quantities SD settings Setting ranges
settings
Voltage VSD % 0% to 50%

Current ISD % 0% to 50%

Active/Reactive/Apparent power PQSSD – 0% to 50%

Power factor PFSD – 0.00 to 1.00

Frequencty FSD % 0% to 30%

Watt-hour/var-hour WhvhSD – 0 to 999

Phase PhaseSD Degree 0.0 deg. to 90.0 deg.

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Appendix Q
IEC 61850 MICS & MIPS

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MICS: IEC61850 Model Implementation Conformance Statement

The GRE140 relay supports IEC 61850 logical nodes and common data classes as indicated in the
following tables.
Logical nodes in IEC 61850-7-4
Logical Nodes GRE140 Logical Nodes GRE140
L: System Logical Nodes GSAL ---
LPHD Yes I: Logical Nodes for Interfacing and archiving
Common Logical Node Yes IARC ---
LLN0 Yes IHMI ---
P: Logical Nodes for Protection functions ITCI ---
PDIF --- ITMI ---
PDIR --- A: Logical Nodes for Automatic control
PDIS --- ANCR ---
PDOP --- ARCO ---
PDUP --- ATCC ---
PFRC Yes AVCO ---
PHAR Yes M: Logical Nodes for Metering and measurement
PHIZ ---
MDIF ---
PIOC ---
PMRI --- MHAI ---
PMSS --- MHAN ---
POPE --- MMTR ---
PPAM --- MMXN ---
PSCH --- MMXU Yes
PSDE --- MSQI Yes
PTEF --- MSTA ---
PTOC Yes S: Logical Nodes for Sensors and monitoring
PTOF Yes SARC ---
PTOV Yes SIMG ---
PTRC Yes SIML ---
PTTR Yes SPDC ---
PTUC Yes X: Logical Nodes for Switchgear
PTUV Yes XCBR Yes
PUPF --- XSWI ---
PTUF Yes T: Logical Nodes for Instrument transformers
PVOC --- TCTR ---
PVPH --- TVTR ---
PZSU --- Y: Logical Nodes for Power transformers
R: Logical Nodes for protection related functions YEFN ---
RDRE --- YLTC ---
RADR --- YPSH ---
RBDR --- YPTR ---
RDRS --- Z: Logical Nodes for Further power system equipment
RBRF Yes ZAXN ---
RDIR --- ZBAT ---
RFLO Yes ZCAB ---
RPSB --- ZCAP ---
RREC Yes ZCON ---
RSYN Yes ZGEN ---
C: Logical Nodes for Control ZGIL ---
CALH --- ZLIN ---
CCGR --- ZMOT ---
CILO Yes ZREA ---
CPOW --- ZRRC ---
CSWI Yes ZSAR ---
G: Logical Nodes for Generic references ZTCF ---
GAPC --- ZTCR ---
GGIO Yes
GGIO_GOOSE Yes

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Common data classes (see IEC61850-7-3)

Common data classes GRE140
Status information
SPS Yes
DPS ---
INS Yes
ACT Yes
ACT_ABC Yes
ACD Yes
ACD_ABC Yes
SEC ---
BCR ---
Measured information
MV Yes
CMV Yes
SAV ---
WYE ---
WYE_ABCN Yes
DEL Yes
SEQ Yes
HMV ---
HWYE ---
HDEL ---
Controllable status information
SPC Yes
DPC Yes
INC Yes
BSC ---
ISC ---
Controllable analogue information
APC ---
Status settings
SPG ---
ING Yes
Analogue settings
ASG Yes
CURVE ---
Description information
DPL Yes
LPL Yes
CSD ---

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LPHD class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC 61850-7-2)
Data
PhyName DPL Physical device name plate M Y
PhyHealth INS Physical device health M Y
OutOv SPS Output communications buffer overflow O N
Proxy SPS Indicates if this LN is a proxy M Y
InOv SPS Input communications buffer overflow O N
NumPwrUp INS Number of Power ups O N
WrmStr INS Number of Warm Starts O N
WacTrg INS Number of watchdog device resets detected O N
PwrUp SPS Power Up detected O N
PwrDn SPS Power Down detected O N
PwrSupAlm SPS External power supply alarm O N
RsStat SPC Reset device statistics T O N

Common Logical Node class

Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC
61850-7-2)
Data
Mandatory Logical Node Information (Shall be inherited by ALL LN but LPHD)
Mod INC Mode M Y
Beh INS Behaviour M Y
Health INS Health M Y
NamPlt LPL Name plate M Y
Optional Logical Node Information
Loc SPS Local operation O N
EEHealth INS External equipment health O N
EEName DPL External equipment name plate O N
OpCntRs INC Operation counter resetable O N
OpCnt INS Operation counter O N
OpTmh INS Operation time O N
Data Sets (see IEC 61850-7-2)
Inherited and pecialized from Logical Node class (see IEC 61850-7-2)
Control Blocks (see IEC 61850-7-2)
Inherited and pecialized from Logical Node class (see IEC 61850-7-2)
Services (see IEC 61850-7-2)
Inherited and pecialized from Logical Node class (see IEC 61850-7-2)

LLNO class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC
61850-7-2)
Data
Common Logical Node Information
LN shall inherit all Mandatory Data from Common Logical Node Class M
Loc SPS Local operation for complete logical device O Y
OpTmh INS Operation time O N
Controls
Diag SPC Run Diagnostics O Y
LEDRs SPC LED reset T O Y

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PFRC class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC
61850-7-2)
Data
Common Logical Node Information
LN shall inherit all Mandatory Data from Common Logical Node Class M
OpCntRs INC Resetable operation counter O N
Status Information
Str ACD Start M Y
Op ACT Operate T M Y
BlkV SPS Blocked because of voltage O Y
Settings
StrVal ASG Start Value df/dt O Y
BlkVal ASG Voltage Block Value O Y
OpDITmms ING Operate Delay Time O N
RsDITmms ING Reset Delay Time O N

PHAR class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC
61850-7-2)
Data
Common Logical Node Information
LN shall inherit all Mandatory Data from Common Logical Node Class M
OpCntRs INC Resetable operation counter O N
Status Information
Str ACD_ABC Start M Y
Settings
HarRst ING Number of hamonic restrained O N
PhStr ASG Start Value O Y
PhStop ASG Stop Value O N
OpDITmms ING Operate Delay Time O N
RsDITmms ING Reset Delay Time O N

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PTOC class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC
61850-7-2)
Data
Common Logical Node Information
LN shall inherit all Mandatory Data from Common Logical Node Class M
OpCntRs INC Resetable operation counter O N
Status Information
Str ACD_ABC Start M Y
Op ACT_ABC Operate T M Y
TmASt CSD Active curve characteristic O N
Settings
TmACrv CURVE Operating Curve Type O N
StrVal ASG Start Value O Y
TmMult ASG Time Dial Multiplier O N
MinOpTmms ING Minimum Operate Time O N
MaxOpTmms ING Maximum Operate Time O N
OpDITmms ING Operate Delay Time O Y
TypRsCrv ING Type of Reset Curve O N
RsDITmms ING Reset Delay Time O N
DirMod ING Directional Mode O N

PTOF class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC 61850-7-2)
Data
Common Logical Node Information
LN shall inherit all Mandatory Data from Common Logical Node Class M
OpCntRs INC Resetable operation counter O N
Status Information
Str ACD Start M Y
Op ACT Operate T M Y
BlkV SPS Blocked because of voltage O Y
Settings
StrVal ASG Start Value (frequency) O Y
BlkVal ASG Voltage Block Value O Y
OpDITmms ING Operate Delay Time O Y
RsDITmms ING Reset Delay Time O N

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PTOV class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC
61850-7-2)
Data
Common Logical Node Information
LN shall inherit all Mandatory Data from Common Logical Node Class M
OpCntRs INC Resetable operation counter O N
Status Information
Str ACD_ABC Start M Y
Op ACT_ABC Operate T O Y
TmVSt CSD Active curve characteristic O N
Settings
TmVCrv CURVE Operating Curve Type O N
StrVal ASG Start Value O Y
TmMult ASG Time Dial Multiplier O N
MinOpTmms ING Minimum Operate Time O N
MaxOpTmms ING Maximum Operate Time O N
OpDlTmms ING Operate Delay Time O Y
RsDlTmms ING Reset Delay Time O N

PTRC class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC
61850-7-2)
Data
Common Logical Node Information
LN shall inherit all Mandatory Data from Common Logical Node Class M
OpCntRs INC Resetable operation counter O N
Status Information
Tr ACT_ABC Trip C Y
Op ACT Operate (combination of subscribed Op from protection C N
functions)
Str ACD Sum of all starts of all connected Logical Nodes O N
Settings
TrMod ING Trip Mode O N
TrPlsTmms ING Trip Pulse Time O N

Condition C: At least one of the two status information (Tr, Op) shall be used.

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PTTR class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC
61850-7-2)
Data
Common Logical Node Information
LN shall inherit all Mandatory Data from Common Logical Node Class M
OpCntRs INC Resetable operation counter O N
Measured Values
Amp MV Current for thermal load model O N
Tmp MV Temperature for thermal load O N
TmpRl MV Relation between temperature and max. temperature O N
LodRsvAlm MV Load reserve to alarm O N
LodRsvTr MV Load reserve to trip O N
AgeRat MV Ageing rate O N
Status Information
Str ACD Start O Y
Op ACT Operate T M Y
AlmThm ACT Thermal Alarm O Y
TmTmpSt CSD Active curve characteristic O N
TmASt CSD Active curve characteristic O N
Settings
TmTmpCrv CURVE Characteristic Curve for temperature measurement O N
TmACrv CURVE Characteristic Curve for current measurement /Thermal model O N
TmpMax ASG Maximum allowed temperature O N
StrVal ASG Start Value O Y
OpDlTmms ING Operate Delay Time O N
MinOpTmms ING Minimum Operate Time O N
MaxOpTmms ING Maximum Operate Time O N
RsDlTmms ING Reset Delay Time O N
ConsTms ING Time constant of the thermal model O N
AlmVal ASG Alarm Value O N

PTUC class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC
61850-7-2)
Data
Common Logical Node Information
LN shall inherit all Mandatory Data from Common Logical Node Class M
OpCntRs INC Resetable operation counter O N
Status Information
Str ACD_ABC Start M Y
Op ACT_ABC Operate T O Y
TmVSt CSD Active curve characteristic O N
Settings
TmACrv CURVE Operating Curve Type O N
StrVal ASG Start Value O Y
OpDlTmms ING Operate Delay Time O Y
TmMult ASG Time Dial Multiplier O N
MinOpTmms ING Minimum Operate Time O N
MaxOpTmms ING Maximum Operate Time O N
TypRsCrv ING Type of Reset Curve O N
RsDlTmms ING Reset Delay Time O N
DirMod ING Directional Mode O N

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PTUV class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC
61850-7-2)
Data
Common Logical Node Information
LN shall inherit all Mandatory Data from Common Logical Node Class M
OpCntRs INC Resetable operation counter O N
Status Information
Str ACD_ABC Start M Y
Op ACT_ABC Operate T M Y
TmVSt CSD Active curve characteristic O N
Settings
TmVCrv CURVE Operating Curve Type O N
StrVal ASG Start Value O Y
TmMult ASG Time Dial Multiplier O N
MinOpTmms ING Minimum Operate Time O N
MaxOpTmms ING Maximum Operate Time O N
OpDlTmms ING Operate Delay Time O Y
RsDlTmms ING Reset Delay Time O N

PTUF class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC
61850-7-2)
Data
Common Logical Node Information
LN shall inherit all Mandatory Data from Common Logical Node Class M
OpCntRs INC Resetable operation counter O N
Status Information
Str ACD Start M Y
Op ACT Operate T M Y
BlkV SPS Blocked because of voltage O Y
Settings
StrVal ASG Start Value (frequency) O Y
BlkVal ASG Voltage Block Value O Y
OpDlTmms ING Operate Delay Time O Y
RsDlTmms ING Reset Delay Time O N

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RBRF class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC
61850-7-2)
Data
Common Logical Node Information
LN shall inherit all Mandatory Data from Common Logical Node Class M
OpCntRs INC Resetable operation counter O N
Status Information
Str ACD Start, timer running M Y
OpEx ACT Breaker failure trip (“external trip”) T M Y
OpIn ACT Operate, retrip (“internal trip”) O Y
Settings
FailMod ING Breaker Failure Detection Mode (current, breaker status, both, Y
O
other)
FailTmms ING Breaker Failure Time Delay for bus bar trip O Y
SPlTrTmms ING Single Pole Retrip Time Delay O N
TPTrTmms ING Three Pole Retrip Time Delay O N
DetValA ASG Current Detector Value O Y
ReTrMod ING Retrip Mode O N
Condition C: At least one of either data shall be used depending on the applied tripping schema.
RFLO class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC
61850-7-2)
Data
Common Logical Node Information
LN shall inherit all Mandatory Data from Common Logical Node Class M
OpCntRs INC Resetable operation counter O N
Status Information
Str ACD Start, timer running M Y
OpEx ACT Breaker failure trip (“external trip”) T M Y
OpIn ACT Operate, retrip (“internal trip”) O Y
Settings
FailMod ING Breaker Failure Detection Mode (current, breaker status, both, Y
O
other)
FailTmms ING Breaker Failure Time Delay for bus bar trip O Y
SPlTrTmms ING Single Pole Retrip Time Delay O N
TPTrTmms ING Three Pole Retrip Time Delay O N
DetValA ASG Current Detector Value O Y
ReTrMod ING Retrip Mode O N

CILO class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC
61850-7-2)
Data
Common Logical Node Information
LN shall inherit all Mandatory Data from Common Logical Node Class M
Status Information
EnaOpn SPS Enable Open M Y
EnaCls SPS Enable Close M Y

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 6 F 2 T 0 1 7 7

CSWI class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC
61850-7-2)
Data
Common Logical Node Information
LN shall inherit all Mandatory Data from Common Logical Node Class M
Loc SPS Local operation O N
OpCntRs INC Resetable operation counter O N
Controls
Pos DPC Switch, general M Y
PosA DPC Switch L1 O N
PosB DPC Switch L2 O N
PosC DPC Switch L3 O N
OpOpn ACT Operation “Open Switch” T O N
OpCls ACT Operation “Close Switch” T O N

GGIO class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC
61850-7-2)
Data
Common Logical Node Information
LN shall inherit all Mandatory Data from Common Logical Node Class M
EEHealth INS External equipment health (external sensor) O N
EEName DPL External equipment name plate O N
Loc SPS Local operation O N
OpCntRs INC Resetable operation counter O N
Measured values
AnIn MV Analogue input O N
Controls
SPCSO SPC Single point controllable status output O N
DPCSO DPC Double point controllable status output O N
ISCSO INC Integer status controllable status output O N
Status Information
IntIn INS Integer status input O N
Alm SPS General single alarm O N
Ind01 SPS General indication (binary input) O Y
Ind02 SPS General indication (binary input) O Y
Ind03 SPS General indication (binary input) O Y
Ind04 SPS General indication (binary input) O Y
Ind05 SPS General indication (binary input) O Y
Ind06 SPS General indication (binary input) O Y
Ind07 SPS General indication (binary input) O Y
Ind08 SPS General indication (binary input) O Y
Ind09 SPS General indication (binary input) O Y
Ind10 SPS General indication (binary input) O Y
:
:
:
Ind32 SPS General indication (binary input) O Y

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 6 F 2 T 0 1 7 7

MMXU class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC
61850-7-2)
Data
Common Logical Node Information
LN shall inherit all Mandatory Data from Common Logical Node Class M
EEHealth INS External equipment health (external sensor) O N
Measured values
TotW MV Total Active Power (Total P) O N
TotVAr MV Total Reactive Power (Total Q) O N
TotVA MV Total Apparent Power (Total S) O N
TotPF MV Average Power factor (Total PF) O N
Hz MV Frequency O Y
PPV DEL Phase to phase voltages (VL1VL2, …) O Y
WYE_ABC
PhV Phase to ground voltages (VL1ER, …) O Y
N
WYE_ABC
A Phase currents (IL1, IL2, IL3) O Y
N
W WYE Phase active power (P) O N
VAr WYE Phase reactive power (Q) O N
VA WYE Phase apparent power (S) O N
PF WYE Phase power factor O N
Z WYE Phase Impedance O N

XCBR class
Attribute Name Attr. Type Explanation T M/O GRE140
LNName Shall be inherited from Logical-Node Class (see IEC
61850-7-2)
Data
Common Logical Node Information
LN shall inherit all Mandatory Data from Common Logical Node Class M
EEHealth INS External equipment health (external sensor) O N
EEName DPL External equipment name plate O N
OpCnt INS Operation counter M Y
Controls
Pos DPC Switch position M Y
BlkOpn SPC Block opening M Y
BlkCls SPC Block closing M Y
ChaMotEna SPC Charger motor enabled O N
Metered Values
SumSwARs BCR Sum of Switched Amperes, resetable O N
Status Information
CBOpCap INS Circuit breaker operating capability M Y
POWCap INS Point On Wave switching capability O N
MaxOpCap INS Circuit breaker operating capability when fully charged O N

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SPS class
Attribute Attribute Type FC TrgOp Value/Value Range M/O/C GRE140
Name
DataName Inherited from Data Class (see IEC 61850-7-2)
DataAttribute
status
stVal BOOLEAN ST dchg TRUE | FALSE M Y
q Quality ST qchg M Y
t TimeStamp ST M Y
substitution
subEna BOOLEAN SV PICS_SUBST N
subVal BOOLEAN SV TRUE | FALSE PICS_SUBST N
subQ Quality SV PICS_SUBST N
subID VISIBLE STRING64 SV PICS_SUBST N
configuration, description and extension
d VISIBLE STRING255 DC Text O N
dU UNICODE DC O N
STRING255
cdcNs VISIBLE STRING255 EX AC_DLNDA_M N
cdcName VISIBLE STRING255 EX AC_DLNDA_M N
dataNs VISIBLE STRING255 EX AC_DLN_M N
Services
As defined in Table 13 (see IEC 61850-7-3)

INS class
Attribute Attribute Type FC TrgOp Value/Value Range M/O/C GRE140
Name
DataName Inherited from Data Class (see IEC 61850-7-2)
DataAttribute
status
stVal INT32 ST dchg M Y(*1)
q Quality ST qchg M Y
t TimeStamp ST M Y
Substitution
subEna BOOLEAN SV PICS_SUBST N
subVal INT32 SV PICS_SUBST N
subQ Quality SV PICS_SUBST N
subID VISIBLE STRING64 SV PICS_SUBST N
configuration, description and extension
d VISIBLE STRING255 DC Text O N
dU UNICODE DC O N
STRING255
cdcNs VISIBLE STRING255 EX AC_DLNDA_M N
cdcName VISIBLE STRING255 EX AC_DLNDA_M N
dataNs VISIBLE STRING255 EX AC_DLN_M N
Services
As defined in Table 13 (see IEC 61850-7-3)

(*1): “ENUM” type is also used.

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 6 F 2 T 0 1 7 7

ACT class
Attribute Attribute Type FC TrgOp Value/Value Range M/O/C GRE140
Name
DataName Inherited from Data Class (see IEC 61850-7-2)
DataAttribute
status
general BOOLEAN ST dchg M Y
phsA BOOLEAN ST dchg O N
phsB BOOLEAN ST dchg O N
phsC BOOLEAN ST dchg O N
neut BOOLEAN ST dchg O N
q Quality ST qchg M Y
t TimeStamp ST M Y
configuration, description and extension
operTm TimeStamp CF O N
d VISIBLE STRING255 DC Text O N
dU UNICODE DC O N
STRING255
cdcNs VISIBLE STRING255 EX AC_DLNDA_M N
cdcName VISIBLE STRING255 EX AC_DLNDA_M N
dataNs VISIBLE STRING255 EX AC_DLN_M N
Services
As defined in Table 13 (see IEC 61850-7-3)

ACT_ABC class
Attribute Attribute Type FC TrgOp Value/Value Range M/O/C GRE140
Name
DataName Inherited from Data Class (see IEC 61850-7-2)
DataAttribute
status
general BOOLEAN ST dchg M Y
phsA BOOLEAN ST dchg O Y
phsB BOOLEAN ST dchg O Y
phsC BOOLEAN ST dchg O Y
neut BOOLEAN ST dchg O N
q Quality ST qchg M Y
t TimeStamp ST M Y
configuration, description and extension
operTm TimeStamp CF O N
d VISIBLE STRING255 DC Text O N
dU UNICODE DC O N
STRING255
cdcNs VISIBLE STRING255 EX AC_DLNDA_M N
cdcName VISIBLE STRING255 EX AC_DLNDA_M N
dataNs VISIBLE STRING255 EX AC_DLN_M N
Services
As defined in Table 13 (see IEC 61850-7-3)

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 6 F 2 T 0 1 7 7

ACD class
Attribute Attribute Type FC TrgOp Value/Value Range M/O/C GRE140
Name
DataName Inherited from Data Class (see IEC 61850-7-2)
DataAttribute
status
general BOOLEAN ST dchg M Y
dirGeneral ENUMERATED ST dchg unknown | forward | backward | both M Y
phsA BOOLEAN ST dchg GC_2 (1) N
dirPhsA ENUMERATED ST dchg unknown | forward | backward GC_2 (1) N
phsB BOOLEAN ST dchg GC_2 (2) N
dirPhsB ENUMERATED ST dchg unknown | forward | backward GC_2 (2) N
phsC BOOLEAN ST dchg GC_2 (3) N
dirPhsC ENUMERATED ST dchg unknown | forward | backward GC_2 (3) N
neut BOOLEAN ST dchg GC_2 (4) N
dirNeut ENUMERATED ST dchg unknown | forward | backward GC_2 (4) N
q Quality ST qchg M Y
t TimeStamp ST M Y
configuration, description and extension
d VISIBLE STRING255 DC Text O N
dU UNICODE DC O N
STRING255
cdcNs VISIBLE STRING255 EX AC_DLNDA_M N
cdcName VISIBLE STRING255 EX AC_DLNDA_M N
dataNs VISIBLE STRING255 EX AC_DLN_M N
Services
As defined in Table 13 (see IEC 61850-7-3)

ACD_ABC class
Attribute Attribute Type FC TrgOp Value/Value Range M/O/C GRE140
Name
DataName Inherited from Data Class (see IEC 61850-7-2)
DataAttribute
status
general BOOLEAN ST dchg M Y
dirGeneral ENUMERATED ST dchg unknown | forward | backward | both M Y
phsA BOOLEAN ST dchg GC_2 (1) Y
dirPhsA ENUMERATED ST dchg unknown | forward | backward GC_2 (1) Y
phsB BOOLEAN ST dchg GC_2 (2) Y
dirPhsB ENUMERATED ST dchg unknown | forward | backward GC_2 (2) Y
phsC BOOLEAN ST dchg GC_2 (3) Y
dirPhsC ENUMERATED ST dchg unknown | forward | backward GC_2 (3) Y
neut BOOLEAN ST dchg GC_2 (4) N
dirNeut ENUMERATED ST dchg unknown | forward | backward GC_2 (4) N
q Quality ST qchg M Y
t TimeStamp ST M Y
configuration, description and extension
d VISIBLE STRING255 DC Text O N
dU UNICODE DC O N
STRING255
cdcNs VISIBLE STRING255 EX AC_DLNDA_M N
cdcName VISIBLE STRING255 EX AC_DLNDA_M N
dataNs VISIBLE STRING255 EX AC_DLN_M N
Services
As defined in Table 13 (see IEC 61850-7-3)

 540 
 6 F 2 T 0 1 7 7

MV class
Attribute Attribute Type FC TrgOp Value/Value Range M/O/C GRE140
Name
DataName Inherited from Data Class (see IEC 61850-7-2)
DataAttribute
measured values
instMag AnalogueValue MX O N
mag AnalogueValue MX dchg M Y
range ENUMERATED MX dchg normal | high | low | high-high | low-low |… O N
q Quality MX qchg M Y
t TimeStamp MX M Y
substitution
subEna BOOLEAN SV PICS_SUBST N
subVal AnalogueValue SV PICS_SUBST N
subQ Quality SV PICS_SUBST N
subID VISIBLE STRING64 SV PICS_SUBST N
configuration, description and extension
units Unit CF see Annex A O Y
db INT32U CF 0 … 100 000 O N
zeroDb INT32U CF 0 … 100 000 O N
sVC ScaledValueConfig CF AC_SCAV N
rangeC RangeConfig CF GC_CON N
smpRate INT32U CF O N
d VISIBLE STRING255 DC Text O N
dU UNICODE DC O N
STRING255
cdcNs VISIBLE STRING255 EX AC_DLNDA_M N
cdcName VISIBLE STRING255 EX AC_DLNDA_M N
dataNs VISIBLE STRING255 EX AC_DLN_M N
Services
As defined in Table 21 (see IEC 61850-7-3)

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CMV class
Attribute Attribute Type FC TrgOp Value/Value Range M/O/C GRE140
Name
DataName Inherited from Data Class (see IEC 61850-7-2)
DataAttribute
measured values
instCVal Vector MX O N
cVal Vector MX dchg M Y
range ENUMERATED MX dchg normal | high | low | high-high | low-low |… O N
q Quality MX qchg M Y
t TimeStamp MX M Y
substitution
subEna BOOLEAN SV PICS_SUBST N
subVal Vector SV PICS_SUBST N
subQ Quality SV PICS_SUBST N
subID VISIBLE STRING64 SV PICS_SUBST N
configuration, description and extension
units Unit CF see Annex A O Y
db INT32U CF 0 … 100 000 O N
zeroDb INT32U CF 0 … 100 000 O N
rangeC RangeConfig CF GC_CON N
magSVC ScaledValueConfig CF AC_SCAV N
angSVC ScaledValueConfig CF AC_SCAV N
angRef ENUMERATED CF V | A | other … O N
smpRate INT32U CF O N
d VISIBLE STRING255 DC Text O N
dU UNICODE DC O N
STRING255
cdcNs VISIBLE STRING255 EX AC_DLNDA_M N
cdcName VISIBLE STRING255 EX AC_DLNDA_M N
dataNs VISIBLE STRING255 EX AC_DLN_M N
Services
As defined in Table 21

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WYE_ABCN class
Attribute Attribute Type FC TrgOp Value/Value Range M/O/C GRE140
Name
DataName Inherited from Data Class (see IEC 61850-7-2)
Data
phsA CMV GC_1 Y
phsB CMV GC_1 Y
phsC CMV GC_1 Y
neut CMV GC_1 Y
net CMV GC_1 N
res CMV GC_1 N
DataAttribute
configuration, description and extension
angRef ENUMERATED CF Va | Vb | Vc | Aa | Ab | Ac | Vab | Vbc | Vca | O N
Vother | Aother
d VISIBLE STRING255 DC Text O N
dU UNICODE DC O N
STRING255
cdcNs VISIBLE STRING255 EX AC_DLNDA_M N
cdcName VISIBLE STRING255 EX AC_DLNDA_M N
dataNs VISIBLE STRING255 EX AC_DLN_M N
Services
As defined in Table 21 (see IEC 61850-7-3)

DEL class
Attribute Attribute Type FC TrgOp Value/Value Range M/O/C GRE140
Name
DataName Inherited from Data Class (see IEC 61850-7-2)
Data
phsAB CMV GC_1 Y
phsBC CMV GC_1 Y
phsCA CMV GC_1 Y
DataAttribute
configuration, description and extension
angRef ENUMERATED CF Va | Vb | Vc | Aa | Ab | Ac | Vab | O N
Vbc | Vca | Vother | Aother
d VISIBLE STRING255 DC Text O N
dU UNICODE DC O N
STRING255
cdcNs VISIBLE STRING255 EX AC_DLNDA_M N
cdcName VISIBLE STRING255 EX AC_DLNDA_M N
dataNs VISIBLE STRING255 EX AC_DLN_M N
Services
As defined in Table 21 (see IEC 61850-7-3)

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SPC class
Attribute Attribute Type FC TrgOp Value/Value Range M/O/C GRE140
Name
DataName Inherited from Data Class (see IEC 61850-7-2)
DataAttribute
control and status
ctlVal BOOLEAN CO off (FALSE) | on (TRUE) AC_CO_M N
operTm TimeStamp CO AC_CO_O N
origin Originator_RO CO, ST AC_CO_O Y
ctlNum INT8U_RO CO, ST 0..255 AC_CO_O N
SBO VISIBLE STRING65 CO AC_CO_SBO_N_M N
SBOw SBOW CO AC_CO_SBOW_E_M N
Oper Oper CO AC_CO _M Y
Cancel Cancel CO AC_CO_SBO_N_M N
and
AC_CO_SBOW_E_M
and
AC_CO_TA_E_M
stVal BOOLEAN ST dchg FALSE | TRUE AC_ST Y
q Quality ST qchg AC_ST Y
t TimeStamp ST AC_ST Y
stSeld BOOLEAN ST dchg AC_CO_O N
substitution
subEna BOOLEAN SV PICS_SUBST N
subVal BOOLEAN SV FALSE | TRUE PICS_SUBST N
subQ Quality SV PICS_SUBST N
subID VISIBLE STRING64 SV PICS_SUBST N
configuration, description and extension
pulseConfig PulseConfig CF AC_CO_O N
CtlModel CtlModels CF M Y
sboTimeout INT32U CF AC_CO_O N
sboClass SboClasses CF AC_CO_O N
d VISIBLE STRING255 DC Text O N
dU UNICODE DC O N
STRING255
cdcNs VISIBLE STRING255 EX AC_DLNDA_M N
cdcName VISIBLE STRING255 EX AC_DLNDA_M N
dataNs VISIBLE STRING255 EX AC_DLN_M N
Services
As defined in Table 31 (see IEC 61850-7-3)

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DPC class
Attribute Attribute Type FC TrgOp Value/Value Range M/O/C GRE140
Name
DataName Inherited from Data Class (see IEC 61850-7-2)
DataAttribute
control and status
ctlVal BOOLEAN CO off (FALSE) | on (TRUE) AC_CO_M Y
operTm TimeStamp CO AC_CO_O N
origin Originator CO, ST AC_CO_O N
ctlNum INT8U CO, ST 0..255 AC_CO_O N
stVal CODED ENUM ST dchg intermediate-state | off | on | M Y
bad-state
q Quality ST qchg M Y
t TimeStamp ST M Y
stSeld BOOLEAN ST dchg AC_CO_O N
substitution
subEna BOOLEAN SV PICS_SUBST N
subVal CODED ENUM SV intermediate-state | off | on | PICS_SUBST N
bad-state
subQ Quality SV PICS_SUBST N
subID VISIBLE STRING64 SV PICS_SUBST N
configuration, description and extension
pulseConfig PulseConfig CF AC_CO_O N
ctlModel CtlModels CF M Y
sboTimeout INT32U CF AC_CO_O N
sboClass SboClasses CF AC_CO_O N
d VISIBLE STRING255 DC Text O N
dU UNICODE DC O N
STRING255
cdcNs VISIBLE STRING255 EX AC_DLNDA_M N
cdcName VISIBLE STRING255 EX AC_DLNDA_M N
dataNs VISIBLE STRING255 EX AC_DLN_M N
Services
As defined in Table 31 (see IEC 61850-7-3)

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INC class
Attribute Attribute Type FC TrgOp Value/Value Range M/O/C GRE140
Name
DataName Inherited from Data Class (see IEC 61850-7-2)
DataAttribute
control and status
ctlVal INT32 CO AC_CO_M N
operTm TimeStamp CO AC_CO_O N
origin Originator CO, ST AC_CO_O N
ctlNum INT8U CO, ST 0..255 AC_CO_O N
SBO VISIBLE STRING65 CO AC_CO_SBO_N_M N
SBOw SBOW CO AC_CO_SBOW_E_M N
Oper Oper CO AC_CO _M N
Cancel Cancel CO AC_CO_SBO_N_M N
and
AC_CO_SBOW_E_M
and
AC_CO_TA_E_M
stVal INT32 ST dchg M Y
Q Quality ST qchg M Y
T TimeStamp ST M Y
stSeld BOOLEAN ST dchg AC_CO_O N
substitution
subEna BOOLEAN SV PICS_SUBST N
subVal INT32 SV FALSE | TRUE PICS_SUBST N
subQ Quality SV PICS_SUBST N
subID VISIBLE STRING64 SV PICS_SUBST N
configuration, description and extension
CtlModel CtlModels CF M Y
sboTimeout INT32U CF AC_CO_O N
sboClass SboClasses CF AC_CO_O N
minVal INT32 CF O N
maxVal INT32 CF O N
stepSize INT32U CF 1 … (maxVal – minVal) O N
D VISIBLE STRING255 DC Text O N
dU UNICODE DC O N
STRING255
cdcNs VISIBLE STRING255 EX AC_DLNDA_M N
cdcName VISIBLE STRING255 EX AC_DLNDA_M N
dataNs VISIBLE STRING255 EX AC_DLN_M N
Services
As defined in Table 31 (see IEC 61850-7-3)

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ING class
Attribute Attribute Type FC TrgOp Value/Value Range M/O/C GRE140
Name
DataName Inherited from Data Class (see IEC 61850-7-2)
DataAttribute
setting
setVal INT32 SP AC_NSG_M Y(*3)
setVal INT32 SG, SE AC_SG_M N
configuration, description and extension
minVal INT32 CF O N
maxVal INT32 CF O N
stepSize INT32U CF 1 … (maxVal – minVal) O N
d VISIBLE STRING255 DC Text O N
dU UNICODE DC O N
STRING255
cdcNs VISIBLE STRING255 EX AC_DLNDA_M N
cdcName VISIBLE STRING255 EX AC_DLNDA_M N
dataNs VISIBLE STRING255 EX AC_DLN_M N
Services
As defined in Table 39 (see IEC 61850-7-3)
(*3): “ENUM” type is also used.

ASG class
Attribute Attribute Type FC TrgOp Value/Value Range M/O/C GRE140
Name
DataName Inherited from Data Class (see IEC 61850-7-2)
DataAttribute
setting
setMag AnalogueValue SP AC_NSG_M Y
setMag AnalogueValue SG, SE AC_SG_M N
configuration, description and extension
units Unit CF see Annex A O Y
sVC ScaledValueConfig CF AC_SCAV Y
minVal AnalogueValue CF O N
maxVal AnalogueValue CF O N
stepSize AnalogueValue CF 1 … (maxVal – minVal) O N
d VISIBLE STRING255 DC Text O N
dU UNICODE DC O N
STRING255
cdcNs VISIBLE STRING255 EX AC_DLNDA_M N
cdcName VISIBLE STRING255 EX AC_DLNDA_M N
dataNs VISIBLE STRING255 EX AC_DLN_M N
Services
As defined in Table 42 (see IEC 61850-7-3)

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DPL class
Attribute Attribute Type FC TrgOp Value/Value Range M/O/C GRE140
Name
DataName Inherited from Data Class (see IEC 61850-7-2)
DataAttribute
configuration, description and extension
vendor VISIBLE STRING255 DC M Y
hwRev VISIBLE STRING255 DC O N
swRev VISIBLE STRING255 DC O Y
serNum VISIBLE STRING255 DC O N
model VISIBLE STRING255 DC O Y
location VISIBLE STRING255 DC O N
cdcNs VISIBLE STRING255 EX AC_DLNDA_M N
cdcName VISIBLE STRING255 EX AC_DLNDA_M N
dataNs VISIBLE STRING255 EX AC_DLN_M N
Services
As defined in Table 45 (see IEC 61850-7-3)

LPL class
Attribute Attribute Type FC TrgOp Value/Value Range M/O/C GRE140
Name
DataName Inherited from Data Class (see IEC 61850-7-2)
DataAttribute
configuration, description and extension
vendor VISIBLE STRING255 DC M Y
swRev VISIBLE STRING255 DC M Y
d VISIBLE STRING255 DC M Y
dU UNICODE DC O N
STRING255
configRev VISIBLE STRING255 DC AC_LN0_M Y
ldNs VISIBLE STRING255 EX shall be included in LLN0 only; AC_LN0_EX N
for example "IEC 61850-7-4:2003"
lnNs VISIBLE STRING255 EX AC_DLD_M N
cdcNs VISIBLE STRING255 EX AC_DLNDA_M N
cdcName VISIBLE STRING255 EX AC_DLNDA_M N
dataNs VISIBLE STRING255 EX AC_DLN_M N
Services
As defined in Table 45 (see IEC 61850-7-3)

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Logical nodes for GRE140

Logical Nodes Relay Element
PTOC
PTOC11 OC1
PTOC12 OC2
PTOC14 OC4
PTOC21 EF1
PTOC22 EF2
PTOC24 EF4
PTOC31 SEF1
PTOC32 SEF2
PTOC34 SEF4
PTOC5 BCD
PTOF
PTOF1 FRQ1 (FRQ1EN=OF)
PTOF2 FRQ2 (FRQ2EN=OF)
PTOV
PTOV11 OV1
PTOV12 OV2
PTOV14 OV4
PTRC
PTRC1 General Trip
PTTR
PTTR THM-A, THM-T
PTUC
PTUC1 UC1
PTUC2 UC2
PTUV
PTUV11 UV1
PTUV12 UV2
PTUV14 UV4
PTUF
PTUF1 FRQ1 (FRQ1EN=UF)
PTUF1 FRQ2 (FRQ2EN=UF)

Client/ Server/ IED Remarks

subscriber publisher
Client-server roles
B11 Server side (of TWO-PARTY- - c1 Y
APPLICATION-ASSOCIATION)
B12 Client side of (TWO-PARTY- c1 - -
APPLICATION-ASSOCIATION)
SCSMs supported
B21 SCSM: IEC61850-8-1 used Y
B22 SCSM: IEC61850-9-1 used N
B23 SCSM: IEC61850-9-2 used N
B24 SCSM: other -
Generic substation event model (GSE)
B31 Publisher side - O Y
B32 Subscriber side O - Y
Transmission of sampled value model (SVC)
B41 Publisher side - O N
B42 Subscriber side O - N

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If Server side (B11) supported

M1 Logical device c2 c2 Y
M2 Logical node c3 c3 Y
M3 Data c4 c4 Y
M4 Data set c5 c5 Y
M5 Substitution O O N
M6 Setting group control O O Y
Reporting
M7 Buffered report control O O Y
M7-1 sequence-number Y
M7-2 report-time-stamp Y
M7-3 reason-for-inclusion Y
M7-4 data-set-name Y
M7-5 data-reference Y
M7-6 buffer-overflow Y
M7-7 entryID Y
M7-8 BufTm Y
M7-9 IntgPd Y
M7-10 GI Y
M8 Unbuffered report control O O Y
M8-1 sequence-number Y
M8-2 report-time-stamp Y
M8-3 reason-for-inclusion Y
M8-4 data-set-name Y
M8-5 data-reference Y
M8-6 BufTm Y
M8-7 IntgPd Y
M8-8 GI Y
Logging O O N
M9 Log control O O N
M9-1 IntgPd N
M10 Log O O N
M11 Control M M Y
If GSE (B31/B32) is supported
GOOSE O O Y
M12-1 entryID
M12-2 DataRefInc
M13 GSSE O O N
If SVC (B41/B42) is supported
M14 Multicast SVC O O N
M15 Unicast SVC O O N
M16 Time M M Y
M17 File Transfer O O N
Server
S1 GetServerDirectory M Y
Application association
S2 Associate M M Y
S3 Abort M M Y
S4 Release M M Y
Logical device
S5 GetLogicalDeviceDirectory M M Y
Logical node
S6 GetLogicalNodeDirectory M M Y
S7 GetAllDataValues O M Y

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Data
S8 GetDataValues M M Y
S9 SetDataValues O O N
S10 GetDataDirectory O M Y
S11 GetDataDefinition O M Y
Data set
S12 GetDataSetValues O M Y
S13 SetDataSetValues O O N
S14 CreateDataSet O O N
S15 DeleteDataSet O O N
S16 GetDataSetDirectory O O Y
Substitution
S17 SetDataValues M M N
Setting group control
S18 SelectActiveSG O O Y
S19 SelectEditSG O O N
S20 SetSGValues O O N
S21 ConfirmEditSGValues O O N
S22 GetSGValues O O N
S23 GetSGCBValues O O Y
Reporting
Buffered report control block (BRCB)
S24 Report c6 c6 Y
S24-1 data-change (dchg) Y
S24-2 quality-change (qchg) Y
S24-3 data-update (dupd) N
S25 GetBRCBValues c6 c6 Y
S26 SetBRCBValues c6 c6 Y
Unbuffered report control block (URCB)
S27 Report c6 c6 Y
S27-1 data-change (dchg) Y
S27-2 quality-change (qchg) Y
S27-3 data-update (dupd) N
S28 GetURCBValues c6 c6 Y
S29 SetURCBValues c6 c6 Y
Logging
Log control block
S30 GetLCBValues M M N
S31 SetLCBValues O M N
Log
S32 QueryLogByTime c7 M N
S33 QueryLogAfter c7 M N
S34 GetLogStatusValues M M N
Generic substation event model (GSE)
GOOSE-CONTROL-BLOCK
S35 SendGOOSEMessage c8 c8 Y
S36 GetGoReference O c9 N
S37 GetGOOSEElementNumber O c9 N
S38 GetGoCBValues O O Y
S39 SetGoCBValues O O Y
GSSE-CONTROL-BLOCK
S40 SendGSSEMessage c8 c8 N
S41 GetGsReference O c9 N
S42 GetGSSEDataOffset O c9 N
S43 GetGsCBValues O O N
S44 SetGsCBValues O O N

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Transmission of sampled value model (SVC)

Multicast SVC
S45 SendMSVMessage c10 c10 N
S46 GetMSVCBValues O O N
S47 SetMSVCBValues O O N
Unicast SVC
S48 SendUSVMessage c10 c10 N
S49 GetUSVCBValues O O N
S50 SetUSVCBValues O O N
Control
S51 Select M O Y
S52 SelectWithValue M O Y
S53 Cancel O O Y
S54 Operate M M Y
S55 CommandTermination M O N
S56 TimeActivatedOperate O O N
File Transfer
S57 GetFile O M N
S58 SetFile O O N
S59 DeleteFile O O N
S60 GetFileAttributeValues O O N
Time
T1 Time resolution of internal clock 100ms
T2 Time accuracy of internal clock 100ms
T3 Supported TimeStamp resolution 100ms
M – Mandatory
O – Optional
c1 – shall be ‘M’ if support for LOGICAL-DEVICE model has been declared.
c2 – shall be ‘M’ if support for LOGICAL-NODE model has been declared.
c3 – shall be ‘M’ if support for DATA model has been declared.
c4 – shall be ‘M’ if support for DATA-SET, Substitution, Report, Log Control, or Time model has been declared.
c5 – shall be ‘M’ if support for Report, GSE, or SV models has been declared.
c6 – shall declare support for at least one (BRCB or URCB)
c7 – shall declare support for at least one (QueryLogByTime or QueryLogAfter).
c8 – shall declare support for at least one (SendGOOSEMessage or SendGSSEMessage)
c9 – shall declare support if TWO-PARTY association is available.
c10 – shall declare support for at least one (SendMSVMessage or SendUSVMessage).

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PICS for A-Profile support

A-Profile Profile Description Client Server GRD140 Remarks
shortcut F/S F/S
A1 Client/server A-Profile c1 c1 Y
A2 GOOSE/GSE c2 c2 Y
management A-Profile
A3 GSSE A-Profile c3 c3 N
A4 TimeSync A-Profile c4 c4 Y
c1 Shall be ‘m’ if support for any service specified in Table 2 are declared within the ACSI basic conformance statement.
c2 Shall be ‘m’ if support for any service specified in Table 6 are declared within the ACSI basic conformance statement.
c3 Shall be ‘m’ if support for any service specified in Table 9 are declared within the ACSI basic conformance statement.
c4 Support for at least one other A-Profile shall be declared (e.g. in A1-A3) in order to claim conformance to IEC
61850-8-1.

PICS for T-Profile support

A-Profile Profile Description Client Server GRD140 Remarks
shortcut F/S F/S
T1 TCP/IP T-Profile c1 c1 Y
T2 OSI T-Profile c2 c2 N
T3 GOOSE/GSE T-Profile c3 c3 Y
T4 GSSE T-Profile c4 c4 N
T5 TimeSync T-Profile o o Y
c1 Shall be ‘m’ if support for A1 is declared. Otherwise, shall be 'i'.
c2 Shall be ‘o’ if support for A1 is declared. Otherwise, shall be 'i'.
c3 Shall be ‘m’ if support for A2 is declared. Otherwise, shall be 'i.
c4 Shall be ‘m’ if support for A3 is declared. Otherwise, shall be 'i.

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Appendix R
Signal list for IEC 61850

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 6 F 2 T 0 1 7 7

Signal Table

No Signal Name Contents

10000 CONSTANT_0 constant 0
10001 CONSTANT_1 constant 1
10002 - -
・ ・ ・
・ ・ ・
・ ・ ・
10101 OC1-A OC1-A relay element output
10102 OC1-B OC1-B relay element output
10103 OC1-C OC1-C relay element output
10104 OC1-A_INST OC1-A relay element start
10105 OC1-B_INST OC1-B relay element start
10106 OC1-C_INST OC1-C relay element start
10107 OC2-A OC2-A relay element output
10108 OC2-B OC2-B relay element output
10109 OC2-C OC2-C relay element output
10110 OC2-A_INST OC2-A relay element start
10111 OC2-B_INST OC2-B relay element start
10112 OC2-C_INST OC2-C relay element start
10113 OC3-A OC3-A relay element output
10114 OC3-B OC3-B relay element output
10115 OC3-C OC3-C relay element output
10116 OC4-A OC4-A relay element output
10117 OC4-B OC4-B relay element output
10118 OC4-C OC4-C relay element output
10119 OC1-A_HS High speed output of OC1-A relay
10120 OC1-B_HS High speed output of OC1-B relay
10121 OC1-C_HS High speed output of OC1-C relay
・ ・ ・
・ ・ ・
・ ・ ・
10131 EF1 EF1 relay element output
10132 EF1_INST EF1 relay element start
10133 EF2 EF2 relay element output
10134 EF2_INST EF2 relay element start
10135 EF3 EF3 relay element output
10136 EF4 EF4 relay element output
10137 CUR-REV_DET. Current reversal detection.
10138 EF1_HS High speed output of EF1 relay
10139 - -
10140 - -
10141 SEF1 SEF1 relay element output
10142 SEF1_INST SEF1 relay element start
10143 SEF2 SEF2 relay element output
10144 SEF2_INST SEF2 relay element start
10145 SEF3 SEF3 relay element output
10146 SEF4 SEF4 relay element output
10147 SEF1_HS High speed output of SEF1 relay
10148 RPF Residual power forward element
10149 RPR Residual power reverse element
10150 ICD-A Inrush current detector

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No Signal Name Contents

10151 ICD-B Inrush current detector
10152 ICD-C Inrush current detector
・ ・ ・
・ ・ ・
・ ・ ・
10161 UC1-A UC1-A relay element output
10162 UC1-B UC1-B relay element output
10163 UC1-C UC1-C relay element output
10164 UC2-A UC2-A relay element output
10165 UC2-B UC2-B relay element output
10166 UC2-C UC2-C relay element output
10167 THM-A THERMAL Alarm relay element output
10168 THM-T THERMAL Trip relay element output
10169 NOC1 NOC1 relay element output
10170 NOC1_INST NOC1 relay element start
10171 NOC2 NOC2 relay element output
10172 BCD BCD relay element output
10173 CBF-A CBF-A relay element output
10174 CBF-B CBF-B relay element output
10175 CBF-C CBF-C relay element output
ICLDO-A relay (OC relay) element
10176 ICLDO-A
output used in "CLP scheme"
ICLDO-B relay (OC relay) element
10177 ICLDO-B
output used in "CLP scheme"
ICLDO-C relay (OC relay) element
10178 ICLDO-C
output used in "CLP scheme"
10179 OC-A_DIST OC-A relay for disturbance record
10180 OC-B_DIST OC-B relay for disturbance record
・ ・ ・
・ ・ ・
・ ・ ・
13060 TEMP245 Temporary245
13061 TEMP246 Temporary246
13062 TEMP247 Temporary247
13063 TEMP248 Temporary248
13064 TEMP249 Temporary249
13065 TEMP250 Temporary250
13066 TEMP251 Temporary251
13067 TEMP252 Temporary252
13068 TEMP253 Temporary253
13069 TEMP254 Temporary254
13070 TEMP255 Temporary255
13071 TEMP256 Temporary256

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Measure Table

No Signal Name Contents

30001 Ia_mag Current A-Phase Mag
30002 Ia_pha Current A-Phase Pha
30003 Ib_mag Current B-Phase Mag
30004 Ib_pha Current B-Phase Pha
30005 Ic_mag Current C-Phase Mag
30006 Ic_pha Current C-Phase Pha
30007 Ie_mag Current Ie Mag
30008 Ie_pha Current Ie Pha
30009 Ise_mag Current Ise Mag
30010 Ise_pha Current Ise Pha
30011 I0_mag Current I0 Mag
30012 I0_pha Current I0 Pha
30013 I1_mag Current I1 Mag
30014 I1_pha Current I1 Pha
30015 I2_mag Current I2 Mag
30016 I2_pha Current I2 Pha
30017 I2/I1_mag Current I2/I1 Mag
30018 Thermal Thermal
30019 Va_mag Valtage A-Phase Mag
30020 Va_pha Valtage A-Phase Pha
30021 Vb_mag Valtage B-Phase Mag
30022 Vb_pha Valtage B-Phase Pha
30023 Vc_mag Valtage C-Phase Mag
30024 Vc_pha Valtage C-Phase Pha
30025 Ve_mag Valtage E Mag
30026 Ve_pha Valtage E Pha
30027 Vab_mag Valtage AB-Phase Mag
30028 Vab_pha Valtage AB-Phase Pha
30029 Vbc_mag Valtage BC-Phase Mag
30030 Vbc_pha Valtage BC-Phase Pha
30031 Vca_mag Valtage CA-Phase Mag
30032 Vca_pha Valtage CA-Phase Pha
30033 V0_mag Valtage V0 Mag
30034 V0_pha Valtage V0 Pha
30035 V1_mag Valtage V1 Mag
30036 V1_pha Valtage V1e Pha
30037 V2_mag Valtage V2 Mag
30038 V2_pha Valtage V2 Pha
30039 Vs_mag Valtage Vs Mag
30040 Vs_pha Valtage Vs Pha
30041 ｆ_mag f Mag
30042 df_mag df Mag
30043 PF_mag PF Mag
30044 P_mag P Mag
30045 Q_mag Q Mag
30046 S_mag S Mag
30047 Ia_max Current A-Phase Mag Max
30048 Ib_max Current B-Phase Mag Max
30049 Ic_max Current C-Phase Mag Max
30050 Ie_max Current Ie Mag Max

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No Signal Name Contents

30051 Ise_max Current Ise Mag Max
30052 I2_max Current I2 Mag Max
30053 I2/I1_max Current I2/I1 Mag Max
30054 Va_max Valtage A-Phase Mag Max
30055 Va_min Valtage A-Phase Mag Min
30056 Vb_max Valtage A-Phase Mag Max
30057 Vb_min Valtage A-Phase Mag Min
30058 Vc_max Valtage A-Phase Mag Max
30059 Vc_min Valtage A-Phase Mag Min
30060 Ve_max Valtage Ve Mag Max
30061 Ve_min Valtage Ve Mag Min
30062 Vs_max Valtage Vs Mag Max
30063 Vs_min Valtage Vs Mag Min
30064 V0_max Valtage V0 Mag Max
30065 V0_min Valtage V0 Mag Min
30066 f_max f Max
30067 f_min f Min
30068 P_max P Max
30069 Q_max Q Max
30070 S_max S Max
30071 Ia_dir Current A-Phase Dir
30072 Ib_dir Current B-Phase Dir
30073 Ic_dir Current C-Phase Dir
30074 Ie_dir Current Ie Dir
30075 Ise_dir Current Ise Dir
30076 I2_dir Current I2 Dir
30077 Ia_mag_ms Current A-Phase ms
30078 Ib_mag_ms Current B-Phase ms
30079 Ic_mag_ms Current C-Phase ms
30080 Thermal2 Thermal

Control Table

No Signal Name Contents

40001 CB_operation CB Operation
40002 literlou_operation Literlou Operation

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Appendix S
Ordering

 559 
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Directional Overcurrent Relay

GRE140 A－ －

Type:
Directional Overcurrent / Motor protection Relay GRE140
Model:
- Model 400: Three phase and earth fault
6 x BIs, 4 x Bos, 1 x Relay fail 400
12 x BIs, 10 x BOs, 1 x Relay fail 401
18 x BIs, 16 x BOs, 1 x Relay fail 402
- Model 420: Three phase and sensitive earth fault
6 x BIs, 4 x BOs, 1 x Relay fail 420
12 x BIs, 10 x BOs, 1 x Relay fail 421
18 x BIs, 16 x BOs, 1 x Relay fail 422
- Model 700: Motor protection –
Three phase and earth fault
6 x BIs, 4 x BOs, 1 x Relay fail 700
12 x BIs, 10 x BOs, 1 x Relay fail 701
18 x BIs, 16 x BOs, 1 x Relay fail 702
- Model 720: Motor protection –
Three phase and sensitive earth fault
6 x BIs, 4 x BOs, 1 x Relay fail 720
12 x BIs, 10 x BOs, 1 x Relay fail 721
18 x BIs, 16 x BOs, 1 x Relay fail 722
Rating:
CT: 1/5A, f: 50/60Hz, 110-250Vdc or 100-220Vac 1
CT: 1/5A, f: 50/60Hz, 48-110Vdc 2
CT: 1/5A, f: 50/60Hz, 24-48Vdc A
Standard and language:
IEC (English) 0

Communication:
RS485 1port (Modbus/IEC60870-5-103) 10
100BASE-TX 1port (Modbus/IEC61850) A0
+RS485 1port (Modbus/IEC60870-5-103)
100BASE-FX 1port (Modbus/IEC61850) C0
+RS485 1port (Modbus/IEC60870-5-103)

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Version-up Records
Version Date Revised Section Contents
No.
0.0 Jul. 28, 2011 -- First issue
1.0 Jun.11,2012 -- Modified the description.
1.2 Jun.28,2012 Appendix Modified Appendix G.
2.0 Oct.29.2012 Section 3.5 Modified Metering Function. (Demand; WH, varH )
Appendix G Modified the diagram.
Appendix K Modified the Technical data.
Appendix P Modified the Ordering.

3.0 Sep.20.2013 Added 700,701,702,720,721 and 722 models, [APPLVT] “3PP” setting
and IEC61850 communication..
2.1.2.2 Modified the [APPLVE] description.
2.1.1.3 Modified the description.
2.1.10 Add “Current-change element”.
2.2.3 Modified the description.
2.5.2 Modified the description the caution of [APPLVT] and [VT-RATE] settings.
2.6 Add Motor Protection function for 700 model series.
3.2.1 Add [APPLVT] “3PP” setting.
3.2.2 Add description of BI threshold setting by RSM.
3.3.7 Add “PLC Data Monitoring”.
3.3.8 Add “IEC61850 Communication Monitoring”.
3.3.4 Modified the description of VTF1 and VTF2.
3.3.5 Add description of resistance for TCS.
4.1.2 Optional communication port
4.2.4.4 Displaying information for IEC61850
4.2.4.7 Add Motor protection element for 700 model series display.
4.2.5.1 Displaying information for IEC61850
4.2.6.4 ditto
4.2.6.7 Add OCD element and Motor Protection element.
5.2.2 Add Diameter description.
Appendix P Add “IEC61850 Interoperability”
Appendix Q Add “IEC61850 MICS & MIPS”
Appendix R Add “Signal list for IEC61850”

3.1 Jul.23.2014 3.2.1 Modified the description for Binary input settings
4.2.1 Modified the desctiption for digest screen.
Appendix C Modified the description.
Appendix H Modicied the desctiption for PLC default setting..
Appendix N Modicied the Modbus Address No..

4.0 Jun.23.2015 1 Table 1.1 Add RQ element.

2.1.8.1 Modified the ICDOC settinge.
2.1.9, 2.1.9.1 Modified the chapter name.
2.1.9.2 Add Revers Reactive power protection.
2.4 Add General pick-up Outputs.
4.2 Add RQ display.
Appendix C Add RQ signals.
Appendix H Add RQ settings.
Appendix K Add RQ data.
Appendix N Add RQ Modbus address.

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4.1 Mar. 22.2017 2.1.1.1 Modified the description.

2.2.3 Modified the description
2.2.4 Modified the description
2.5 Modified the description.
3.3.4 Modified the Figure 3.3.2.
3.4.1 Modified the description. Add the FR mode settings.
4.2.6.4 Add the Dead band settings.
4.2.6.5 Add the FR mode settiongs.
4.7 Add the time sync description.
Appendix K Modified the description.
Appendix P Add the Dead band feature.

5.0 Mar. 22, 2018 Front Page Change company name.

5.1 Nov. 27, 2019 All chapaters All setting values for the default are reviewed.

6.0 May. 19, 2020 3.2.1 Corrected the VT setting in Table 3.2.1
3.3.2 Corrected the equation about the AC input imbalance monitoring
Appendix J Corrected the company name and added e-mail address

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