PD - 97106

IRFP4321PbF
Applications HEXFET® Power MOSFET
l Motion Control Applications
l High Efficiency Synchronous Rectification in SMPS
l Uninterruptible Power Supply VDSS 150V
l Hard Switched and High Frequency Circuits RDS(on) typ. 12m:
Benefits max. 15.5m:
l Low RDSON Reduces Losses
l Low Gate Charge Improves the Switching
ID 78A
Performance
D
l Improved Diode Recovery Improves Switching & D
EMI Performance
l 30V Gate Voltage Rating Improves Robustness
l Fully Characterized Avalanche SOA S
G D
G

S
TO-247AC

G D S
Gate Drain Source

Absolute Maximum Ratings

Symbol Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 78 c A
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 55
IDM Pulsed Drain Current d 330
PD @TC = 25°C Maximum Power Dissipation 310 W
Linear Derating Factor 2.0 W/°C
VGS Gate-to-Source Voltage ±30 V
EAS (Thermally limited) Single Pulse Avalanche Energy e 210 mJ
TJ Operating Junction and -55 to + 175 °C
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds 300
(1.6mm from case)
Mounting torque, 6-32 or M3 screw 10lbxin (1.1Nxm)

Thermal Resistance
Parameter Typ. Max. Units
RθJC Junction-to-Case g ––– 0.49
RθCS Case-to-Sink, Flat, Greased Surface 0.24 ––– °C/W
RθJA Junction-to-Ambient g ––– 40

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Static @ TJ = 25°C (unless otherwise specified)

Symbol Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 150 ––– ––– V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 150 ––– mV/°C Reference to 25°C, ID = 1mAd
RDS(on) Static Drain-to-Source On-Resistance ––– 12 15.5 mΩ VGS = 10V, ID = 33A f
VGS(th) Gate Threshold Voltage 3.0 ––– 5.0 V VDS = VGS, ID = 250µA
IDSS Drain-to-Source Leakage Current ––– ––– 20 µA VDS = 150V, VGS = 0V
––– ––– 1.0 mA VDS = 150V, VGS = 0V, TJ = 125°C
IGSS Gate-to-Source Forward Leakage ––– ––– 100 nA VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -20V
RG(int) Internal Gate Resistance ––– 0.8 ––– Ω
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units Conditions
gfs Forward Transconductance 130 ––– ––– S VDS = 25V, ID = 50A
Qg Total Gate Charge ––– 71 110 nC ID = 50A
Qgs Gate-to-Source Charge ––– 24 ––– VDS = 75V
Qgd Gate-to-Drain ("Miller") Charge ––– 21 ––– VGS = 10V f
td(on) Turn-On Delay Time ––– 18 ––– ns VDD = 75V
tr Rise Time ––– 60 ––– ID = 50A
td(off) Turn-Off Delay Time ––– 25 ––– RG = 2.5Ω
tf Fall Time ––– 35 ––– VGS = 10V f
Ciss Input Capacitance ––– 4460 ––– pF VGS = 0V
Coss Output Capacitance ––– 390 ––– VDS = 25V
Crss Reverse Transfer Capacitance ––– 82 ––– ƒ = 1.0MHz

Diode Characteristics
Symbol Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current ––– ––– 78c A MOSFET symbol D

(Body Diode) showing the G

ISM Pulsed Source Current ––– ––– 330 A integral reverse
S

(Body Diode)d p-n junction diode.

VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 50A, VGS = 0V f
trr Reverse Recovery Time ––– 89 130 ns ID = 50A
Qrr Reverse Recovery Charge ––– 300 450 nC VR = 128V,
IRRM Reverse Recovery Current ––– 6.5 ––– A di/dt = 100A/µs f
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

Notes:
 Calculated continuous current based on maximum allowable junction „ Pulse width ≤ 400µs; duty cycle ≤ 2%.
temperature. Package limitation current is 75A … Rθ is measured at TJ approximately 90°C
‚ Repetitive rating; pulse width limited by max. junction
temperature.
ƒ Limited by TJmax, starting TJ = 25°C, L = 0.17mH
RG = 25Ω, IAS = 50A, VGS =10V. Part not recommended for use
above this value.

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1000 1000
VGS VGS
TOP 15V TOP 15V
10V 10V

ID, Drain-to-Source Current (A)

ID, Drain-to-Source Current (A)

8.0V 8.0V
7.0V 7.0V
100 6.5V 6.5V
6.0V 6.0V
5.5V
100 5.5V
BOTTOM 5.0V BOTTOM 5.0V

10

5.0V
10
1

≤ 60µs PULSE WIDTH ≤ 60µs PULSE WIDTH

5.0V Tj = 25°C Tj = 175°C
0.1 1
0.1 1 10 100 0.1 1 10 100

VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

1000 3.5
ID = 50A

RDS(on) , Drain-to-Source On Resistance

VGS = 10V
3.0
ID, Drain-to-Source Current(Α)

100

2.5
(Normalized)

TJ = 175°C
10 2.0

TJ = 25°C 1.5
1

VDS = 25V 1.0

≤ 60µs PULSE WIDTH
0.1
0.5
3.0 4.0 5.0 6.0 7.0 8.0 9.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
VGS, Gate-to-Source Voltage (V)
TJ , Junction Temperature (°C)

Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance vs. Temperature

7000 20
VGS = 0V, f = 1 MHZ ID= 50A
Ciss = Cgs + Cgd, Cds SHORTED
6000 VDS = 120V
VGS, Gate-to-Source Voltage (V)

Crss = Cgd
16 VDS= 75V
Coss = Cds + Cgd
5000 VDS= 30V
C, Capacitance (pF)

Ciss
12
4000

3000 8
Coss

2000
4
1000
Crss
0
0
1 10 100 0 20 40 60 80 100 120
QG Total Gate Charge (nC)
VDS , Drain-to-Source Voltage (V)

Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
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IRFP4321PbF
1000 1000
OPERATION IN THIS AREA
LIMITED BY R DS (on)
ISD , Reverse Drain Current (A)

ID, Drain-to-Source Current (A)

100µsec
100 100
TJ = 175°C 1msec

10 10 10msec

TJ = 25°C
1 1
Tc = 25°C
Tj = 175°C DC
VGS = 0V
Single Pulse
0.1 0.1
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1 10 100 1000
VSD , Source-to-Drain Voltage (V) VDS , Drain-toSource Voltage (V)

Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area

Forward Voltage

V(BR)DSS , Drain-to-Source Breakdown Voltage

80 190

LIMITED BY PACKAGE

180
60
ID , Drain Current (A)

170

40

160

20
150

0 140
25 50 75 100 125 150 175 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
TC , Case Temperature (°C) TJ , Junction Temperature (°C)
Fig 9. Maximum Drain Current vs. Fig 10. Drain-to-Source Breakdown Voltage
Case Temperature
5.0 700
EAS, Single Pulse Avalanche Energy (mJ)

ID
600 TOP 13A
4.0 20A
BOTTOM 50A
500
Energy (µJ)

3.0
400

300
2.0

200
1.0
100

0.0 0
0 20 40 60 80 100 120 140 160 25 50 75 100 125 150 175

VDS, Drain-to-Source Voltage (V) Starting TJ, Junction Temperature (°C)

Fig 11. Typical COSS Stored Energy Fig 12. Maximum Avalanche Energy Vs. DrainCurrent
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1

D = 0.50
Thermal Response ( Z thJC )

0.1 0.20

0.10 R1
R1
R2
R2
R3
R3 Ri (°C/W) τι (sec)
0.05 τJ τC
τJ
τ1
τ 0.076792 0.000083
τ2 τ3
τ1
0.02
τ2 τ3
0.233645 0.001175
0.01 Ci= τi/Ri
0.01 Ci= τi/Ri 0.179727 0.008326

SINGLE PULSE Notes:

( THERMAL RESPONSE ) 1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
1E-006 1E-005 0.0001 0.001 0.01 0.1

t1 , Rectangular Pulse Duration (sec)

Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case

100
Allowed avalanche Current vs avalanche
Duty Cycle = Single Pulse
pulsewidth, tav, assuming ∆Tj = 150°C and
Tstart =25°C (Single Pulse)
0.01
Avalanche Current (A)

10 0.05
0.10

Allowed avalanche Current vs avalanche

1
pulsewidth, tav, assuming ∆Τ j = 25°C and
Tstart = 150°C.

0.1
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01

tav (sec)
Fig 14. Typical Avalanche Current vs.Pulsewidth
240 Notes on Repetitive Avalanche Curves , Figures 14, 15:
TOP Single Pulse (For further info, see AN-1005 at www.irf.com)
BOTTOM 1% Duty Cycle 1. Avalanche failures assumption:
200 ID = 50A Purely a thermal phenomenon and failure occurs at a temperature far in
EAR , Avalanche Energy (mJ)

excess of Tjmax. This is validated for every part type.

160 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
120 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
80 7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
tav = Average time in avalanche.
40
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
0
25 50 75 100 125 150 175 PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
Starting TJ , Junction Temperature (°C)
EAS (AR) = PD (ave)·tav

Fig 15. Maximum Avalanche Energy vs. Temperature

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IRFP4321PbF
6.0 40
ID = 1.0A
VGS(th), Gate threshold Voltage (V)

ID = 1.0mA
5.0 ID = 250µA
30

4.0

IRRM - (A)
20

3.0

IF = 33A
10
2.0 VR = 128V
TJ = 125°C
TJ = 25°C
1.0 0
-75 -50 -25 0 25 50 75 100 125 150 175 100 200 300 400 500 600 700 800 900 1000

TJ , Temperature ( °C ) dif / dt - (A / µs)

Fig 16. Threshold Voltage Vs. Temperature Fig. 17 - Typical Recovery Current vs. dif/dt

40 3200

2800

30 2400

2000
QRR - (nC)
IRRM - (A)

20 1600

1200
IF = 50A IF = 33A
10 800
VR = 128V VR = 128V
TJ = 125°C TJ = 125°C
400
TJ = 25°C TJ = 25°C
0 0
100 200 300 400 500 600 700 800 900 1000 100 200 300 400 500 600 700 800 900 1000

dif / dt - (A / µs) dif / dt - (A / µs)

Fig. 18 - Typical Recovery Current vs. dif/dt Fig. 19 - Typical Stored Charge vs. dif/dt

3200

2800

2400

2000
QRR - (nC)

1600

1200
IF = 50A
800
VR = 128V

400 TJ = 125°C
TJ = 25°C
0
100 200 300 400 500 600 700 800 900 1000

dif / dt - (A / µs)

Fig. 20 - Typical Stored Charge vs. dif/dt

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 IRFP4321PbF
Driver Gate Drive
P.W.
D.U.T P.W.
Period D=
Period
+

ƒ VGS=10V *
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
- • Low Leakage Inductance D.U.T. ISD Waveform
Current Transformer
+
Reverse
‚ Recovery Body Diode Forward
-
„ + Current Current
- di/dt
D.U.T. VDS Waveform
Diode Recovery
 dv/dt
VDD

RG • dv/dt controlled by RG VDD Re-Applied

• Driver same type as D.U.T. + Voltage Body Diode Forward Drop
• ISD controlled by Duty Factor "D" - Inductor Current
Inductor Curent
• D.U.T. - Device Under Test

Ripple ≤ 5% ISD

* VGS = 5V for Logic Level Devices

Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs

V(BR)DSS
15V
tp

L DRIVER
VDS

RG D.U.T +
V
- DD
IAS A
VGS
20V
tp 0.01Ω
I AS

Fig 22a. Unclamped Inductive Test Circuit Fig 22b. Unclamped Inductive Waveforms

LD
VDS VDS
90%
+
VDD -

D.U.T 10%
VGS VGS
Pulse Width < 1µs
Duty Factor < 0.1% td(on) tr td(off) tf

Fig 23a. Switching Time Test Circuit Fig 23b. Switching Time Waveforms
Id
Vds

Vgs

L
VCC
DUT
0
Vgs(th)
1K

Qgs1 Qgs2 Qgd Qgodr

Fig 24a. Gate Charge Test Circuit Fig 24b. Gate Charge Waveform
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IRFP4321PbF
TO-247AC Package Outline Dimensions are shown in millimeters (inches)

TO-247AC package is not recommended for Surface Mount Application.

TO-247AC Part Marking Information

EXAMPLE: THIS IS AN IRFPE30
WITH AS SEMBLY PART NUMBER
LOT CODE 5657 INTERNAT IONAL
ASS EMBLED ON WW 35, 2001 RECTIFIER IRFPE30

IN T HE AS SEMBLY LINE "H" LOGO 135H

56 57
DATE CODE
ASSEMBLY YEAR 1 = 2001
Note: "P" in ass embly line pos ition
indicates "Lead-Free" LOT CODE WEEK 35
LINE H

Data and specifications subject to change without notice.

This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 06/06
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Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/