Agenda: Review Review
Agenda: Review Review
Agenda
ECEN 370
Electronic Properties of Materials
• Metal oxide semiconductor
• Metal oxide semiconductor field effect transistors
Created by Qammer H. Abbasi (MOSFET)
Modified by Jim Ji
2
Note lecture 17, 18
Review Review
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Metal
+Q
(a) V
C E
-Q
Metal
Charge density
Mobile electrons
x
Metal
+Q
(b) V
E W
Depletion
-Q
region
(c)
Inversion +Q
V > Vth layer
E Wn
Wa -Q
Conduction
electron Depletion Charge density
region
The field effect. (a) In a metal-air-metal capacitor, all the charges reside on the surface. (b)
Illustration of field penetration into a p-type semiconductor. (c) As the field increases eventually
when V > VT (threshold voltage) an inversion layer is created near the surface in which there
are conduction electrons. From Principles of Electronic Materials
Fig 6.35 and Devices, Third Edition, S.O. Kasap
(© McGraw-Hill, 2005)
Source: Wikipedia
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p+ stopper
p-substrate
Bulk Contact
https://www.youtube.com/watch?v=QO5FgM7MLGg
https://www.youtube.com/watch?v=tz62t-q_KEc
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Source
Symbol Gate Drain VGS = 8 V
Vth = 4 V
ID = 1 mA ID
VGS = 8 V ID = 4.5 mA
ID
S G D Metal electrodes S G D S D
n G
A B A
V DS
D VDS
SiO 2 insulation n+ n+ n-channel is the n+ P' n+
p inversion layer p
n+ p n+ Heavily doped G Blk
(b) Above threshold VGS > Vth and VDS < VDS(sat) (d) Above threshold V GS > V th and saturation region, V DS > V DS(sat)
n-region
p-type substrate S
The MOSFET ID vs VDS characteristics
Depletion layer
Blk Bulk (Substrate) From Principles of Electronic Materials
Fig 6.37 and Devices, Third Edition, S.O. Kasap
(© McGraw-Hill, 2005)
| VGS | Gate
Source Drain
(of carriers) (of
carriers)
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| VGS | Gate
G G
Source Drain S
(of carriers) (of carriers)
S Channel
NMOS Enhancement NMOS Depletion
D D
S S
| VGS | > | VDD – | VT | | | VGS | < | VDD – |VT| | PMOS Enhancement NMOS with
Bulk Contact
Ideal MOS Diode n-type, Vappl=0 Ideal MOS Diode p-type, Vappl=0
Assume Flat-band
at equilibrium
qfS
EC
EF
Ei
EV
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Schematic
For vDS<vGS-Vt0 and vGS>Vt0 the NMOS is operating in the triode region
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An nMOS has W=160 mm, L=2 mm, KP= 50 mA/V2 and Vto=2 V.
Tapering
of the Plot the drain current characteristic vs drain to source voltage
channel
for vGS=3 V.
- increments i D K 2vGS Vt 0 v DS v DS
2
of iD are
W KP
smaller i D K vGS Vt 0 K
2
when L 2
vDS is
larger When vGD=Vt0 then the channel
thickness is 0 and
i D K vGS Vt 0
2
Channel length i D Kv DS
2
modulation
id depends on vDS in
saturation region How does p-channel
(approx: iD =const in MOSFET operate?
saturation region) -voltage polarities
-iD current
-schematic
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,
VDS < VGS − Vt. Essentially, the MOSFET operates similar to a
resistor in this mode with a linear relation between voltage and
current.
• Lastly, saturation mode occurs when VGS > Vt and VDS > VGS −
Vt. In this mode the switch is on and conducting, however since
drain voltage is higher than the gate voltage, part of the channel is
turned off. This mode corresponds to the region to the right of the
dotted line, which is called the pinch-off voltage.
• Pinch-off occurs when the MOSFET stops operating in the linear
region and saturation occurs.
• In digital circuits MOSFETS are only operated in the linear mode,
while the saturation region is reserved for analogue circuits.