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ITEC255-Chapter3 (Part1)

This document provides an overview of computer organization and architecture. It discusses the major components of a computer system including the processor, main memory, and I/O modules. These components are interconnected, usually via a shared bus, to exchange data and control signals. The document also describes the von Neumann architecture model and how instructions and data are stored in a single memory and executed sequentially from one instruction to the next. It outlines the basic logic components used to store and process data as well as the input, output, and memory modules needed for a functioning computer.

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0% found this document useful (0 votes)
39 views

ITEC255-Chapter3 (Part1)

This document provides an overview of computer organization and architecture. It discusses the major components of a computer system including the processor, main memory, and I/O modules. These components are interconnected, usually via a shared bus, to exchange data and control signals. The document also describes the von Neumann architecture model and how instructions and data are stored in a single memory and executed sequentially from one instruction to the next. It outlines the basic logic components used to store and process data as well as the input, output, and memory modules needed for a functioning computer.

Uploaded by

asnescrib
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Eastern Mediterranean University

School of Computing and Technology

ITEC255
Computer Organization
ITEC255 - Computer Organization & Architecture

& Architecture

A TOP-LEVEL VIEW OF COMPUTER


FUNCTION AND INTERCONNECTION
(PART 1)

Key Points
• The major computer system components (processor, main
memory, I/O modules) need to be interconnected in order to
exchange data and control signals.

• Thus, at a top level, we can describe a computer system by:


ITEC255 - Computer Organization & Architecture

1. Describing the external behavior of each component – that


is, the data and control signals that it exchanges with other
components
2. Describing the interconnection structure and the controls
required to manage the use of the interconnection
structure.

1
Key Points
• The most popular means of interconnection is the use of a
shared system bus consisting of multiple lines.

• Key design elements for buses include:


 arbitration – whether permission to send signals on bus
ITEC255 - Computer Organization & Architecture

lines is controlled centrally or in a distributed fashion


 timing – whether signals on the bus are synchronized to a
central clock or are sent asynchronously based on the most
recent transmission
 width – number of address lines and number of data lines

Computer Components
• Virtually all contemporary computer designs are based on
concepts referred to as von Neumann architecture.

• Von Neumann architecture is based on three key concepts:


 Data and instructions are stored in a single read-write
ITEC255 - Computer Organization & Architecture

memory.
 Contents of this memory are addressable by location,
without regard to the type of data contained there.
 Execution occurs in a sequential fashion from one
instruction to the next.

2
Computer Components

• There is a small set of basic logic components that can be


combined in various ways to store binary data and to perform
arithmetic and logical operations on that data.
• If there is a particular computation to be performed, a
ITEC255 - Computer Organization & Architecture

configuration of logic components designed specifically for that


computation could be constructed.
• We can think of the process of connecting the various
components in the desired configuration as a form of
programming.
• The resulting “program” is in the form of hardware and is
termed a hardwired program.

Computer Components

• Hardwired programming is done by constructing a


configuration of hardware logical components to perform a
particular set of arithmetic and logic operations on a set of
ITEC255 - Computer Organization & Architecture

data.

3
Computer Components
• Programming is now much easier. Instead of rewiring the
hardware for each new program, all we need to do is provide
a new sequence of codes.
• Each code is an instruction and part of the hardware
interprets each instruction and generates control signals.
ITEC255 - Computer Organization & Architecture

• To distinguish this new method of programming, a sequence


of codes or instructions is called software.

Computer Components

• Two major components of the system are an instruction


interpreter and a module of general-purpose arithmetic and
logic functions.
• Several other components are needed to yield a functioning
ITEC255 - Computer Organization & Architecture

computer. Data and instructions must be put into the system.


• For this we need some sort of input module. This module
contains basic components for accepting data and
instructions in some form and converting them into an
internal form of signals usable by the system.
• A means of reporting results is needed, and this is in the form
of an output module.
• Taken together, these are referred to as I/O components.

4
Computer Components

• An input device will bring instructions and data in


sequentially.

• Thus, there must be a place to store temporarily both


ITEC255 - Computer Organization & Architecture

instructions and data.

• That module is called memory or main memory to


distinguish it from external storage or peripheral devices.

Computer Components
• Figure shows top-level components and suggests the
interactions among them.
ITEC255 - Computer Organization & Architecture

10

5
Computer Components

• CPU exchanges data with memory. For this purpose, it


typically makes use of two internal registers:
 a memory address register (MAR), which specifies the
address in memory for the next read or write
ITEC255 - Computer Organization & Architecture

 a memory buffer register (MBR), which contains the data


to be written into memory or receives the data read from
memory.
• Similarly, an I/O address register (I/OAR) specifies a
particular I/O device.
• An I/O buffer (I/OBR) register is used for the exchange of
data between an I/O module and the CPU.

11

Computer Components

• A memory module consists of a set of locations, defined by


sequentially numbered addresses.

• Each location contains a binary number that can be


ITEC255 - Computer Organization & Architecture

interpreted as either an instruction or data.

• An I/O module transfers data from external devices to CPU


and memory, and vice versa. It contains internal buffers for
temporarily holding these data until they can be sent on.

12

6
Computer Function

• Basic function performed by a computer is execution of a


program, which consists of a set of instructions stored in
memory.
ITEC255 - Computer Organization & Architecture

• Processor does actual work by executing instructions


specified in program.

• In its simplest form, instruction processing consists of two


steps: the processor reads (fetches) instructions from
memory one at a time and executes each instruction.

13

Computer Function
• Program execution consists of repeating the process of
instruction fetch and instruction execution. The instruction
execution may involve several operations and depends on the
nature of the instruction.
• The processing required for a single instruction is called an
ITEC255 - Computer Organization & Architecture

instruction cycle.
• Program execution halts only if the machine is turned off,
some sort of unrecoverable error occurs, or a program
instruction that halts the computer is encountered.

14

7
Computer Function
• At the beginning of each instruction cycle, the processor
fetches an instruction from memory.
• In a typical processor, a register called the program counter
(PC) holds the address of the instruction to be fetched next.
• The processor always increments the PC after each
ITEC255 - Computer Organization & Architecture

instruction fetch so that it will fetch the next instruction in


sequence.
• The fetched instruction is loaded into a register in the
processor known as the instruction register (IR).
• The instruction contains bits that specify the action the
processor is to take.
• The processor interprets the instruction and performs the
required action.

15

Computer Function

• In general, these actions fall into four categories:


 Processor-memory: Data may be transferred from processor
to memory or from memory to processor.
 Processor-I/O: Data may be transferred to or from a
ITEC255 - Computer Organization & Architecture

peripheral device by transferring between the processor and an


I/O module.
 Data processing: The processor may perform some arithmetic
or logic operation on data.
 Control: An instruction may specify that the sequence of
execution be altered.

16

8
Computer Function
Example:
• Consider a simple example using a hypothetical machine that
includes the characteristics shown below.
ITEC255 - Computer Organization & Architecture

17

Computer Function
Example:
• The processor contains a single data register, called an
accumulator (AC).
• Both instructions and data are 16 bits long.
• The instruction format provides 4 bits for the opcode.
ITEC255 - Computer Organization & Architecture

• A program fragment adds contents of memory word at address


940 to content of memory word at address 941 and stores
result at address 941.
• Program Counter (PC) register contains the value 300.

• To summarize:
• Step 1: Load AC from 940
• Step 2: Add contents of 941 to AC
• Step 3: Store AC to 941
18

9
Computer Function

Example:
1. PC contains 300, address of first instruction. This instruction (value 1940
in hexadecimal) is loaded into instruction register IR and PC is
incremented.
2. First instruction in IR is 1940.
ITEC255 - Computer Organization & Architecture

1. First 4 bits (1) indicates that AC is to be loaded.


2. Remaining 12 bits specify the address (940) from which data are to be
used.
3. Next instruction (5941) is fetched from location 301 and PC is
incremented.
4. Old contents of AC and content of location 941 are added and result is
stored in AC.
5. Next instruction (2941) is fetched from location 302 and PC is
incremented.
6. Content of AC are stored in location 941.

19

Computer Function
Example:
Solution
ITEC255 - Computer Organization & Architecture

20

10
Computer Function
• Virtually all computers provide mechanism by which other
modules (I/O, memory) may interrupt normal processing of
processor.
• Interrupts are provided primarily as a way to improve processing
efficiency.
• The most common classes of interrupts:
ITEC255 - Computer Organization & Architecture

 Program: Occurs as a result of an instruction execution, such


as arithmetic overflow, division by zero, etc.
 Timer: Generated by a timer within the processor and allows
the operating system to perform certain functions on a regular
basis.
 I/O: Generated by an I/O controller, to signal normal
completion of an operation or to signal a variety of error
conditions.
 Hardware failure: Generated by a failure such as power
failure or memory parity error.
21

Computer Function

• Most external devices are much slower than processor.


Suppose that processor is transferring data to a printer using
instruction cycle. After each write operation, processor must
pause and remain idle until printer catches up.
ITEC255 - Computer Organization & Architecture

• Length of this pause may be order of many hundreds or even


thousands of instruction cycles that do not involve memory.

• This is a very wasteful use of processor. With interrupts, the


processor can be engaged in executing other instructions
while an I/O operation is in progress.

22

11
Computer Function
• From the point of view of the user program, an interrupt is just an
interruption of the normal sequence of execution.
• When the interrupt processing is completed, execution resumes.
Thus, the user program does not have to contain any special code to
accommodate interrupts; the processor and the operating system
are responsible for suspending the user program and then resuming
ITEC255 - Computer Organization & Architecture

it at the same point.

23

Computer Function

• To accommodate interrupts, an interrupt cycle is added to the


instruction cycle.

• In the interrupt cycle, the processor checks to see if any


ITEC255 - Computer Organization & Architecture

interrupts have occurred, indicated by the presence of an


interrupt signal.

• If no interrupts are pending, the processor proceeds to the


fetch cycle and fetches the next instruction of the current
program.

24

12
Computer Function
• If an interrupt is pending, the processor does the following:
 It suspends execution of the current program being executed
and saves its context on the system stack – a special place in
memory.
 It sets the program counter to the starting address of an
interrupt handler routine.
ITEC255 - Computer Organization & Architecture

25

Computer Function

• The processor now proceeds to the fetch cycle and fetches the
first instruction in the interrupt handler program, which will
service the interrupt.
ITEC255 - Computer Organization & Architecture

• The interrupt handler program is generally part of the


operating system.

• The processor can be employed much more efficiently with


the use of interrupts.

26

13
Computer Function
Example:
• The user program performs a series of WRITE calls
interleaved with processing.
• Code segments 1, 2, and 3 refer to sequences of
instructions that do not involve I/O.
ITEC255 - Computer Organization & Architecture

• The WRITE calls are to an I/O program that is a system


utility and that will perform the actual I/O operation.
• The I/O program consists of three sections:
1. Code segment 4 is used to prepare for the actual I/O
operation.
2. The actual I/O operation.
3. Code segment 5 is used to complete the operation.

27

Computer Function
Example: WRITE WRITE
Solution
(Short I/O wait)
ITEC255 - Computer Organization & Architecture

WRITE

WRITE

28

14
Computer Function
WRITE WRITE
Example:
Solution
(Long I/O wait)
ITEC255 - Computer Organization & Architecture

WRITE
WRITE

29

15

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