TC4521BP

TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic

TC4521BP
TC4521BP 24-Stage Frequency Divider

TC4521BP is frequency divider consisting of 24 stages of

flip-flop. The input section is equipped with an inverter to enable
to use either RC oscillator circuit or crystal oscillator circuit and
to accept pulse from external clock source.
Each flip-flop is inverted by the falling edge of the output of
previous stage flip-flop and this can count up to the maximum of
224 = 16,777,216.
Since six outputs, 218, 219, 220, 221, 222, and 223 are available
besides of 224, adjustment of frequency divided output can be
achieved.
Weight: 1.00 g (typ.)

Pin Assignment

Count Capacity

Output Count Capacity

18
Q18 2 = 262,144
19
Q19 2 = 524,288
20
Q20 2 = 1,048,576
21
Q21 2 = 2,097,152
22
Q22 2 = 4,194,304
23
Q23 2 = 8,388,608
24
Q24 2 = 16,777,216

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 TC4521BP
Block Diagram

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 TC4521BP
Logic Diagram

Internal Flip Flop Logic Diagram Flip Flop Timing Chart

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 TC4521BP
Absolute Maximum Ratings (Note)

Characteristics Symbol Rating Unit

VDD1 VSS1 − 0.5~VSS1 + 20

DC supply voltage V
VDD2 VSS1 − 0.5~VDD1 + 0.5
Input voltage VIN VSS1 − 0.5~VDD1 + 0.5 V
Output voltage VOUT VSS1 − 0.5~VDD1 + 0.5 V
DC input current IIN ±10 mA
Power dissipation PD 300 mW
Operating temperature range Topr −40~85 °C
Storage temperature range Tstg −65~150 °C

Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or
even destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly
even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute
maximum ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).

Operating Ranges (VSS1 = VSS2 = 0 V) (Note)

Characteristics Symbol Test Condition Min Typ. Max Unit

DC supply voltage VDD1, VDD2 ⎯ 3 ⎯ 18 V

Input voltage VIN ⎯ 0 ⎯ VDD1 V

Note: The operating ranges must be maintained to ensure the normal operation of the device.
Unused inputs must be tied to either VDD or VSS.

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 TC4521BP
Static Electrical Characteristics (VSS1 = VSS2 = 0 V, VDD1 = VDD2)
Test Condition −40°C 25°C 85°C
Sym-
Characteristics VDD Unit
bol Min Max Min Typ. Max Min Max
(V)
5 4.95 ⎯ 4.95 5.00 ⎯ 4.95 ⎯
High-level output ⎪IOUT⎪ < 1 μA
VOH 10 9.95 ⎯ 9.95 10.00 ⎯ 9.95 ⎯ V
voltage VIN = VSS, VDD
15 14.95 ⎯ 14.95 15.00 ⎯ 14.95 ⎯
5 ⎯ 0.05 ⎯ 0.00 0.05 ⎯ 0.05
Low-level output ⎪IOUT⎪ < 1 μA
VOL 10 ⎯ 0.05 ⎯ 0.00 0.05 ⎯ 0.05 V
voltage VIN = VSS, VDD
15 ⎯ 0.05 ⎯ 0.00 0.05 ⎯ 0.05
VOH = 4.6 V 5 −0.61 ⎯ −0.51 −1.0 ⎯ −0.42 ⎯
VOH = 2.5 V 5 −2.5 ⎯ −2.1 −4.0 ⎯ −1.7 ⎯
Output high current IOH VOH = 9.5 V 10 −1.5 ⎯ −1.3 −2.2 ⎯ −1.1 ⎯ mA
VOH = 13.5 V 15 −4.0 ⎯ −3.4 −9.0 ⎯ −2.8 ⎯
VIN = VSS, VDD
VOL = 0.4 V 5 0.61 ⎯ 0.51 1.2 ⎯ 0.42 ⎯
VOL = 0.5 V 10 1.5 ⎯ 1.3 3.2 ⎯ 1.1 ⎯
Output low current IOL mA
VOL = 1.5 V 15 4.0 ⎯ 3.4 12.0 ⎯ 2.8 ⎯
VIN = VSS, VDD
VOUT = 0.5 V, 4.5 V 5 3.5 ⎯ 3.5 2.75 ⎯ 3.5 ⎯
VOUT = 1.0 V, 9.0 V 10 7.0 ⎯ 7.0 5.5 ⎯ 7.0 ⎯
Input high voltage VIH V
VOUT = 1.5 V, 13.5 V 15 11.0 ⎯ 11.0 8.25 ⎯ 11.0 ⎯
⎪IOUT⎪ < 1 μA
VOUT = 0.5 V, 4.5 V 5 ⎯ 1.5 ⎯ 2.25 1.5 ⎯ 1.5
VOUT = 1.0 V, 9.0 V 10 ⎯ 3.0 ⎯ 4.5 3.0 ⎯ 3.0
Input low voltage VIL V
VOUT = 1.5 V, 13.5 V 15 ⎯ 4.0 ⎯ 6.75 4.0 ⎯ 4.0
⎪IOUT⎪ < 1 μA
5
Input “H” level IIH VIH = 18 V 18 ⎯ 0.1 ⎯ 10− 0.1 ⎯ 1.0
μA
current “L” level IIL VIL = 0 V 18 ⎯ −0.1 ⎯ −10 −5
−0.1 ⎯ −1.0
5 ⎯ 5 ⎯ 0.005 5 ⎯ 150
Quiescent supply VIN = VSS, VDD
IDD 10 ⎯ 10 ⎯ 0.010 10 ⎯ 300 μA
current (Note)
15 ⎯ 20 ⎯ 0.015 20 ⎯ 600

Note: All valid input combinations.

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 TC4521BP
Dynamic Electrical Characteristics
(Ta = 25°C, VSS1 = VSS2 = 0 V, VDD1 = VDD2, CL = 50 pF)
Test Condition
Characteristics Symbol Min Typ. Max Unit
VDD (V)
5 ⎯ 70 200
Output transition time
tTLH ⎯ 10 ⎯ 35 100 ns
(low to high)
15 ⎯ 30 80
5 ⎯ 70 200
Output transition time
tTHL ⎯ 10 ⎯ 35 100 ns
(high to low)
15 ⎯ 30 80
5 ⎯ 1.1 9.0
Propagation delay time tpLH
⎯ 10 ⎯ 0.5 3.5 μs
(IN2-Q18) tpHL
15 ⎯ 0.3 2.7
5 ⎯ 1.4 12
Propagation delay time tpLH
⎯ 10 ⎯ 0.6 4.5 μs
(IN2-Q24) tpHL
15 ⎯ 0.4 3.5
5 ⎯ 220 2600
Propagation delay time
tpHL ⎯ 10 ⎯ 100 1000 ns
(RESET-Qn)
15 ⎯ 70 750
5 3 9.5 ⎯
Max clock frequency fCL ⎯ 10 6 17.5 ⎯ MHz
15 8 23.5 ⎯
5
Max clock input rise time trCL
⎯ 10 No limit μs
Max clock input fall time tfCL
15
5 ⎯ 55 385
Min clock pulse width tW ⎯ 10 ⎯ 25 150 ns
15 ⎯ 16 120
5 ⎯ 60 385
Min pulse width
tWH ⎯ 10 ⎯ 26 150 ns
(RESET)
15 ⎯ 20 120
Input capacitance CIN ⎯ ⎯ 5 7.5 pF

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 TC4521BP
Waveforms for Measurement of Dynamic Characteristics

Application Circuit
When CR Oscillation is Used as Time Reference

When Crystal Oscillation is Used as the Time Reference

Typical Data

X’tal (Hz) CI, CO (pF) RO (Ω)

32.768 k 23 500 k
100 k 60 100 k
1M 45~50 100
4.194304 M 12~15 0

Rf = 10 MΩ

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 TC4521BP
Package Dimensions

Weight: 1.00 g (typ.)

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 TC4521BP

RESTRICTIONS ON PRODUCT USE 20070701-EN GENERAL

• The information contained herein is subject to change without notice.

• TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor
devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical
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conditions set forth in the “Handling Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability
Handbook” etc.

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