In which CPU organization instruction more than one registers are used by the processor to

processed the given query.do identify that instruction , named it and solve the given equation
according to it.R=(A*P)+ V

Computer perform task on the basis of instruction provided. An instruction in computer comprises of
groups called fields. These field contains different information as for computers every thing is in 0 and 1
so each field has different significance on the basis of which a CPU decide what to perform. The most
common fields are:

Operation field which specifies the operation to be performed like addition. Address field which contain
the location of operand, i.e., register or memory location. Mode field which specifies how operand is to
be founded An instruction is of various length depending upon the number of addresses it contain.
Generally CPU organization are of three types on the basis of number of adderss fields:

Single Accumulator organization

2. General register organization

3. Stack organization

In first organization operation is done involving a special register called accumulator. In second on
multiple registers are used for the computation purpose. In third organization the work on stack basis
operation due to which it does not contain any address field. It is not necessary that only a single
organization is applied a blend of various organization is mostly what we see generally. On the basis of
number of address, instruction are classified as:

R=(A*P)+ V

Zero Address Instructions:

Expression R=(A*P)+ V

Postfixed : R=(A*P)+ V TOP means top of stack

M[R] is any memory location

PUSH A TOP = A

PUSH P TOP = P

Mul TOP = A*P

PUSH V TOP = V
Add Top=(A*P )+V

POP R M[R] = TOP

Categorically discuss the Design‘s where “system behavior is not visible as such ” and here is
another case “where system behavior is highly focused”

computer architecture:

set of rules and methods .

that describe the functionality, organization, and implementation of computer systems.

Design is the process of planning system, component, or process to meet desired needs.

decision-making process

basic sciences, math and engineering sciences are applied .

To meet a stated objective.

System Design: Three levels of system design

Processor-Memory-Switch (PMS) level:

system components and their interconnections are described.

components block diagram form.

processor data path and control

Instruction Set Level:

The function of each instruction is defined. emphasis -behavior of the system

Rather than the hardware structure.

Register Transfer Level: hardware description language (HDL) RTL is a design abstraction RTL models
the digital signals between hardware registers, and the logical operations

Also called gate level abstraction. The behavior is less visible, while the hardware structure dominates.
input ouput

0 1
1 0

working: This is the middle level of 3-level data abstraction architecture. It describes what data is
stored in database. View level: Highest level of data abstraction. This level describes the user
interaction with database system internal Level: Actual physical storage structure and access paths.
Conceptual or Logical Level: Structure and constraints for the entire database. External or View
level: Describes various user views. Tool of assembly language is used to remove the cross
references Assembly language commands are a symbolic representation of machine language
commands using “English like”keywords called “mnemonics”Using assembly language commands its
much easier to program as compared to machine language in the form of long strings of 1s and 0s
Useful Tools: The assembler:Assembly language program --machine language program ,assembly
process conversion can be done without using a computer, but tedious & error-prone Cross
assembler linker:When developing large programs, separate modules can be developed and
assembled by different persons working at the same time The linker links those different modules
together to form a single module for loading and execution.It also resolves cross references and
determines the starting point for execution of the program The debugger or monitor: Working in
assembly language is tedious and error-prone.“Run-time” errors often crash the system instead of
smoothly returning the user to the operating system A “debugger”, also called a “monitor”, is a
computer program used to help in finding the logical errors in the program Debugging is an
important part of determining.

In which architecture processor need more than one cycle to complete the given task. And if it
happens, how you identify these cyclic responsibilities individually and effects on the currently
used processor with respect to the CPU utilization.

Von Neumann architecture is based on the stored-program computer concept, where instruction
data and program data are stored in the same memory. This design is still used in most computers
produced today.

Processor need two clock cycles to complete an instruction .

1 st cycle is used to access instruction from the memory and decode it .

2 nd clock cycle gets the required data from the memory

The earliest computing machines had fixed programs. Some c very simple computers still use this
design, either for simplicity or training purposes. For example, a desk calculator (in principle) is a
fixed program computer. It can do basic mathematics, but it cannot run a word processor or games.
Changing the program of a fixed-program machine requires redesigning the machine. • With the
proposal of the stored-program computer, this changed. A stored-program computer includes, by
design, an instruction set, and can store in memory a set of instructions (a program) that details the
computation.

In the classical von Neumann architecture the ALU and the control unit are connected to a single
memory that stores both the data values and the program instructions. During execution, an
instruction is read from the memory and decoded, appropriate operands are fetched from the
memory, and, finally, the instruction is executed. The main disadvantage is that memory bandwidth
becomes the bottleneck in such an architecture.

Central Processing Unit (CPU): The Central Processing Unit (CPU) is the electronic circuit responsible
for executing the instructions of a computer program. It is sometimes referred to as the
microprocessor or processor. The CPU contains the ALU, CU and a variety of registers.

Registers: Registers are high speed storage areas in the CPU. All data must be stored in a register
before it can be processed.

Arithmetic and Logic Unit (ALU):

The ALU allows arithmetic (add, subtract etc) and logic (AND, OR, NOT etc) operations to be carried
out

. Control Unit (CU): The control unit controls the operation of the computer’s ALU, memory and
input/output devices, telling them how to respond to the program instructions it has just read and
interpreted from the memory unit. The control unit also provides the timing and control signals
required by other computer components.

Busses: Buses are the means by which data is transmitted from one part of a computer to another,
connecting all major internal components to the CPU and memory. A standard CPU system bus is
comprised of a control bus, data bus and address bus. Address Bus: Carries the addresses of data
between the processor and memory Data Bus : Carries data between the processor, the memory
unit and the input/output devices Control Bus: Carries control signals/commands from the CPU (and
status signals from other devices) in order to control and coordinate all the activities within the
computer.

Memory Unit: The memory unit consists of RAM, sometimes referred to as primary or main
memory. Unlike a hard drive (secondary memory), this memory is fast and also directly accessible by
the CPU. RAM is split into partitions. Each partition consists of an address and its contents (both in
binary form). The address will uniquely identify every location in the memory.

How you identify the offset address and effective address in both listed
cases.Identify with the help of diagram and label it where the offset and effective
addresses are reside also mention the addressing mode name with reference to the
listed queries.1) Add R1, R22) Add R1, (R2)

An offset is determined by adding any combination of three address elements: displacement, base
and index. Displacement: It is an 8 bit or 16 bit immediate value given in the instruction.

Base: Contents of base register, BX or BP

Index: Content of index register SI or DI.

the effective address is generated by adding the next instruction address to the the address field.
 Address with in address is offset address .Or effective address is address of operand directly .

In Direct Addressing Mode effective address of operand id present in instruction itself

.
opcode Address

Operend

Add R1, R22 in this case R22 is effective address