Proc Emb - Ch1
Proc Emb - Ch1
Embedded Processors
ARM Cortex-M4 Architecture & Embedded Programming Practice
Adel Ghazel
[email protected]
1 September 2017
Course Objectives
▪ Target knowledge
▪ Hardware architecture and technologies for widely used processors
▪ Machine level programming concept and practice
▪ Embedded real-time software application coding and porting on target MCU board
▪ Target skills
▪ Understand ARM Cortex-M4 MCU core & peripherals architecture
▪ Master an Integrated Development Environment (IDE) for ARM processors programming
▪ Practice ARM Assembler programming
▪ Practice Embedded C software coding and porting to ARM MCU target
▪ Master the configuration and the programming of ARM Cortex-M4 peripherals
▪ Build and test the implementation of a DSP application software on ARM MCU target
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Course Syllabus
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Course Activities Organisation
Session Designation Activity
S01 Embedded Processors Basic Concepts Lecture
S02 ARM Cortex-M4 Architecture Lecture
S03 ARM Assembler Syntax & Coding Examples Lecture
S04 Initiation to the ARM IDE – Simulation Mode Lab
S05 Assembler Programming Lab Lab
S06 Embedded C Programming Techniques Lecture
S07 Embedded C Programming Lab Lab
S08 ARM Cortex-M4 I/Os Lecture
S09 Embedded Software Application Coding and Porting to Eval Board Lab
S10 ARM Cortex-M4 Interruptions & Times Lecture
S11 ARM Cortex-M4 Interruptions & Timers Lab Lab
S12 ARM Cortex-M4 ADC & DAC Lecture
S13 DSP Application Implementation Lab Lab
S14 Practical Exam Lab Exam
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Chapter 1
Embedded Processors Basic Concepts
5 September 2017
Chapter Syllabus
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INTRODUCTION
TO EMBEDDED SYSTEMS
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Embedded System Definition
▪ No formal definition of an embedded system
▪ Embedded systems typically use a microprocessor combined with other hardware and software to solve a
specific computing problem
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Embedded System Components
▪ Microprocessors Hardware range from simple (by today’s standards) 8-bit microcontrollers to the fastest
and most sophisticated 64-bit microprocessors.
▪ Embedded system Software ranges from a small executive to a large Real-Time Operating System (RTOS)
with a Graphical User Interface (GUI).
▪ Typically, the embedded system software must respond to events in a deterministic way and should be
guaranteed not to crash.
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Computer Design Concept
Power
communications Integration
Security
Human & Machines
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Embedded Design Lifecycle
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Embedded Processor Choice
Real-time
Constraints Legacy
Code Power
Budget
Cost of
Goods
Performance
Tool
Time to Support
Market
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MICROPROCESSOR UNITS
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Processor Basic Architecture
Address Bus
Data Bus
Input/Output
Memory
Interfaces
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Buses Definition
Address Bus
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CPU Organisation
▪ Logic circuit with program-based operation and composed of 3 functional parts
Quartz
Control Instructions decoding
Unit
Time supervision of processing operations
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ALU Description
Arithmetic Operations
addition
Operation
selection subtraction
Accumulator
Increment
Result Decrement
ALU …
Logical Operations
Temporary Complement
Register
AND
State
Register OR
XOR
Rotation
…
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CPU Registers
▪ Accumulator: used during ALU operations, it contains one of operands before execution and the
obtained result after ALU operation
▪ Instruction Register (IR) : contains operation code of the instruction being executed
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CPU Control Unit
▪ Function: Supervision of CPU operations
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Memory Definition
▪ Used for data and programs storage and can be of two types
▪ Accessible only for reading: ROM
k bits Word
0 0 1 1 0 1 0 1 ▪ Static : information maintained indefinitely if
0
circuit powered
n Address lines
1
2n locations
A0 RD WR
2 ▪ Dynamic : information lost during time
Addresses
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Memory Access Mode
Reading Access
CPU places selected CPU activates Read
address on Address command
Bus
Time
Memory location Memory case content
selected deposed on Data Bus
Writing Access
CPU places selected CPU places Data on CPU activates Write
address on Address Bus Data Bus command
Time
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Input / Output Interface
▪ Function: used to establish communication with peripheral units: keyboard, screen, printer, host processor,...
▪ Addressing & Access: similar to memory procedures
CPU
Output Address Bus
Output
Port
Commands
Control CAN Interface
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CLASSES OF ARCHITECTURES
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Embedded Processors Nomenclature
▪ Microprocessors
▪ Architecture: mono-chip CPU, need for external additional circuits
◦ RISC: Reduced Instruction Set Computer
◦ CISC: Complex Instruction Set Computer
▪ Applications: Data processing
▪ Examples: Pentium-Series, PowerPC, MIPS,…
▪ Microcontrollers
▪ Architecture: CPU, RAM, ROM, serial/parallel interfaces, timer, interruption circuits
▪ Applications: process control & management
▪ Characteristics: relaxed processing time constraints, compact instructions set
▪ Examples: 8051, 68HC11, PIC, AdµC7022,…
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Von Neumann Architecture
Interfaces
General Purpose
Processor
Inputs
One memory shared
for Data & instructions
CPU
(Core) Double use of Data &
Address Buses
Outputs
1. Instruction fetch
2. Data_1 fetch
3. Data_2 fetch
Address Bus
Interfaces
DMD
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CISC Processor Mode
▪ CISC (Complex Instruction Set Computer) is the traditional computer architecture using microcode to
execute very comprehensive instructions.
▪ Instructions may be variable in length and use all addressing modes, requiring complex circuitry to decode
them.
▪ CISC are direct representations of high level functions of high level programming languages
▪ In CISC mode one instruction would do all of the work in a single instruction. Example: load up the two
numbers to be added, add them, and then store the result back directly to memory.
▪ CISC concept improves density of information to overcome previous µP technology constraints: lack of
large memories and slow access time, CPU with few registers
▪ General goal at that time was to provide every possible addressing mode for every instruction
(orthogonality principle).
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RISC Processor Mode
▪ RISC (Reduced Instruction Set Computer) is a computer architecture that reduces chip complexity by
using simpler instructions.
▪ RISC compilers have to generate software routines to perform complex instructions that were previously
done in hardware by CISC computers.
▪ RISC keeps instruction size constant, bans the indirect addressing mode and retains only those instructions
that can be overlapped and made to execute in one machine cycle or less.
▪ The RISC chip is faster than its CISC counterpart and is designed and built more economically
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RISC vs CISC
▪ RISC machine executes instructions faster because it does not have to go through a microcode conversion
layer.
▪ RISC compiler generates more instructions than CISC compiler for the same processing.
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Pipeline Technique
IF ID EX MEM WB
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Advanced Pipeline Architectures
VLIW architecture
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Program Flow Configurations
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EMBEDDED PROCESSORS
APPLICATIONS
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Embedded Processors Applications
▪ Consumer electronics
▪ Automotive
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Classes of Computing Systems
▪ Generic computers
▪ Functions: Data Processing with interactive user interface
▪ Applications: PC, Set-top box, video games, PDA, …
▪ Control systems
▪ Functions: Real time system and process control
▪ Applications: car engines, industrial processes, navigation equipments, …
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Smart Phone µP-based Design Example
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