TERM PAPER

“ANALOG CIRCUITS AND LINEAR IC’S”

SUBMITTED TO:- SUBMITTED BY:-

MR. Shakti Raj Chopra Deep Chand Singla
Reg-10807346
Roll no- A08
SECTION-D6803A08

B-Tech,M-Tech(ECE)
 Certificate

This is to certify that DEEP CHAND SINGLA, is a bonafide student of 4th semester of
B.TECH(ECE), SECTION-D6803, ROLL NO. A08 at LOVELY PROFESSIONAL UNIVERSITY,
Phagwara (144401),(Punjab).

He had undertaken the preparation of the term paper “AC and DC characteristics
of an OP-Amp”.
This student has been sincere and methodical in the development of the project with outstanding merit.

Mr. Shakti Raj Chopra

(Lecturer-Electronics system)
CONTENTS:-
1:- Operational amplifier

2:- Open loop amplifier

3:- Non-inverting amplifier

4:- Inverting amplifier

5:- Characterization of operational amplifier

a) DC characteristics

b) AC characteristics

6:- Reference
Operational Amplifiers
The operational amplifier (op-amp) was designed to perform mathematical operations. Although now
superseded by the digital computer, op-amps are a common feature of modern analog electronics.

The op-amp is constructed from several transistor stages, which commonly include a differential-input
stage, an intermediate-gain stage and a push-pull output stage. The differential amplifier consists of a
matched pair of bipolar transistors or FETs. The push-pull amplifier transmits a large current to the
load and hence has a small output impedance.

The op-amp is a linear amplifier with . The DC open-loop voltage gain of a typical op-amp is
to . The gain is so large that most often feedback is used to obtain a specific transfer function and
control the stability.

Cheap IC versions of operational amplifiers are readily available, making their use popular in any
analog circuit. The cheap models operate from DC to about 20 kHz, while the high-performance
models operate up to 50 MHz. A popular device is the 741 op-amp which drops off 6 dB/octave above
5 Hz. Op-amps are usually available as an IC in an 8-pin dual, in-line package (DIP). Some op-amp
ICs have more than one op-amp on the same chip.

Before proceeding we define a few terms:

linear amplifier
- the output is directly proportional to the amplitude of input signal.
open-loop gain, A
- the voltage gain without feedback ( ).
closed-loop gain, G
- the voltage gain with negative feedback (approximation to ).
negative feedback
- the output is connected to the inverting input forming a feedback loop (usually through a
feedback resistor ).
Open-Loop Amplifiers
Figure 6.1a shows a complete diagram of an operational amplifier. A more common version of the
diagram is shown in figure 6.1b, where missing parts are assumed to exist. The inverting input means
that the output signal will be 180 out of phase with the input applied to this terminal. On the diagram
V (DC) and V (DC). is typically, but not necessarily, V. The
positive and negative voltages are necessary to allow the amplification of both positive and negative
signals without special biasing.

 
Figure 6.1:  a) Complete diagram of an operational amplifier and b) common diagram of an
operational amplifier.

For a linear amplifier (cf. a differential amplifier) the open-loop gain is

The open-loop gain can be approximated by the transfer function

where is the DC open-loop gain and is the transfer function of a passive low-pass filter. We can
write

where and Hz.

Two conditions must be satisfied for linear operation:

 1. The input voltage must operate within the bias voltages:
.
2. For no clipping the output voltage swing must be restricted to
.

Non-inverting Amplifiers

Figure 6.2 shows a non-inverting amplifier, sometimes referred to as a voltage follower.

Figure 6.2:  Non-inverting, unity-gain amplifier.

Applying our rules to this circuit we have

The amplifier gives a unit closed-loop gain, , and does not change the sign of the input signal
(no phase change).

This configuration is often used to buffer the input to an amplifier since the input resistance is high,
there is unit gain and no inversion. The buffer amplifier is also used to isolate a signal source from a
load.

Often a feedback resistor is used as shown in figure 6.3.

Figure 6.3:  Non-inverting amplifier with feedback.

For this circuit

The gain is

Inverting Amplifiers

An inverting amplifier is shown in figure 6.4. Analysis of the circuit gives

Figure 6.4:  Inverting amplifier.

Since ( is at virtual ground),

The gain is

The output is inverted with respect to the input signal.

A sketch of the frequency response of the inverting and non-inverting amplifiers are shown in
figure 6.5.
 Figure 6.5:  Inverting and non-inverting amplifier frequency response.

The input impedance of the inverting amplifier is . Since we have .

A better circuit for approximating an ideal inverting amplifier is shown in figure 6.6

Figure 6.6:  Inverting amplifier with bias compensation.

The extra resistor is a current bias-compensation resistor. It reduces the current bias by eliminating
non-zero current at the inputs.
Characterization of Operational Amplifier

Every Op-Amp has its own DC, transient and AC characteristics e.g. finite gain,
settling time or slew rate and bandwidth. For designs, which are expected to exhibit stable
operation (meet design specifications) over long time intervals and wide variations in
temperature, an OP-Amp must be tested to ensure adequate DC and AC characteristics to
ensure desired behavior. It is for these reasons the engineer must understand the limitations
these parameters inflict on actual circuits. This write-up will introduce the Test Engineer to
testing the non ideal properties of op-amps.

Parameters to be investigate include:

 IB - Input bias current.

 Vos - Input off set voltage.
 SR - Slew Rate or full power bandwidth (f p) - The maximal rate of change in the
output voltage for a step change in the input. In general positive and negative slew
rates are not equal.
 AVol - Open loop DC voltage gain.
 fu or GBP - Unity gain bandwidth or gain bandwidth product. As is implied by GBP
name is the product of Avol and f3dB.
 CMRR - Common mode rejection ratio is a figure of merit for the ratio if gain of the
differential signals to the gain of the difference between (subtraction of common
signal to both inputs) common signal at both inouts.
 Ro - The driving point impedance at the output.

DC Characteristics:
The most significant DC characteristics of an OP-AMP are:

- Input offset voltage (Vos) & Common Mode Range (VCMR).

- Input bias current and input offset current.

- Open Loop gain – Avol.

- Common Mode Rejection Ratios

1. Input offset voltage (Vos) & Common Mode Range (VCMR)

Vos is the applied differential DC input voltage required to provide zero output
voltage from an ideal generator. Vos results in an OP-AMP due to internal
mismatches in transistor parameters which arise at fabrication time. A circuit to
obtain Vos is given in Fig. 1.1.
Hint: Use a 50 Hz triangular waveform. To find V CMR and VOS sweep Vin from VEE to
VCC.
Use R2 equal to your generator impedance.
Fig. 1.1 Input offset voltage test circuits for 1) single sided and b) fully
differential. For low gain OTAs ONLY.

1
A vol =
1−Slope .

2. Common mode range (CMR) and Vout peak-to-peak.

In the circuits above when measuring the single sided circuit peak-to- peak the
output is limited by either the input common mode range or by the C. As a result
the circuit in Fig. 1.2 must be used to determine amplifier peak-to- peak output.
Avol may also be reconfirmed as along as Avol is not too large. For example
when using the hp4155 gains greater than 1000 can not be accurately
determined.
 Fig. 1.2 Input (CMR) and Vout peak-to-peak determination.

3. Input bias current and input offset current

a) Input bias current, IB

IB is the DC biasing current required at the inputs to provide a zero output

voltage without any input signal or offset voltage present.

b) Input offset current, los

Again since the input transistors (BJTs) or input protection cannot be made
identically equal, there are always some finite difference between the two input
l
bias currents IB-and IB+ (or lB1 and B2 ). This difference is referred as the
input offset current los.
 The circuit below is usually used to measure Bipolar input bias currents and

input offset currents.

Fig. 1.3 Circuit for measurement of input bias currents and input offset voltage.

The results from the test circuit above are as follows:

 Switch 1 is opened Vo = lB2R2

 Switch 2 is opened Vo = lB1 R1
 Both switches are opened Vo = los R1

NOTE: Normally, 100K < R1 = R2 < 100M

C 1 = C2 = .01 pF

The design engineer can minimize the effects of output offsets due to current
mismatch by insuring that the effective DC resistance looking back from both the
inverting and noninverting pins is identical. This sets up an equivalent circuit identical
to the IOS measurement set up. Also, keeping R1 and R2 small can be beneficial. The
Rs are selected based on the expected values of I and easily measured values for V o.

Large signal (> VBE) transient parameters full Power Response (f p)

Full power response fp is the maximum frequency at which rated output peak to peak
can be supplied without significant distortion. From the obtained value of slew rate
(SR), fp can be calculated. SR is measured using the circuit of Figure 1.4 below.
Use V or Vopp from Part (1) minus 0.5 Volt to set the peak value of the Square
CMR

Wave used to drive the circuit of Figure 1.4 into slew rate limiting.

SR
f p= ; V pp≡ rated output voltage
2 πV pp
 Fig, 1.4 Slew rate and fp bandwidth test circuit.

AC CHARACTERiSTICS:

1) Unity Gain Bandwidth fc

Unity Gain Bandwidth fu is the frequency range from “DC” to the frequency at which
the open-loop gain crosses unity or 0dB but is more easily measured in the unity
gain configuration by measuring the 3dB frequency in the unity gain configuration.
Frequently it might be easier to measure fc with a closed loop gain configuration of
10 in lieu in of the op amp being in the open loop configuration or unity gain
configuration. Using Figure 2.4 measure fu using a 100mV input signal.

If closed loop gain is given by:

A( s)
KV=
( 1+ A( s )B )
 Avol
A ( s )=
where ( 1+ τs ) show that the circuit of Figure 1.5 can be used to find f u for

large A.

Fig. 1.5 Unity gain bandwidth test circuit*

2) Common Mode Rejection Ratio (CMRR) measurement of opamps

CMRR is the ratio of the differential voltage gain to the common mode voltage
gain. In other words, CMRR is a “figure of merit” comparing the gain for the
differential signals with gain achieved by undesired common–mode signals. CMMR
decreases as a function of frequency due to the mismatch e.g. capacitive effects,
specifically capacitive mismatch in the op amp as well as desired or parasitic path
ways unbalance the impedances seen looking back from the op amp inputs. Due to
the nonlinearity of the common-mode gain as well as the low amplitude nature, of A cm,
the full common-mode voltage swing must be used to measure CMRR. See Fig. 1.1
to ensure that you do not exceed the VCMR when measuring Acm. A CMRR test
circuit is given in Fig. 1.7. During the test of A cm it is desirable that an identical; signal
be present on both positive and negative inputs of the op amp.

In this circuit:
 R1 =R'1

'
R2 =R2

and
R2 >> R 1 so that ecm ≃ e s

*The Unity – Gain point is not significantly affected by the feedback if the close loop
gain is much greater than unity. (e.g. Choose R2 > 100 R1 )

Fig. 1.7 Common-Mode Rejection Ratio Measurement Circuit

For well-balanced resistors (R1 = R1, R2 = R2), the signal at the two inputs is
essentially a common-mode signal. However, the imbalance of the OP-AMP
produces an output error voltage eo.

From Fig. 1.7:

eo ' R2
A diff = =
ei R1

eo
A cm =
e cm

Since ecm ¿ es for R2 >> R1

A diff eo '/ ei
CMRR= =
A cm e o /ecm

From (2.8)

R1
e i= eo
R2

Substituting (2.11) into (2.10) yields:

R2 e s
CMRR=
R1 e o
or, in dB (decibels)

CMRR(dB) = 20 log CMRR

3) Power supply rejection ratio (PSRR) measurement of OTAs

Recognizing (1.10) can be rewritten as;

A diff gmvdiff / go gm vdiff

CMRR= = =
A cm gm vcm / go gm vc
m

and that PSRR is defined as;

A diff gm vdiff /go gmvdiff

PSRR XX = = =
Acm gm Vxx /go gm Vxx .

Where xx is SS and DD respectively for the two power supplies CMRR and
PSRR or YYRR can be measured as shown in Fig. 1.8. DC values for all YYRR values can
be determined using the hp415x parameter analyzer by clamping the output and measuring
the input as each input is swept. For bandwidth measurements at the critical frequencies of
60 and 120 Hz a small valued resistor << rout may be used to clamp the output and the
resulting voltage measured. In this case YYRR is defined as follows:

iodiff R v indiff gmVdiff

YYRR= =
ioVxx R v inyy gmVxx

and xx equals DD, SS, and CM respectively.

Fig. 1.8 Universal Circuit of direct measurement of CMRR and PSRR.

References:
“Operational Amplifiers.”
http://192.215.107.101/ebn/942/tech/techfocus/1071main.html

“Operational Amplifiers.”
http://bolongo.ee.queensu.ca:8000/www/dept/courses/elec221/opamps.htm

“Operational Amplifiers.”
http://www.chem.usu.edu/~sbialk/Classes/565/opamps/opamps.html