LTC2950

Push Button On/Off

Controller
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FEATURES DESCRIPTIO
■ Adjustable Push Button On/Off Timers The LTC®2950 is a micropower, wide input voltage range,
■ Low Supply Current: 6µA push button ON/OFF controller. The part contains a push
■ Wide Operating Voltage Range: 2.7V to 26V button input with independently programmable ON and OFF
■ EN Output (LTC2950-1) Allows DC/DC Converter debounce times that control the toggling of an open drain
Control enable output. The part also contains a simple micropro-
■ ⎯E⎯N Output (LTC2950-2) Allows Circuit Breaker cessor interface to allow for proper system housekeeping
Control prior to power down. Under system fault conditions, an
■ Simple Interface Allows Graceful µP Shut Down internal ⎯K⎯I⎯L⎯L timer ensures proper power down.
■ High Input Voltage ⎯P⎯B Pin with Internal Pull Up
The LTC2950 operates over a wide 2.7V to 26V input
Resistor
voltage range to accommodate a wide variety of input
■ ±10kV ESD HBM on ⎯P⎯B Input
power supplies. Very low quiescent current (6µA typical)
■ Accurate 0.6V Threshold on ⎯K⎯I⎯L⎯L Comparator Input
makes the LTC2950 ideally suited for battery powered
■ 8-Pin 3mm × 2mm DFN and ThinSOTTM Packages
applications. Two versions of the part are available to ac-
U commodate either positive or negative enable polarities.
APPLICATIO S The parts are available in either 8-lead 3mm × 2mm DFN
or ThinSOT packages.
■ Portable Instrumentation Meters
■ Blade Servers , LTC and LT are registered trademarks of Linear Technology Corporation. ThinSOT is
a trademark of Linear Technology Corporation. All other trademarks are the property of
■ Portable Customer Service PDA their respective owners.
■ Desktop and Notebook Computers

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TYPICAL APPLICATIO
VIN Turn On Debounce
3V – 26V
VIN VOUT
DC/DC
BUCK
SHDN
EN

R1
VIN EN 2V/DIV
10k
LTC2950-1 INT INT PB
µP/µC
PB KILL KILL
GND ONT OFFT
2950 TA01
2950 TA01b
CONT* COFFT* 10ms/DIV
0.033µF 0.033µF
*OPTIONAL

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LTC2950
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ABSOLUTE AXI U RATI GS
(Note 1)
Supply Voltage (VIN) ..................................– 0.3V to 33V Operating Temperature Range
Input Voltages LTC2950-C1 .............................................. 0°C to 70°C
⎯P⎯B ............................................................– 6V to 33V LTC2950-C2 .............................................. 0°C to 70°C
ONT ......................................................– 0.3V to 2.7V LTC2950-I1 .......................................... – 40°C to 85°C
OFFT .....................................................– 0.3V to 2.7V LTC2950-I2 .......................................... – 40°C to 85°C
⎯K⎯I⎯L⎯L .........................................................– 0.3V to 7V Storage Temperature Range
Output Voltages DFN Package..................................... – 65°C to 125°C
⎯I⎯N⎯T .........................................................– 0.3V to 10V TSOT-23............................................ – 65°C to 150°C
EN/⎯E⎯N ....................................................– 0.3V to 10V Lead Temperature (Soldering, 10 sec) .................. 300°C

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PACKAGE/ORDER I FOR ATIO
TOP VIEW

TOP VIEW
GND 1 8 INT
VIN 1 8 KILL
ONT 2 7 EN/EN
9 PB 2 7 OFFT
PB 3 6 OFFT ONT 3 6 EN/EN
VIN 4 5 KILL GND 4 5 INT

TS8 PACKAGE
DDB8 PACKAGE 8-LEAD PLASTIC TSOT-23
8-LEAD (3mm × 2mm) PLASTIC DFN TJMAX = 125°C, θJA = 140°C/W
TJMAX = 125°C, θJA = 165°C/W
EXPOSED PAD (PIN 9) UNCONNECTED

ORDER PART DDB PART* ORDER PART S8 PART*

NUMBER MARKING NUMBER MARKING
LTC2950CDDB-1 LBKP LTC2950CTS8-1 LTBKN
LTC2950CDDB-2 LBNG LTC2950CTS8-2 LTBNF
LTC2950IDDB-1 LBKP LTC2950ITS8-1 LTBKN
LTC2950IDDB-2 LBNG LTC2950ITS8-2 LTBNF
Consult LTC Marketing for parts specified with wider operating temperature ranges.
* The temperature grade is identified by a label on the shipping container.

ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25C. VIN = 2.7V to 26.4V, unless otherwise noted. (Note 2)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VIN Supply Voltage Range Steady State Operation ● 2.7 26.4 V
IIN VIN Supply Current System Power On ● 6 12 µA
VUVL VIN Undervoltage Lockout VIN Falling ● 2.2 2.3 2.4 V
VUVL(HYST) VIN Undervoltage Lockout Hysteresis 50 300 600 mV

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 LTC2950
ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25C. VIN = 2.7V to 26.4V, unless otherwise noted. (Note 2)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Push Button Pin (⎯P⎯B)
V⎯P⎯B(MIN, MAX) ⎯P⎯B Voltage Range Single-Ended ● –1 26.4 V
I⎯P⎯B ⎯P⎯B Input Current 2.5V < V⎯P⎯B < 26.4V ● ±1 µA
V⎯P⎯B = 1V ● –1 –6 –12 µA
V⎯P⎯B = 0.6V ● –3 –9 –15 µA
V⎯P⎯B(VTH) ⎯P⎯B Input Threshold ⎯P⎯B Falling ● 0.6 0.8 1 V
V⎯P⎯B(VOC) ⎯P⎯B Open Circuit Voltage I⎯P⎯B = –1µA 1 1.6 2 V
Debounce Timing Pins (ONT, OFFT)
IONT, OFFT(PU) ONT/OFFT Pull Up Current VONT, OFFT = 0V ● –2.4 –3 –3.6 µA
IONT, OFFT(PD) ONT/OFFT Pull Down Current VONT, OFFT = 1.3V ● 2.4 3 3.6 µA
tDB, On Internal Turn On Debounce Time ONT Pin Float, ⎯P⎯B Falling → Enable Asserted ● 26 32 41 ms
tONT Additional Adjustable Turn On Time CONT = 1500pF ● 9 11.5 13.5 ms
tDB, Off Internal Turn Off Debounce Time OFFT Pin Float, ⎯P⎯B Falling → ⎯I⎯N⎯T Falling ● 26 32 41 ms
tOFFT Additional Adjustable Turn Off Time COFFT = 1500pF ● 9 11.5 13.5 ms
µP Handshake Pins (⎯I⎯N⎯T, ⎯K⎯I⎯L⎯L)
I⎯I⎯N⎯T(LKG) ⎯I⎯N⎯T Leakage Current V⎯ I⎯N⎯T = 3V ● ±1 µA
V⎯I⎯N⎯T(VOL) ⎯I⎯N⎯T Output Voltage Low I⎯ I⎯N⎯T = 3mA ● 0.11 0.4 V
V⎯K⎯I⎯L⎯L(TH) ⎯K⎯I⎯L⎯L Input Threshold Voltage ⎯K⎯I⎯L⎯L Falling ● 0.57 0.6 0.63 V
V⎯K⎯I⎯L⎯L(HYST) ⎯K⎯I⎯L⎯L Input Threshold Hysteresis 10 30 50 mV
I⎯K⎯I⎯L⎯L(LKG) ⎯K⎯I⎯L⎯L Leakage Current V ⎯K⎯I⎯L⎯L = 0.6V ±0.1 µA
t ⎯K⎯I⎯L⎯L(PW) ⎯K⎯I⎯L⎯L Minimum Pulse Width ● 30 µs
t ⎯K⎯I⎯L⎯L(PD) ⎯K⎯I⎯L⎯L Propagation Delay ⎯K⎯I⎯L⎯L Falling → Enable Released ● 30 µs
t ⎯K⎯I⎯L⎯L, On Blank ⎯K⎯I⎯L⎯L Turn On Blanking (Note 3) ⎯K⎯I⎯L⎯L = Low, Enable Asserted → Enable Released ● 400 512 650 ms
t ⎯K⎯I⎯L⎯L, Off Delay ⎯K⎯I⎯L⎯L Turn Off Delay (Note 4) ⎯K⎯I⎯L⎯L = High, ⎯I⎯N⎯T Asserted → Enable Released ● 800 1024 1300 ms
tEN/⎯E⎯N, Lock Out EN/⎯E⎯N Lock Out Time (Note 5) Enable Released → Enable Asserted ● 200 256 325 ms
IEN/⎯E⎯N(LKG) EN/⎯E⎯N Leakage Current VEN/ ⎯E⎯N = 1V, Sink Current Off ● ±0.1 µA
VEN/⎯E⎯N(VOL) EN/⎯E⎯N Voltage Output Low IEN/ ⎯E⎯N = 3mA ● 0.11 0.4 V

Note 1: Absolute Maximum Ratings are those values beyond which the life Note 4: The ⎯K⎯I⎯L⎯L turn off delay is the maximum delay from the initiation
of a device may be impaired. of a shutdown sequence (⎯I⎯N⎯T falling), to the release of the enable output.
Note 2: All currents into pins are positive; all voltages are referenced to If the ⎯K⎯I⎯L⎯L input switches low at any time during this period, enable is
GND unless otherwise noted. released, thus turning off system power. This time is internally fixed at
Note 3: The ⎯K⎯I⎯L⎯L turn on blanking timer period is the waiting period 1024ms. This time delay does not include tDB, OFF or tOFFT.
immediately after the enable output is asserted. This blanking time allows Note 5: The enable lock out time is designed to allow an application to
sufficient time for the DC/DC converter and the µP to perform power up properly power down such that the next power up sequence starts from a
tasks. The ⎯K⎯I⎯L⎯L and ⎯P⎯B inputs are ignored during this period. If ⎯K⎯I⎯L⎯L consistent powered down configuration. ⎯P⎯B is ignored during this lock out
remains low at the end of this time period, the enable output is released, time. This time delay does not include tDB, ON or tONT.
thus turning off system power. This time delay does not include tDB, ON or
tONT.

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 LTC2950
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TYPICAL PERFOR A CE CHARACTERISTICS

Supply Current vs Temperature Supply Current vs Supply Voltage

10 10
TA = 25°C
VIN = 26.4V

8 8

VIN = 3.3V
6 6
IVIN (µA)

IVIN (µA)
VIN = 2.7V
4 4

2 2

0 0
–50 –25 0 25 50 75 100 0 5 10 15 20 25 30
TEMPERATURE (°C) VIN (V)
2950 G01 2950 G02

Internal Default Turn On Turn On Debounce Time (tDB, ON + ONT Pull-Down Current vs
Debounce Time (tDB, ON) vs VIN tONT) vs ONT External Capacitor Temperature
50 10000 –3.4
TA = 25°C TA = 25°C
VIN = 3.3V

ONT PULL-DOWN CURRENT (µA)

40
–3.2
tDB, ON + tONT (ms)

1000
tDB, ON (ms)

30 VIN = 26.4V

–3.0
20 VIN = 2.7V
100
–2.8
10

0 10 –2.6
0 5 10 15 20 25 30 1 10 100 1000 –50 –25 0 25 50 75 100
VIN (V) ONT EXTERNAL CAPACITOR (nF) TEMPERATURE (°C)
2950 G03 2950 G04 2950 G05

Internal Default Turn Off Turn Off Debounce Time (tDB, OFF OFFT Pull-Down Current vs
Debounce Time (tDB, OFF) vs VIN + tOFFT) vs OFFT External Capacitor Temperature
50 10000 –3.4
TA = 25°C TA = 25°C
VIN = 3.3V
OFFT PULL-DOWN CURRENT (µA)

40
–3.2
tDB, OFF + tOFFT (ms)

1000
tDB, OFF (ms)

30 VIN = 26.4V

–3.0
20 VIN = 2.7V
100
–2.8
10

0 10 –2.6
0 5 10 15 20 25 30 1 10 100 1000 –50 –25 0 25 50 75 100
VIN (V) OFFT EXTERNAL CAPACITOR (nF) TEMPERATURE (°C)
2950 G06 2950 G07 2950 G08

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 LTC2950
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TYPICAL PERFOR A CE CHARACTERISTICS
⎯P⎯B Voltage vs External ⎯P⎯B
⎯P⎯B Current vs ⎯P⎯B Voltage Resistance to Ground
–250 300
TA = 25°C VIN = 3.3V
VIN = 3.3V
250
–200

PB VOLTAGE (mV)
PB CURRENT (µA)

200
TA = 100°C
–150
150 TA = 25°C
–100
TA = –45°C
100

–50
50

0 0
–10 –5 0 5 10 15 20 25 30 0 5 10 15 20
PB VOLTAGE (V) EXTERNAL PB RESISTANCE TO GROUND (kΩ)
2950 G09 2950 G10

EN/⎯E⎯N VOL vs Current Load EN (LTC2950-1) Voltage vs VIN ⎯E⎯N (LTC2950-2) Voltage vs VIN
500 1.0 4
TA = 25°C TA = 25°C TA = 25°C
VIN = 3.3V 100k PULL-UP FROM EN TO VIN 100k PULL-UP FROM EN TO VIN
400 0.8
3
EN/EN VOLTAGE (mV)

300 0.6

EN (V)
EN (V)

2
200 0.4

1
100 0.2

0 0 0
0 2 4 6 8 10 0 1 2 3 4 0 1 2 3 4
EN/EN CURRENT LOAD (mA) VIN (V) VIN (V)
2950 G11 2950 G12 2950 G13

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LTC2950
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PI FU CTIO S (TSOT-23/DFN)
VIN (Pin 1/Pin 4): Power Supply Input: 2.7V to 26.4V. low if: a) ⎯K⎯I⎯L⎯L is not driven high (by μP) within 512ms of
the initial valid ⎯P⎯B power turn-on event, b) ⎯K⎯I⎯L⎯L is driven
⎯ ⎯B (Pin 2/Pin 3): Push Button Input. Connecting ⎯P⎯B to
P
low during normal operation, c) a second valid ⎯P⎯B event
ground through a momentary switch provides on/off
(power turn-off) is detected. The operating range for this
control via the EN/⎯E⎯N pin. An internal 100k pull-up resis-
pin is 0V to 10V.
tor connects to an internal 1.9V bias voltage. The rugged
⎯P⎯B input can be pulled up to 26.4V externally without ⎯E⎯N (LTC2950-2, Pin 6/Pin 7): Open Drain Enable Output.
consuming extra current. This pin is intended to enable system power. ⎯E⎯N is asserted
low after a valid ⎯P⎯B turn-on event. ⎯E⎯N releases high if:
ONT (Pin 3/Pin 2): Additional Adjustable Turn On Time
a) ⎯K⎯I⎯L⎯L is not driven high (by μP) within 512ms of the
Input. Placing an external capacitor to ground determines
initial valid ⎯P⎯B power turn-on event, b) ⎯K⎯I⎯L⎯L is driven
the additional time (beyond the internal default 32ms)
low during normal operation, c) a second valid ⎯P⎯B event
the ⎯P⎯B pin must be held low before the enable output
(power turn-off) is detected. The operating range of this
is asserted. Floating this pin results in a default turn on
pin is 0V to 10V.
debounce time of 32ms.
OFFT (Pin 7/Pin 6): Additional Adjustable Turn Off Time
GND (Pin 4/Pin 1): Device Ground.
Input. A capacitor to ground determines the additional
I⎯ N
⎯ T⎯ (Pin 5/Pin 8): Open Drain Interrupt Output. After a push time (beyond the internal default 32ms) that the ⎯P⎯B pin
button turn-off event is detected, the LTC2950 interrupts must be held low before initiating a power down sequence
the system (µP) by bringing the ⎯I⎯N⎯T pin low. Once the (⎯I⎯N⎯T falling). Floating this pin results in a default turn off
system finishes its power down and housekeeping tasks, time of 32ms.
it sets ⎯K⎯I⎯L⎯L low, which in turn releases the enable output. ⎯K⎯I⎯L⎯L (Pin 8/Pin 5): ⎯K⎯I⎯L⎯L Input. Forcing ⎯K⎯I⎯L⎯L low releases
If at the end of the power down timer (1024ms) ⎯K⎯I⎯L⎯L is the enable output. During system turn on, this pin is
still high, the enable output is released immediately. ⎯I⎯N⎯T blanked by a 512ms internal timer to allow the system to
may optionally be tied to ⎯K⎯I⎯L⎯L to release the enable output pull ⎯K⎯I⎯L⎯L high. This pin has an accurate 0.6V threshold
immediately after the turn-off event has been detected and can be used as a voltage monitor input.
(⎯I⎯N⎯T = low).
Exposed Pad (Pin 9): Exposed Pad may be left open or
EN (LTC2950-1, Pin 6/Pin 7): Open Drain Enable Output. connected to device ground.
This pin is intended to enable system power. EN is as-
serted high after a valid ⎯P⎯B turn on event. EN is released

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 LTC2950
W
BLOCK DIAGRA

EN/EN

VIN
REGULATOR 2.4V
2.7V TO 26.4V

2.4V

OSCILLATOR
100k KILL

PB LOGIC

DEBOUNCE 0.6V

0.8V

INT
OSCILLATOR

GND

2950 BD

ONT OFFT

UW W
TI I G DIAGRA S

tKILL(PW)

KILL

tKILL(PD)

EN/EN

2950 TD01

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LTC2950
UW W
TI I G DIAGRA S

PB PB & KILL IGNORED

tDB, ON tONT tKILL, ON BLANK

16 CYCLES

EN
(LTC2950-1)

EN
(LTC2950-2)
2950 TD02

Power On Timing

PB PB IGNORED

tDB, OFF tOFFT

OFFT

16 CYCLES

INT

tKILL, OFF DELAY

EN
(LTC2950-1)

EN
(LTC2950-2)
2950 TD03

Power Off Timing, ⎯K⎯I⎯L⎯L > 0.6V

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 LTC2950
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APPLICATIO S I FOR ATIO
Description Note that the ⎯K⎯I⎯L⎯L input can be pulled low (thereby re-
The LTC2950 is a low power (6µA), wide input voltage leasing the enable output) at any time after t⎯K⎯I⎯L⎯L, ON BLANK
range (2.7V to 26.4V), push button on/off controller that period.
can interface to a µP and a power supply. The turn-on and Simplified Power On/Off Sequence
turn-off debounce times are extendable using optional
Figure 1 shows a simplified LTC2950-1 power on and power
external capacitors. A simple interface (⎯I⎯N⎯T output, ⎯K⎯I⎯L⎯L
off sequence. A high to low transition on ⎯P⎯B (t1) initiates
input) allows a system to power on and power off in a
the power on sequence. This diagram does not show any
controlled manner.
bounce on ⎯P⎯B. In order to assert the enable output, the
Turn On ⎯P⎯B pin must stay low continuously (⎯P⎯B high resets timers)
When power is first applied to the LTC2950, the part ini- for a time controlled by the default 32ms and the external
tializes the output pins. Any DC/DC converters connected ONT capacitor (t2–t1). Once EN goes high (t2), an internal
to the EN/⎯E⎯N pin will therefore be held off. To assert the 512ms blanking timer is started. This blanking timer is
enable output, ⎯P⎯B must be held low for a minimum of designed to give sufficient time for the DC/DC converter
32ms (tDB, ON). The LTC2950 provides additional turn on to reach its final voltage, and to allow the µP enough time
debounce time via an optional capacitor connected to the to perform power on tasks.
ONT pin (tONT). The following equation describes the ad- The ⎯K⎯I⎯L⎯L pin must be pulled high within 512ms of the
ditional time that ⎯P⎯B must be held low before asserting the EN pin going high. Failure to do so results in the EN
enable output. CONT is the ONT external capacitor: pin going low 512ms after it went high. (EN = low, see
CONT = 1.56E-4 [μF/ms] • (tONT – 1ms) Figure 2). Note that the LTC2950 does not sample ⎯K⎯I⎯L⎯L
and ⎯P⎯B until after the 512ms internal timer has expired.
Once the enable output is asserted, any DC/DC converters The reason ⎯P⎯B is ignored is to ensure that the system
connected to this pin are turned on. The ⎯K⎯I⎯L⎯L input from is not forced off while powering on. Once the 512ms
the µP is ignored during a succeeding 512ms blanking timer expires (t4), the release of the ⎯P⎯B pin is then
time (t ⎯K⎯I⎯L⎯L, ON BLANK). This blanking time represents the debounced with an internal 32ms timer. The system has
maximum time required to power up the DC/DC converter now properly powered on and the LTC2950 monitors ⎯P⎯B
and the µP. If ⎯K⎯I⎯L⎯L is not brought high during this 512ms and ⎯K⎯I⎯L⎯L (for a turnoff command) while consuming only
time window, the enable output is released. The assump- 6µA of supply current.
tion is that 512ms is sufficient time for the system to
power up. A high to low transition on ⎯P⎯B (t5) initiates the power
off sequence. ⎯P⎯B must stay low continuously (⎯P⎯B high
Turn Off resets debounce timer) for a period controlled by the
default 32ms and the external OFFT capacitor (t6–t5). At
To initiate a power off sequence, ⎯P⎯B must be held low for a the completion of the OFFT timing (t6), an interrupt (⎯I⎯N⎯T)
minimum of 32ms (tDB, OFF). Additional turn off debounce is set, signifying that EN will be switched low in 1024ms.
time may be added via an optional capacitor connected to Once a system has finished performing its power down
the OFFT pin (tOFFT). The following equation describes the operations, it can set ⎯K⎯I⎯L⎯L low (t7) and thus immediately
additional time that ⎯P⎯B must be held low to initiate a power set EN low), terminating the internal 1024ms timer. The
off sequence. COFFT is the OFFT external capacitor: release of the ⎯P⎯B pin is then debounced with an internal
COFFT = 1.56E-4 [μF/ms] • (tOFFT – 1ms) 32ms timer.
Once P⎯ B
⎯ has been validly pressed, I⎯ N
⎯ T⎯ is switched low. This The system is now in its reset state: where the LTC2950
alerts the µP to perform its power down and housekeeping is in low power mode (6µA). ⎯P⎯B is monitored for a high
tasks. The power down time given to the µP is 1024ms. to low transition.

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LTC2950
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APPLICATIO S I FOR ATIO
t1 t2 t3 t4 t5 t6 t7

PB PB & KILL IGNORED PB IGNORED

tDB, ON tONT tKILL, ON BLANK tDB, OFF < tKILL,

OFF DELAY

ONT

tOFFT

OFFT

INT

<tKILL, OFF DELAY

KILL

EN

2950 F01

Figure 1. Simplified Power On/Off Sequence for LTC2950-1

tABORT

PB

tDB, ON + tONT

512ms
INTERNAL
TIMER

POWER ON
TIMING

POWER
TURNED OFF

EN

µP FAILED TO SET
KILL HIGH

KILL

2950 F02

Figure 2. Aborted Power On Sequence for LTC2950-1

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 LTC2950
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APPLICATIO S I FOR ATIO
Aborted Power On Sequence LTC2950-1, LTC2950-2 VERSIONS
The power on sequence is aborted when the ⎯K⎯I⎯L⎯L remains The LTC2950-1 (high true EN) and LTC2950-2 (low true
low after the end of the 512ms blanking time. Figure 2 is ⎯E⎯N) differ only by the polarity of the EN/⎯E⎯N pin. Both ver-
a simplified version of an aborted power on sequence. sions allow the user to extend the amount of time that
At time tABORT, since ⎯K⎯I⎯L⎯L is still low, EN pulls low (thus the ⎯P⎯B must be held low in order to begin a valid power
turning off the DC/DC converter). on/off sequence. An external capacitor placed on the ONT
pin adds additional time to the turn on time. An external
µP Turns Off Power During Normal Operation capacitor placed on the OFFT pin adds additional time
Once the system has powered on and is operating nor- to the turn off time. If no capacitor is placed on the ONT
mally, the µP can turn off power by setting ⎯K⎯I⎯L⎯L low, as (OFFT) pin, then the turn on (off) duration is given by an
shown in Figure 3. At time t ⎯K⎯I⎯L⎯L, ⎯K⎯I⎯L⎯L is set low by the internally fixed 32ms timer.
µP. This immediately pulls EN low, thus turning off the The LTC2950 fixes the ⎯K⎯I⎯L⎯L turn off delay time (t ⎯K⎯I⎯L⎯L, OFF
DC/DC converter. DELAY) at 1024ms. This means that the EN/⎯E⎯N pin will be
switched low/high a maximum of 1024ms after initiating
DC/DC Turn Off Blanking a valid turn off sequence. Note that in a typical application,
When the DC/DC converter is turned off, it can take a sig- a µP or µC would set ⎯K⎯I⎯L⎯L low prior to the 1024ms timer
nificant amount of time for its output to decay to ground. It period (t7 in Figure 1).
is desirable to wait until the output of the DC/DC converter The following equations describe the turn on and turn
is near ground before allowing the user (via ⎯P⎯B) to restart off times. CONT and COFFT are the external programming
the converter. This condition guarantees that the µP has capacitors:
always powered down completely before it is restarted.
tBD,ON + tONT = 32ms + 1ms + (6.7x106) • CONT
Figure 4 shows the µP turning power off. After a low on
⎯K⎯I⎯L⎯L releases enable, the internal 256ms timer ignores the tBD,OFF + tOFFT = 32ms + 1ms + (6.7x106) • COFFT
⎯P⎯B pin. This is shown as tEN/⎯E⎯N, LOCKOUT in Figure 4.

tEN/EN, LOCKOUT

PB POWER ON PB IGNORED

tKILL
DC/DC
PB TURNS OFF
PB BLANKING 256ms

DC/DC
TURNS OFF

EN EN

µP SETS
KILL LOW µP SETS
KILL LOW

KILL XXX DON’T CARE KILL XXX DON’T CARE

2950 F04
2950 F03

Figure 3. µP Turns Off Power (LTC2950-1) Figure 4. DC/DC Turn Off Blanking (LTC2950-1)

2950f

11
LTC2950
U U W U
APPLICATIO S I FOR ATIO
High Voltage Pins
The VIN and ⎯P⎯B pins can operate at voltages up to 26.4V. capacitances may couple onto the high impedance ⎯P⎯B
⎯P⎯B can, additionally, operate below ground (–6V) without input. Additionally, parasitic series inductance may cause
⎯ B
latching up the device. P ⎯ has an ESD HBM rating of ±10kV. unpredictable ringing at the ⎯P⎯B pin. Placing a 5k resistor
If the push button switch connected to ⎯P⎯B exhibits high from the ⎯P⎯B pin to the push button switch would mitigate
leakage current, then an external pull-up resistor to VIN is parasitic inductance problems. Placing a 0.1µF capacitor
recommended. Furthermore, if the push button switch is on the ⎯P⎯B pin would lessen the impact of parasitic capaci-
physically located far from the LTC2950 ⎯P⎯B pin, parasitic tive coupling.

U
TYPICAL APPLICATIO S
Voltage Monitoring with ⎯K⎯I⎯L⎯L Input The DC/DC converter shown has an internal pull-up cur-
The ⎯K⎯I⎯L⎯L pin can be used as a voltage monitor. Figure rent on its ⎯S⎯H⎯D⎯N pin. A pull-up resistor on EN is thus not
5 shows an application where the ⎯K⎯I⎯L⎯L pin has a dual needed.
function. It is driven by a low leakage open drain output
Operation Without µP
of the µP. It is also connected to a resistor divider that
monitors battery voltage (VIN). When the battery voltage Figure 6 shows how to connect the ⎯K⎯I⎯L⎯L pin when there
falls below the set value, the voltage at the ⎯K⎯I⎯L⎯L pin falls is no circuitry available to drive it. The minimum pulse
below 0.6V and the EN pin is quickly pulled low. Note that width detected is 30µs. If there are glitches on the resis-
the resistor values should be as large as possible, but tor pull-up voltage that are wider than 30µs and transition
small enough to keep leakage currents from tripping the below 0.6V, then an appropriate bypass capacitor should
0.6V ⎯K⎯I⎯L⎯L comparator. be connected to the ⎯K⎯I⎯L⎯L pin.

VIN VIN

9V 9V
VIN VOUT 3.3V VIN VOUT 3.3V

LT1767-3.3 LT1767-3.3

SHDN SHDN

5.4V THRESHOLD R3
806k
1% R1
100k
R2
100k R1
VIN EN VIN EN
C4 1% 10k C4
LTC2950-1 LTC2950-1
0.1µF 0.1µF
INT INT INT
µP + C3*
PB KILL KILL PB KILL 0.01µF
(OPEN DRAIN) GND ONT OFFT
GND ONT OFFT
2950 F05

CONT* COFFT* CONT* COFFT*

0.033µF 0.033µF 0.033µF 0.033µF
*OPTIONAL *OPTIONAL 2950 F06

Figure 5. Input Voltage Monitoring with ⎯K⎯I⎯L⎯L Input Figure 6. No µP Application

2950f

12
 LTC2950
U
TYPICAL APPLICATIO S
Power Path Switching ⎯P⎯B Pin in a Noisy Environment
The ⎯E⎯N open drain output of the LTC2950-2 is designed to The rugged ⎯P⎯B pin is designed to operate in noisy envi-
switch on/off an external power PFET. This allows a user ronments. Transients below ground (>–6V) and above VIN
to connect/disconnect a power supply (or battery) to its (<30V) will not damage the rugged P ⎯ ⎯B pin. Additionally,
load by toggling the ⎯P⎯B pin. Figure 7 shows the LTC2950-2 ⎯ ⎯
the PB pin can withstand ESD HBM strikes up to ±10kV.
controlling a two cell Li-Ion battery application. The ⎯I⎯N⎯T In order to keep external noise from coupling inside the
and ⎯K⎯I⎯L⎯L pins are connected to the output of the PFET LTC2950, place an R-C network close to the P ⎯ ⎯B pin. A
through a resistor divider. The ⎯K⎯I⎯L⎯L pin serves as a voltage 5k resistor and a 0.1µF capacitor should suffice for most
monitor. When VOUT drops below 6V, the ⎯E⎯N pin is open noisy applications (see Figure 8).
circuited 30µs later.

VOUT
R5 M1
100K VOUT,TRIP POINT = 6V

R1
4.2V + 909k
SINGLE CELL
Li-Ion BATTERY 1%
C4 VIN EN
0.1µF OPEN DRAIN OUTPUT
CERAMIC LTC2950-2 INT
OPTIONAL GLITCH
4.2V + FILTER CAPACITOR
PB KILL
SINGLE CELL VTH = 0.6V INPUT
R4
Li-Ion BATTERY GND ONT OFFT C3*
100k
1% 0.1µF
CONT* COFFT*
0.033µF 0.033µF
*OPTIONAL 2950 F07

Figure 7. Power Path Control with 6V Under Voltage Detect

VIN
PARASITICS
TRACE
R6 VIN EN
CAPACITANCE
5k
PB LTC2950-1 INT
NOISE

TRACE C5 KILL
INDUCTANCE 0.1µF GND ONT OFFT

DETAILS OMITTED
FOR CLARITY

2950 F08

Figure 8. Noisy ⎯P⎯B Trace

2950f

13
LTC2950
U
TYPICAL APPLICATIO S
External Pull-Up Resistor on ⎯P⎯B Reverse Battery Protection
An internal pull-up resistor on the P ⎯ ⎯B pin makes an ex- To protect the LTC2950 from a reverse battery connec-
ternal pull-up resistor unnecessary. Leakage current on tion, place a 1k resistor in series with the VIN pin (see
the P⎯ ⎯B board trace, however, will affect the open circuit Figure 10).
voltage on the ⎯P⎯B pin. If the leakage is too large (>2µA),
the ⎯P⎯B voltage may fall close to the threshold window.
To mitigate the effect of the board leakage, a 10k resistor
to VIN is recommended (see Figure 9).

LTC2950-1/
VIN VIN LTC2950-2
2.4V

R7
10k
100k
PB
EXTERNAL BOARD
LEAKAGE CURRENT
>2µA GND
PINS OMITTED
FOR CLARITY
2950 F09
IF EXTERNAL PARASITIC BOARD
LEAKAGE >2µA, USE EXTERNAL
PULL-UP RESISTOR

Figure 9. External Pull-Up Resistor on ⎯P⎯B Pin

2950f

14
 LTC2950
U
PACKAGE DESCRIPTIO
DDB Package
8-Lead Plastic DFN (3mm × 2mm)
(Reference LTC DWG # 05-08-1702)
0.61 ±0.05 R = 0.115 0.38 ± 0.10
3.00 ±0.10
(2 SIDES) TYP
(2 SIDES)
0.56 ± 0.05 5 8
0.675 ±0.05 (2 SIDES)
2.50 ±0.05
2.00 ±0.10
1.15 ±0.05 PIN 1 BAR
(2 SIDES)
TOP MARK PIN 1
PACKAGE (SEE NOTE 6) CHAMFER OF
OUTLINE EXPOSED PAD
4 1 (DDB8) DFN 1103
0.25 ± 0.05 0.200 REF 0.75 ±0.05 0.25 ± 0.05
0.50 BSC 0.50 BSC
2.20 ±0.05 2.15 ±0.05
(2 SIDES) (2 SIDES)
0 – 0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS BOTTOM VIEW—EXPOSED PAD

NOTE:
1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M0-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE

S8 Package
8-Lead Plastic Small Outline
(Reference LTC DWG # 05-08-1637)
0.52 0.65 2.90 BSC
MAX REF (NOTE 4)

1.22 REF

2.80 BSC 1.50 – 1.75

3.85 MAX 2.62 REF 1.4 MIN (NOTE 4)

PIN ONE ID

RECOMMENDED SOLDER PAD LAYOUT 0.22 – 0.36

0.65 BSC
PER IPC CALCULATOR 8 PLCS (NOTE 3)

0.80 – 0.90

0.20 BSC
0.01 – 0.10
1.00 MAX
DATUM ‘A’

0.30 – 0.50 REF

0.09 – 0.20 1.95 BSC
(NOTE 3) TS8 TSOT-23 0802
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
2950f

15
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However,
no responsibility is assumed for its use. Linear Technology Corporation makes no representation that
the interconnection of its circuits as described herein will not infringe on existing patent rights.
LTC2950
U
TYPICAL APPLICATIO

VIN VOUT

9V + R8 R5
LT1761-1.8
BATTERY 1k 910k
SHDN

1.8V
R1
VIN EN
C4 10k
0.1µF
LTC2950-1 INT INT
µP
PB KILL KILL
GND ONT OFFT

CONT* COFFT*
0.033µF 0.033µF
*OPTIONAL 2950 F10

Figure 10. Reverse Battery Protection

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PART NUMBER DESCRIPTION COMMENTS
LTC2900 Programmable Quad Supply Monitor Adjustable ⎯R⎯E⎯S⎯E⎯T, 10-Lead MSOP and 3mm x 3mm DFN Packages
LTC2904/2905 Pin-Programmable Dual Supply Monitors Adjustable ⎯R⎯E⎯S⎯E⎯T and Tolerance, 8-Lead SOT-23 and 3mm x 2mm DFN Packages
LTC4411 2.6A Low Loss Ideal Diode in ThinSOT No External MOSFET, Automatic Switching Between DC Sources
LTC4412HV Power Path Controller in ThinSOT Efficient Diode-ORing, Automatic Switching Between DC Sources, 3V to 36V
LTC4055 USB Power Controller and Li-Ion Charger Automatic Switchover, Charges 1-Cell Li-Ion Batteries

2950f

LT/TP 0305 500 • PRINTED IN USA

16 Linear Technology Corporation

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