FUNDAMENTALS OF EMBEDDED SYSTEMS the microprocessor that controls an automobile engine

SYSTEM must perform complicated filtering functions to optimize

* A system is an arrangement in which all its unit the performance of the car while minimizing pollution
assemble work together according to a set of rules. and fuel utilization.
* It can also be defined as a way of working, organizing * User interface: Microprocessors are frequently used to
or doing one or many tasks according to a fixed plan. For control complex user interfaces that may include
example, a watch is a time displaying system. Its multiple menus and many options. The moving maps in
components follow a set of rules to show time. If one of Global Positioning System (GPS) navigation are good
its parts fails, the watch will stop working. So we can say, examples of sophisticated user interfaces.
in a system, all its subcomponents depend on each other General
EMBEDDED SYSTEM Purpose Embedded
* Embedded means something that is attached to Criteria Computer system
another thing. combination of
* An embedded system can be thought of as a computer generic hardware It is combination of
hardware system having software embedded in it. and a general special purpose
* An embedded system can be an independent system or purpose OS for hardware and
it can be a part of a large system. An embedded system executing a embedded OS for
is a microcontroller or microprocessor based system variety of executing specific
which is designed to perform a specific task. Contents applications. set of applications
* For example, a fire alarm is an embedded system; it will It contains It may or may not
sense only smoke. Operating general purpose contain operating
* An embedded system has three components − It has System operating system system.
hardware. It has application software. It has Real Time Applications are Applications are
Operating system that supervises the application alterable by the non-alterable by
software and provide mechanism to let the processor run Alterations user. the user.
a process as per scheduling by following a plan to control Application specific
the latencies. Performance" is requirements are
* RTOS defines the way the system works. It sets the rules Key factor key factor. key factors.
during the execution of application program. Power
* A small scale embedded system may not have RTOS. Consumption More Less
An embedded system is a combination of 3 things: Response Critical for some
* Hardware * Software * Mechanical Components Time Not Critical applications
CHARACTERISTICS OF AN EMBEDDED SYSTEM
* Single-functioned − an embedded system usually
performs a specialized operation and does the same
repeatedly. For example: A pager always functions as a
pager.
* Tightly constrained − All computing systems have
constraints on design metrics, but those on an embedded
system can be especially tight. Design metrics is a
measure of an implementation's features such as its cost,
size, power, and performance
* Reactive and Real time − Many embedded systems
must continually react to changes in the system's
EMBEDDED SYSTEM & GENERAL PURPOSE COMPUTER environment and must compute certain results in real
* The Embedded System and the General purpose time without any delay.
computer are at two extremes. * Microprocessors based − It must be microprocessor or
* The embedded system is designed to perform a specific microcontroller based.
task * Memory − It must have a memory, as its software
* The general purpose computer is meant for general usually embeds in ROM. It does not need any secondary
use. It can be used for playing games, watching movies, memories in the computer.
creating software, work on documents or spreadsheets. * Connected − It must have connected peripherals to
Embedded computing systems have to provide connect input and output devices.
sophisticated functionality: * HW-SW systems − Software is used for more features
* Complex algorithms: The operations performed by the and flexibility. Hardware is used for performance and
microprocessor may be very sophisticated. For example, security.
APPLICATION OF EMBEDDED SYSTEM * The program receives its input data; the deadline is the
The application areas and the products in the embedded time at which a computation must be finished.
domain are countless. * We need tools to help us analyze the real-time
1. Consumer Electronics: Camcorders, Cameras. performance of embedded systems; we also need to
2. Household appliances: Washing machine, Refrigerator. adopt programming disciplines and styles that make it
3. Automotive industry: Anti-lock braking system (ABS), possible to analyze these programs
engine control. * In order to understand the real-time behavior of an
4. Home automation & security systems: Air embedded computing system, we have to analyze the
conditioners, sprinklers, fire alarms. system at several different levels of abstraction. Those
5. Telecom: Cellular phones, telephone switches. layers include:
6. Computer peripherals: Printers, scanners. - CPU: The CPU clearly influences the behavior of the
7. Computer networking systems: Network routers and program, particularly when the CPU is a pipelined
switches. processor with a cache.
CHALLENGES - Platform: The platform includes the bus and I/O devices.
* How much hardware do we need? The platform components that surround the CPU are
- Control over the amount of computing power we apply responsible for feeding the CPU and can dramatically
to our problem. affect its performance.
- Select the type of microprocessor, amount of memory - Program: Programs are very large and the CPU sees only
and the peripheral devices a small window of the program at a time. We must
- To meet both performance deadlines and consider the structure of the entire program to
manufacturing cost constraints, the choice of hardware determine its overall behavior.
is important - Task: We generally run several programs simultaneously
* How do we meet deadlines? on a CPU, creating a multitasking system. The tasks
- The brute force way of meeting a deadline is to speed interact with each other in ways that have profound
up the hardware so that the program runs faster, that implications for performance
makes the system more expensive. - Multiprocessor: Many embedded systems have more
- It is also entirely possible that increasing the CPU clock than one processor—they may include multiple
rate may not make enough difference to execution time, programmable CPUs as well as accelerators.
since the program’s speed may be limited by the memory THE EMBEDDED SYSTEM DESIGN PROCESS
system. The above
* How do we minimize power consumption? figure
- In battery-powered applications, power consumption is summarizes
extremely important. Even in non-battery applications, the major steps
excessive power consumption can increase heat in the
dissipation. embedded
- One way to make a digital system consume less power system design
is to make it run more slowly, but naively slowing down process. In this
the system can obviously lead to missed deadlines. top–down
■ Complex testing: Exercising an embedded system is view, we start
generally more difficult than typing in some data. We with the system
may have to run a real machine in order to generate the requirements.
proper data. In the next
■ Limited observability and controllability: Embedded step,
computing systems usually do not come with keyboards specification,
and screens. This makes it more difficult to see what is we create a
going on and to affect the system’s operation more detailed
■ Restricted development environments: The description of what we want. The specification states
development environments for embedded systems (the only how the system behaves, not how it is built.
tools used to develop software and hardware) are often The details of the system’s internals begin to take shape
much more limited than those available for PCs and when we develop the architecture, which gives the
workstations. system structure in terms of large components. Once we
PERFORMANCE IN EMBEDDED COMPUTING know the components we need, we can design those
* Embedded system designers have a very clear components, including both software modules and any
performance goal in mind—their program must meet its specialized hardware we need. Based on those
deadline. The heart of embedded computing is real-time components, we can finally build a complete system.
computing.
Major Goals * In the moving map, the GPS receiver is a good example
■ Manufacturing cost of a specialized component that will nonetheless be a
■ Performance (both overall speed and deadlines) predesigned, standard component. We can also make
■ Power consumption use of standard software modules.
Specification STRUCTURAL DESCRIPTION
* The specification is more precise—it serves as the * By structural description, we mean the basic
contract between the customer and the architects. components of the system.
* The specification must be carefully written so that it * The principal component of an object-oriented design
accurately reflects the customer’s requirements and is the object. An object includes a set of attributes that
does so in a way that can be clearly followed during define its internal state. When implemented in a
design. programming language, these attributes usually become
* The specification should be understandable enough so variables or constants held in a data structure.
that someone can verify that it meets system * In some cases, we will add the type of the attribute
requirements and overall expectations of the custom after A class is a form of type definition—all objects
Architecture design of embedded system derived from the same class have the same
* The specification does not say how the system does characteristics, although their attributes may have
things, only what the system does. different values.
* Describing how the system implements those functions A class in UML notation
is the purpose of the architecture.
* The architecture is a plan for the overall structure of the
system that will be used later to design the components
that make up the architecture.
Block diagram for the moving map

An object in UML notation

Hardware and software architectures for the moving

map

* The class has the name that we saw used in the d 1

object since d 1 is an instance of class Display.
* The Display class defines the pixels attribute seen in the
object; remember that when we instantiate the class an
object, that object will have its own memory so that
different objects of the same class have their own values
for the attributes.
* Other classes can examine and modify class attributes;
if we have to do something more complex than use the
attribute directly, we define a behavior to perform that
function.
* A class defines both the interface for a particular type
of object and that object’s implementation.
Relationships between Objects and Classes:
Designing Hardware and Software Components ■ Association occurs between objects that communicate
* The architectural description tells us what components with each other but have no ownership relationship
we need. between them.
* The components will in general include both ■ Aggregation describes a complex object made of
hardware—FPGAs, boards, and so on—and software smaller objects.
modules. ■ Composition is a type of aggregation in which the
* Some of the components will be ready-made. The CPU, owner does not allow access to the component objects.
for example, will be a standard component in almost all ■ Generalization allows us to define one class in terms of
cases, as will memory chips and many other components. another.
Unified Modeling Language allows us to define one class * In the above figure we have created a
in terms of another. An example is shown below, where Multimedia_display class by combining the Display class
we derive two particular types of displays. The first, with a Speaker class for sound.
BW_display, describes a black- and-white display. This * The derived class inherits all the attributes and
does not require us to add new attributes or operations, operations of both its base classes, Display and Speaker.
but we can specialize both to work on one-bit pixels. The * A link describes a relationship between objects;
second, Color_map_display, uses a graphic device known association is to link as class is to object.
as a color map to allow the user to select from behaviors. BEHAVIORAL DESCRIPTION
Derived classes as a form of generalization in UML A state and transition in UML

* The state machines will not rely on the operation of a

clock, as in hardware; rather, changes from one state to
another are triggered by the occurrence of events.
* An event is some type of action. The event may
originate outside the system, such as a user pressing a
button. It may also originate inside, such as when one
routine finishes its computation and passes the result on
to another routine. The three types of events defined by
UML are
- A signal is an asynchronous occurrence. It is defined in
UML by an object that is labeled as a <<signal>>. The
object in the diagram serves as a declaration of the
event’s existence. Because it is an object, a signal may
have parameters that are passed to the signal’s receiver.
- A time-out event causes the machine to leave a state
after a certain amount of time. The label tm(time-value)
* A derived class inherits all the attributes and operations on the edge gives the amount of time after which the
from its base class. transition occurs.
* In this class, Display is the base class for the two derived
classes. A derived class is defined to include all the
attributes of its base class.
* This relation is transitive—if Display were derived from
another class, both BW_display and Color_map_display
would inherit all the attributes and operations of
Display’s base class as well.
* Unified Modeling Language considers inheritance to be
one form of generalization. A generalization relationship
is shown in a UML diagram as an arrow with an open
(unfilled) arrowhead.
* UML also allows us to define multiple inheritances, in
which a class is derived from more than one base class.
Multiple inheritances in UML

sequence diagram in UML

TRADITIONAL EMBEDDED SYSTEM DEVELOPMENT COMPUTATIONAL MODELS IN EMBEDDED DESIGN
APPROACH DATA FLOW GRAPH/DIAGRAM (DFG) MODEL
* The hardware software partitioning is done at an early - Translates the data processing requirements into a data
stage flow graph
* Engineers from the software group take care of the - A data driven model in which the program execution is
software architecture development and implementation, determined by data.
and engineers from the hardware group are responsible - Emphasizes on the data and operations on the data
for building the hardware required for the product which transforms the input data to output data.
* There is less interaction between the two teams and - Best suited for modeling Embedded systems which are
the development happens either serially or in parallel computational intensive (like DSP applications)
and once the hardware and software are ready, the - E.g. Model the requirement x = a + b; and y = x - c;
integration is performed. A DFG model is said to be acyclic DFG (ADFG) if it doesn’t
FUNDAMENTAL ISSUES IN H/W S/W CO-DESIGN contain multiple values for the input variable and
* Model Selection multiple
- A Model captures and describes the system output values
characteristics for a given set
- A model is a formal system consisting of objects and of input(s).
composition rules Feedback
- It is hard to make a decision on which model should be inputs (Output
followed in a particular system design. is feed back to
- Most often designers switch between a variety of Input), events
models from the requirements specification to the etc are examples for non-acyclic inputs. A DFG model
implementation aspect of the system design translates the program as a single sequential process
- The objectives vary with each phase execution
* Architecture Selection CONTROL DATA FLOW GRAPH (CDFG) MODEL
- A model only captures the system characteristics and - Translates the data processing requirements into a data
does not provide information on ‘how the system can be flow graph
manufactured?’ - Model applications involving conditional program
- The architecture specifies how a system is going to execution
implement in terms of the number and types of different - Contains both data
components and the interconnection among them operations and
- Controller architecture, Data path Architecture, control operations
Complex Instruction Set Computing (CISC), Reduced - Uses Data Flow
Instruction Set Computing (RISC), Very long Instruction Graph (DFG) as
Word Computing (VLIW), Single Instruction Multiple Data element and
(SIMD), Multiple Instruction Multiple Data (MIMD) etc. conditional
are the commonly used architectures in system design (constructs) as
* Language Selection decision makers.
- A programming Language captures a ‘Computational E.g. Model the
Model’ and maps it into architecture requirement If flag
- A model can be captured using multiple programming = 1, x = a + b; else y
languages like C, C++, C#, Java etc. for software = a-b;
implementations and languages like VHDL, System C, and STATE MACHINE MODEL
Verilog etc. for hardware implementations - Based on ‘States’ and ‘State Transition’
- Certain languages are good in capturing certain - Describes the system behavior with ‘States’, ‘Events’,
computational model. For example, C++ is a good ‘Actions’ and ‘Transitions’
candidate for capturing an object oriented model. - State is a representation of a current situation.
- The only pre-requisite in selecting a programming - An event is an input to the state. The event acts as
language for capturing a model is that the language stimuli for state transition.
should capture the model easily. - Transition is the movement from one state to another.
* Partitioning of System Requirements into H/w & S/w - Action is an activity to be performed by the state
- Implementation aspect of a System level Requirement machine
- It may be possible to implement the system - Requirement:
requirements in either hardware or software (firmware) - When the vehicle ignition is turned on and the seat belt
- Various hardware software trade-offs like performance, is not fastened within 10 seconds of ignition ON, the
re-usability, effort etc. are used for making a decision on system generates an alarm signal for 5 seconds.
the hardware-software partitioning.
- The Alarm is turned off when the alarm time (5 seconds) #define ON 1 #define OFF 0 #define YES 1 #define NO 0
expires or if the driver/passenger fastens the belt or if the void seat_belt_warn()
ignition switch is turned off, whichever happens first. { wait_10sec();
if (check_ignition_key()==ON)
{ if (check_seat_belt()==OFF)
{ set_timer(5); start_alarm();
While
((check_seat_belt()==OFF)&&(check_ignition_key()==OF
F )&& (timer_expire()==NO));
stop_alarm(); }}}
CONCURRENT/COMMUNICATING PROCESS MODEL
- Models concurrently executing tasks/processes. The
program instructions are iterated and executed
conditionally and the data gets transformed through a
SEQUENTIAL PROGRAM MODEL
series of operations
- The functions or processing requirements are executed
- Certain processing requirements are easier to model in
in sequence
concurrent processing model than the conventional
- The program instructions are iterated and executed
sequential execution.
conditionally and the data gets transformed through a
- Sequential execution leads to a single sequential
series of operations
execution of task and thereby leads to poor processor
- FSMs are good choice for sequential Program modeling.
utilization, when the task involves I/O waiting, sleeping
- Flow Charts is another important tool used for modeling
for specified duration etc.
sequential program
- If the task is split into multiple subtasks, it is possible to
- The FSM approach represents the states, events,
tackle the CPU usage effectively, when the subtask under
transitions and actions, whereas the Flow Chart models
execution goes to a wait or sleep mode, by switching the
the execution flow
task execution.
- E.g. Automatic ‘Seat Belt Warning’ in an automotive
- Concurrent processing model requires additional
- Requirement:
overheads in task scheduling, task synchronization and
- When the vehicle ignition is turned on and the seat belt
communication
is not fastened within 10 seconds of ignition ON, the
Create and initialize events
system generates an alarm signal for 5 seconds.
wait_timer_expire, ignition_on, ignition_off,
- The Alarm is turned off when the alarm time (5 seconds)
seat_belt_on, seat_belt_off, alarm_timer_start,
expires or if the driver/passenger fastens the belt or if the
alarm_timer_expire
ignition switch is turned off, whichever happens first.
Create task Wait Timer
Create task Ignition Key Status Monitor
Create task Seat Belt Status Monitor
Create task Alarm Control
- The processing requirements are split in to multiple
tasks
- Tasks are executed concurrently
- ‘Events’ are used for synchronizing the execution of
tasks.
INTRODUCTION TO UML
Unified Modeling Language (UML) is a visual modeling
language for Object Oriented Design (OOD). UML helps in
all phases of system design through a set of unique
diagrams for requirements capturing, designing and
deployment.
UML Building Blocks
* Things -An abstraction of the UML Model
* Relationships -An entity which express the type of
relationship between UML elements (objects, classes etc)
* Diagrams -UML Diagrams give a pictorial
representation of the static aspects, behavioural aspects
and organization and management of different modules
(classes, packages etc.) of the system.
* Things Composite Structure Diagram and Deployment Diagram
- Structural things: Represents mostly the static parts of falls under this category
a UML model. They are also known as ‘classifiers’. Class, Diagram Description
interface, use case, use case realization (collaboration), Gives a pictorial representation of a set
active class, component and node are the structural of objects and their relationships. It
things in UML. Object represents the structural organization
- Behavioral things: Represents mostly the dynamic parts Diagram between objects.
of a UML model. Interaction, state machine and activity Gives a pictorial representation of the
are the behavioral things in UML. different classes in a UML model, their
- Grouping things: Are the organizational parts of a UML interfaces, the collaborations,
model. Package and sub-system are the grouping things interactions and relationship between
in UML. the classes etc. It captures the static
- Annotational things: Are the explanatory parts of a UML Class Diagram design of the system
model. Note is the Annotational thing in UML. It is a pictorial representation of the
implementation view of a system. It
comprises of components (Physical
packaging of classes and interfaces),
Component relationships and associations among
Diagram the components
It is a representation of the
organization of packages and their
elements. Package diagrams are mostly
Package used for organizing use case diagrams
Diagram and class diagrams
It is a pictorial representation of the
configuration of run time processing
Deployment nodes and the components associated
Diagram with them
Behavioral Diagram
It represents the dynamic (behavioral) aspects of the
system. Use case diagram, sequence diagram, state
diagram, communication diagram, activity diagram,
timing diagram and interaction diagram are diagrams in
UML.
Use case diagram for seat belt warning system

Sequence diagram for seat belt warning system

UML diagrams
UML diagrams give pictorial representation of static
aspects, behavioral aspects and organization and
management of different modules (into classes,
packages) of the systems
Static Diagrams: Diagram representing the static
(structural) aspects of the system. Class Diagram, Object
Diagram, Component Diagram, Package Diagram,
FIRMWARE DESIGN AND DEVELOPMENT • Almost all task in embedded applications are non-
• Embedded firmware is responsible for controlling ending and are repeated infinitely throughout the
various peripherals of the embedded hardware and operation. By analyzing C code we can see that the task 1
generating responses in accordance with the functional to n are performed one after another and when the last
requirements mentioned in the requirements for the task is executed, the firmware execution is again
particular product. redirected to task 1 and it is repeated forever in the loop.
• Firmware is considered as the master brain of the • A Hardware reset brings the program execution back to
embedded systems. the main loop. Whereas the interrupt suspend the task
• Imparting intelligence to an embedded system is a execution temporarily and perform the corresponding
onetime process and it can happens at any stage of the interrupt routine and on completion of the interrupt
design. routine it restart the task execution from the point where
• Designing an embedded firmware requires it got interrupted.
understanding of embedded product hardware like, • Super Loop based design does not require an OS, since
various component interfacing, memory map details I/O there is no need for scheduling which task is to be
port details, configuration and register details of various executed and assigning priority to each task.
hardware chips used and some programming language. • In a super Loop based design, the priorities are fixed
• Embedded firmware development process start with and the order in which the task to be executed are also
conversion of firmware requirements into a program fixed. Hence the code for performing these task will be
model using modeling tools like UML or flow chart based residing in the code memory without an operating
representation. UML diagram gives diagrammatic system image.
representation of the decision items to be taken and the Drawback of Super Loop based Design
task to be performed. • Major drawback of this approach is that any failure in
• Once the program modeling is created, next step is the any part of a single task will
implementation of the task and actions by capturing the affect the total system. If the program hang up at any
model using a language which is understandable by the point while executing a task, it
target processor. will remain there forever and ultimately the product will
Embedded Firmware Design Approaches stop functioning
• Firmware design approaches depends on the – Some remedial measures are there
– Complexity of the function to be performed • Use of Hardware and software Watch Dog Timers
– Speed of operation required etc (WDTs) helps in coming out from the loop when an
• Two basic approaches for firmware design unexpected failure occurs or when the processor hang
– Conventional Procedure based Firmware Design/Super up. But it may cause additional hardware cost and
Loop Design firmware overhead.
– Embedded Operating System Based Design. – Another major drawback is lack of real timeliness.
SUPER LOOP BASED APPROACH – If the number of tasks to be executed within an
This approach is applied for the applications that are not application increases, the time at which each task is
time critical and the response time is not so important. repeated also increases. This brings the probability of
Similar to the conventional procedural programming missing out some events.
where the code is executed task by task. Task listed at the Embedded Operating System Based Approach
top of the program code is executed first and task below – Contains OS, which can be either a General purpose
the first task are executed after completing the first task. Operating System (GPOS) or real Time Operating System
It is true procedural one. (RTOS). GPOS based design is very similar to the
• Firmware execution flow of this will be, conventional PC based Application development where
1. Configure the common parameter and perform the device contain an operating system and you will be
initialization for various hardware components, memory, creating and running user applications on top of it.
registers etc. Examples of Microsoft Windows XP OS are PDAs,
2. Start the first task and execute it Handheld devices/ Portable Devices and point of Sale
3. Execute the second task terminals. RTOS based design approach is employed in
4. Execute the next task embedded product demanding Real Time Responses.
5. ….6. …. 7. Execute the last defined task – Example: Windows CE, Symbian etc.
8. Jump back to the first task and follow the same flow. EMBEDDED FIRMWARE DEVELOPMENT LANGUAGES
• In terms of C program code as: • For embedded firmware development, we can use
void main(){ either – Target processor/controller specific language
configuration(); (Assembly language) or
initializations(); – Target processor/ controller independent language
while(1){ task1(); task2(); ….. (High level languages) or
taskn(); } } – Combination of Assembly and high level language
Assembly language based development • Some assemblers are supplied by single vendor only.
• Assembly language is human readable notation of • Some assemblers are freely available.
machine language whereas machine language is a • Some are commercial and requires license from
processor understandable language. Processor deal only vendors. – A51 Macro Assembler from Keil software is a
with binaries. popular assembler.
• Machine language is a binary representation and it 1. Source File to Object File Translation
consist of 1s and 0s. Machine language is made readable • Each source module is written in assembly and is stored
by using specific symbols called ‘mnemonics’. Hence in .src or .asm file.
machine language can be considered as an interface • Each file can be assembled separately to examine the
between processor and programmer. syntax errors and incorrect assembly instructions.
• Assembly language programming is the task of writing • On assembling of each .src/.asm file a corresponding
processor specific machine code in mnemonics form, object file is created with extension .obj.
converting the mnemonics into actual processor • The object file does not contain the absolute address of
instructions (machine language) and associated data where the generated code need to be placed on the
using an assembler. program memory and hence it is called relocatable
• In particular assembly language is used in writing low segment.
level interaction between the OS and the hardware. • It can be placed at any code memory location and it is
• The general format of an assembly language instruction responsibility of the linker/loader to assign absolute
is Opcode followed by the Operand Opcode tells what to address for this module.
do and Operand gives the information to do the task. • Absolute address allocation is done at absolute object
• The operand may be single operand, dual operand or file creation stage. Each module can share variables and
more – MOV A, #30 subroutine among them.
– Move the decimal value 30 to the accumulator register 2. Library File Creation and Usage
of 8051. • Libraries are specially formatted, ordered program
– Here MOV A is the opcode and 30 is Operand. collection of object modules that may be used by the
– Same instruction in machine language is linker at a later time.
01110100 00011110 • When a linker process a library, only those object
– Here the first 8 bit represent opcode MOV A and next 8 modules in the library that are necessary to create the
bit represent the operand 30. program are used. Library files are generated with the
LABEL OPCODE OPERAND COMMENTS extension ‘.lib’. Library file is some kind of source code
• Label is an optional field. A label is an identifier to hiding technique.
remembering where data or code is located. LABEL is • If you don’t want to reveal the source code behind the
commonly used a memory location, address of a various functions you have written in your program and
program, subroutine, code portion etc… at the same time you want them to be distributed to
• The max length of the label differ between assemblers. application developers for making use of them in their
Labels are always suffixed by a colon and begin with a applications, you can supply them as library files. For
valid character. Labels can contain numbers from 0 to 9 using a library file in a project, add library to the project.
and special character _. Labels are used for representing • If you are using a commercial version of assembler suit
subroutine names and jump locations in Assembly for your development, the vendor of utility may provide
language programming. Label is only an optional field. you pre written library files for performing multiplication,
• ORG 0100H is not an assembly language instruction; it floating point arithmetic, etc. as an add-on utility.
is an assembler directive instruction. It tells the • Example LIB51 from keil software.
assembler that the instruction from here onwards should 3. Linker and Locator
be placed at location starting from 0100H. • Linker and locator is another software utility
• Assembler directive instructions are known as ‘pseudo responsible for” linking the various object modules in a
ops’. They are used for multi module project and assigning absolute address to
- Determining the start address of the program (eg. ORG each module”.
0100H) - Determining the entry address of the program • Linker generate an absolute object module by
(eg. ORG 0100H) - Reserving the memory for data extracting the object module from the library, if any and
variables, arrays and structures (eg. Var EQU 70H) those obj files created by the assembler, which is
- Initializing variable values (e.g. val DATA 12H) generated by assembling the individual modules of a
Conversion of assembly language into machine project.
language is carried out by a sequence of operations • It is the responsibility of the linker to link any external
• Translation of assembly code to machine code is dependent variables or functions declared on various
performed by assembler. modules and resolve the external dependencies among
• The assemblers for different target machines are the modules.
different.
• An absolute object file or modules does not contain any HIGH LEVEL LANGUAGE BASED DEVELOPMENT
re-locatable code or data. Any High level language with a supported cross compilers
• All code and data reside at fixed memory locations. The for the target processor can be used for embedded
absolute object file is used for creating hex files for firmware development. Cross Compilers are used for
dumping into the code memory of the converting the application development in high level
processor/controller. language into target processor specific assembly code.
• Example ‘BL51’ from keil software Most commonly used language is C.
4. Object to Hex File Converter Advantages of High Level Language based Development
• This is the final stage in the conversion of Assembly • Reduced Development Time: Developers requires less
language to machine understandable language. or little knowledge on the internal hardware details and
• Hex file is the representation of the machine code and architecture of the target processor
the hex file is dumped into the code memory of the • Developer Independency: The syntax used by most of
processor. Hex file representation varies depending on the high level languages are universal and a program
the target processor. Hex file is created from the final written in high level language can be easily be
‘Absolute Object File’ using the Object to Hex file understood by a second person knowing the syntax of
Converter utility. the language
Advantage of Assembly Language Based Development • Portability: Target applications written in high level
• Efficient Code Memory and data Memory Usage languages are converted to target processor
(Memory Optimization) understandable format by a cross compiler
• High Performance Limitations of high level language based development
Optimized code not only improve the code memory Some cross compilers avail for the high level languages
usage but also improve the total system performance may not be so efficient in generating optimized target
• Low level Hardware access processor specific instructions. Target images created by
Most of the code for low level programming like such compilers may be messy and no optimized in terms
accessing external device specific registers from the of performance as well as code size.
operating system kernel, device drivers and low level Mixing Assembly and High level Language
interrupt routine etc. are making use of direct assembly 1. Mixing Assembly Language with High level Language
coding since low level device specific operation support (Assembly Language with ‘C’)
is not commonly avail with most of the high level Assembly routines are mixed with C in situations where
language compilers. entire program is written in C and the cross compiler in
• Code Reverse Engineering use do not have built in support for implementing certain
Reverse Engineering is the process of understanding the features like Interrupt Service Routine or if the
technology behind a product by extracting the programmer want to take the advantage of speed and
information from the finished product. Though most of optimized code offered by machine code generated by
the product employ code memory protection. hand written assembly rather than cross compiler
Drawbacks of assembly language based development generated machine code
• High Development time: Assembly language programs 2. Mixing High Level Language with Assembly Language
are much harder to program than high level languages. Mixing C and Assembly is little complicated in the sense-
Developer must have thorough knowledge of the programmer must be aware of how parameters are
architecture, memory organization and register details of passed from the C routine to Assembly and values are
target processor in use returned from assembly routine to C and how the
• Developer Dependency: There is no common rule for assembly routine is invoked from the C code. These are
developing assembly language based applications cross compiler dependent. There is no universal rule 4 it
whereas all high level language instruct certain set of 3. Inline assembly
rules for application development Another technique for inserting target
• Non- Portable: Target applications written in assembly processor/controller specific assembly instructions at
instructions are valid only for that particular family of any location of a source code written in high level
processors. Example—Application written for Intel X86 language ‘C’. This avoids delay in calling an assembly
family of processors. routine from a ‘C’ code.
INTEGRATION OF HARDWARE AND FIRMWARE • If a crystal is not connected across pins XTAL1 and
It deals with the embedding of firmware into the target XTAL2, apply a 3 MHz to 24MHz clock to XTAL1 pin and
hardware board. It is the process of ‘Embedding wait for at least 10 milliseconds.
Intelligence’ to the product. A variety of techniques are • Enable serial programming by sending the
used for embedding the firmware into the target board. Programming Enable serial instruction to pin MOSI/P1.5.
1. Out-of-Circuit Programming The frequency of the shift clock supplied at pin SCK/P1.7
Out-of-circuit programming is performed outside the needs to be less than the CPU clock at XTAL1 divid by 40.
target board. The processor or memory chip into which • The Code or Data array is programmed one byte at a
the firmware needs to embedded is taken out of the time supplying the address and data together with the
target board and it is programmed with the help of appropriate Write instruction. The selected memory
programming device. The programming device is location is first erased before the new data is written. The
dedicated unit when contains the necessary hardware write cycle is self –timed and typically takes less than 2.5
circuit to generate the programming signals. ms at 5V.
Operations for embedding the firmware with a • Any memory location can be verified by using the Read
programmer. instruction which returns the content at the selected
• Connect the programming device to the specified port address at serial output MISO/P1.6.
of PC (USB/COM port/parallel port) • After successfully programming the device, set RST pin
• Power up the device.(Ensure that the power indication low or turn off the chip power supply and turn it ON to
LED is ON) commence the normal operation
• Execute the programming utility on the PC and ensure 3. In Application Programming (IAP)
proper connectivity is established between the PC and In Application Programming (IAP) is a technique used by
programmer. In case of error turn off device power and the firmware running on the target device for modifying
try connecting it again. a selected portion of the code memory. It is not a
• Unlock the ZIF socket by turning the lock pin. technique for first time embedding of user written
• Insert the device to be programmed into the open firmware. It modifies the program code memory under
socket as per the insert diagram shown on the the control of embedded application. Updating
programmer. calibration data, look-up tables, etc., which are stored in
• Lock the ZIF socket. the code memory, are typical examples of IAP.
• Select the device name from the list of supported The Boot ROM resident API instructions which perform
devices. • Load the hex file which is to be embedded into various functions such as programming, erasing and
the device reading the Flash memory during ISP mode are made
Drawbacks: • High development time. available to the end-user written firmware for IAP.
• Not suitable for batch production. Firmware Loading for Operating System based Devices
2. In System Programming (ISP) It is possible to embed the firmware into the target
In ISP, programming is done within the system. The processor/controller memory at the time of chip
firmware is embedded into the target device without fabrication itself. Such chips are known as ‘Factory
removing it from the target board. It is the flexible and Programmed Chips’. The OS based embedded systems
easy way of firmware embedding. The only pre-requisite are programmed using the In System Programming (ISP)
is that the device must have an ISP support. A part from technique. OS based embedded systems contain a special
target board, PC, ISP utility and ISP cable, no other piece of code called ‘Boot loader’ program which takes
additional hardware is required for ISP. In order to control of the OS and application firmware embedding
perform ISP operations the target device should be and copying of the OS image to the RAM of the system
powered up in a special ‘ISP mode. for execution.
In System Programming with SPI Protocol EMBEDDED SYSTEM DEVELOPMENT ENVIRONMENT
Devices with SPI In System Programming support Components
contains a built-in interface and a on-chip EEPROM or • Host Computer: Acts as the heart of development
FLASH memory is programmed through this interface environment.
The primary I/O lines involved in SPI-In System • IDE Tools: Tools for firmware design and development
Programming are listed below, • Electronic Design Automation Tools: Embedded
a. MOSI – Master Out Slave In Hardware Design
b. MISO – Master In Slave Out c. SCK – System Clock • Emulator hardware: Debugging target board
d. RST – Reset of Target Device • Signal Sources (function generator): Simulates inputs to
e. GND – Ground of Target Device target board
The power up sequence for In System Programming for • Target Hardware Debugging tools: CRO, Multimeter,
Atmel’s AT89S series microcontroller: and Logic Analyser for debugging hardware
• Apply supply voltage between VCC and GND pins of • Target Hardware
target chip. • Set RST pin to “HIGH” state.
IDE • This file is used for verifying the operation of macros
In Embedded System, IDE stands for an integrated and conditional preprocessor directives is a valid C file
environment for developing and debugging the target • file extension is cross compiler dependent
processor specific embedded firmware. An IDE is also 3. Hex file
known as integrated design environment or integrated • The Hex file is an ASCII text file with lines of text that
debugging environment. IDE is a software package which follow the Intel Hex file format.
bundles a “Text Editor”, “Cross-compiler”, ”Linker” and a • Intel Hex files are often used to transfer the program
“Debugger” IDE is a software application that provides and data that would be stored in a Rom or EPROM.
facilities to computer programmers for software 4. Map Files
development. IDEs can either command line based or GUI • Object file created contains relocatable codes i.e their
based. IDE consists of location in memory is not fixed.
1. Text Editor or Source code editor • It is the responsibility of linker to link these object
2. A compiler and an interpreter modules. The locator is responsible for locating the
3. Build automation tools absolute address to each module in the code memory.
4. Debugger Map files are generated by the linker and loader. These
5. Simulators files are used to keep the information of linking and
6. Emulators and logic analyser locating process. Map files use extensions .H,.HH,.HM
Cross Compilation depends on linker or loader
It is the process of converting a source code written in 5. Object files
high level language to a target processor/controller • It is the lowest level file format for any platform.
understandable machine code. The conversion of the • Cross compiling each source module converts the
code is done by software running on a processor various embedded instructions and other directives
/controller which is different from the target processor. present in the module to an object (.OBJ) file.
The software performing this operation is referred as the • The object file is specially formatted file with data
Cross-compiler. In other words cross-compilation the records for symbolic information, object code, debugging
process of cross platform software /firmware information etc.
development • OMF 1 & OMF2 are the 2 object files supported by C51
Cross compiler.
Need for Cross Compiler
List of details included in object file are
There are several advantages of using cross compiler.
1. Reserved memory for global variables
Some of them are as below:
2. Public symbol(variable or function)names
-By using cross compliers we can not only develop
3. External symbol(variable or function)references
complex Embedded System but reliability can be
4. Library files with which to link
improved and maintenance is easy.
5. Debugging information to help synchronize source
-Knowledge of the processor instruction set is not
lines with object files.
required.
DISASSEMBLER/DECOMPILER
-Register allocation and addressing mode details are
• Both are reverse engineering tools.
managed by the compiler.
• Reverse engineering is a technology used to reveal the
-The ability to combine variable selection with specific
technology behind the working of a product
operations improves program readability.
-used to find out the secret behind popular proprietary
-The C language is very portable and very popular.
product
Types of Files generated on Cross compilation
-helps the reverse engineering process by translating
1.List Files (.lst files)
embedded firmware to assembly /high level instruction
• Generated at the time of cross compilation
-Powerful tools for analyzing the presence of malicious
• Contain information about cross compilation process
contents
like – Cross compiler details – Formatted source text
DISASSEMBLER
– Assembling code generated from the source file
-utility program that convert machine code into assembly
– Symbol table – Errors and warning detected by the
code. -It is complementary to assembly or cross assembly
cross compiler system
DECOMPILER
2. Preprocessor output file
-is a utility program that convert machine language
• generated during cross compilation
instruction to high level language instruction.
• contain preprocessor output for the preprocessor
-Performs reverse operation of compiler or cross
instructions used in the source file
compiler
SIMULATORS • Firmware Debugging:
-It is a software tool for simulating various functionality o Deals with examining the firmware execution,
of the application software. IDE provides simulator execution flow, changes to various CPU registers and
support. Simulator simulates target hardware and status registers on execution of the firmware to ensure
firmware execution can be simulate using simulators that the firmware is running as per the design
Features of simulator: Why is Debugging required?
1. Purely software based • Firmware Debugging is performed to figure out the bug
2. Doesn’t require a real target system or the error in the firmware which creates the
3. Very primitive unexpected behavior.
4. Lack of real time behavior DEBUGGING TECHNIQUES
Limitations: 1. Incremental EEPROM Burning Technique:
1. Deviation from real behavior • Most primitive technique
2. Lack of real timeliness • Code is separated into different functional code units.
Advantage of simulator based debugging • Code is burned into EEPROM in incremental order.
1. No need of target board • LED or BUZZER provided to indicate correct functioning
- Purely software oriented, IDE simulates the target • Time Consuming but is a onetime process
board 2. Inline Breakpoint Based Firmware Debugging
- Since real hardware is not needed we can start • An inline debug code is inserted within the firmware at
immediately after the device interface and memory maps a point where we want to ensure correct execution
are finalized this saved development time • Debug code is printf() function.
2. Simulated I/O peripherals • View debug code generated data on the “Hyper
- It eliminates the need for connecting IO devices for Terminal”
debugging the firmware o Configure serial communication setting of the Hyper
3. Simulates abnormal conditions Terminal connection to the same as that of serial
- Can input any parameter as input during debugging communication setting configured in the firmware
hence can check for abnormal conditions easily. (Baudrate, Polarity, Stop Bit, Flow Control).
EMULATOR o Connect target board’s serial port to development PC’s
• It is a piece of hardware that exactly behaves like the COM port using RS232 cable.
real microcontroller chip with all its integrated 3. Monitor Program Based Firmware Debugging
functionality. • Monitor Program which acts as supervisor is developed.
• It is the most powerful debugging of all. • It controls the downloading of user code into code
• A microcontroller’s functions are emulated in real-time memory, inspect and modifies register/memory
and non-intrusively. locations, allow single stepping of source code etc.
• All emulators contain 3 essential function: • It always listen to serial port of target device and
1. The emulator control logic, including emulation according to command received it performs command
memory specific actions.
2. The actual emulation device • The first step in any monitor program development is
3. A pin adapter that gives the emulator’s target determining a set of commands for performing various
connector the same “package” and pin out as the operations like firmware downloading, memory register
microcontroller to be emulated. inspection/modification, single stepping, etc. Once the
• An emulator is a piece of hardware that looks like a commands for each operation is fixed write the code for
processor, has memory like a processor, and executes performing the actions corresponding to these
instructions like a processor but it is not a processor. commands
• The advantage is that we can probe points of the circuit 4. In Circuit Emulator Based Firmware Debugging
that are not accessible inside a chip. Functional Units
• It is a combination of hardware and software • Emulation Device • Emulation Memory • Emulator
DEBUGGERS Control Logic • Device Adaptors
• Debugging in embedded application is the process of Emulation Device: replica of target CPU
diagnosing the firmware execution, monitoring the • Standard Chip • Programmable Logic Device(PLD)
target processor’s registers and memory while the Emulation Memory: Replacement for EEPROM of target
firmware is running and checking the signals from various device
buses of embedded hardware. • It is the RAM incorporated in the emulator device
• Classified as • Acts as Trace Buffer. Trace buffer is a memory pool
o Hardware Debugging o Firmware Debugging holding the instructions executed/registers
• Hardware Debugging: modified/related data by the processor while debugging
o Deals with monitoring of various bus signals and Device adaptors
checking the status lines of target hardware.
• Act as an interface between the target board and Multimeter
emulator POD. • Used for measuring various electrical quantities like
• Normally pin-to-pin compatible sockets which can be Voltage, Currents, Resistance, Capacitance, Continuity
inserted/plugged into the target board for routing the checking, Transistor checking, Cathode and Anode
various signals from the pins assigned for the target identification of diode etc.
processor. • Primary debugging tool for physical contact based
5. On Chip Firmware Debugging hardware debugging.
• Today almost all processors incorporate built in debug • It is mainly used in embedded hardware debugging for:
modules called On Chip Debug (OCD) support. * Checking the circuit continuity between different
• Though OCD adds silicon complexity and cost factor, points on the board
from a developer perspective it is a very good feature * Measuring the supply voltage
supporting fast and efficient firmware debugging. * Checking the signal value, polarity etc.
• The On Chip Debug facilities integrated to the * Both analog and digital version are available
processor/controller are chip vendor dependent and Digital Cathode Ray Oscilloscope
most of them are proprietary technologies like Used for
Background Debug Mode. Some vendors add 'on chip • Waveform capturing and analysis
software debug support through JTAG (Joint Test Action • Measurement of signal strength
Group) port. • Analysing interference noise in the power supply line
• Processors/controllers with OCD support incorporate a and other signal lines
dedicated debug module to the existing architecture. • Connecting point under observation on the target
The signal lines of JTAG protocol are explained below board to the channels of the oscilloscope, waveform can
• Test Data In (TDI): It is used for sending debug be captured and analysed for expected behavior.
commands serially from remote debugger to the target Logic Analyser
processor • It is similar to CRO
• Test Data Out (TDO): Transmit debug response to the • Used to capture digital data (logic 1 or 0) from digital
remote debugger from target CPU. circuitry, whereas CRO is used to capture all kind of
• Test Clock (TCK): Synchronizes the serial data transfer waves.
• Test Mode Select (TMS): Sets the mode of testing. • The total no of logical signals that can be captured using
• Test Reset (TRST): It is an optional signal line used for CRO is limited to the no of channels. Logical analyser
resetting the target CPU. contain special connectors and chips which can be
TARGET HARDWARE DEBUGGING attached to the target board for capturing the digital data
Firmware is bug free and everything is intact with the • In target board debugging applications, a logic analyser
board. Still embedded product need not function as per captures the states of various port pins, address bus and
the expected behavior in the first attempt. This is due to data bus of the target processor/controller, etc.
hardware related reasons like : • Logic analysers give an exact reflection of what happens
• Dry soldering of components when a particular line of firmware is running.
• Missing connections in PCB due to un-noticed error in Function Generator
PCB layout design • Function generator produce various periodic
• Misplaced components waveforms like sine wave, square wave, and saw-tooth
• Signal corruption due to noise wave etc. with different frequency and amplitude.
Hardware Debugging • It is not a debugging tool, it is an input stimulator tool.
• The monitoring of various signals of the target board • The target board requires periodic waveform with
like address/data lines, checking the inter connection particular frequency as input to some part of the board.
among various components, circuit continuity checking
etc.
• Not similar to firmware debugging
Hardware Debugging Tools
Magnifying Glass
• It is a powerful visual inspection tool.
• Used for examining the target board for :
• Dry soldering components
• Missing components
• Improper placement of components
• Improper soldering
• Tracks PCB damage
• Short of track
REAL TIME OPERATING SYSTEM INTERRUPT HANDLING IN RTOS ENVIRONMENT
A real time is the time which continuously increments at In a system, the ISRs should function as following.
regular intervals after the start of the system and time for • ISRs have higher priorities over the OS functions and
all the activities at difference instances take that time as the application tasks. An ISR does not wait for a
a reference in the system. semaphore, mailbox message or queue message
A real time operating system (RTOS) is multitasking • An ISR does not also wait for mutex.
operation system for the applications with hard or soft There are three alternative systems for the OSes to
real time constraints. Real-time constraint means respond to the hardware source calls from the interrupts.
constraint on occurrence of an event and system Figure below shows the three systems.
expected response and latency to the event. 1. Direct call to ISR by interrupting source.
Basic OS Functions 2. RTOS first interrupted on an interrupt, then OS calling
• Process Management ISR
• Resources Management 3. RTOS first interrupted on an interrupt then OS calling
• Device Management a fast ISR and the fast ISR calls a slow ISR(IST).
• I/O Devices subsystems
• Network Devices and subsystems Management
OS Services
1. OS Services Goal
OS goals are perfection, correctness, portability,
interoperability and providing a common set of
interfaces for the system and orderly access and control
when managing the processes.
• Easy sharing of resources as per schedule and
allocations
• Easy implementation of the application program with
the given system hardware.
• Scheduling of processes. • Management of the
processes. • Common set of interfaces
• Maximizing the system performance
2. Mode structure
• User mode: User function call, which is not a system
call, is not permitted to read and write into the protected
memory allotted to the OS functions, data and heap.
• Supervisory mode: The OS runs the privileged functions
and instructions in protected mode and the OS only
accesses the hardware resources and protected area
memory. Only a system call is permitted to access
protected memory.
3. System structure
Layered model.
1. Application software
2. Application Programming Interface(API)
3. System software other than one provided at the OS
4. OS interface 5. OS 6. Hardware-OS interface
7. Hardware
4. Kernel
The OS is the middle layer between the application RTOS Services
software and system hardware. An OS includes Basic OS functions, Process priorities management;
1. A kernel with device management and file priority allocation and priority inheritance, Process
management as a part of kernel in the given OS. management; pre-emption, Process predictability,
2. Kernel without device management and file Memory management; protection and MMU, Memory
management allocation, RTOS scheduling and interrupt latency control
Functions of the kernel functions, Timer functions and time management,
1. Process management 2. Memory management Asynchronous IO functions, IPC Synchronization
3. File management mechanisms, Spin locks, Time slicing, Hard and soft real
4. Device management and device drivers time operability, etc.
5. I/O sub system management
RTOS DESIGN PRINCIPLES task is executed and the next task becomes the first. The
Basic design using an RTOS insertions and deletions for forming the ordered list are
An embedded system with a single CPU can run only one made only at the beginning of the cycle for each list.
process at an instance. The process at any instance may Worst-case latency is not same for every task.
either be an ISR, kernel function or task. An RTOS use in Cooperative Priority based scheduling of the ISRs
embedded system facilitates the following: executing in the first layer and Priority based ready tasks
1. It running the user threads in kernel space so that they at an ordered list executing in the second layer.
execute fast. 3. Cyclic and round robin with time slicing scheduling
2. It effective handling of the ISRs, device drivers, ISTs, models
tasks or threads. Round-robin (RR) is one of the algorithms employed by
3. It memory allocation and de-allocation functions in process and network schedulers in computing. As the
fixed time and blocks of memory and restricting the term is generally used, time slices (also known as time
memory accesses only for the stack and other critical quanta) are assigned to each process in equal portions
memory blocks. and in circular order, handling all processes without
4. It for effectively scheduling and running and blocking priority (also known as cyclic executive). Round-robin
of the tasks in case of many tasks. scheduling is simple, easy to implement, and starvation-
5. IO management with devices, files, mailboxes, pipes free. Round-robin scheduling can also be applied to other
and sockets becomes simple using an RTOS. scheduling problems, such as data packet scheduling in
6. Effective management of the multiple states of the computer networks. It is an operating system concept.
CPU. 4. Other scheduling algorithms
• Design with ISRs and tasks In real time
• Each ISR design consisting of shorter code. systems
• Design with using interrupt service threads or interrupt scheduling
service tasks. algorithms
• Design each task with an infinite loop from start up to are classified
finish. into two
• Design in the form of tasks for the better and categories:
predictable response time control. Static
• Design in the form of tasks for modular design. algorithm and Dynamic algorithm. Based on execution
• Design in the form of tasks for data encapsulation. attributes of tasks, dynamic algorithm assigns priorities
• Design with taking care of the time spent in the system at runtime. This algorithm allows switching of priorities
calls. between tasks.
TASK SCHEDULING MODELS Rate Monotonic (RM): In RM algorithm, tasks have to be
1. Cooperative scheduling model periodic in nature and deadline must be equal to its
Each task cooperate to let the running task finish. period. Tasks are scheduled according to their period.
Cooperative means that each task cooperates to let the The rate of task is the inverse of its period. This algorithm
running one finish. None of the tasks does block in- implemented by assigning fixed priority to tasks, the
between anywhere during the ready to finish states. The higher its rate, higher the priority.
service is in the cyclic order. Worst case latency is same Deadline Monotonic (DM): The other algorithm for
for every task. Scheduler inserts into a list, the ready scheduling all the real time tasks based on their deadline
tasks for a sequential execution in a cooperative mode is known as deadline monotonic. In this algorithm,
priorities are decided by considering relative deadline.
Tasks with shortest deadline get the highest priority. If
one task will get higher priority than the other then its
relative deadline must be shorter as compared to other
tasks
Least Slack Time First (LST): It is type of dynamic
algorithm which assigns priority dynamically. Tasks are
scheduled according to their slack: the smaller the slack,
2. Cooperative with precedence constraints the higher the priority. Slack is computed by using the
Scheduler using a priority parameter, task Priority does difference between the deadlines, ready time & run time.
the ordering of list of the tasks─ ordering according to the Earliest Deadline First (EDF): The most common dynamic
precedence of the interrupt sources and tasks. The priority scheduling algorithm for real time systems is the
scheduler first executes only the first task at the ordered EDF. Here priorities are dynamically reassigned at
list, and the total, equals to the period taken by the first runtime based on the time still available for each task to
task on at the list. It is deleted from the list after the first reach its next deadline. Both static and dynamic systems
are scheduled by EDF algorithm.
HOW TO CHOOSE AN RTOS • Initialize the different OS kernel data structure
Functional • Creates the idle task OSIdle() –low priority
*Processor support *Memory requirement • Code snippet for OS initialization and start operations
*Real time capabilities *Kernel and interrupt latency Task Scheduling
*IPC and task synchronization • MicroC/OS-II supports preemptive priority based
*Modularization support scheduling (64 level 4-60 based)
*Support for networking and communication • When the kernel starts, it first executes the highest
*Development language support priority task
Non Functional • A task rescheduling happens when
*Custom developed or off the shelf *Cost - Whenever a higher priority task becomes ‘ready’ or
*Development and debugging tools availability when task enters waiting state due to OsTaskSuspend()
*Ease of use *After sales ,OSTaskResume(),OSTaskDel(),OSTimeDly() etc
MICROC/OS-II - Whenever a interrupt occurs ,the task are rescheduled
• MicroC/OS-II is a portable, ROMable, scalable, upon return from the ISR
preemptive, real-time, multi-tasking, priority-based OS. • Task level scheduling is executed by the kernel service
• Open source ANSI C and free for academic use. OS_Shed() and ISR level by OSIntExit()
• Was ported to 40+ architectures (8 to 64 bit) since Inter-task communication
1992. • Task creation and Management MicroC/OS-II supports following IPC techniques for data
• Kernal Functions and initialization sharing and co-operation among tasks.
• Task scheduling • Inter-task communication • Message Mailboxes
• Mutual exclusion and task synchronization - For passing of pointers
• Timing and reference • Memory management - Create, pend, post, post_opt, accept, query
• Interrupt handling • Message Queues
Task creation and Management - For queuing pointer size messages
Five possible states for a task to be in - Create, del, pend, post, post_front, post_opt, accept,
• Dormant – not yet visible to OS (use OSTaskCreate(), flush, query.
etc.) • Ready • Running • Waiting Message Mailbox
• ISR – preempted by an ISR
• A task is usually created as a non ending function
//creates a task with name MicroCtask
void MicroCTask(void *arg)
{ while(1) { //code corresponds to task }}
Task Management Message Queue
• OSTaskSuspend()
- Task will not run again until after it is resumed ; kernel
reschedules the next highest priority for execution
- Sets OS_STAT_SUSPEND flag, removes task from ready
list if there
- Argument: Task priority (used to identify task) Message Mailboxes
• OSTaskResume() • OSMboxCreate()
- Task will run again once any time delay expires and task • OSMboxPost()/OSMboxPostOpt()
is in ready queue - A message is poseted in the mailbox
- Clears OS_STAT_SUSPEND flag - If there is already a message is there in the mailbox,an
- Argument: Task priority (used to identify task) error is returned(not overwritten)
• OSTaskDelRequest() • OSTaskDel() - If tasks waiting for a message from the mailbox,the
- Sets task to DORMANT state, so no longer scheduled by task with highest priority is removed from the wait list
OS - Removed from OS data structures: ready list, wait and scheduled to run
lists for semaphores/mailboxes/queues, etc. • OSMboxPend()
• OSTaskChangePrio() -Used for retrieving messages from mailbox.
- Identify task by (current) priority - If mailbox is empty ,the task is immediately blocked
- Changes task’s priority and moved to the wait list
Kernel Functions and initialization - A time-out value can be specified
• Kernel needs to be initialized and started before • OSMboxAccept()
executing the user tasks. - Its also used for retrieving message from the mailbox
• OS kernel initialization function OSInit() is executed - The calling task is not blocked(‘pended’) if there is no
first. It performs message to read in the mailbox
• OSMboxQuery()
- Retrieving information(whether
message is there in inbox,is there any task is waiting
,how many tasks etc) from mailbox
• OSMboxDel()
Message Queue
• OSQCreate() • OSQPost()/OSQPostFront()
• OSQPostOpt() • OSQPend() • OSQAccept()
• OSQQuery() • OSQFlush() • OSQDel()
Mutual exclusion and task synchronization Timing and reference
• In multitasking system, multiple tasks executes The ‘clock tick’ acts as the time source for providing
concurrently and share the system resources and data timing reference for time delays and timeouts. It
• The access to shared resources should be made generates periodic interrupts
mutually exclusive to prevent ata corruption and race • OSClockTick, 10 – 100 Hz, increments a 32 bit counter
conditions • OSTimeDly() • OSTimeDlyHMSM()
• Task synchronization can be used by the tasks to • OSTimeDlyResume() • OSTimeGet() -counter
synchronize their execution • OSTimeDlySet()
• Microc/OS-|| provides access to shared resources Memory management
through the different stept • Alternative to malloc() and free()
1. Disabling task scheduling • Memory is divided into multiple sectors(partitions)
2. Disabling • Partitions memory into blocks of equal sizes
interrupts • OSMemCreate(), get, put, query, nameget, nameset
3.
Semaphores
for mutual
exclusion
Binary and
Counting
Semaphores
For Event
signaling,
control access to shared resource, and synchronization
accept,create,del,pend,post,query Interrupt handling
Mutual Exclusion Semaphores • Structure needed o Save CPU registers – NC30
For controlling compiler adds this automatically
access to a o Call OSIntEnter() or increment OSIntNesting (faster, so
shared preferred) - OSIntEnter uses OS_ENTER_CRITICAL and
resource (with OS_EXIT_CRITICAL, so make sure these use method 2
priority (save on stack) o Execute code to service interrupt –
inheritance) body of ISR o Call OSIntExit()
accept, create, - Has OS find the highest priority task to run after this
del, pend, ISR finishes (like OSSched())
post, query o Restore CPU registers – compiler adds this
4. Events automatically o Execute return from interrupt
(flags) for instruction – compiler adds this automatically
• Good practices: Make ISR as quick as possible. Only do
synchronization time-critical work here, and defer remaining work to
task code.
Have ISR notify task of event, possibly send data
OSSemPost – raise flag indicating event happened
OSMboxPost – put message with data in mailbox (1)
OSQPost – put message with data in queue (n)
DISTRIBUTED EMBEDDED SYSTEMS Why Distributed?
1.introduction In some cases, distributed systems are necessary because
In a distributed embedded system, several processing the devices that the PEs communicate with are physically
elements (PEs) (either microprocessors or ASICs) are separated. If the deadlines for processing the data are
connected by a network that allows them to short, it may be more cost-effective to put the PEs where
communicate. The application is distributed over the PEs, the data are located rather than build a higher-speed
and some of the work is done at each node in the network to carry the data to a distant, fast PE.
network. Network Abstractions
Reasons to build network-based embedded systems. Networks are complex systems. Ideally, they provide
1.When the processing tasks are physically distributed, it high-level services while hiding many of the details of
may be necessary to put some of the computing power data transmission from the other components in the
near where the events occur. system. In order to help understand (and design)
2.Data reduction is another important reason for networks, the International Standards Organization has
distributed processing. It may be possible to perform developed a seven-layer model for networks known as
some initial signal processing on captured data to reduce Open Systems Interconnection (OSI ) models.
its volume. The OSI layers from lowest to highest level of abstraction
3.Modularity is another motivation for network-based are described below.
design. For instance, when a large system is assembled ■ Physical: The physical layer defines the basic properties
out of existing components, those components may use of the interface between systems, including the physical
a network port as a clean interface that does not connections ( plugs and wires), electrical properties,
interfere with the internal operation of the component in basic functions of the electrical and physical
ways that using the microprocessor bus would. components, and the basic procedures for exchanging
4.A distributed system can also be easier to debug the bits.
microprocessors in one part of the network can be used ■ Data link: The primary purpose of this layer is error
to probe components in another part of the network. detection and control across a single link. However, if the
Finally, in some cases, networks are used to build fault network requires multiple hops over several data links,
tolerance into systems. the data link layer does not define the mechanism for
5.Distributed embedded system design is another data integrity between hops, but only within a single hop.
example of hardware/software co-design, since we must ■ Network: This layer defines the basic end-to-end data
design the network topology as well as the software transmission service. The network layer is particularly
running on the network. important in multichip networks.
DISTRIBUTED EMBEDDED ARCHITECTURE ■ Transport: The transport layer defines connection-
A distributed embedded system can be organized in oriented services that ensure that data are delivered in
many different ways, but its basic units are the PE and the the proper order and without errors across multiple links.
network as illustrated in Figure. This layer may also try to optimize network resource
A PE may be an instruction set processor such as a DSP, utilization.
CPU, or microcontroller, as well as a nonprogrammable ■ Session: A session provides mechanisms for controlling
unit such as the ASICs used to implement PE 4. An I/O the interaction of end-user services across a network,
device such as PE 1 (which we call here a sensor or such as data grouping and check pointing.
actuator, depending on whether it provides input or ■ Presentation: This layer defines data exchange formats
output) may also be a PE, so long as it can speak the and provides transformation utilities to application
network protocol to communicate with other PEs. The programs.
network in this case is a bus, but other network ■ Application: The application layer provides the
topologies are also possible. It is also possible that the application interface between the network and end
system can use more than one network, such as when users.
relatively independent functions require relatively little
communication among them.
Hardware and Software Architectures Message Passing Programming
Distributed embedded systems can be organized in many Distributed embedded systems do not have shared
different ways depending upon the needs of the memory, so they must communicate by passing
application and cost constraints. One good way to messages. We will refer to a message as the natural
understand possible architectures is to consider the communication unit of an algorithm; in general, a
different types of interconnection networks that can be message must be broken up into packets to be sent on
used. the network. A procedural interface for sending a packet
A point-to-point link establishes a connection between might look like the following:
exactly two PEs. Point-to-point links are simple to design send_packet(address,data);
precisely because they deal with only two components. The routine should return a value to indicate whether the
We do not have to worry about other PEs interfering with message was sent successfully if the network includes a
communication on the link. handshaking protocol. If the message to be sent is longer
than a packet, it must be broken up into packet-size data
segments as follows:
for (i = 0; i < message.length;i=i+ PACKET_SIZE)
send_packet(address,&message.data[i]);
The above code uses a loop to break up an arbitrary-
length message into packet- size chunks. However, clever
system design may be able to recast the message to take
advantage of the packet format. For example, clever
Figure shows a simple example of a distributed encoding may reduce the length of the message enough
embedded system built from point-to-point links. The so that it fits into a single packet. On the other hand,
input signal is sampled by the input device and passed to
NETWORKS FOR EMBEDDED SYSTEMS
the first digital filter, F1, over a point-to-point link. The
Networks for embedded computing span a broad range
results of that filter are sent through a second point to-
of requirements; many of those requirements are very
point link to filter F2. The results in turn are sent to the
different from those for general-purpose networks.
output device over a third point-to-point link.
Some networks are used in safety-critical applications,
■ Fixed-priority arbitration always gives priority to
such as automotive control. Some networks, such as
competing devices in the same way. If a high-priority and
those used in consumer electronics systems, must be
a low-priority device both have long data transmissions
very inexpensive. Other networks, such as industrial
ready at the same time, it is quite possible that the low-
control networks, must be extremely rugged and reliable.
priority device will not be able to transmit anything until
■ The I2 C bus is used in microcontroller-based systems.
the high-priority device has sent all its data packets.
■ The Controller Area Network (CAN) bus was developed
■ Fair arbitration schemes make sure that no device is
for automotive electronics. It provides megabit rates and
starved. Round-robin arbitration is the most commonly
can handle large numbers of devices.
used of the fair arbitration schemes. The PCI bus requires
■ Ethernet and variations of standard Ethernet are used
that the arbitration scheme used on the bus must be fair,
for a variety of control applications.
although it does not specify a particular arbitration
In addition, many networks designed for general-purpose
scheme.
computing have been put to use in embedded
A crossbar not
applications as well.
only allows any
The I2C Bus
input to be
it is a well-known bus commonly used to link micro
connected to
controllers into systems. I 2C is designed to be low cost,
any output, it
easy to implement, and of moderate speed (up to 100
also allows all
KB/s for the
combinations
standard bus
of input/output
and up to
connections to
400 KB/s for
be made. Thus,
the
for example, we
extended
can
bus). As a
simultaneously connect in1 to out4, in2 to out3, in3 to
result, it uses
out2, and in4 to out1 or any other combinations of inputs
only two
Many other networks have been designed that provide
lines: the
varying amounts of parallel communication at varying
serial data
hardware costs.
line (SDL) for data and the serial clock line (SCL), which
indicates when valid data are on the data line.
The I2C bus is designed as a multimaster bus—any one of The exponential backoff technique helps to ensure that
several different devices may act as the master at various the network does not become overloaded at high
times. As a result, there is no global master to generate demand factors. The random factor in the wait time
the clock signal on SCL. Instead, a master drives both SCL minimizes the chance that two messages will repeatedly
and SDL .when it is sending data. When the bus is idle, interfere with each other. The maximum length of an
both SCL and SDL remain high. When two devices try to Ethernet is determined by the nodes’ ability to detect
drive either SCL or SDL to different values, the open collisions.
collector open drain circuitry prevents errors, but each
master device must listen to the bus while transmitting
to be sure that it is not interfering with another message.
A bus transaction is initiated by a start signal and
completed with an end signal as follows:
■ A start is signaled by leaving the SCL high and sending
a 1 to 0 transition on SDL.
■ A stop is signaled by setting the SCL high and sending a
0 to 1 transition on SDL.

Ethernet
It is very widely used as a local area network for general-
purpose computing. The physical organization of an
Ethernet is very simple, as shown in Figure 8.14. The
network is a bus with a single signal path; the Ethernet
standard allows for several different implementations
such as twisted pair and coaxial cable. Unlike the I2 C bus,
nodes on the Ethernet are not synchronized—they can
send their bits at any time.

Fieldbus
The Ethernet arbitration scheme is known as Carrier
It is a set of standards for industrial control and
Sense Multiple Access with Collision Detection
instrumentation systems. The H1 standard uses a
(CSMA/CD). The algorithm is outlined in Figure 8.15. A
twisted-pair physical layer that runs at 31.25 MB/s. It is
node that has a message waits for the bus to become
designed for device integration and process control. The
silent and then starts transmitting. It simultaneously
High Speed Ethernet standard is used for backbone
listens, and if it hears another transmission that
networks in industrial plants. It is based on the 100 MB/s
interferes with its transmission, it stops transmitting and
Ethernet standard. It can integrate devices and
waits to retransmit.
subsystems.
NETWORK-BASED DESIGN good application area for Internet-based embedded sys-
Many embedded networks are designed for low cost and tems. Information appliances that use the Internet are
therefore do not provide excessively high rapidly becoming another use of IP in embedded
communication speed. The message delay for a single computing
message with no contention (as would be the case in a Internet protocol is not defined over a particular physical
point-to-point connection) can be modeled as tm= tx + tn implementation—it is an internetworking standard.
+ tr where tx is the transmitter side overhead, tn is the Internet packets are assumed to be carried by some
network transmission time, and tr is the receiver side other network, such as an Ethernet. In general, an
overhead. In I2 C, tx and tr are negligible relative to tn. Internet packet will travel over several different
■ If the network uses fair arbitration, the network networks from source to destination. The IP allows data
availability delay is bounded. In the case of round-robin to flow seamlessly through these networks from one end
arbitration, if there are N devices, then the worst- case user to another.
network availability delay is ty= td+ tm where tarb is the
delay incurred for arbitration. tarb is usually small
compared to transmission time.
A round-robin arbitrated network puts all
communications at the same priority. This does not
eliminate the priority inversion problem because
processes still have priorities. Thus far we have assumed
a single-hop network: A message is received at its
intended destination directly from the source, without
going through any other net- work node. It is possible to
build multihop networks in which messages are routed
through network nodes to get to their destinations.
(Using a multistage network does not necessarily mean IP works at the network layer. When node A wants to
using a multihop network—the stages in a multistage send data to node B, the application’s data pass through
network are generally much smaller than the network several layers of the protocol stack to send to the IP. IP
PEs.) Figure shows an example of a multihop creates packets for routing to the destination, which are
communication. then sent to the data link and physical layers. A node that
transmits data among different types of networks is
known as a router.
The basic format of an IP packet is shown in Figure 8.20.
The header and data payload are both of variable length.
The maximum total length of the header and data
payload is 65,535 bytes. An Internet address is a number
(32 bits in early versions of IP, 128 bits in IPv6). The IP
address is typically written in the form xxx.xx.xx.xx.

INTERNET-ENABLED SYSTEMS
Some very different types of distributed embedded
system are rapidly emerging— the Internet-enabled
embedded system and Internet appliances. The Internet
is not well suited to the real-time tasks that are the bread
and butter of embedded computing, but it does provide
a rich environment for non–real-time interaction. The fact that IP works at the network layer tells us that it
Internet does not guarantee that a packet is delivered to its
The Internet Protocol (IP) is the fundamental protocol on destination. Furthermore, packets that do arrive may
the Internet. It provides connectionless, packet-based come out of order. This is referred to as best-effort
communication. Industrial automation has long been a routing.
The Internet also provides higher-level services built on it was inevitable to have OS which offered low latency
top of IP. The Transmission Control Protocol (TCP) is one real-time response, low foot print both in time and space
such example. It provides a connection- oriented service and give all traditional functionality such as memory
that ensures that data arrive in the appropriate order, protection, error checking/report and transparent
and it uses an acknowledgment protocol to ensure that interprocess communication.
packets arrive. Because many higher- level services are 4. Embedded digital security and surveillance
built on top of TCP, the basic protocol is often referred to Digital security and surveillance is currently in the host of
as TCP/IP. new applications in the embedded arena which is
Wide Web service, Simple Mail Transfer Protocol for benefiting from multicore phenomenon. Older systems
email, and Telnet for virtual terminals. A separate needed more human intervention, but new systems offer
transport protocol, User Datagram Protocol , is used as intelligent systems to operate multisite, integrated and
The Internet service stack. the basis for the network net centric systems that optimizes the resources needed
management services provided by the Simple Network to complete the job
Management Protocol . 5. Healthcare
Internet Applications Electronic medical device and other technological
■ One of the earliest Internet-enabled embedded innovations with the convergence of biotech, nanotech,
systems was the laser printer. High-end laser printers manufacturing tech, communication tech and device,
often use IP to receive print jobs from host machines. sensor technologies are making breath-taking
■ Portable Internet devices can display Web pages, read transformations in healthcare delivery and creating new
email, and synchronize calendar information with health care paradigms.
remote computers. 6. Deep Learning
■ A home control system allows the homeowner to Deep learning solutions represent a rich, yet unexplored
remotely monitor and control home cameras, lights, and embedded systems market that has a range of
so on. applications from image processing to audio analysis.
Recent Trends in Embedded Computing Even though developers are primarily focused on security
1. Patterns insight from the applications of embedded and cloud connectivity right now, deep learning and
systems in real life artificial intelligence concepts will soon emerge as a
Embedded systems are more than part of human life. For trend in embedded systems
instance, one cannot imagine life without mobile phones 7. Improved Security for Embedded Devices
for personal communication. Its presence is virtually With the rise of the Internet of Things (IoT), the primary
unavoidable in almost all facets of human endeavour focus of developers and manufacturers is on security. In
2. Multicore in embedded 2019, advanced technologies for embedded security will
With a lot functionalities being added, the need for high emerge as key generators for identifying devices in an IoT
performance in embedded systems has become network, and as microcontroller security solutions that
inevitable and so developers are increasingly leaning isolate security operations from normal operations.
towards multicore processors in their systems design 8. Visualizations in Real Time
decision. • It drove to higher power consumption and so Developers currently lack tools for monitoring and
the higher thermals; • Overall cost increased as the visualizing their embedded industrial systems in real
peripherals surrounding also needed to operate at time. The industry is working on real-time visualization
matching speed, which was truly not practical in all cases, tools that will give software engineers the ability to
there by driving the costs review embedded software execution. These tools will
3. Embedded operating systems enable developers to keep a check on key metrics such as
Traditionally embedded systems did away with an raw or processed sensor data and event-based context
operating system (OS), it had lightweight control switches for tracking the performance of embedded
program/monitor to offer limited I/O and memory systems.
services, however, as the systems became complex,