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Applied Electronics: Sallen Key (VCVS) 4rth Order Butter Worth Low Pass Filter

The document describes the design and simulation of a fourth order Sallen-Key low pass Butterworth filter. It includes the circuit configuration, component selection process, Multisim simulation showing the input and output signals at different frequencies, and the resulting Bode plot. A practical PCB implementation is constructed and its Bode plot measured, showing similar behavior but with some variation in cutoff frequency due to real component values. The filter transfer function is modeled in Matlab for further analysis.

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0% found this document useful (0 votes)
715 views11 pages

Applied Electronics: Sallen Key (VCVS) 4rth Order Butter Worth Low Pass Filter

The document describes the design and simulation of a fourth order Sallen-Key low pass Butterworth filter. It includes the circuit configuration, component selection process, Multisim simulation showing the input and output signals at different frequencies, and the resulting Bode plot. A practical PCB implementation is constructed and its Bode plot measured, showing similar behavior but with some variation in cutoff frequency due to real component values. The filter transfer function is modeled in Matlab for further analysis.

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khayammcs
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© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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Pakistan Institute Of Engineering And Applied Sciences

Applied Electronics

Sallen Key (VCVS) 4rth Order Butter Worth Low Pass Filter

Muhammad Khayam Roll No 51176


Hassan Nasir Roll No 51287

Department Of Electrical Engineering

March 2011
Contents
1 SallenKey topology 3

2 Voltage-controlled voltage-source (VCVS) filter topology 3

3 Advantage of VCVS 3

4 Sallen-Key Low-Pass Filter 3


4.1 Configuration and Working . . . . . . . . . . . . . . . . . . . 3
4.2 Sallen-Key Fourth order Low-Pass Filter Components selection 4

5 Simulation 5
5.1 Circuit Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 5
5.2 Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
5.3 Bode Plot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
5.4 Simulation Bode Plot Analysis . . . . . . . . . . . . . . . . . . 8

6 Practical Implementation 8
6.1 Bode Plot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
6.2 Actual Bode Plot Analysis . . . . . . . . . . . . . . . . . . . . 9

7 Matlab Analysis 9
7.1 Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

1
List of Figures
1 Low Pass Filter . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2 Table for Selecting K . . . . . . . . . . . . . . . . . . . . . . . 5
3 Circuit Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4 Input Frequency 1KHz . . . . . . . . . . . . . . . . . . . . . . 6
5 Input Frequency 3KHz . . . . . . . . . . . . . . . . . . . . . . 6
6 Input Frequency 9KHz . . . . . . . . . . . . . . . . . . . . . . 6
7 Simulation Observations . . . . . . . . . . . . . . . . . . . . . 7
8 Simulation Bode Diagram . . . . . . . . . . . . . . . . . . . . 7
9 Circuit PCB . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
10 Actual Observations . . . . . . . . . . . . . . . . . . . . . . . 8
11 Bode Plot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
12 Transfer function plot . . . . . . . . . . . . . . . . . . . . . . . 10

2
1 SallenKey topology
The SallenKey topology is an electronic filter topology used to implement
second-order active filters that is particularly valued for its simplicity. It is a
degenerate form of a voltage-controlled voltage-source (VCVS) filter topol-
ogy.

2 Voltage-controlled voltage-source (VCVS)


filter topology
A VCVS filter uses a super-unity-gain voltage amplifier with practically infi-
nite input impedance and zero output impedance to implement a 2-pole (12
dB/octave) low-pass, high-pass, or band pass response. The super-unity-gain
amplifier allows very high Q factor and pass band gain without the use of
inductors. A SallenKey filter is a variation on a VCVS filter that uses a
unity-gain amplifier i.e., a pure buffer amplifier with 0 dB gain.
Because of its high input impedance and easily selectable gain, an oper-
ational amplifier in a conventional non-inverting configuration is often used
in VCVS implementations. Implementations of SallenKey filters often use
an operational amplifier configured as a voltage follower; however, emitter or
source followers are other common choices for the buffer amplifier.

3 Advantage of VCVS
Suppose you had a large interfering signal you needed to get rid of. To get
lots of attenuation, you could cascade several RC filters. Unfortunately, the
impedance of one RC section affects the next. This means that the knee or
transition between the pass and stop bands wont be very sharp. A sharp
knee helps you reduce the interfering signal without degrading your desired
signals. In this situation, the Sallen-Key active filter can save the day. This
circuit implements a 2-pole filter. Cascading several stages can give you a
steep attenuation curve with a very sharp knee.

4 Sallen-Key Low-Pass Filter


4.1 Configuration and Working
Simple Sallen key with second order pole is shown in figure. R2 and C2
make the low pass filter with feedback resistances amplifies the input signal.

3
K is the gain. For the Butterworth low pass VCVS filter components can be
selected as

R1 = R2
C1 = C2 = C
(K − 1)R = f eedback resistance
R = f eedback resistance to ground

Figure 1: Low Pass Filter

4.2 Sallen-Key Fourth order Low-Pass Filter Compo-


nents selection
Sallen Key fourth order Butterworth low pass filter can be made by cascading
two Sallen Key second order low pass filters.
since

RC = 1/2π fc
We have
R1 = R2 = 10KΩ
C=5 nF
=⇒ fc = 3.18KHz
(K1 − 1)R = 10KΩ
=⇒ R = 65KΩ
=⇒ (K2 − 1)R = 80KΩ
where K1 = 1.152
and K2 = 2.235

4
Figure 2: Table for Selecting K

5 Simulation
Sallen Key fourth order Butterworth low pass filter circuit is build in MUL-
TISIM, and the analysis done as shown below.

5.1 Circuit Diagram

Figure 3: Circuit Diagram

5
5.2 Analysis
Some of the values calculated as shown below. Multimeter shows the output
peak voltage, Function generator shows input applied with 1V peak voltage
fixed. Oscilloscope shows the input with red wave and output with blue
wave.Response shows that signal remains approximately constant till cutoff
frequency. But after that attenuates quickly.

Figure 4: Input Frequency 1KHz

Figure 5: Input Frequency 3KHz

Figure 6: Input Frequency 9KHz

6
5.3 Bode Plot
Some of the values calculated and bode plot is drawn as shown below

Figure 7: Simulation Observations

Figure 8: Simulation Bode Diagram

7
5.4 Simulation Bode Plot Analysis
Initially at 500 Hz of input frequency the output voltage remains at 3.6V till
2 KHz which shows the gain as 11.23 dB. Then the signal starts attenuate.
At cutoff frequency 3.18 KHz the gain drops to 8.23 dB. That shows a drop
of 3 dB from its initial point. After cutoff frequency signal will attenuate at
40 dB/decade (as it is a 4 order filter).

6 Practical Implementation
PCB design is made in PROTEOUS. And PCB board is constructed with
the components values as calculated earlier.

Figure 9: Circuit PCB

6.1 Bode Plot


Some of the vales calculated by using the oscilloscope and bode plot is drawn
as shown below.

Figure 10: Actual Observations

8
Figure 11: Bode Plot

6.2 Actual Bode Plot Analysis


Initially at 100 Hz of input frequency the output voltage remains at 2.56V till
500 Hz which shows the gain as 8.1648 dB. Then the signal starts attenuation.
Calculated cutoff frequency was 3.18KHz. But 3dB point occurs at 2.66 KHz
with gain of 5.1648 dB(output voltage is 1.81V). After cutoff frequency signal
will attenuate at 40 dB/decade (as it is a 4 order filter).
The variation in the cutoff frequency is due to variation in the actual
values of circuit components.

7 Matlab Analysis
We have calculated the filter transfer function using actual values.

7.1 Code
g1=tf([1.153],[2.5477*10− 99.321585 ∗ 10− 51])
g2=tf([2.235],[2.51251*10− 93.843825 ∗ 10− 51])
g=g1*g2
bode(g)
grid on

9
Figure 12: Transfer function plot

10

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