Useful
Useful
PAPER 1
1. A question on signal catch. Given set of signals , which are u cannot catch ?
Answer: SIGSTP,SIGKILL
3. if (cond1)
f()
else
if ( cond2)
g()
if cond1 is true 25 % and cond2 is true 75 % . If above program executes 10000 times how many
class A
private : f()
class B
{ public : f()
{
class c: public A,B
g() { f()}
PAPER 2
1. Four persons picking balls. Peter one more than paul. Pam one more than Pat.
Ans: 18
2. If 3 monkeys take 7 minutes to eat 3 bananas, what time will 10 monkeys take to eat 10 bananas?
Ans: 7 minutes.3. What time is it now? the no. of minutes from midnight to now is 9 times the no. of
minutes from
now to noon.
PAPER 3
The following questions have been used for screening the candidates during the first interview. The
questions apply mostly to fresh college grads pursuing an engineering career at Intel.
2. Have you studied pipelining? List the 5 stages of a 5 stage pipeline. Assuming 1 clock per stage,
what is the latency of an instruction in a 5 stage machine? What is the throughput of this machine ?
4. For a single computer processor computer system, what is the purpose of a processor cache and
describe its operation?
5. Explain the operation considering a two processor computer system with a cache for each
processor.
6. What are the main issues associated with multiprocessor caches and how might you solve them?
7. Explain the difference between write through and write back cache.
10. Describe a finite state machine that will detect three consecutive coin tosses (of one coin) that
results in heads.
11. In what cases do you need to double clock a signal before presenting it to a synchronous state
machine?
12. You have a driver that drives a long signal & connects to an input device. At the input device
there is either overshoot, undershoot or signal threshold violations, what can be done to correct this
problem?
13. What are the total number of lines written by you in C/C++? What is the most
17. What types of CMOS memories have you designed? What were their size? Speed?18. What work
have you done on full chip Clock and Power distribution? What process technology
19. What types of I/O have you designed? What were their size? Speed? Configuration? Voltage
requirements?
20. Process technology? What package was used and how did you model the package/system? What
22. What transistor level design tools are you proficient with? What types of designs were they used
on?
23. What products have you designed which have entered high volume production?
24. What was your role in the silicon evaluation/product ramp? What tools did you use?
25. If not into production, how far did you follow the design and why did not you see it into
production?