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Course No: EEE 4704 Experiment No: 03 Name of The Experiment: "Study On Convolutional Encoding and Viterbi Convolutional Decoding Algorithm"

This document summarizes a student's laboratory experiment on convolutional encoding and Viterbi decoding. The student is asked to: 1. Draw connection and state diagrams for a convolutional encoder. 2. Draw state and trellis diagrams for different message vectors and generator polynomials. 3. Perform Viterbi decoding to find errors in a received sequence. 4. Draw state and trellis diagrams for different parameters of a convolutional encoder. 5. Replace the modulator/demodulator with QPSK and verify the system with state diagrams. The student provides the requested diagrams and simulations to analyze convolutional encoding and decoding.

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68 views9 pages

Course No: EEE 4704 Experiment No: 03 Name of The Experiment: "Study On Convolutional Encoding and Viterbi Convolutional Decoding Algorithm"

This document summarizes a student's laboratory experiment on convolutional encoding and Viterbi decoding. The student is asked to: 1. Draw connection and state diagrams for a convolutional encoder. 2. Draw state and trellis diagrams for different message vectors and generator polynomials. 3. Perform Viterbi decoding to find errors in a received sequence. 4. Draw state and trellis diagrams for different parameters of a convolutional encoder. 5. Replace the modulator/demodulator with QPSK and verify the system with state diagrams. The student provides the requested diagrams and simulations to analyze convolutional encoding and decoding.

Uploaded by

muftibinhabib
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Course No: EEE 4704

Experiment No: 03
Name of the Experiment:
“Study on Convolutional Encoding and Viterbi Convolutional
Decoding Algorithm”

Name : S.M. RHYDH ARNAB


Student ID : 152425
Section : A1
Dept : EEE
Date :02/05/2019
Question 1:
Draw the connection representation with message vector, m= 10101.

Input Bits, Register State at time State at time U1 U2


M1 Contents ti ti+1
- 000 00 0 - -
1 100 00 10 1 1
0 010 10 01 1 0
1 101 01 10 0 1
0 010 10 01 1 0
1 101 01 10 0 1
0 010 10 01 1 0
0 001 01 00 1 1

Figure: Connection Diagram

Question 2:
Find out the State diagram and Trellis Diagram with m= 110011, with K=3.k=1, n=2 and K-1
flush registers where generator vectors g1= 110, g2= 101.

Input Bits, Register State at time State at time U1 U2


M1 Contents ti ti+1
- 000 00 0 - -
1 100 00 10 1 1
1 110 10 11 0 1
0 011 11 01 1 1
0 001 01 00 0 1
1 100 00 10 1 1
1 110 10 11 0 1
0 011 11 01 1 1
0 001 01 00 0 1
Figure: State Diagram

Figure: Trellis Diagram


Question 3:
Draw the Trellis diagram for m= 11001101, with K=3 and rate =1/2 , K-1 flush registers
where g1= 101, g2= 011.

Input Bits, Register State at time State at time U1 U2


M1 Contents ti ti+1
- 000 00 00 - -
1 100 00 10 1 0
1 110 10 11 1 1
0 011 11 01 1 0
0 001 01 00 1 1
1 100 00 10 1 0
1 110 10 11 1 1
0 011 11 01 1 0
1 101 01 10 0 1
0 010 10 01 0 1
0 001 01 00 1 1

Figure: Trellis Diagram


Question 4:
Find out the error in the sequence: 10 10 10 01 11 01 01 when m= 11011 with assumption
of input sequence is preceded by two one bits, K=3, rate=1/2, connecting vectors g1=111,
g2=101 by using both state diagram analysis and Viterbi decoding algorithm.

Input Bits, Register State at time State at time U1 U2


M1 Contents ti ti+1
- 000 00 00 - -
1 100 00 10 1 1
1 110 10 11 0 1
1 111 11 11 1 0
1 111 11 11 1 0
0 011 11 01 0 1
1 101 01 10 0 0
1 110 10 11 0 1
0 011 11 01 0 1
0 001 01 00 1 1

Figure: Viterbi Decoding Algorithm


Figure: State Diagram

Question 5:
Draw the Trellis diagram and State diagram for m= 0110101, with K=2, rate=1/2, K-1 flush
registers. Assume necessary data if required anymore.

Input Bits, Register State at time State at time U1 U2


M1 Contents ti ti+1
- 00 00 0 - -
1 10 0 1 1 -
1 11 1 1 0 -
0 01 1 0 1 -
1 10 0 1 1 -
0 01 1 0 1 -
1 10 0 1 1 -
0 01 1 0 1 -
Figure: State Diagram

Figure: Trellis Diagram


Question 6:
Perform the lab task by replacing BPSK modulator and demodulator using QPSK modulator/
demodulator. Attach necessary plots and verify them by showing the state table, state
diagram and tresllis diagram.

Circuit:

Output of the convolutional Encoder:


Output of Demodulator after Data conversion:

Generated i/p (top) vs o/p of Viterbi Decoder (bottom):

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