PIMRC '94 / WCN WT 3.

6 1211

LOW BIT-RATE SATELLITE DEMODULATOR

IMPLEMENTATION
R M Nelhams S K Barton
British Telecom Labs University of Bradford
Ipswich, Suffolk IP5 7RE Bradford, West Yorkshire BD7 IDP
United Kingdom United Kingdom
Tel: +44 473 644667 Tel: +44 274 384005
Fax: +44 473 637614 Fax: +44 274 384054
Abstract: In this paper we present the system design for very complicated but the function of the demodulators can
a BPSK demodulator suitable for earth station be briefly summarised as follows:
implementation for satellite communications. The
primary design goal has been to obtain a demodulator 0 1/2 rate convolutionally coded BPSK operation at 600
that has fast acquisition in a low signal-to-noise ratio or 1200 symbols/s
environment. To this end the implementation uses 0 Nyquist filtering with 100% excess bandwidth
structures and algorithms that are entirely feedforward. 0 operation down to ES/No = 6dB
0 operation with a frequency offset upto 0.5 x symbol rate
The system design has been analysed and verified by 0 operation in the presence of phase noise (see [l] for
the use of software simulation and an implementation phase noise mask)
suitable for Inmarsat-C applications has been 0 implementation loss not greater than IdB
developed using a Motorola DSP56001 target system. 0 operation in either burst-mode (signalling packet length
The key requirement was for a demodulator = 3 16 symbols) or continuous mode (message packet
implementation that would operate both in a burst- length >ZOO0 symbols)
mode and a continuous mode according to the signal
types and specifications applicable for Inmarsat-C 11. DIGITAL DEMODULATOR
'coast earth stations' and 'network control stations' [ 11.
The design has resulted in a flexible implementation A simplified block diagram of the digital demodulator is
that could be easily adapted for many applications. shown in Fig. 1. To ease understanding the method of
frequency synchronisation has been omitted - this is
I. OVERALL OBJECTIVES described later. The input signal is a real passband (but near
baseband) signal that is nominally located at a centre
The overall objective was to construct a network frequency equal to twice the highest symbol rate, i.e. 2400
simulator (emulating all of the functions within the Hz. The sampling rate for the A/D converter is equal to
Inmarsat-C network) that would allow Inmarsat-C mobile 9600 Hz.Subsequent processing of the signal results in a
terminals to be tested for correct hnctionality. A key part sampling rate within the digital demodulator of four
in the development of such a system is the design of the complex samples per symbol. Anti-alias filtering is provided
demodulators that are required. The system definition [ 11 is in the analogue IF section of the system implementation.

4 complex samples 1 complex sample

Low IF per symbol per symbol
input bandpass
signal
1
I

1 Channel
- nterpolator
I/

,je

Carrier
timing phase
L
i-1
estimator
I-_-
estimator

Fig. 1: Simplified Digital Demodulator

0 IEEE / ICCC

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1212 WT 3.6 PIMRC '94 / WCN

Sampling in the digital demodulator is undertaken non- Recovery algorithm' [2]. This algorithm is a direct
synchronously with respect to the transmitted symbol computation symbol timing algorithm that can be related to
timing clock. There is no requirement to recover and the maximum likelihood principle. Since the algorithm
present a high stability symbol timing clock to other earth produces an explicit estimate of the timing offset, E, a
station equipment. All that is required is that the signalling feedforward correction strategy is possible.
packets and messages be demodulated and passed to a
'baseband processing unit' for decoding, de-formatting, and The estimator algorithm requires that averaging be
subsequent presentation on a terminal. employed to reduce the variance on the output timing
offset, E. A 'gliding accumulator' averager has been
A. Digital Down-Conversion and Channel Filtering implemented with an observation time of 64 symbols. A
delay in the signal path of 32 symbols assures that the
For ease of understanding hrther references will be with estimate is unbiased in the presence of any symbol timing
respect to operation at 1200 symbolsh. Operation at 600 frequency uncertainty and that symbol timing correction is
symbols/s is exactly equivalent apart from an initial implemented both for the very first symbols in a burst and
decimation by two of the input samples. the very last symbols (albeit with larger variance at the
beginning and end of bursts). This is shown in Fig. 3 .
Conversion from the IOW IF real passband signal to the
Averagingwndow
complex baseband form is achieved by 'digital mixing' of the
input signal with a complex vector of the form d 2 @ ,
where f is the near baseband carrier frequency. For f = 2400
obsenation interval

'
Indial symbols in burst

ll
Final symbols In burst
\

Hz and a sampling rate of 9600 Hz the samples of the

complex exponential, d 2 @ , can reduce to the form, 1, j, -
1, -j, _ _ _ . This simplification leads to the simple structure .
shown in Fig. 2 for digital downconversion. l-1
Symmetnc gliding accumulator performance

LowlF
channelfilter - Fig. 3 : Action of the Symmetric Gliding Accumulator
passband
signal in
demux The appropriate structure to implement the timing
correction is an interpolator. In [3] and [4] it is
demonstrated that for two samplesh a polynomial
interpolator produces excellent results (less than 0.1 dB loss
in BER performance) with as few as four taps in the FIR
structure used to implement the interpolator (i.e. cubic
Fig. 2: Digital Downconversion Structure spline interpolation). With four samplesh (present case)
linear interpolation produces a small degradation (0.2 dB).
Although we have now successhlly generated a The simplicity of this approach coupled with the low loss
complex baseband signal, represented by four complex has lead us to use this technique.
samplesh, from the real passband signal, the streams in the
inphase and quadrature arms are time misaligned by 118 of a Frequency mismatching between the local sampling
symbol period. This situation is easily remedied by clock and the actual symbol timing clock means that an
incorporating an interpolator into the quadrature arm only. additional 'control' structure must be implemented to detect
Alternatively a time shift can be incorporated into the when the fractional timing offset, E, moves across the 0- 1 or
quadrature arm by judicious choice of Finite-Impulse- 1-0 boundary. If the local sampling clock is running 'fast'
Response (FIR) filter coefficients for the channel filter in with respect to the symbol timing clock then each time a E-
the quadrature arm. This latter approach amounts to boundary transition takes place an interpolated sample must
implementing the interpolator and channel filter in one FIR be deleted (not computed) at the output of the interpolator.
structure (see Fig. 2). If the local sampling clock is running 'slow'then each time a
€-boundary transition takes place an extra interpolated
B. Symbol Timing Synchronisation sample must be generated (i.e. two output data samples
generated for one sample rate clock tick). This phenomenon
Estimating the fractional timing offset, E, between the is termed equivocation and many 'insertions' and 'deletions'
actual samples taken and the optimum sampling point is are likely when the symbol timing trajectory is close to a 0-
implemented using the 'Digital Filter and Square Timing 1 boundary due to action of the additive gaussian noise.

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PIMRC '94 / WCN WT 3.6 1213

C. Carrier Phase S'chronisation The essential non-linearity for BPSK phase camer
estimation is a squaring operation. The MLFF algorithm
Once symbol timing synchronisation has been then takes the argument of the complex vector resulting
undertaken camer phase synchronisation can take place. On from squaring. If we take the magnitude instead of the
average, the symbol timing block will produce one complex argument we can distinguish between parallel estimators
sample per symbol to be input to the carrier phase block. that are separated by a frequency difference. The logical
Estimating the carrier phase offset, 8, is implemented using extension of this approach is to compute the power Fourier
the maximum likelihood feedforward (MLFF) algorithm transform of the squared samples over the frequency range
first reported by Kam [SI. This algorithm is a direct of interest. The most likely estimate of frequency is then
computation carrier phase algorithm that can be related to that frequency associated with the Fourier component that
the maximum likelihood principle. Since the algorithm has the largest peak. This frequency can then be included in
produces an explicit estimate of the carrier phase, 8, a the feedforward correction that is undertaken for the phase
feedforward correction strategy is possible. The MLFF estimate.
algorithm can be considered a sub-class of the Viterbi &
Viterbi algorithm presented in [6]. In point of fact the A distortion will occur for large frequency offsets due to
algorithm does not produce an estimate of 8 but rather the mismatching of the signal with the receive channel filter.
However, a frequency offset of 0.25 x the symbol rate only
outputs the complex vector e'?
produces a mismatching degradation of 0.6dBfor the signal
as defined in section 1 and this is within the margin
Many of the same considerations, in respect of the
provided for in system implementation. An implementation
averaging employed to arrive at an estimate of 8 / d B ,with incorporating two channel filters coupled with a Fourier
low variance, apply to camer phase as were apparent for transform and search procedure will provide rapid
symbol timing. Again a 'gliding accumulator' averager has frequency acquisition for frequency offset in the range = f
been employed but here an observation time of 32 symbols 0.5 x symbol rate (see Fig. 4).
is used. No bias in the estimate is incurred, in the presence
of a constant carrier frequency offset, for correction applied
in the middle of the averaging widow.

Phase correction is implemented by means of a complex

rotator [3]. Camer phase equivocation can also occur in the
presence of a carrier frequency offset and an appropriate
control fhction must be undertaken to detect when the Fig. 4: Carrier Frequency Estimation
phase trajectory crosses the boundary and undertake the
necessary action. When the boundary is crossed a change in 111. IMPLEMENTATION
sign of the output data symbols must be undertaken.
The above algorithms have been implemented in a single
D.Carrier Frequency Synchronisation DSP 56001 target system (see Fig. 5). The design has
proven to very flexible with the target system being used for
The MLFF phase algorithm described in the previous other demodulator implementation studies. The
section has a maximum frequency acquisition range of performance of the demodulator is highlighted in Fig. 6.

1
Afmm= +-kNT
where k is the power of the nonlinearity used in the
estimator (BPSK=2, QPSK=4), N is the observation time
measured in symbols and T is the symbol duration. For
frequency offset greater than this value the unit vector out
of the estimator will have sweeped the entire unit circle in
the complex plane and no usehl output from the phase
averager will be delivered. For k=2, and N=32 (current
case), and l/T=1200, Afm, = 18.75 Hi.

Fig. 5: DSP 56001 Digital Demodulator

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1214 WT 3.6 PIMRC '94 / WCN

Bit6ymbol Error Rate [4] F. M. Gardner, "Timing Adjustment via Interpolation

01 in Digital Demodulators", Final Report: Part I-
I I 1 I I I
ESTEC Contract No. 8022/88NL/DG, European
I Space Agency, June 1990
0 01
[5] P. Y. Kam, "Maximum Likelihood Carrier Phase
Recovery for Linear Suppressed-Carrier Digital Data
Modulation", IEEE Transactions on Communications,
0 M1
vol. com-34, pp 522-527, June 1986

[6] A. J. Viterbi & A. M. Viterbi, "Nonlinear Estimation of

PSK Modulated Carrier Phase with Application to
Burst Digital Transmission", IEEE Transactions on
0 mol

I
I
I
I
I
I I \ I
1
I Information Theory, vol. IT-29, n0.4, pp 543-551, July
1983

o m 1

- Theoretical bound
a Digital demodulator performance

Fig. 6 : Digital Demodulator BER Performance

IV. CONCLUSIONS

The system design of an entirely feedfonvard

demodulator has been presented. The design is capable of
both burst mode and continuous mode operation and
provides very fast acquisition in the presence of carrier
frequency offsets and additive gaussian noise. The use of a
symmetric gliding accumulator averager within feedforward
structures assures data detection occurs for the very first
and last symbols when working in a burst mode.

The digital demodulator has been constructed using a

single Motorola DSP56001 implementation and has shown
to give performance within IdB of that theoretically
achievable whilst providing for essentially preambless
operation.

V. REFERENCES

Inmarsat-C ,$stem Dejinition Manual Version 1.3/I.4

M. Oerder & H. Meyr, "Digital Filter and Square

Timing Recovery", IEEE Transactions on
Communications,vol. 36, no.5, pp 605-612, May 1988

F. M. Gardner, "Demodulator Reference Recovery

Techniques Suited for Digital Implementation", Final
Report - ESTEC Contract No. 6847/86/NL/DG,
European Space Agency, Aug. 1988

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