Embedded Systems Lecture 4 PCB
Embedded Systems Lecture 4 PCB
By Muluneh H. 13/01/2021 1
Outline
• Pitch (distance b/n pins) = 2.54mm(0.1”), width = 0.3”, 0.6” & 0.9”
• Old style, mostly used in prototyping and development boards.
2. SOP (Small Outline Package)
Variants:
• SOIC (Small Outline IC “Gull Wing”)
pitch =1.27mm
• SSOP (Shrink Small Outline Package)
Pitch = 0.4mm – 0.8mm
Hawassa University, Institute of Technology School of
Electrical and Computer Engineering 13/01/2021 28
IC packaging
3. TSOP…(Thin Small Outline Package)
Variant:
TSSOP (Thin Shrink Small Outline Package)
• This etching step removes any copper on the CORE that was exposed to light
through the photomask, thus transferring the pattern.
• Once the remaining photosensitive material is stripped using a cleaning solution,
the CORE is left with a pattern of copper identical to the pattern on the Photomask
Hawassa University, Institute of Technology School of
Electrical and Computer Engineering 13/01/2021 57
Patterning: Milling
• another subtractive technique is to use a milling bit (similar to a
router or drill bit) to mechanically remove copper from the CORE
leaving only the desired pattern.