BASIC OP-AMP CIRCUITS Some iat ae ero eaten seat arr ec cpenton, nd caret ofthe operon aie: 13-2. suming Arps p-amps are wed in such a wide variety of circuits and 2 i applications that itis imposible to cover all of them in one eer ete eanco chapter, or even in one book. Therefore, in this chapter, 13-4 Troubleshooting four fundamentally important circus are covered to ghe [EEE system Application yeu 2 foundation in op-amp ccs.ad © Analyze the operation of several base comparator circuits, ‘The system application at the end of the chapter is an ‘example of the use of three types of op-amp circuits that ‘you wil leam about in this chapter: the summing amplifier, ‘Analyze the operation of integrators and differentitors the integrator, and the comparator. The sytem includes, both analog and digital circuits; however, you will focus on SO er the analog-to-digital converter board that incorporates the ‘op-amps. The analog-to-digital converter board converts an audio signal to a digital code in order to record the sound in 2 digital format. After studying ths chapter, you should be Cer able to complete the system application assignment. Hysteresis eemmeeeey visit WHE COMpaniOn WERE Bounding Study aids for this chapter are available at Snes sceane http: /wunw-prenal.com{floyd Integrator Differentiator Ra © Analyze the operation of several types of summing amplifies 645646 = BASIC OP-AMP CIRCUITS (GSE comparators Figure 13. The op-amp as 2 zerorevel detector. Operational amplifiers are often used as comparators fo compare the amplitude of one voltage wath another: In this application, the op-amp is used in the open-loop configuration, With the input voltage on one input and a reference voltage on the other. After completing this section, you should be able to = Analyze the operation of several asic comparator circuits ® Describe the operation of a zero-level detector = Describe the operation of a nonzero-level detector ® Discuss how input noise affects comparator operation = Define hysteresis = Explain how hysteresis reduces noise effects = Describe a Schmitt tigger circuit ® Describe the operation of bounded comparators = Discuss two comparator applications including analog-to-digital conversion “Zero-Level Detection ‘A comparator isa type of op-amp circuit that compares two input voltages and produces ‘an output in either of two states indicating the greater than or less than relationship of the inputs. One application of an op-amp used as a comparator isto determine when an input voltage exceeds a certain level. Figure [3-I(a) shows a zero-level detector. Notice that the inverting (—) input is grounded to produce a zero level and that the input signal voltage is applied to the noninverting (++) input. Because of the high open-loop voltage gain, a very small difference voltage between the two inputs drives the amplifier into saturation, caus- ing the output voltage to go to its limit. For example, consider an op-amp having A, 100,000. A voltage difference of only 0.25 mV between the inputs could produce an output voltage of (0.25 mV)(100,000) = 25 V if the op-amp were capable. However, since most op-amps have maximum output voltage limitations of +15 V because of their de supply voltages, the device would be driven into saturation. cicmat a y ) ® a Figure 13-1(b) shows the result ofa sinusoidal input voltage applied to the noninverting (+) input of the zeto-level detector. When the sine wave is positive, the output is at its max- imum positive level. When the sine wave crosses 0, the amplifier is driven to its opposite State and the output goes to its maximum negative level, as shown. As you can see, the ero: level detector can be used as a squaring citcut to produce a square wave from a sine wave.“Nonzero-Level Detection ‘The zero-level detector in Figure 13-1 can be modified to detect postive and negative vol ‘ages by connecting a fixed reference voltage source to the inverting (—) input, as shown in Figure 13-2(a). A more practical arrangement is shown in Figure 13-2(b) using a voltage divider to set the reference voltage, Veer, as follows: Ry Yer= a OY) Where + Vs the positive op-amp de supply volage. The ciruit in Figure 13-2(c) uses a enc diode ose the reference vllage (Vase = Vz. As lang as Vs less thn Vgyr the ‘output remaios at the msximum negative level. When the input voltage excceds the refer ence Voltage, the output goes to its maximum positive voltage, as shown in Figure 13-2(d) ‘with sinusoidal input voltage. ch Na > ON OV ne Voce le % 5 Ys Vi (@) Bonery reference (6 Vottage-ivider erence ¥, (© Waveforms A Figure 13-2 Nonsero-tevel detecton. COMPARATORS (e) Zener diode sets reference vltge a7648 = BASIC OP-AMP CIRCUITS I EXAMPLE, DP FIGURE 13-3 Solution Related Problem * ‘The input: igure 13-3(a) is applied to the comparator circuit in Figure 13-3(b). Draw the output showing its proper relationship to the input signal. Assume the maximum output levels ofthe op-amp are +12 V. uisv sv. Ry aout Vy 0: : y howe sv- @ cy ‘The reference voltage is set by R, and R, as follows: & 10K = ees = 163 Rte azn + ona SY) 1gy {As shown in Figure 13-4, each time the input exceeds +1.63 V, the output voltage ‘switches to its +12 V level, and each time the input goes below +1.63 Y, the output ‘switches back to its —12.V level, neglecting hysteresis, Vir > FIGURE 1 Determine the reference voltage in Figure 13-3 if Ry = 22 KO. and Ry = 3.3 kQ. "Raswers av at the end ofthe chapter: (Open the Multisim file E13-01 in the Examples folder on your CD-ROM. ‘Compare the output waveform tothe specified input at any arbitrary frequency and verify that the reference voltage agrees with the calculated value.“Effects of Input Noise on Comparator Operation [In many practical situations, noise (unwanted voltage fluctuations) appears on the input lin, ‘This noise voltage becomes superimposed on the input voltage, as shown in Figure 13-S for the case of a sine wave, and can cause a comparator to erratically switch output states. ae srigurE 13-5 Sine wave with sperimpored noite, In onder to understand the potential effects of noise voltage, consider a low-frequency sinusoidal voltage applied tothe noninverting (++) input of an op-amp comparator used as a zer0-level detector, as shown in Figure 13-6(a) Part (b) of the igure shows the input sine ‘wave plus noise and the resulting output. As you can see, when the sine wave approaches 0, the fluctuations due to noise cause the total input to vary above and below several times, thus producing an erratic output voltage. = o o © “Reducing Noise Effects with Hysteresis ‘An ermtic output voltage caused by noise on the input occurs because the op-amp com- arator switches from its negative output state to its positive output state at the same input voltage level tht causes ito switch in the opposite direction, from positive wo negative. This unstable condition occurs when the input voltage hovers around the reference voltage, and ny small noise fluctuations cause the comparator to switch frst one way and then the ther. Tm order to make the comparator less sensitive to noise, a technique incorporating posi- tive feedback, called hysteresis, can be used. Basically, hysteresis means that there is @ higher reference level when the input voltage goes from a lower to higher value than when it goes from a higher to «lower value. A good example of hyseresis is a common house- hold thermostat that tums the fumace on at one temperature and off at another: COMPARATORS = 649 Figure 13-6 Effect of noe on comparator cru.650 = BASIC OP-AMP CIRCUITS ‘The two reference levels are referred to as the upper trigger point (UTP) and the lower trigger point (LTP). This two-level hysteresis is established with a positive feedback arrangement, as shown in Figure 13-7. Notice thot the noninverting (+) inpet is connected ‘to a resistive voltage divider such that portion ofthe output voltage is fed back to the in- put. The input signal is applied to the inverting (—) input inthis ease. FIGURE 13-7 ‘Comparator with postive feedback for hysteresis. % ‘The basic operation of the comparator with hysteresis is illustrated in Figure 13-8. As- sume that the output voltage is at its positive maximum, + Vesqqaa- The voltage fed back to the noninverting input is Vyy» and is expressed as Donen ee | Se eal Ry (0) When the output i a te anim nceative voltage andthe input gees below LTP. the output sche bak od asian postive volage (ey Device wiggers only one when UTP or LTP is reached: thus theres rmmunity to nos ha ding On the inp signal AFicuRE 13-8 (Operation ofa comparator with hysteresi.COMPARATORS = 651 When V,, exceeds Vir: the output voltage drops to its negative maximum, Vey 8 shown in part (a). Now the voltage fed back to the noninverting input is Vize and is ex- pressed as Equation 13-2 ‘The input voltage must now fall below Vizp. as shown in part (b), before the device will switeh from the maximum negative voltage back to the maximum positive voltage. This ‘means that a small amount of noise voltage has no effect on the output, as illustrated by Figure 13-8(0). ‘A comparator with hysteresis is sometimes known as a Sch hysteresis is defined by the difference of the two trigger levels in) Equation 13-3 trigger. The amount of ag Vins = Determine the upper and lower trigger points forthe comparstor circuit in Figure 13-9, Assume tht Vang) = $5.V ad ~Vousy = ~5 Ve IGURE 13-9 Seaton Vn gBg (Mes) = 48189) = 4280 == OV, 05(-5 V) = -25V = AER Yeas) = O5(-5¥) = Related Problem Determine the upper and lower trigger points in Figure 13-9 for Ry = 68 k2 and 82 Q. Also assume the maximum output voltage levels are now £7 V. (Open the Multisim file E13-02 in the Examples folder on your CD-ROM. Determine the upper and lower tigger points and compare with the calculated values using a $ V ems, 60 Hz sine wave for the input. “Output Bounding In some applications. itis necessary to limit the output voltage levels ofa comparator toa value Jess than that provided by the saturated op-amp. A single zener diode can be used, as shown in Figure 13-10, to imit the outpat voltage to the zener voltage in one direction and to the for- ward diode drop in the other. This process of limiting the output range is called bounding, age652." BASIC OP-AMP CIRCUITS. Figure 13-11 Operation of abounded comparator. Double-bounded comparator. Solution FIGURE 13-10 ‘Comparator with cutput bounding. K, ‘The operation is as follows. Since the anode of the zener is connected to the inverting (© input, its ot viral ground (= OV). Therefore, when the cutput voltage reaches a pos- itive value equal to the zener voltage, it iit at that value, as illustrated in Figure 13-11(@) ‘When the output switches negative, the zener sets asa regular diode and becomes forwan- biased at 07 ¥, limiting the negative ouput voltage to this valve. as showin part (b). Turn {ng the zener around limits the output voltage in the opposite direction 5 x — CyB % a eo “av {(@) Bounded at a positive abe ro A Me s07V Bis (@) Bound ata negative ve ‘Two zener diodes arranged asin Figure 13-12 limit the output voltage to the zener volt- age plus the forward voltage drop (0.7 V) of the forwart-biased zener, both positively and negatively, as shown, >, Dy pees iS S) svas0ry Determine the output voltage waveform for Figure 13-13, ‘This comparator has both hysteresis and zener bounding. The voltage across D, and Ds in either direction is 4.7 V + 0.7 V = 5.4 V. This is because one zener is always forward-biased with a drop of 0.7 V when the other one is in breakdown,» FIGURE 13 FIGURE 13-14 COMPARATORS = 653 Wow aKa. ‘The voltage at the inverting (—) op-amp input is V,,. * 5.4 V. Since the differential ee ee eee eee ee spprenimately Va, = 54V. Ths Va = Var = Vae #54) = 454 Ma. S58 ‘nr, ~ 100K — **4 #4 Since the noninverting input current is negligible, = Tey = 454 WA Ralyg = (ATKO)(454 pA) = 42.54V Va + Veo = 454V 4 254 = 47.90 ‘The upper trigger point (UTP) and the lower trigger point (LTP) are as follows: (tg) etre = (248 )or90 = Fee fa vm) = (SA) age) Vorr = 254 254 Ry Ry ‘The outpat waveform for the given input voltage is shown in Figure 13-14, yroev4 Nae ' 194)654 = BASIC OP-AMP CIRCUITS Related Problem Figure 13-15 ‘Ao ever temperature sensing circuit. Determine the upper and lower trigger points for Figure 13-13 if R, = 150kQ, (68 KO, and the zener diodes are 3.3 V devices. ‘Open the Multisim file E13-03 in the Examples folder on your CD-ROM. ‘Compare the output waveform to the specified input at any arbitrary frequency and see ifthe upper and lower trigger points agree withthe calculated values. “Comparator Applications Over-Temperature Sensing Circuit Figure 13-15 shows an op-amp comparator used in 1 precision over-temperature sensing circuit to determine when the temperature reaches 2 certain eritical value. The circuit consists of a Whealstone bridge with the op-amp used to detect when the bridge is balanced. One leg ofthe bridge contains thermistor (R,), which isa temperature-sensing resistor with a negative temperature coefficient (its resistance de~ creases as temperature increases). The potentiometer (R,) is set at & value equal 10 the re- sistance of the thermistor at the critical temperature. At normal temperatures (below critical). Ris greater than R,, thus creating an unbalanced condition that drives the op-amp to its low saturated ouput level and keeps transistor Q, off. Wheaton: re — As the temperate inereascs, the resistance of the thermistor decreases, When the tm perature reaches the critical vale, Ry becomes equal to Rs and the bridge becomes bal- anced (since Ry = R.). At this pont the op-amp switches to its high saturated outpot lve turing Q, on. This energizes the relay, which can be used to ativate an alarm or initiate an pproprite esponse tothe over temperate condition, Analog-to-Digital (A/D) Conversion A/D conversion is a common interfacing process fften used when a linear analog system must provide inputs to a digital system. Many ‘methods for A/D conversion are available. However, in this discussion, ony one type is used to demonstrate the concept. The simultaneous, of flash, method of A/D conversion uses parallel comparators to ‘compare the linear input signal with various reference voltages developed by a voltage di vider. When the input voltage exceeds the reference voltage for a given comparator. a high level is produced on that comparator’s output, Figure 13-16 shows an analog-to-digitalCOMPARATORS = 655 ‘converter (ADC) that produces three-digit binary numbers on its output, which represent the values of the analog input voltage as it changes. This converter requites seven com parators. In general, 2" — 1 comparators are required for conversion to an n-digit binary number. The large number of comparators necessary for a reasonably sized binary nur- ber is one of the drawbacks of the simultaneous ADC. Its chief advantage is that it pro Vides a fast conversion time. Opamp , cmp tang) P o) a os) ) o) a «| fi SFIGURE 13-16 ‘Asionitanecus (Nas) analog-to- Ve aio 0 ais. . wx aia o » AFIGURE 13-19 GEA summing ameuiriers ‘The summing amplifier is an application ofthe inverting op-amp configuration ‘covered in Chapter 12, In this section, you will sce how a summing amplifier works, and you will learn about the averaging amplifier and the scaling amplifier, which are ‘atiations of the basic summing amplifier {fer completing this setion, you should be able to © Analyze the operation of several types of summing amplifiers ® Deseribe the operation of u unity-gain summing amplifier = Discuss how to achieve any specified gain greater than unity = Describe the operation of an averaging amplifier "= Describe the operation of a scaling adder 1 Discuss a scaling adder used as a digital-to-analog converter ‘Summing Amplifier with Unity Gain ‘A summing amplifier has two or more inputs, and its output voltage is proportional 1 the FEB ncgative of the algebraic sum ofits input voltages. A two-inpat summing amplifiers shown in Figure 13-20, but any numberof inputs can be used. The operation ofthe circuit and der- ivation ofthe outpot expression areas follows. Two voltages. Vpq and Vio. ae applied to the inputs and produce currents, and fs, as shown.658 = BASIC OP-AMP CIRCUITS Equation 13-4 [Feanete 5 » FiGuRE 13-22 Solution Related Problem ‘Using the concepts of infinite input impedance and virtual ground, you can see that the inverting (~) input ofthe op-amp is approximately 0 V, and there is no current atthe input. ‘This means that both input currents f, and /s Combine at this summing point and form the {otal current (f,), which goes through 2s indicated in Figure 13-20. h=hth Since Voyr = —fR), the following steps apply: Your = (0+ = -( Ye (Vu + Vina) ‘The previous equation shows that the output voltage has the same magnitude as the sum of the two input voltages but with a negative sign, indicating inversion, ‘Ageneral expression is given in Equation 13-4 for a unty-gain summing amplifier with ‘inputs, as shown in Figure 13-21 where all resistors are equal in value. Vour = = Wart + Vine Vina +277 + Via) eFicune 13-21 m ‘Summing amplifier with n inputs. Yi oy Re Determine the output voltage in Figure 13-22. wan Va a woo Veet Ve vous | a Vg. = 480M Vour = (Vint + Vino + Vana) = GV + 1V +8) = —12¥ I. fourth input of ~0.5 Vis added to Figure 13-22 with 10 KO resistor, what isthe ‘ouput voluge? ‘Open the Multis the Examples folder on your CD-ROM. Apply ] the indicated de voltages tothe inputs of the summing amplifier and verify that the ‘output isthe inverted sum ofthe inputs.SUMMING AMPLIFIERS = 659 ‘Summing Amplifier with Gain Greater Than Unity ‘When fis larger than the input resistor, the amplifcr has a gain of Ry/R, where Ris the value of each equal-value input resistor. The general expression forthe output is Ry TR As you can see the outputhas the same magnitude asthe sum of all the inpat voltages mul- tiplied by a constant determined by the ratio ~(R,/R). I EXAMPLE 13. Determine the output voltage for the sununing amplifier in Figure 13-23. eriurE 13-23 Your (Vans + Vie + Vi) Equation 13-5 x | m | Vin =02V 10h 10K Re Vou | Loko P | Solution Ry = 10 KQand R= Ry = Ry = 1.0 KO. Therefore, K Vor =~ Vou + Veo) = ~ 728 (02 v + 05 vy = -10(02¥) = =7V Related Problem Determine the output voltage in Figure 13-23 if the two input resistors are 2.2 kQ and the feedback resistor is 18 KO. Open the Multisim file E13-06 in the Examples folder on your CD-ROM. Apply the indicated de voltages to the inputs of the summing amplifier and verify that the output is the inverted sum of the inputs times a gain of 10. ‘Averaging Amplifier ‘A surnming amplifier can be made to proce the mathematical average ofthe input voltages. “This is done by setting the ratio f/R equal to the reciprocal of the nuraber of inputs (n). ‘You obtain the average of several numbers by first adding the numbers and then divid- ing by the quantity of numbers you have, Examination of Equation 13-5 and a litle thought will convince you that a summing amplifier can be designed to do this. The next ‘example will Mustrate660 = BASIC OP-AMP CIRCUITS [Feren 7 ‘Show that the amplifier in Figure 13-24 produces an output whose magnitude is the ‘mathematical average ofthe input voltages. > FIGURE 13-26 K; Viste k Vn VO—M woke Solution Since the input resistors are equal, R = 100 KQ. The output voltage is a Vou =~" (Vist + Vino + Vio + Vins) 25k aveav sy ray) =-Luoy)=-asv 100k A simple calculation shows that the average of the input values is the same magnitude 8 Voy but of opposite sign. IV+2V4+3V+4V_10V mo — v | are a rm Related Problem — Specify the changes required in the averaging amplifier in Figure 13-24 in order to handle five inputs ‘Open the Multisim file E13-07 in the Examples folder on your CD-ROM. Apply the indicated de voltages tothe inputs ofthe summing amplifier and verify that the Cott isthe inverted average of the inputs. | ‘Scaling Adder A Gilferent weight can be assigned to each input of « summing amplifier by simply adjusting the values ofthe input resistors. As you have seen, the output voltage can be expressed as Ry a ‘The weight of a particular input is set by the ratio of R, to the resistance, R,, for tht in- put (R, = Ry, R:, +++ R,). For example, if an input voltage is to have a weight of 1, then R, = R, OF, ifa weight of 0.5 is required, R, = 2k, The smaller the value of ance R,, the greater the weight. and vice versa, [Pxenote 13-8 Determine the weight of each input voltage for the scaling adder in Figure 13-25 and find the output voltage, & % Equation 13-6 Your = |p Vin + R, Vana +o + RtSUMMING AMPLIFIERS p> FiGuRE 1 ~ | wh nae vat rie ont a wit R 10ko tic ght of input Zs = Solution Weight fing = TORE — gas R_ 10kn Weight ong 272 = ME = 0400 Ry _ 10Kn Weigh pura: = 1080 — Lon —— var =—( Stns + tne +H) = ~[0.213(3 V) + 0.100(2 V) + 1.00(8 V)] See ere eee Related Problem Determine the weight of each inpot voltage in Figure 13-25 if Ry 82KQ, Ry = S6KO, and R, = 10k. Also find Vou. ‘output agrees with the calculated value. “Applications [D/A conversion isn important interface process for converting digital signals to analog (near) signals. An example is a voice signal that is digitized for storage, processing, cr transmission and must be changed back into an approximation ofthe original audio signal inorder to drive a speaker. ‘One method of D/A conversion uses a scaling adder with input resistor values that repre- sent the binary weights ofthe digital input code. Although this is not the most widely used method, it serves to ilusrate how a scaling adder can be applied. A more common methed for DIA conversions known a the RI2R ladder method, Is introduced here for eomparisen although it does not use a scaling adder. Figure 13-26 shows a four-digit dgital-o-analog Converter (DAC) ofthis type (called a binary-weighted resistor DAC). The switch symbols represent transistor switches for applying each ofthe four binary digits othe inputs. “The inverting (~) input is at virtual ground, and so the ouput vollage is proportional to the current through the feedack resistor R (stm of input currents). ‘The lowest-value resistor & corresponds to the highest weighted binary input (2') All of the other resistors are multiples of R and correspond to the binary weights 2°, 2! and 2°, 224O, R= (Open the Multisim file E13-08 in the Examples folder on your CD-ROM. Apply. the indicated de voltages to the inputs of the summing amplifier and verify that the = 661662" BASIC OP-AMP CIRCUITS FIGURE 13-26 Asealing adder a9 fourdigt dlgital-to-analog converter (DAC). Eel | Ee I :XAMPLE 13. Determine the output voltage of the DAC in Figure 13-27(a). The sequence of four digit binary codes represented by the waveforms in Figure 13-27(b) are applied tothe inputs. A high level is a binary 1, and low level isa binary 0. The least significant binary digit is D, anus 2 —\W— toon >o— Wt sou 0123456789100 assy b, asa, », DoW © oo A FIGURE 13-27 Solution First, determine the current for each of the weighted inputs. Since the inverting input of the op-amp is at © V (virtual ground), and a binary 1 corresponds to a high level (+5 V), the current through any ofthe input resistors equals 5 V divided by the resistance value. Sivan 4 a0 x = 2025 MA 105 mA, 0.1 mA = = 02mA ‘There is almost no current at the inverting op-amp input because of ts extremely high impedance. Therefore, assume that al ofthe input current is through K. Since ‘one end of Ris at 0 V (virtual ground), the drop across R, equals the output voltage, ‘hich is negative with respect to virtual ground. Rly = ~(10KO)(0.025 mA) = -0.25V ~Ryh, = ~(10k0)(0.05 ma) = -05V Ry, = =(10K0)(0.1 ma) = -1V ~2v Vourioo) = Vounon Vouriony = Vouns) = —Ryly = —(10k02)(0.2 maSUMMING AMPLIFIERS = 663 From Figure 13-27(b), the fis inary i ¥ voltage of OV. The next input code is 0001 (it stands for decimal 1). For this the output voltage is ~0.25 V. The next code is 0010, which produces an ouput voltage of 05 V. “The next eode is 0011, which produces an output voltage of ~0225 V + (0.5 V) 075. Fach successive binary code increases the output voltage by ~0.25 V.So, for particular straight binary sequence on the inputs, the output isa stirtep waveform going from OV to ~3.75 V in ~0.25 V steps. as shown in Figure 13-28. If the steps are ‘ery stall the ouput approximates a ruight line (linear. = Binary inp 250 29s 300) 325 -330] ars Vaal) Related Problem If the 200 kO2 resistor in Figure 13-27(@) is changed to 400 kQ, would the other tor values have to be changed? If so, specify the values. As mentioned before, the R/2R ladder is more commonly used for D/A conversion than the scaling adder and is shown in Figure 13-29 for four bts. It overcomes one of the dis- advantages of the binary-weighted-input DAC because it requires only two resistor values. a sricune 13-29 — ‘An RR Inder DAC Dy Dy, Dy Dy g eae aR Assume that the D, input is HIGH (+5 V) and the others are LOW (ground, 0 V), This condition represents the binary number 1000, A eircuit analysis will show that this reduces, {0 the equivalent form shown in Figure 13-30(a). Essentially no current goes through the664 = BASIC OP-AMP CIRCUITS Equine lar % Vn sods y Dino De=0 (4) Beuivsent iru for D =0, Dy =0, 0, =0, Dy= A FIGURE 13-30 ‘Analysis ofthe RIZR ladder DAC.INTEGRATORS AND DIFFERENTIATORS #665 2R equivalent resistance because the inverting input is at virtual ground. Thus, all ofthe eur- rent (= 5 V/2R) through Ry is also through f, and the output voltage is —5 V. The opera tional amplifier Keeps the inverting (—) input near zero volts (0 V) because of negative feedback. Therefore, all current is through R, rather than into the inverting input. Figure 13-30(b) shows the equivalent ciruit when the D, input is at +5 V and the oth- cers are at ground. This condition represents 0100. If we thevenize looking from Ry, we get 2.5 V in series with R, as shown, This results in current through of = 2.5 V/2R, which ‘ives an output voltage of 2.5 V. Keep in mind that there is no current into the op-ammp in- verting input and that there is no current through the equivalent resistance to ground be- ‘cause it has 0 V across it, due tothe virtual ground Figure 13-30(¢) shows the equivalent circuit when the D, input is at +5 V and the oth- cers re at ground. This condition represents 0010. Again thevenizing looking from Ry. you ‘get 1.25 V in series with R as shown, This results in @ curent through Ry of | = 1.25 V/2R, which gives an output voltage of ~ 1.25 V. In part (2) of Figure 13-30, the equivalent circuit representing the case where Dp is at +5 V and the other inputs are et ground is shown, This condition represents 0001. Thev- nizing from R, gives an equivalent of 0.625 V in series with Ras shown, The resulting cur- rent through R, is! = 0.625 VI2R, which gives an output voltage of ~0.625 V. Notice that each successively lower-weighted input produces an output voltage that is ‘halved, so that the output voltage is proportional tothe binary weight ofthe input bits. [Ferer ee REVIEW 1. Define summing point. i 2. Whats the value of R/R for a five-input averaging amplifier? 3. A certain scaling adder has two inputs, one having twice the weight ofthe other If the resistor value forthe lower-weighted input is 10 KO, what ic the value of the cother input resistor? GBB ntecrators AND DIFFERENTIATORS An op-anp integrator simulates mathematical integration. which is basically a ‘summing process that determines the total area under the curve of a funetion. An op- np differentiator simulates mathematical differentiation, which isa process of determining the instantaneous rate of change of a function. It is not necessary for you to understand mathematical integration or differentiation, at this point, in order to Team ‘how an integrator and differentiator work. The integratoss and differentiator show in this section ate idealized to show basic principles. Practical integrators often have an Additional resistor or other circuitry in parallel withthe feedback capacitor to prevent saturation, Practical diflerentiators may include a series resistor to reduce high frequency noise ‘After completing this section, you should be abe to = Analyze the operation of integrators and differentiators, ® Identify an integrator * Discuss how a capacitor charges * Determine the rate of change of an integrator’ output 1 Identify a differentiator * Determine the output voltage ofa differentiator666 BASIC OP-AMP CIRCUITS ‘The Op-Amp Integrator ‘An ideal integrator is shown in Figure 13-31. Notice thatthe feedbeck element is a ca- ppacitor that forms an RC circuit with the input resistor. Although a large-value resistor is ‘normally used in parallel with the capacitor to limit the gain. it doesnot afect the basic op- eration and is not shown for purposes of tis analysis. FIGURE 13-31 aor a — How a Capacitor Charges To understand how the integrator works, view how a capacitor charges. Recall that the charge @ on a capaci charging current (fc) and the time (?). important to re- is proportional to the Q=het ‘Also, in terms of the voltage, the charge ona eapacitoris o=cv% From these two relationships, the capacitor voltage can be expressed as vel = (E}e ‘This expression has the form of an equation fora straight line that begins at zero with a con- stant slope of /:/C. Remeraber from algebra that the general formula for a straight line is y = mx + b. In this case, y = Voy m = Ie/C,x = fand b = 0. Recall that the capacitor voltage in a simple RC circuit is not linear but is exponenti. “This is because the charging curtent continuously decreases as the capacitor charges and causes the rate of change of the voltage 10 continuously decrease. The key thing about us- ing an op-amp with an RC circuit to form an integrator is thatthe capacitor’s charging cur- rent is made constant, thus producing a straight-line (Jinear) voltage rather thant an ‘exponential voltage. Now let's see why this is true. In Figure 13-32, the inverting input ofthe op-amp is at virtual ground (OV), so the volt- ‘age across R, equals V,,."Therefore, the input current is Vin 1,- ve Figure ‘Currents in an integrator.INTEGRATORS AND DIFFERENTIATORS = 667 If Vs isa constant voltage, then J, sus s constant beeause the inverting input always r= mains at OV, Keeping a constant voltage across R. Because of the very high input iniped- ance ofthe op-amp, there is negligible curent atthe inverting input. Tis makes all ofthe input curent go through the capacitor, as indicated in Figure 13-32, so te ‘The Capacitor Voltage Since I, is constant, so is Ic. The constant Ie charges the capaci- tor linearly and produces a linear voltage across C. The positive side of the capacitor is held al OV by the virtual ground of the op-amp. The voltage on the negative side of the capaci tor, which is the op-amp output voltage, decreases linearly from zero as the capacitor charges, as shown in Figure 13-33. This voltage is called a negative ramp and is the con- sequence of a constant positive input. ex >. The Output Voltage Vi, isthe same as the voltage on the negative side of the capacitor. ‘When a constant positive input voltage in the form of a step or pulse (a pulse has a constant ‘amplitude when high) is applied, the output ramp decreases negatively until the op-armp sat trates at its maximum negative level. This is indicated in Figure 13-34, ae Rate of Change of the Output The rate at which the capacitor charges, and therefore the slope of the output ramp. is set by the ratio Ic/C, as you have seen. Since fe = Vs/R the rate of change or slope ofthe integrators output voltage is AV, /Q AV Vin ar RC Integrators are especially useful in triangular-wave oscillators as you will seein Chapter L6. EXAMPLE. FIGURE 13-33 Ainear ramp valtage i produced ‘2cr035 Cty the constant charging, current, FIGURE 13-39 Solution Determine the output voltage of the op-anip differentiator in Figure 13-39 for the ‘wiangular-wave input shown, sv F Se Ai (ae as 1 001 ar ’ ‘Starting atr = 0, the input voltage is a positive-going ramp ranging from —5 V to 45 V (a +10V chango) in 5 js. Then it changes to.a negative-going ramp ranging from +5 V to —5 V (a 10V change) in 5 ys. ‘The time consta RyC = (2.220.001 pF) = 22 ps. [Determine the slope or rate of change (V/t) ofthe positive-going ramp and calculate ‘the outpat voltage as follows: -(\nc= ~(2V/us)2.2.us = —44V Likewise, the slope ofthe negative-going ramp is ~2 V/s, and the output voltage is Vous = ~(-2VIs)2.2.s = +4.8VTROUBLESHOOTING = 671 Figure 13-40 shows a graph of the output voltage waveform relative t the input > FIGURE 13-40 Related Problem — What would the output voltage be if the feedback resistor in Figure 13-39 is changed to33kQ? [rer NT pete 1, What i the feedback element in an op-amp integrator? 2. Fora constant input voltage to an integrator, why isthe voltage across the capacitor linear? 3. What i the feedback element in an op-amp differentiator? 4. How isthe output of a differentiator related to the input? GBR rroustesnootine Although integrated circuit op-amps are exttemely reliable and trouble-free, failures 4o occur from time to time. One type of internal failure mode isa condition where the ‘op-amp output isin a saturated state resulting in a constant high or constant low level, regardless ofthe input. Also, external component failures will produce various types of failure modes in op-amp circuits. Some examples are presented inthis section. After completing this section, you should be able to = Troubleshoot basic op-amp cireuits f= Identify failures in comparator circuits 1 Identify failures in summing amplifiers Figure 13-41 illustrates an internal failure of a comparator circuit that results in a stuck” output672 = BASIC OP-AMP CIRCUITS a eee > (4) Oupet ie in he HIGH tate (©) Out fie nthe LOW state A FIGURE 13-41 Internal comparator failures typically result inthe output being stuck” inthe HIGH or LOW state. ‘Symptoms of External Component Failures in Comparator Circuits A comparator with zener bounding and hysteresis is shown in Figure 13-42, In addition to a failure of the op-amp itself, a zener diode or one of the resistors could be faulty. For ex- ‘ample, suppose one of the zener diodes opens. This effectively climinates both zeners, and the circuit operates as an unbounded comparator, as indicated in Figure 13-43(a). With a shorted diode, the output i limited tothe Zener voltage (bounded) only in one direction, de- pending on which diode remains operational, as illustrated in Figure 13-43(b. Inthe other direction, the output is held atthe forward diode voltage. IGURE 13-42. >, ‘A bounded comparator with hysteresis eit Recall that Ry and 2, set the UTP and LTP for the hysteresis comparator. Now, suppose that 2, opens. Essentially all of the output voltage is fed back to the noninverting (+) in- pt, and, since the input voltage will never exceed the output, the device will remain in one of its bounded states, This symptom can also indicate a faulty op-aimp, us mentioned be- fore. Now. assume that Ry opens. This leaves the noninverting input near ground potential ‘and causes the circuit to operate as a zero-level detector. These conditions are shown in parts (©) and (@) of Figure 13-43,TROUBLESHOOTING = 673 Open zener + Visa) <(V +05V +02V +01 V)= -18V -(V+02V+01V)=-13V (©) Ifthe feedback resistor opens, the circuit becomes a comparator and the output £2068 0 Va Solution Related Problem In Figure 13-45, R, = 47 KO. What is the output voltage if R, opens? As another example, lets look at an averaging amplifier. An open input resistor will re- sult in an output voltage that isthe average of all the inputs with the open input averaged in EXAMPLE, (a) What isthe normal outpot voltage for the averaging amplifier in Figure 13-46? (b) IF, opens, what is the ootput voltage? What does the outpat voltage represent? Figure 1 K, Vi #1 Vo—NWA- ona Re Vyo= 15 V okt wore | fon fs Moar V=05 Vo Solution Since the input resistors are equal, R = 100 KO. Ry = Re. R (8) Vour = =p (Vin + Vira +7" + Vis) 2040 1 fisv) foun (Yt ESV + 05V +2V +3V)=—(8V) = —16¥ 20K 1 ©) Voor =~ Tog gg (LY + SV + 05V + 3V) = —5(6V) = -12V 1.2.Vis the average of five voltages with the 2.V input replaced by 0 V. Notice that the output is not the average of the four remaining input voltages. Related Problem If Ris open, as was the case in this example, what would you have to do to make the ‘output equal to the average of the remaining four input voltages?676 = BASIC OP-AMP CIRCUITS Multisim Troubleshooting Exercises ‘These file circuits are inthe Troubleshooting Exercises folder on your CD-ROM. 1. Open file TSE13-01. Determine if the circuit is working properly and, if not, deter ‘mine the faut 2. Open file TSET3-02. Determine ifthe circuit is working properly and, if not, deter ‘ive the fault. 4. Open file TSE13.03. Determine ifthe circuit is working properly and, if not, deter- mine the fault. 4. Open file TSEL3-04, Determine ifthe circuit is working properly and, if not, deter- ‘mine the fault |S. Open file TSE13-05. Determine if the circuit is working properly and, if not, dever- ‘mine the fault. 6. Open file TSE13-06, Determine ifthe circuit is working properly and, if not, €eter~ ‘mine the fault 7. Open file TSE13-07. Determine ifthe circuit is working properly and, if not, deter mine the Fault 8, Open file TSE13-08. Determine ifthe circuit is working properly and, if not, deter- ‘mine the faul. 9. Open file TSE13-09. Determine ifthe circuit is working properly and, if not, deter- ‘mine the faul. f= 1ON REVIEW 1. Describe one type of intemal op-amp failure, 2. Ifa certain malfunction is attributable to more than one posible component failure, what would you do to isolate the problem? | signal into digital form forreconding. You voltage applied to the iample-and-hold ‘were ntiodvced to one methed of AID creut At fed intervals, ample pues | comenion inthis chapter, called the cause the instantaneous amplitude ofthe | soitaneous,erflsh, method. There are audio waveform to be converted to | several other methods of AID conversion, proportional dc levels that ae proceed and this nstem application wera method _ by the ret ofthe cuts nd represented called dualaloge Although many pars of | by series of digital codes. thi nptem are dial, you wl focus on “The sample pues occur at much pee) | the ADC cruitboad which incomporates higher frequency than the audio signal so \ypes of op-amp circuit wth which you thats sient numberof point: on the fee) are fori aio waveform are sampled and / i eaeciaes cute se erga | Basi Operation ofthe System | representation ofthe auc signal. A |The alslope ADC in Figure 3-47 rough approximation ofthe sampling This application imolves an analog-te- accepts an audio signal voltage and proces isihtated in Figure 13-48. As digital converter (ADC) thats used in a | converts it to a series of digital codes for the fiequency ofthe sample pues, recording pte erchangngthe uo the prpowe cecadng The ada ial | ineeser ate toe nd ens,SYSTEM APPLICATION = 677 lock pulses fe ee Ati gl sampl-aa-bo| | fF gueesin Ramp i LL ise Te | emer = ol lectonic siteh control Digi conta [tof ned count peo ee WURE 13-47 = Block diogram of dual slope analog-to-cligtal converter Andi Digital cue v0 processing aad recon ccs Serpe an | Tol output | PE ae FIGURE 13-48 stration ofthe semple-and-held process. The output of the ample-and-hald cut shown as 9 rough approximation of the aucko voltage for simplification,678 = BASIC OP-AMP CIRCUITS. an increasingly accurate representation switches to its negative saturated output | Label a copy the board with achieved. voltage and diabes the gate so that there component and inptlcutput designations The summing amplifier has erly one aren addtional clock pubes to the in agreement wth thereat. input active ata time. Forexample, when counter At ths time, the digital code in ‘the audio inputs switched i, the the counter proportional tothe time Analysis ofthe ADC Circuit reference voltage input 2010 and | that was requted forthe negatne-going vice vena ramp atthe itepator output to reach Determine the gin ofthe summing During the time between cach 2ero fom its maximum value. The cade in| ample. sample pute, the de level fom the the counter will vary foreach diferent bs a rt somple-and-hold circuit is switched sampled value ofthe audi Dclerie regore ie eva, ramp in vols per microsecond when 2 icon ering Tact can ese me Serre ic aren Peele eo ee of the summing amplifier goes to the dependent on the sampled value ofthe | ore enero eae ee oe tae at erase eee ear meeare eea a eee Astin nate couning, | Daowhags ecaebeMNCSOn | Sng eeceneuncn Resa ee ree ee ee eee ee ene eee ramp voltage with a slope that depends recorded. pedis ore Ape eA ath eae oS ia dual-slope output of the integrator iat telat certo) Bis commenion prvews fer och when an instantaneous audio voltage of ‘voltage. At the end of the fixed time | campled value is repeated many times Pre a ital the ample atthe apt | dng te ped ft gt uo re preees caea | ea caer ge a ee pees thatis proportional to the sampled recorded accurately. The result ic 2 voltaga to be sampled & +6, eee eee Set Ted eee ae eae een ees SEnuipttcterpanc | Rage iain ipo er | pottdemtentincere ute reference voltage input (Vier) and resets several sampled values. In this application, 100 samples per cycle. What is the te gal cater ae | fueieconteADCeruch” pl fn the aaa eee ear oe cee aio sepinedorrervoog dope gaan compan —s ‘eto the integrater input, which starts 2 negative-going ramp onthe integrator ‘output. This ramp vltage hasa slope that 1 Develop a step-by-step set of instructions on how to check the ADC. prets teeta sete, | Mec egaee Garey | cake m ee aae ica is emeeerc | cco eee eae erie es Saree on soa rencae apt nee | bee eae en pee ea cerca || the integrator output reaches zero volts. power transistors is shown for reference. a a pee giie! | ohentecenen tie yitinie” whan tend oe ramp reaches zero, the comparator | datker toc component flores,‘Troubleshooting Faults hive developed in thee beards Based on the test bench measurements for each booed with specified tet signals applied a indicated in Figure 13-52, determine the mot ikely ful in each cae, The ciled numbers indicate test point connections to the circut board. ‘Assume that each board has the proper de swpely voltage. Fil Repot (Options) Sebo ral wren report on the ADC teenie incest flloing 1. A physical description of the circuit 2. Adicunion of the operation of the circuit, 3. Alistof the specifications Surple Held Sample A ponionof Ssample-and old cout Sample Hold Inervats tena proportional to sempled ere Arigure 13-49 Fei ime Tied time iment SYSTEM APPLICATION = 679 4. Alls of pats with part eumbers i amailable, 5. Alistof the types of problems on the Uhre foulty circuit boards. 16. Adesctiption of how you determined the problem on each of the faulty ‘rcuit board. During the fixed time interval ofthe postve-going amp, the sampled audio input i applied to the Integrator During the variable time itera ofthe fied-lope negative-going ramp, the reference voltage applied to the integrator. The counter controk the fixed time intenal ad i reset. Another ‘count begins during the variable time interval, and the digital code in the counter atthe end ofthis interval represents the sampled audio value,680 = BASIC OP-AMP CIRCUITS (SISISISTNIS) A riGURE 13-50 ‘nalog-to-digital converter (ADC) board. = : ; vee ol is Lan & “Veer (hone 12 Xo) an fa nh [ee al 87 | ae oe OE yf HS utp i em a A FIGURE 13-51 Schematic ofthe ADC.ICATION = 681 412d -12Vde—} AFiGuRE 13-52 Test results fo three faulty ADC boards,682 © BASIC OP-AMP CIRCUITS Stn Solo eRe AU LES COMPARATORS Zero-level detector Ina up m Referee vr Input De. Noncero-level detector i Reo Comparator with hysteresis ? Woy Ve) +00V Vena We2 607 V) Bounded comparator Unity-gain amplifier: %, Voss + Veo + Vag t= Vo) Averaging amplifier: cae 4 Visa + Vi +" + Vow) Sealing adder:KEYTERMS © 683 SUMMARY OF OP-AMP CIRCUITS, continued INTEGRATOR AND DIFFERENTIATOR K © : heal 1 Output volage: oan 7 : Vou =("E}Ryc Slope of outpu voltage: ri War Vin \ ar ORE Iegrouor igjerentitor (errata ad = I an op-amp comparaier, when the input voltage exceeds a specified reference voltage, the ‘ouput changes sate ‘© Hysteresis gives an op-amp noise immunity. ‘A comparator switches to one state when the input reaches the upper trigger point (UTP) and ‘back tothe other state when the input drops below the lower trigger point (LTP). ‘The difference between he UTP und the LTP isthe hysteresis voltage, Bounding limits the output amplitude ofa comparator. ‘The output voltage of a summing amplifiers proportional t the sum ofthe input voltages. An averaging amplifier isa summing amplifier with a closedToop gain equal to the reciprocal of the numberof inputs Ina scaling odder, a different weight can be assigned to each input, thus making the input contribute more or contribute les othe output Integration is a mathematical process for determining the area under a curve. Integration of a step produces a ramp with a slope propetional to the amplitude. Differentiation isa mathematical process for determining the rate of change of function. Differentiation of a ramp produces a step with an amplitude proportional tothe slope. (I er acter bos te in the chaptrave defined in the endot-book ony Bounding The process of fimiting the output range of an amplifier or other cite Comparator A circuit that compares two input votes and produces an outpt ineither of two states indicating the greater than or less than relationship of the inputs. Differentiator A circuit that produces an output which approximates the instantaneous rte of change ‘of the input Fuetion. Hysteresis Characteristic ofa circu in which two different rigger levels create an offset org in the switching action Integrator A circuit that produces an output which approximate the urea under the curve ofthe in- put function, ‘Schmit trigger A comparator with hysteresis ‘Summing amplifier An op-amp configuration with two or more inputs that produces an cup volt- ‘age that is proportional to the negative ofthe algebraic sum of its input voltages689 = BASIC OP-AMP CIRCUITS. GG Comparator Rk wt Vaan gg Vane) Upper tigger pone hy 2 Vg y(n) Lower tiger Pint 133 Vine™ Vern ~ View Fyseresisvoluge Summing Amplifier 134 Vour= Waa + Vaat + Vi) ring er By, 135 Vow = (Vim + Va #294 Vow) ‘Ader with sin 16 Sealing der with in Integrator and Differentiator na Interter otpt rt of change Diferenitr capt voge Bs ‘with ray ae = CTRL seven ae a the end ofthe capt is Bs 1 9. 0. LER, opens in the comparator of Figure 1 (a) increase (b) decrease —_(€) not change Inthe trigger circuit of Figure 13-9, if Ris decrease to SO KO, the upper tigger point voltage will (@) increase (b) decrease (e) not change [te zener diodes in Figue 13-13 are changed to ones with a rating of 5.6 the output voltage amplitude will (2) increase (b) decrease (€) not change te top resistor in Figure 13-22 opens, the output voltage will (a) increase (b) decrease (@) not change I Vga is changed to —1 V in Figure 13-22, the ouput voltage will (a) increase (b) decrease —_() not change I Vy is increased to 0.4 V and Vigo is reduced to 0:3 Vin Figure 13-23, the eutput voltage will (a) increase (b) decrease) not change WV is changed to ~7 V in Figure 13-24, the ouput voltage will (a) increase () decrease (€) not change ICRyin Figure 13-25 opens, the ouput voltage will (a) increase (hb) dectesse —_(€) not change If the vale of C in Figure 13-35 is reduced, the frequency of the output waveform will (a) increase (b) decrease (€) not change the frequency of the input waveform in Figure 13-39 is increase, the amplitude ofthe ‘output voltage wi (a) increase (b) decrease (€) not changeSELF-TEST = 685 EE rc or tthe end te chops 2 2 10, 1. 2, 1 4 1 Ina zero-Jevel detector, the output changes state when the input (2) is positive (b) ispepative —(€) crosses zero (€) has a 7er0 rate of change “The 0r0-lvel detectors one pplication of 8 (a) comparator) differenistor —(@) summing amplifier (@) diode [Noise on the input of » comparator can cause the output to (4) hang up in one state () gorore10 () change back and forth erratically between two states (2) produce the amplified noise signal J. The eflects of noise can be reduced by (4) lowering the ply voltage _(b) using positive feesiback (© sing negative feedback —_(@) using hysteresis () answers (b) and (@) 5. A comparator with hysteresis (4) has one tigger point (b) has two trigger points () has a variable trigger point (@) is ike a magnetic circuit In a comparator with hysteresis, (a) bias voltage is applied between the two inputs (b) only one supply voltage is used (©) aponton ofthe output is fed ack tothe inverting input (@) 2 portion ofthe output is fed back to the noninverting input ‘Using output bounding in coenparator (a) makes i taser (b) keeps the output postive () Timits the extpet levels (@) stabilizes te output 3. A summing amplifier can have (2) only one input (b) only twoinputs —_(€) any number oF Inputs Ie the voltage gain for each input of summing amplifier witha 4.7 K2 feedback resistor is ‘unity, the input resistors must have a value of (@ 47k (b) 47 KO divided by the number of inputs (©) 4.7 KO times the number of inputs ‘An averaging amplifier has five inputs. The ratio R/R, must be @s @02 ot Ina scaling adder, the input resistors are (4 allthe same value (by all of different values (©) cach proportional tothe weight of its input (@) related by a factor of two Iman integrator, the feedback element isa (a resistor (b) capacitor (€) zenerdiode _(@) voltage divider For a step input, the outpt of an integrator is ) apulse —(b) atviangular waveform —(€) aspike (@) aramp ‘The rate of change ofan integrator's output voltage in response toa step input is set by (a) the RC time constant () the amplitude ofthe stp input () the current through the capacitor (all of these Ina ciffercntiotr, the feedback element is 3 (a) resistor (b) capacitor (€) zenerdiode (@) voltage divider686 = BASIC OP-AMP CIRCUITS. 16, The output ofa differentiator is proportional to (2) the RC time constant (b) the rate at which the input is changing (© the amplitude of the input (@) answers (a) and (6) 117, When you apply a wiangular waveform to the input ofa differentiator, the eutput is (@) adctevel (6) an inverted triangular waveform (©) asquare waveform (@) the frst harmonic of the triangular waveform fprosiems | Answers to all odd-numbered problems are at the end of the book. BASIC PROBLEMS ~ SECTION 13-1 Comparators 1A certain op-amp has an open-loop gin of 80,000, The maximum serrated utp levels of this particular device sre +12 V when the de supply voltages are +15 VIPs diferenial voliage of (0.15 mV mss applied between the inputs, what i the peak-to peak Value ofthe output? 2, Determine the output leel (maximum postive or maximum negative) for each compardor in Figue 13-53, FIGURE 13-53 wi Yar Voxr in aol 3. Calulte the Vir and Vpn Fgute 13-54, Vag 4. What i the hysteresis voltage in Figure 13-54? » Figure 13-54 D Multi fe reutsae ented Vn with a CD loge ard aren the Problems folder on your CD-ROM. Filenames comespond to figure ann umber (eg, F13-54). [5 Draw the output voltage waveform foreach circuit in Figure 13-55 with respect to the input. Show voltage levels FIGURE 13-55 sty @