Scribd
Upload
825 views

4 Bit Adder Subtractor

The document describes experiments conducted to study and verify the truth tables of half adders, full adders, 4-bit adders, and subtractors using a TINA simulator. Circuits are shown and observations are recorded in truth tables for each component, with the theoretical and observed values matching in each case. The experiments successfully verified the functionality of the half adders, full adders, and 4-bit adder/subtractor circuits.

Uploaded by

Bivey
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
825 views

4 Bit Adder Subtractor

The document describes experiments conducted to study and verify the truth tables of half adders, full adders, 4-bit adders, and subtractors using a TINA simulator. Circuits are shown and observations are recorded in truth tables for each component, with the theoretical and observed values matching in each case. The experiments successfully verified the functionality of the half adders, full adders, and 4-bit adder/subtractor circuits.

Uploaded by

Bivey
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 15

USMAPHP512 - Lab Report

2021 – 22

Analog and Digital Electronics

Experiment: Studying Half Adder, Full Adder,


4 Bit-Adder and Subtractor

Submitted by: Yogeshwar Singh Submitted to: Mr. Kartikeyan Subbu


Roll No: B-023 Submitted on: 16 July 2021
SAP ID: 40312190339
0.1 Experiment: - Studying Half Adder, Full Adder, 4 Bit-Adder and Subtractor

Aim
To study and verify the truth table of Half Adder, Full Adder, 4 Bit-Adder, Subtractor

Apparatus (Virtual)
TINA simulator

Theory
In Digital Circuits, A Binary Adder-
Subtractor is one which is capable of
both addition and subtraction of binary
numbers in one circuit itself. The
operation being performed depends
upon the binary value the control signal
holds. It is one of the components of
the ALU (Arithmetic Logic Unit).

A 4 Bit Adder-Subtractor circuit illustration The Arithmetic micro-operations like


addition and subtraction can be
combined into one common circuit by including a NOR gate with each full adder.

Principle
In the circuit we set mode control such that when the mode control is zero, addition is
performed and subtraction is performed when the mode control is one. We use XOR gates to feed
the input so that when mode control is one, the complement of each of the four bits are fed and
when mode control is zero, the input as such is fed.

In 1’s complement subtraction, the complement of the subtraction is taken and added with the
other number. The final carry is then added to the LSB of the result. In case there is no carry, the
complement of the result is taken and this will be a negative number. This indicates that,
subtraction is performed from a smaller number.
1.1 Half Adder

Circuit Diagram

Observation (Truth Table)

A B SUM CARRY A B SUM (V) CARRY (V)

0 0 0 0 0 0 0.2 0.2
0 1 1 0 0 5 3.4 0.2
1 0 1 0 5 0 3.4 0.2
1 1 0 1 5 5 0.2 3.4

Theoretical Observed

Case 1
Case 2

Case 3

Case 4
1.2 Full Adder

Circuit Diagram

Observation (Truth Table)

Theoretical

A B C SUM CARRY
0 0 0 0 0
0 1 1 1 0
1 0 0 1 0
1 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
Observed:

A B C SUM (V) CARRY (V)


0 0 0 0.2 0.2
0 0 5 3.4 0.2
0 5 0 3.4 0.2
0 5 5 0.2 3.4
5 0 0 3.4 0.2
5 0 5 0.2 3.4
5 5 0 0.2 3.4
5 5 5 3.4 3.4

Case 1

Case 2
Case 3

Case 4

Case 5
Case 6

Case 7

Case 8
1.3 4 Bit Adder

Circuit Diagram

Observation (Truth Table)

Cin A B SUM CARRY


A3 A2 A1 A0 B3 B2 B1 B0 S3 S2 S1 S0 Cout
0 1 0 1 0 1 0 1 0 0 1 0 0 1
0 0 0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 1 1 0 0 1 1 0 1 1 0 0
0 0 1 1 1 0 1 1 1 1 1 1 0 0
0 0 1 0 1 0 1 0 0 1 0 0 0 0
0 1 0 0 0 1 0 0 0 0 0 0 0 1
0 1 1 0 1 1 1 0 1 1 0 1 0 1
1 1 1 1 1 1 1 1 1 1 1 1 1 1
Case 1

Case 2

Case 3
Case 4

Case 5

Case 6
1.4 4 Bit Subtractor

Circuit diagram

Observation (Truth Table)

Cin A B DIFFERENCE CARRY


A3 A2 A1 A0 B3 B2 B1 B0 S1 S2 S3 S4 Cout
1 0 0 0 0 0 0 0 0 0 0 0 0 1
1 1 1 0 1 1 0 0 1 0 1 0 0 1
1 1 1 1 1 0 1 0 1 1 0 1 0 1
1 0 1 1 0 1 1 1 0 1 0 0 0 0
1 0 1 1 1 1 0 1 0 1 1 0 1 0
0 0 1 0 1 1 0 1 0 0 1 0 1 0
Case 1

Case 2

Case 3
Case 4

Case 5

Case 6
Result:
• The observed truth tables of Half Adder and Full Adder match the theoretical
values and hence are verified.
• The 4-bit Adder and Subtractor can be used to add or subtract any two 4-bit binary
numbers.

You might also like