RF Transistors

Data Book
1997
Conventions Used in Presenting Technical Data
Nomenclature for Semiconductor Devices According to Pro Electron
The part number of a semiconductor device consists of two letters followed by a serial number.

For example:
B F 470

Material Function Serial number

The first letter provides information about the material P DIODE: Radiation sensitive
used for the active part of the devices.
Q DIODE: Radiation generating
A GERMANIUM
R THYRlSTOR: Low power
(Materials with a band gap 0.6 - 1.0 eV) 1)
S TRANSISTOR: Low power, switching
B SILICON
(Materials with a band gap 1.0 - 1.3 eV) 1) T THYRISTOR: Power
C GALLIUM–ARSENIDE U TRANSISTOR: Power, switching
(Materials with a band gap > 1.3 eV) 1) X DIODE: Multiplier, e.g., varactor, step recovery
R COMPOUND MATERIALS Y DIODE: Rectifying, booster
(For instance Cadmium-Sulfide)
Z DIODE: Voltage reference or voltage regulator,
The second letter indicates the circuit function. transient suppressor diode
A DIODE: Detection, switching, mixer The serial number consists of:
B DIODE: Variable capacitance D Three figures, running from 100 to 999, for devices
C TRANSISTOR: Low power, audio frequency primarily intended for domestic equipment

D TRANSISTOR: Power, audio frequency D One letter (Z, Y, X, etc.) and two figures running from
10 to 99 for devices primarily intended for profes-
E DIODE: Tunnel sional equipment
F TRANSISTOR: Low power, high frequency A version letter can be used to indicate a deviation of a
G DIODE: Oscillator, miscellaneous single characteristic, either electrically or mechanically.

H DIODE: Magnetic sensitive The letter never has a fixed meaning, the only exception
being the letter R, indicating reversed voltage, i.e.,
K HALL EFFECT DEVICE: collector to case.
in an open magnetic circuit
The codes for semiconductors given above are used only
L TRANSISTOR: for types which are registered at Pro Electron. Some
Power, high frequency types have a designation code (JEDEC):
M HALL EFFECT DEVICE: 1N with two-digit to four-digit number means diode
in a closed magnetic circuit
2N with two-digit to four-digit number means tran-
N PHOTO COUPLER sistor

1) The materials mentioned are examples

2 TELEFUNKEN Semiconductors
26-Feb-97
Polarity Conventions
The voltage direction is given either: Polarity conventions for devices with three or more
terminals.
D By an arrow which points out from measuring to refer-
ence point, or The following rules are valid:
D By a double subscript, whereby the first subscript is Current arrows are always directed towards the device.
termed as the measuring point, the second subscript as
Voltage arrows are selected according to the basic config-
the reference point (figure 1).
uration, i.e., the common electrode, for the input and the
A A A output, is chosen as the reference point.
Example: NPN transistor in common-emitter, common-
base and common-collector configuration (figures 3a
V1 VAB V2=–V1=VBA=–VAB to 3c).

IC
B B B 94 9315
IB
Figure 1. VCE

The numerical value of the voltage is positive, if the po- VBE

IE
tential at the arrow tail is higher than at the arrow head,
i.e., the potential difference from measuring (A) to refer- a)
ence (B) point is positive. 95 10138

The numerical value of the voltage is negative if the po-

tential at the arrow tail is lower than at the arrow head, i.e., IE
the potential difference from measuring to reference
point is negative. IB
VEC
In case of alternating voltages, once the voltage direction
is selected, it is maintained throughout. The alternating VBC
character of the quantity is given with the time-dependent IC
change in sign of its numerical values. b)
95 10139
The current direction is given by an arrow head drawn on
the line (figure 2).
IE IC
A I1 B A I2 = –I1 B

VEB VCB
95 11216

Figure 2. IB
c)
The numerical value of the current is positive if the charge
95 10140
of the carriers moving in the direction of arrow is positive
(conventional current direction), or if the charge of the Figure 3.
carriers moving against this direction is negative.
Polarity conventions for two-port network are as shown
The numerical value of the current is negative if the
in the figure 4.
charge of the carriers moving in the direction of arrow is
negative, or if the charge of the carriers moving against
this direction is positive.
The general rules started above are also valid for alternat-
ing quantities. Once the direction is selected, it is
maintained throughout. The alternating character of the
quantity is given with the time-dependent change in sign
of its numerical values. Figure 4.

TELEFUNKEN Semiconductors 3
26-Feb-97
Transistor Equivalent Circuit
Transistor characteristics can be explained with an equiv- Yce = gce + j w Cce
alent circuit whose circuit elements (in contrast to
and
four-pole coefficients) are considered constant over a
wide frequency range. These parameters are highly bias- A = 1 + (Yb’e + Yb’c) rbb’
and temperature-dependent. Therefore, the static condi-
it is possible to obtain the y-parameters (admittance coef-
tions must be known completely.
ficients) in common-emitter configuration:
The hybrid-p equivalent circuit developed by Giacolleto
is a useful representation of certain transistor types, as its Y ie +Y11e + A1 (Y Ȁ ) Y Ȁ )
be bc

parameters may be considered to be frequency-dependent

such as f < 0.1 fT. Y re +Y12e + – A1 Y Ȁ bc

With
Y fe +Y21e + A1 (g –Y Ȁ )
m bc
Yb’e = gb’e + j w Cb’e

Yb’c = gb’c + j w Cb’c Y oe +Y 22e + A1 r ȀY Ȁ (g –Y Ȁ ) ) Y Ȁ ) Y

bb bc m bc bc ce

Cb’c 95 10141

Ib rbb’ b’ Ic
b c
g
b’c
Cb’e Cce
Vbe gb’e Vb’e Vce
gce

gmVb’e
e

Figure 5.

4 TELEFUNKEN Semiconductors
26-Feb-97
Arrangement of Symbols
Letter symbols for current, voltage and power (accord- As subscripts, capital letters are used for the designation
ing to DIN 41 785, sheet 1). of static (dc) values, while lower case letters are used for
the designation of small-signal values.
A system of basic letter symbols is used to represent cur-
rent, voltage and power. Capital letters are used for the If more than one subscript is used (hFE, hfe), the letter
representation of peak, mean, dc or root-mean-square symbols are either all capital or all lower case.
values. Lower case letters are used for the representation
of instantaneous values which vary with time. If the subscript has numeric (single, double, etc.) as well
as letter symbol(s) (such as h21E or h21e’), the differenti-
As subscripts, capital letters are used to represent continu- ation between static and small-signal value is made only
ous or total values, while lower case letters are used to by a subscript letter symbol.
represent varying values.
Other quantities (values) which deviate from the above
The following table summarizes the rules given above.
rules are given in the list of letter symbols.
The following table summarizes the rules given above.
Basic Letter
Lower-case Upper-case
Instantaneous values Maximum (peak) Basic Letter
which vary with time average (mean) Lower-case Upper-case
continuous (dc) or
root-mean-square (RMS) Electrical parameters Electrical parameters of
values inherent in the semicon- external circuits and of
ductor devices except circuits in which the
inductances and capaci- semiconductor device
tances forms only a part; all
Subscript(s) inductances and capaci-
Lower-case Upper-case tances
Varying component Continuous (without
alone, i.e., instantaneous, signal) or total
root-mean-square, maxi- (instantaneous, average or Subscript(s)
mum or average values maximum) values
Lower-case Upper-case
Small-signal values Static (dc) values
Letter symbols for impedance, admittances, two-port
parameters
Regarding impedance, admittance, two-port parameters, Examples:
etc., capital letters are used for the representation of exter- RG Generator resistance
nal circuits of which the device is only a part. Lower case GP Power gain
letters are used for the representation of electrical param- hFE DC forward current transfer ratio in common
eters inherent in the device. emitter configuration
rP Parallel resistance, damping resistance
The rules are not valid for inductance and capacitance.
Both these quantities are denoted with capital letters.

TELEFUNKEN Semiconductors 5
26-Feb-97
Example of use of symbols
according to 41785 and IEC 148

a) Transistor

Icm IC dc value, no signal

AC value ICAV Average total value
Ic ICM; IC Maximum total value
ICEFF RMS total value
IC; ICEFF RMS varying component
Icav ic
Collector ICM; IC Maximum-varying
current component value
ICAV iC Instantaneous total value
iC Instantaneous varying
ICM component value
IC
iC
The following relationships are valid:

ICM = ICAV + Icm

without signal with signal t
93 7795 iC = ICAV + ic

Figure 6.

b) Diode

VF

VFSM VF Forward voltage

VR Reverse voltage
VFRM VFSM Surge-forward voltage
VFWM (non-repetitive)
VRSM Surge-reverse voltage
(non-repetitive)
VFRM Repetitive peak
forward voltage
0
VRRM Repetitive peak
t reverse voltage
VFWM Crest-working
VRWM forward voltage
VRRM VRWM Crest-working
reverse voltage
VRSM

VR
93 7796

Figure 7.

6 TELEFUNKEN Semiconductors
26-Feb-97
Symbols and Terminology
AQL
Acceptable Quality Level (see chapter ”Quality Data”)
C 22b + C + j1w Im (y
ob ob )

B, b Coe
Base, base terminal Short-circuit output capacitance in common-emitter con-
figuration.
C, c
Collector, collector terminal C 22e + C + j1w
oe Im (y oe)
C
Capacitances Coss
Output capacitance in common-source configuration
The transistor equivalent circuit (see chapter ”Transistor
Crss
Equivalent Circuit”) shows the different capacitances in
Feedback capacitance in common-source configuration
a transistor. Additionally, there are capacitances between
terminals, inside as well as outside the case. All these ca- Crb
pacitances have its effect only at high frequencies. Here, Feedback capacitance in common-base configuration
the actual operating capacitances are important, but not
the equivalent circuit capacitances. They can be best ex- C rb + C + j1w Im (y )
12b rb

plained with y-coefficients.

Cre
Ci Feedback capacitance in common-emitter configuration

+ C + j1w Im (y )
Short-circuit input capacitance C11 = Ci
It is an imaginary part of the short–circuit input admit- C re 12e re
tance y11 (= yi) divided by a factor jw.
Additional capacitances are given in the data sheet. They
The values of capacitances are circuit-configuration de-
can be deducted from the direct measurements given be-
pendent; therefore, a further subscript (e, b or c) is added
low.
with the concerned capacitance to designate the orienta-
tion. Ccb
Capacitance between collector and base without parasitic
Cib capacitances
Short-circuit input capacitance in common-base configu-
ration CCBO
Capacitance between collector and base with open emit-
C 11b + C + j1w Im (y )
ib ib
ter. It can be measured by applying reverse bias to its
terminals.
The following relationship is also valid:
[C [C
Cie
Short-circuit input capacitance in common-emitter con- C CBO oe ob
figuration
(Different configurations, but approximately the same
C 11e +C +
ie
1 Im (y )
jw ie
values)
Ceb
Cissg1 Capacitance between emitter and base without parasitic
Gate 1-input capacitance in common-source configura- capacitances
tion CEBO
Capacitance between emitter and base having an open
Cissg2
collector. Measurement is carried out by applying reverse
Gate 2-input capacitance in common-source configura-
bias to its terminals
tion
Co
The following relationship is also valid:
[C [C
Short-circuit output capacitance
C EBO ie ib
Cob
Short-circuit output capacitance in common-base config- (Different configurations, but approximately the same
uration values)

TELEFUNKEN Semiconductors 7
26-Feb-97
CL Frequency by which the power gain of a transistor as-
Load capacitance sumes the value of one due to conjugately matching of
input and output.
Cp
Parallel capacitance fT
Case capacitance Gain bandwidth product, transition frequency
D The product of the modulus of the common-emitter,
Drain small-signal short-circuit forward current transfer ratio,
and the frequency of measurement fM. This frequency is
diM chosen because hfe decreases at a slope of approximately
Signal-to-intermodulation ratio 6 dB per octave
E, e The associated angular frequency
Emitter
EL
wT +2 p f T

Inductive energy is defined as the reciprocal value of transit time minority

carriers through the base region
F
Noise figure g
Conductance
For a given frequency and bandwidth, the noise figure is
the ratio of the total noise power, p2, delivered to the out- G, g
put termination, to the portion (Gp p1) that is contributed Gate
by the input power, p1, given from the signal source GG
whose noise temperature is standard (T0 = 290 K) at all Generator conductance
frequencies
gi
F + Gp p
p
2

1
Short-circuit input conductance
gib
If this ratio is given in decibel, it is valid that: Input conductance in common-base configuration, short

+ 10 lg Gp p
circuit at output gib = Re (yib)
F 2
dB p 1 gie
Input conductance in common-emitter configuration,
The noise figure is given for a specified operating point, short circuit at output gie = Re (yie)
a specified generator (source) resistance and a specified
go
frequency or frequency range
Short-circuit output conductance
f
gob
Frequency
Output conductance in common-base configuration,
Fc short circuit at input gob = Re (yob)
Noise figure for mixer goe
fg, f–3dB Output conductance in common-emitter configuration
Cut–off frequency short circuit at input goe = Re (yoe)

fhfe Gpb
hfe-cut-off frequency Power gain in common-base configuration
(b-cut-off frequency, fb) Gpe
The frequency at which the modules of current amplifica- Power gain in common-emitter configuration
tion factor (hfe) has decreased below 0.707 times the Gps
frequency (1 kHz) Power gain in common-source configuration
fIM gr
Intermodulation frequency Short-circuit reverse conductance
fmax Gv
Maximum frequency of oscillation Unilateral gain

8 TELEFUNKEN Semiconductors
26-Feb-97
hFE Power gain

+ PP + G r |A |
DC forward-current transfer ratio in common-emitter
out 2
configuration Gp L in u
in

It is the ratio of the collector current, IC, to the base cur-

rent, IB, for specified values of VCE and IC.
+ G [h (h ) G )–hh
L
11 22 L
21

12
2

h 21] (h 22 )G )
L

The h parameters are the coefficients of two-port network

It is also denoted by the symbol B. equations given in hybrid form:
h V1 +h I )h V +h I )h
i 1 r 2 11 1 12 V2
The hybrid matrix is an arrangement of h parameters
+h I )h V +h I )h

ǒ Ǔǒ Ǔ
given as follows: I2 f 1 0 2 21 1 22 V2
hi

+ +
ǒǓ
hi hr h 11 h 12 Short-circuit input impedance
h hf ho h 21 h 22
hi +h +
11
V1
I1 V2 +0
These h parameters are used mostly in audio frequency Parameter values are circuit-configuration dependent;
range. They are valid only for a specified operating point therefore, a further subscript (e, b or c) is used to identify
and frequency. Usually, this frequency is 1 kHz and the the circuit configuration.
corresponding h parameters are having real values only.
hib
The following electrical characteristics can be calculated Short-circuit input resistance in common-base configura-
from the parameters mentioned above tion (small-signal value)
hie
Short-circuit input resistance in common-emitter config-
uration (small-signal value)
hr

ǒǓ
Open-circuit reverse-voltage transfer ratio

hr +h +
12
V1
V2 I1 +0
Figure 8.
hrb
Current amplification Open-circuit reverse-voltage transfer ratio in common-
base configuration (small-signal value)

Gi + II + hh )GG + 1 ) hh
2

1
21

22
L

L
21

22 IG L
hre
Open-circuit reverse-voltage transfer ratio in common-
emitter configuration (small-signal value)
Voltage amplification hf

ǒǓ
Short-circuit forward-current transfer ratio
+ VV + h
1 –h 21
) G )–h +h + +0
Gu I2
1 11(h 22 L 12 h 21 hf 21
I1 V2

Input resistance hfb

Short-circuit forward-current transfer ratio in common-

r in + VI + h
1

1
11 –
h 12 h 21
h 22 G L)
base configuration (small-signal value)
hfe
Short-circuit forward-current transfer ratio in common-
Output conductance emitter configuration (small-signal value)
This is the ratio of the alternating collector current, ic, to
g out + +
I2
V2
h h
h 22– 12 21
h 11 R G )
the alterning base current, ib, for small signals whose out-
put is short-circuited to a.c. This is also known as b.

TELEFUNKEN Semiconductors 9
26-Feb-97
In technical data sheets, this parameter is given with Collector-emitter, cut-off current, ICEO, and collector-
1 kHz sine wave for a specified operating point. This emitter voltage, VCEO, with open base, i.e., IB = 0
quantity is also known as the current amplification factor. ICEO
ho

ǒǓ
Open-circuit output admittance +

h0 +h +
22
I1
V 22 I1 +0
VCEO –

95 10143
hob
Figure 10.
Open-circuit output conductance in common-base con-
figuration (small-signal value) ICER
hoe Collector cut-off current, with a resistor RBE connected
Open-circuit output conductance in common-emitter between base and emitter
configuration (small-signal value) Collector-emitter cut-off current, ICER, and collector-
IB emitter voltage, VCER, having the resistance connected
DC base current between base and emitter. The appropriate value of RBE
referring to VCER is also given in the technical data
IBM sheets. For higher values of RBE, the values of VCEO and
Peak base current ICEO are valid.
IC ICER
DC collector current
ICBO
Collector cut-off current, with open emitter +
–
The cut-off current is the reverse current flowing through
RBE VCER
the junction(s) (base-emitter or base-collector) of a tran-
sistor. By applying reverse bias across its terminals, the
third terminal is open-circuited or otherwise specified. 95 10144

This is also known as leakage current.

Figure 11.
Collector-base cut-off current, ICBO, and collector-base
VCBO, with open emitter, i.e., IE = 0 A ICES
Collector cut-off current, short circuit between base and
ICBO
emitter
Collector cut-off current, ICES = ICBS, and collector-emit-
+ ter voltage,
VCES = VCBS, with base emitter short-circuited
–
ICES = ICBS
VCBO

+
95 10142
–
VCES =
Figure 9.
VCES

95 10145
ICEO
Collector cut-off current, with open base Figure 12.

10 TELEFUNKEN Semiconductors
26-Feb-97
ICEV IEBO
Collector cut-off current with reverse base-emitter volt-
age
Collector-emitter cut-off current, ICEV, and collector-
emitter voltage, VCEV, when the applied voltage between
base and emitter is reverse biased VEBO

ICEV
95 10148

+ Figure 15.
–
– ±IG1/2SM
VCEV
+ Gate 1/gate 2-source peak current
VEB
±IG1S/1SS
95 10146 Gate 1-source current

Figure 13.
±IG2S/2SS
Gate 2-source current
ICEX II
Collector cut-off current with forward base-emitter volt- Input current
age
IK
Collector-emitter cut-off current, ICEX, when the applied Short-circuit current
voltage between base and emitter is forward biased IQ
The value of the base-emitter voltage, VBE, is selected so Output current
that no appreciable base current flows. IS
Supply current
ICEX
K
Kelvin
+
l
–
Length, connecting lead length
VBE
Ls
Series inductance
95 10147
MA
Figure 14.
Tightening torque
m
ICM Degree of modulation
DC collector peak current
P
It is the maximum collector current with sine-wave opera- Power
tion, f ≥ 25 Hz, or pulse operation, f ≥ 25 Hz, having a Pl
duty cycle of tp/T ≤ 0.5 Input power
ID, IDSS Pq, PQ
Drain current Output power
IE Ptot
Emitter current Total power dissipation

IEBO It is the dispersion of the heat generated within a device

Emitter cut-off current, with open collector when a current flows through it. The permissible power
dissipation, Ptotmax, which is specified under absolute
Emitter-base cut-off current, IEBO, and emitter-base volt- maximum ratings, is a function of tjmax, tamb, RthJA and
age, VEBO, with open collector, i.e. IC = 0 RthJC. It is given as follows:

TELEFUNKEN Semiconductors 11
26-Feb-97
P tot max (amb) + t R –t
jmax

thJA
amb 0 K = –273.15°C
Unit: K (Kelvin)

or T
Temperature, measured in celsius
P tot max (package) + t R –t
jmax case Unit: °C
thJC t
If the safe-operation conditions as given in the data sheets Time
are observed, the power dissipation is limited (valid for Tamb
special packages). Ambient temperature
Pv If self-heating is significant:
Power dissipation, general Temperature of the surrounding air below the device un-
der conditions of thermal equilibrium
rbb’
Basic intrinsic resistance If self-heating is insignificant:
Air temperature in the immediate surroundings of the de-
RBE vice
Resistance connected between base and emitter
Tamb
rF Ambient temperature range
DC forward resistance
As an absolute maximum rating:
rf The maximum permissible ambient temperature range
Differential forward resistance
Tc
RG Channel temperature
Generator resistance Tcase
ri Case temperature
Input resistance The temperature measured at a specified point on the case
RL of a semiconductor device
Load resistance Unless otherwise stated, this temperature is given as the
rp temperature of the mounting base for transistors with
Parallel resistance, damping resistance metal can
td
ro
Delay time, see section “switching characteristics”
Output resistance
tf
RthCA Fall time, see section “switching characteristics”
Thermal resistance, channel ambient
tfr
RthJA Forward recovery time
Thermal resistance, junction ambient
Tj
RthJC Junction temperature
Thermal resistance, junction case
It is the spatial mean value of the temperature which the
s junction has acquired during operation. In the case of
Standing wave ratio (SWR) transistors, it is mainly the temperature of the collector
junction because its inherent temperature is maximum
S, s
Source TK
Temperature coefficient
|S 21e|
Forward transmission factor The ratio of the relative change of an electrical quantity
to the change in temperature (∆t) which causes it, under
T otherwise constant operating conditions
Period
tL
T Connecting lead temperature in holder at a distance I from
Absolute temperature, Kelvin temperature case

12 TELEFUNKEN Semiconductors
26-Feb-97
toff With a switched-off inductive-load connected test circuit
Turn-off time, see section “switching characteristics” as shown in fig. 16 (see next page), it is set in breakdown
position till the storage energy during switch-on has been
ton
discharged. This is when the ramp-shaped pulse current
Turn-on time, see section “switching characteristics”
inflow at collector has reached its zero value.
tp
Absolute maximum ratings of V(BR)CEO are defined with
Pulse duration
the test current, Itest, whereas the transistor has its lowest
tp breakdown voltage value
T
The breakdown voltage and collector inductance has
Duty cycle
been dimensioned so that the load of breakdown energy
tr is below the value of transistor failure
Rise time, see section “switching characteristics”
V(BR)CEV
trr Collector-emitter breakdown voltage at a defined reverse
Reverse recovery time voltage between base and emitter
ts V(BR)DS
Storage time, see section “switching characteristics” Drain-source breakdown voltage
tsd V(BR)EBO
Soldering temperature Breakdown voltage, emitter-base, open collector
Maximum permissible temperature for soldering with a V(BR)ECO
specified distance from case and its duration. Refer to sec- Breakdown voltage, emitter-collector, open base
tion “soldering instructions”
±V(BR)G1SS
Tstg Gate 1-source breakdown voltage
Storage temperature range
±V(BR)G2SS
The temperature range at which the device may be stored Gate 2-source breakdown voltage
or transported without any applied voltage
VCB
VBB Collector-base voltage
Base supply voltage
VCBO
VBE Collector-base voltage, open emitter
Base emitter voltage
Generally, reverse biasing is the voltage applied to any of
VBEsat the two terminals of a transistor in such a way that one of
Base saturation voltage the junctions operates in reverse direction, whereas the
The base-emitter saturation voltage, VBEsat, is the base- third terminal (second junction) is specified separately
emitter voltage which belongs to the collector-emitter VCC
saturation voltage, VCEsat Collector supply voltage
V(BR) VCE
Breakdown voltage Collector-emitter voltage
Reverse voltage at which an increase in voltage results in VCEO
a sharp rise of the reverse current. It is given in the techni- Collector-emitter voltage, open base
cal data sheets for a specified current
VCER
V(BR)CBO
Collector-emitter voltage with a resistor RBE connected
Breakdown voltage, collector-base, open emitter
between base and emitter
V(BR)CEO
VCES
Breakdown voltage, collector emitter, open base
Collector-emitter voltage, short circuit between base and
Measurements with pulsed current collector source emitter

TELEFUNKEN Semiconductors 13
26-Feb-97
 96 11935

IC
V S2 + 10 V IC measure
IC LC
IB
V S1 + +
0 to 30 V VCE
5V
V(BR)CEO
3 Pulses V(BR)CEO
I(BR)R
tp
+ 0.1 100 mW

+ 10 ms
T
tp

Figure 16.

IC Second breakdown Onset of second breakdown

IC

IB VCE IE = 0
IB > 0
IB = 0
VBE
First breakdown

IE IB<0

95 10246

[
VCEOmax V(BR)CEO V(BR)CEV VCE
V(BR)CBO

Figure 17. Typical voltage-breakdown behaviour of a transistor

14 TELEFUNKEN Semiconductors
26-Feb-97
VCEsat
Saturation voltage, collector emitter
IC
The collector saturation voltage is the dc voltage between
collector and emitter for specified saturation conditions.
IB is given
The saturation voltage VCEsat is given: IC ’
a) For a specified value of IC where the base-emitter given IC
voltage equals the collector-emitter voltage, i.e.,
VCB = 0 V

IC VCB = 0
VCE
95 10198 VCESat VCE = 1 V

Figure 20.
given IC

VCEsatHF
Collector-emitter HF saturation voltage
VCEV
Collector-emitter voltage, with reverse base emitter volt-
VCE age
95 10196 VCESat
VDS
Drain source voltage, maximum
Figure 18.
VEBO
b) For a specified value of IC and IB where the oper- Emitter-base voltage, with open collector
ating point is in the saturation region, i.e., VF
VCE < VCB Forward voltage
Emitter-base voltage due to the flow of the forward cur-
rent at emitter-base juction
IC VCB = 0
VG1S(OFF)
Gate 1-source cut-off voltage
IB is given VG2S(OFF)
Gate 2-source cut-off voltage
given IC
VHF
RF voltage, RMS value
VHF
RF voltage, peak value
Vn
VCE
Noise voltage (RMS value)
95 10197 VCESat
VR
Reverse voltage
Figure 19.
Voltage drop which results from the flow of the reverse
current
c) For a specified value of the characteristic curve
(IB const.) which intersects the curve point An external voltage applied to a semiconductor PN or NP
IC’ = K Ic (K = 1.1) and a specified value of the junction to reduce the flow of current across the junction
collector-emitter voltage (VCE = 1 V) and thereby widen the depletion region

TELEFUNKEN Semiconductors 15
26-Feb-97
Vs y re + |y | exp 
+g )j  C
re re
Supply voltage re re

VT yf

ǒǓ
Voltage due to temperature Short-circuit forward-transfer admittance

+y +
y
+0
I2
The admittance matrix is an arrangement of y parameters yf

ǒ Ǔ+ǒ Ǔ
21 V2
V1
given as follows:
|y fb|
y + yi yr
yf yo
y 11 y 12
y 21 y 22 Short-circuit forward-transfer admittance in common-
base configuration (small-signal value)
y parameters are the coefficients of two-port network y fb + |y | exp 
fb fb
equations given in admittance form:
+y V )y +y )y
Short-circuit forward-transfer admittance in common-
I1 V2 V1 V2 emitter configuration (small-signal value)
+
i 1 r 11 12

I1 +y V )y
i 1 r V2 +y 11 V )y
1 12 V2 y fe
|y fs|
|y fe| exp  fe

Yi Short-circuit forward admittance in a source configura-

ǒǓ
tion at a given operating point and frequency
Short-circuit input admittance
yo
+y + +0
ǒǓ
I1 Short-circuit output admittance
yi 11 V2
V1

Parameter values are circuit-configuration dependent;

yo +y +22
I2
V2 V1 +0
therefore, a further subscript (e, b or c) is used to identify
the circuit configuration Yob
Short-circuit output admittance in common-base config-
yib uration (small-signal value)
Short-circuit input admittance in common-base configu-
ration (small-signal value) yob = gob + j  Cob

yib = gib + j  Cib

yoe
Short-circuit output admittance in common-emitter con-
yie figuration (small-signal value)
yoe = goe + j  Coe
Short-circuit input admittance in common-emitter con-
figuration (small-signal value)
The following electrical characteristics can be calculated
yie = gie + j  Cie from the admittance parameters mentioned above.
yr

ǒǓ
Short-circuit reverse-transfer admittance

yr +y +12
I1
V2 V1 +0
|y rb|
Short-circuit reverse-transfer admittance in common-
base configuration (small-signal value)
y rb + |y | exp  Figure 21.
+g )j  C
rb rb

rb rb Current amplification
|y re|
Gi + II + y
2

1 11
y 21 Y L
)
(y 22 Y L)–y 12 y 21
Short-circuit reverse-transfer admittance in common-
emitter configuration (small-signal value) Voltage amplification

16 TELEFUNKEN Semiconductors
26-Feb-97
Gu + VV + y –y) Y
2 21 yo +g )j ö C o o

1 22 L
go
Input admittance Short-circuit output conductance

y in + VI + y
1

1
11 –
y 12 y 21
y 22 Y L )
Co
Short-circuit output capacitance
YG
Output admittance Generator admittance

y out + VI + y 2

2
22 –
y 12 y 21
)
y 11 Y G
ö
Phase angle

Power gain öfb

Phase of the short-circuit forward transfer admittance yfb
+ P out G L
öfe

Ť)Ť
2
Gp |A u|
P in g in Phase of the short-circuit forward transfer admittance yfe
+ Gg
2
L
in y 22
y 21
YL
örb
Phase of the short-circuit reverse transfer admittance yrb
At AF in certain cases, and for RF throughout, the coeffi- YG
cients of y parameters or the equivalent circuit according Generator admittance
to Giacoletto (see “transistor equivalent circuit’’) are
used. The y coefficients are valid only for a specified op-
ö
Phase angle
erating point and a specified frequency with narrow
(frequency) range. öfb
Phase of the short-circuit forward-transfer admittance yfb
The y parameters are sometimes given separately as real
and imaginary values or according to its modulus and öfe
phase. Phase of the short-circuit forward-transfer admittance yfb

yi +g )j w C
i i
örb
Phase of the short-circuit reverse-transfer admittance yrb
gi öre
Short-circuit input conductance Phase of the short-circuit reverse-transfer admittance yre
Ci
Z thp – Thermal Resistance for Pulse Cond. ( K/W )

Short-circuit input capacitance 10

yr + g ) jwC + |y | exp (jö )

r r r r
DC
gr 1 tp/T = 0.5
Short-circuit reverse conductance
0.2
Cr 0.1
Short-circuit reverse capacitance
0.1 0.05
|y r| 0.02
Modulus of the short-circuit reverse-transfer admittance 0.01
ör 0.01
Phase of the short-circuit reverse-transfer admittance 0.01 0.1 1 10 100

yf + |y | exp (j ö )
f f
95 9918 tp – Pulse Length ( ms )

|y f| Figure 22.
Modulus of the short-circuit forward-transfer admittance
ZthP
öf Thermal impedance, pulse load
Phase of the short-circuit forward-transfer admittance To determine the maximum power dissipation, Ptot max, of

TELEFUNKEN Semiconductors 17
26-Feb-97
a transistor by repetitive rectangular pulse operation, the tp
as a parameter
calculation is as follows: T

P totM + T Z–T
jM

thP
case

When the calculation has been completed, Ptot max should

correspond with the maximum permissible operating
whereas: range.
t jmax +t +
^
jM
p
maximum (crest) permissible crystal temperature by re- Efficiency
petitive pulse operation,
Ts
P totM +T jmax –T case
Z thP
Storage-time constant

ZthP = thermal impedance, pulse operation,

18 TELEFUNKEN Semiconductors
26-Feb-97
Switching Characteristics The transient responses as shown in figure 24 are given
as follows:
By using a transistor as a switch, one has to bear in mind
that during transition from off- to on-state, the signal does td : delay time
not respond instantaneously, even when abrupt changes in tr : rise time
control values occur. The output signal is not only delayed
but also distorted. These switching characteristics of a ton (td + tr) : turn-on time
transistor are explained by means of an NPN transistor. ts : storage time
Figure 23 shows the basic circuit.
tf : fall time
IC
toff (ts + tf) : turn-off time
1 RB These switching characteristics depend on the transistor
RL
2 IB type and the circuit used. They are only valid if the slope
VCE of the control pulse is much greater than that of the collec-
+ +
tor current pulse. If the saturation factor is higher, the
– – turn-on time is shorter, and the turn-off time is longer. The
95 10149
turn-off time is shorter if the on-off base current ratio is
higher.
Figure 23.

The input (i.e., base current, iB) and output (i.e., collector
current, iC) signals are shown in figure 24.
95 10257
IB Switch position

2 1 2

IB1

0
t

–IB2

IC
1.0
0.9

0.1
0
t
tr

td ts tf

ton toff
Figure 24.

TELEFUNKEN Semiconductors 19
26-Feb-97
Assembly Instructions
General Surface-Mounted Devices
Surface-mounted devices (SMD) are components which
Semiconductor devices can be mounted in any position. are mounted directly on the surface of a printed circuit
The terminal length may be bent at a distance greater than board without having to drill holes. In addition, these
1.5 mm from the case provided no mechanical force has components can be completely submerged in a solder
an effect on the case. bath (overhead soldering). The SMD technology offers
the following main advantages:
If the device is to be mounted near heat-generating D Higher packing density (miniaturization)
components, consideration must be given to the resultant
increase in ambient temperature. D Reduction of the component-mounting costs by fully
automatic mounting

Soldering Instructions a) Gluing

In the case of flow or drag soldering, the components must
Leaded Devices be glued to the printed circuit board. The adhesive used
for this purpose must be electrically neutral and must not
react chemically with the materials of the printed circuit
Protection against overheating is essential when a device board or the components. The adhesive must not
is being soldered. It is recommended, therefore, that negatively affect subsequent soldering. After mounting,
connection terminals are left as long as possible, are the adhesive must be hardened. The ultraviolet and/or
soldered at the tip only, and that any heat generated is thermal radiation commonly used for hardening is
quickly conducted away. The time during which the uncritical for our components. In the case of other
specified maximum permissible device junction soldering methods, gluing can be omitted if the flux or the
temperature is exceeded during the soldering operation solder paste provides sufficient adhesion of the
should be as short as possible, (i.e., for silicon, 260°C for components to the printed circuit board.
5 seconds.
b) Soldering
Avoid any force on the body or leads during or just after The pins of TEMIC components are already tinned.
soldering.
Dip soldering, flow soldering, reflow soldering, and
vapor phase soldering are permissible.
Do not correct the position of an already soldered device
by pushing, pulling or twisting the body. Prevent fast The maximum temperature of 260°C over a period of 5 s
cooling after soldering. must not be exceeded during soldering. Preheating (e.g.,
to 80°C) results in a higher chip temperature during
soldering and should, therefore, not be done.
The maximum soldering temperatures are shown in
table 1. No aggressive fluxes may be used.

Table 1. Maximum soldering temperatures

Iron Soldering Dip or Flow Soldering
Iron Soldering Max. Soldering Soldering Max.
Temperature Distance from Allowable Temperature Distance from Allowable
the Case Soldering Time the Case Soldering Time
Plastic case x245°C 2 to 5 mm 3s x 260°C > 2 mm 3s
x245°C > 5 mm 5s > 5 mm 2s

x250°C x260°C
23 A 3
DIN41869 – 10 s – 10 s
(SOT23)

20 TELEFUNKEN Semiconductors
26-Feb-97
A soldering iron should be used only in exceptional cases RthJA
(repairs, etc.). A temperature regulated miniature solder- is the thermal resistance between junction and ambient,
ing iron must be used, and care should be taken to avoid
RthJC
touching the component with the tip of the soldering iron.
is the thermal resistance between junction and case,
c) Cooling RthCA
Cooling of the components with a fan after soldering is is the thermal resistance between case and ambient. Its
permissible. value is cooling dependent. When using a heat sink, it can
be influenced through thermal contact between the case
d) Cleaning and the heat sink, thermal distribution in the heat sink and
If cleaning is necessary after soldering, it is recom- heat transfer to the surroundings.
mended to wash with water which contains a detergent Therefore, the maximum permissible total power
free of deposits. dissipation for a given semiconductor device can be
influenced only by changing Tamb and RthCA. The value
Heat Removal of RthCA can be obtained either from the data of heat sink
suppliers or through direct measurements.
To keep the thermal equilibrium, the heat generated in the
semiconductor junction(s) must be removed. Figure 6 shows the thermal resistance plotted as a
function of edge length. The values are valid with a heat
In the case of low-power devices, the natural heat- source in the middle of the plate, resting air and vertical
conductive path between the case and surrounding air is position. With horizontal position, thermal resistance
usually adequate for this purpose. However, in the case of increases approximately by 15 to 20%.
medium-power devices, heat radiation may have to be
62
improved by the use of star- or flag-shaped heat
R tha – Thermal Resistance ( K/W )

dissipators which increase the heat radiating surface. a

52
Finally, in the case of high-power devices, special heat
sinks must be provided. Their cooling effect can be b
increased further by the use of special coolants or air 42
blowers.
c
The heat generated in the junction is conveyed to the case 32
or header by conduction rather than convection. A d
measure of the effectiveness of heat conduction is the 22
e
inner thermal resistance or thermal resistance junction g f
case, RthJC, the value of which is governed by the 12
construction of the device. 0 30 60 90 120 150

Any heat transfer from the case to the surrounding air 94 9474 l – Length ( mm )
involves radiation convection and conduction. The Figure 25.
effectiveness of transfer is expressed in terms of an
RthCA-value, i.e., the external or case-ambient thermal Pertinax boards 1.5 mm thick
resistance. The total thermal resistance between junction a: Pertinax non-metallized
and ambient is consequently
b: Pertinax with 35 mm cooper metallization on one side;
RthJA = RthJC + RthCA. heat source fitted to non-metallized side
The total maximum power, Ptot max’ of a semiconductor c: Pertinax with 70 mm cooper metallization on one side;
device can be expressed as follows heat source fitted to non-metallized side
d: Pertinax with 35 mm cooper metallization on one side;
P tot max +T jmax– T amb
R thJA
+ RT )– RT
max amb
where
heat source fitted to metallized side
thJC thCA e: Pertinax with 35 mm cooper metallization on both sides
Tjmax f: Pertinax with 70 mm cooper metallization on one side;
is the maximum junction temperature, heat source fitted to metallized side
g: Pertinax with 70 mm cooper metallization on both sides
Tamb
is the highest ambient temperature likely to be reached Rtha: Thermal resistance of boards
under the most unfavorable conditions, l: Edge length

TELEFUNKEN Semiconductors 21
26-Feb-97
Quality Data
With an extensive system consisting of qualification, D Major defect
intermediate and final tests, TEMIC Semiconductors This is a defect which is usually responsible for the
endeavours to supply the customers with components failure of a device to function in its intended purpose.
which fulfil the specifications of the OEM-industry. For example: parameter limits exceeded, incomplete
If you are interested in detailed information regarding type data, dimensional tolerance exceeded.
“Quality Assurance of Semiconductor Components”,
please ask for our booklet “Quality and Reliability”. D Minor defect
Delivery Quality This is a defect which is responsible for the function
of a device with no or only a slight reduction in
To ensure the delivery quality, the following precautions effectiveness.
are used: For example: markings difficult to read, uncritical
D Process control by SPC and FMEA parameters, slightly-bent connector pins.
D Observation of the ppm level
Manufacturing has ISO 9001 approval
To designate the delivery quality, the following
specifications are given: AQL Values
D Maximum and minimum values of the characteristics
D AQL (Acceptable Quality Level) values According to the classification of defects mentioned
Shipment lots whose defect percentage is equal to or less above, the following AQL values, unless otherwise speci-
than the percentage given in AQL value shall be accepted fied, are valid for data sheets of semiconductor devices.
y
with greater probability (L 90%) due to sampling tests Under this classification, the inspection is carried out
after the single sampling plan for attribute testing (see
(see ‘Sampling Inspection Plans’).
section ‘Sampling Inspection Plans’) which corresponds
largely to ABC-STD 105 D, inspection level II.
Classification of Defects
The possible defects with which a semiconductor device
could be subjected are classified according to the Classification of Defects AQL n-c
probable influence of existing circuits: Total defects 0.065 200-0
D Total (critical) defect Major electrical defects 0.065 200-0
When this defect occurs, the functional use of the Major mechanical defects 0.25 200-1
device is impossible.
Minor defects 0.4 200-2
For example: open contacts, short circuit, non-func-
tioning, unstable characteristics, wrong polarity
marking, gross mechanical failure, non-solderability, A cumulative AQL equal to 0.4 is valid for all defects
wrong parts in a belt, mixtures with wrong parts. mentioned above.

22 TELEFUNKEN Semiconductors
26-Feb-97
Sampling Inspection Plans
List of symbols: n Sample size
AQL Acceptable Quality Level c Acceptance number
N Lot size Dmax Average outgoing quality level

Single sampling plan for attribute testing (according to DIN)

Normal AQL Reduced
IInspection
ti IInspection
ti
0.06 0.10 0.15 0.25 0.40 0.65 1.0 1.5 2.5 4.0 6.5
N n–c N
(Dmax in %)
2–15 5–0 3–0 2–0 2–15
8–0 (6.7)
( ) (9.6) (15.6)
16–50 13–0 (3.9) 13–1 8–1 16–150
20–0 (2.6) (4.8) (9.2)
32–0
32 0 (1.7)
(1 7)
51–150 50–0 (1.1) 20–1 20–2 20–3 151–280
80–0 (0.71) 32–1 (3.6) (6.0) (8.4)
151–280 125–0 (0.45) (2.3) 32–2 32–3 32–5 281–500
200–0 ((0.29)) 50–1 (3.8) (5.4) (8.8)
281–500 (0 18)
(0.18) (1.5) 50–2 50–3 50–5 50–7 501–1200
80–1 (2.4) (3.5) (5.7) (8.1)
501–1200 (1.0) 80–2 80–3 80–5 80–7 80–10 1201–3200
125–1 (1.6) (2.2) (3.7) (5.2) (7.7)
1201–3200 (0.64) 125–2 125–3 125–5 125–7 125–10 125–14 3201–10000
200–1 (1.1) (1.5) (2.4) (3.5) (5.0) (7.2)
2101–10000 (0.41) 200–2 200–3 200–5 200–7 200–10 200–14 10001–35000
315–1 (0.68) (0.68) (1.6) (2.2) (3.2) (4.6) 200–21
10001–35000 500–1 (0.27) 315–2 315–3 315–5 315–7 315–10 315–14 315–21 (7.3)
(0.17) (0.44) (0.61) (0.99) (1.4) (2.1) (3.0) (4.7)

Single sampling plan for destructive or very costly test procedures (AEG 1416, Z-plans)
Normal AQL Reduced
IInspection
ti IInspection
ti
0.06 0.10 0.15 0.25 0.40 0.65 1.0 1.5 2.5 4.0 6.5
N n–c N
(Dmax in %)
2–25 2–0 2–50
3–0 (16.6)
26–90 5–0 (11.6) 51–150
(7.2)
91–150 8 0
8–0 8–1 151–500
13–0 (4.5) ((10.8))
13–11
13
20–0
20 0 (2 8)
(2.8)
151–500 (6.3) 501–3200
200–0 125–0 80–0 50–0 32–0 (1.8)
(0.18) (0.29) (0.46) (0.74) (1.2) 20 1
20–1
501–1200 (4.1) 20–2 20–3 3201–35000
32–1 (6.8) (9.5)
1201–10000 (2.6) 32–2 32–3 32–5
50–1 (4.3) (6.1) (9.9)
10001–35000 80–1 (1.7) 50–2 50–3 50–5 50–7
(1.1) (2.7) (3.9) (6.3) (9.0)

TELEFUNKEN Semiconductors 23
26-Feb-97