EC and PC LAB MANUAL SOFTWARE EXPERIMENTS

EXPERIMENT- 1

COMMON EMITTER AMPLIFIER

AIM:
To find the Bandwidth of a Common Emitter Amplifier and calculate (Voltage and current) at
various nodes using MULTISIM.

APPARATUS: - Multisim Software.

CIRCUIT DIAGRAM:-

V1
12 V

XSC1
G

T
R2 R4
100kOhm 2.2kOhm A B

C3

10uF
Q1
R1 C1

2.2kOhm BC107BP
10uF

V2 R5 C2
R3 1kOhm 100uF
10kOhm
20mV
1kHz
0Deg

PROCEDURE:-
1. Verify the circuit using multisim software and observe the input and output
waveforms and calculating Bandwidth using Frequency Response

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 EC and PC LAB MANUAL SOFTWARE EXPERIMENTS

Fig : frequency and phase Response of CE Amplifier

2. Results using DC operating point analysis (simulate ---- analysis ----- DC operating
point).

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 EC and PC LAB MANUAL SOFTWARE EXPERIMENTS

3. Verify the results using DC transfer characteristic analysis(simulate ---- analysis ----- DC
sweep)

Out put voltage VCE variation with V CC (0 to 25V)

RESULT:-
The CE single stage amplifier Bandwidth is determined. The D.C voltages and currents at
various nodes are observed. The D.C transfer characteristic is plotted.

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 EC and PC LAB MANUAL SOFTWARE EXPERIMENTS

EXPERIMENT- 2

COMMON SOURCE AMPLIFIER

AIM:
To find the Bandwidth of a Common Sources Amplifier and calculate (Voltage and current) at
various nodes using MULTISIM.
.
APPARATUS: Multisim software.

CIRCUIT DIAGRAM:

V1
12 V
XSC1
G

T
R1
6.8kOhm A B

C3

10uF
Q1
R2 C1

2.2kOhm BFW11
10uF

V2 R4 R3
2.2kOhm C2
15mV 1MOhm 100uF
4kHz
0Deg

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 EC and PC LAB MANUAL SOFTWARE EXPERIMENTS

PROCEDURE:
Verify the circuit using multisim software and observe the input and output waveforms and
calculate the Bandwidth using Frequency Response.

Input and Output Waveforms:

Fig : frequency and phase Response of CS Amplifier

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 EC and PC LAB MANUAL SOFTWARE EXPERIMENTS

3. Results using DC operating point analysis (simulate ---- analysis ----- DC operating
point).

3. Verify the results using DC transfer characteristic analysis(simulate ---- analysis ----- DC
sweep)

RESULT:-

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 EC and PC LAB MANUAL SOFTWARE EXPERIMENTS

The CS single stage amplifier Bandwidth is determined. The D.C voltages and currents at
various nodes are observed. The D.C transfer characteristic is plotted.

VIVA QUESTIONS:

1. What is meant by Q- point?

2. What is the need for biasing a transistor?
3. What factors are to be considered for selecting the operating point Q for an amplifier?
4. Distinguish between D.C. and A.C load lines.
5. What are the reasons for keeping the operating point of a transistor as fixed?
6. What is thermal runaway? How can it be avoided?
7. What are the factors which contribute to thermal instability?
8. Define ‘Stability Factor’. Why would it seem more reasonable to call this an instability
factor?
9. How will be the output voltage in a CS amplifier?
10. To have good voltage gain and high input resistance which FET amplifier is to be used?

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 EC and PC LAB MANUAL SOFTWARE EXPERIMENTS

EXPERIMENT- 3

TWO STAGE RC COUPLED AMPLIFIER

AIM: To find the Bandwidth of a Two Stage RC Coupled Amplifier and calculate (Voltage and
current) at various nodes using MULTISIM.

APPARATUS: Multisim software.

CIRCUIT DIAGRAM:
VCC 12V

VCC
Rc2
14.0kOhm_1%
R1 Rc1 2.2kOhm_5%
C5
33kOhm_5% R12
2.2kOhm_5%
10
C3 47uF 14
9
Q1
5
4.7uF BC107BP R10
C1 Q3
Rs 22kOhm_5%
BC107BP
3
15kOhm_5% 1 2
4.7uF
2.55kOhm_1% 11
R22 Re2
V1 Re1 C4
1mV R2 15 C2
0.71mV_rms 5.1kOhm_5% 510Ohm_5% 470uF
470uF 470Ohm_5%
1000Hz
0Deg
0

XSC1

G
T
A B

PROCEDURE:
Verify the circuit using multisim software and observe the input and output
waveforms and calculate the Bandwidth using Frequency Response.

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 EC and PC LAB MANUAL SOFTWARE EXPERIMENTS

Input and Output Waveforms:

Fig:Frequency and Phase Response of 2-stage RC coupled Amplifier

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2. Results using DC operating point analysis (simulate ---- analysis ----- DC

operating point).

DC Operating Point (Results)

1 8.05632v
2 928.05352mv
4 1.58077v
Vv1#branch 315.92573µa
Vv2#branch 1.79258ma
vcc 12.00000v
vcc#branc -2.10851ma

RESULTS:
Observed the DC voltages/currents two stage amplifiers. It is observed that Two stage amplifier
gives a mid band gain more than the single stage. It is also observed the phase response.

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 EC and PC LAB MANUAL SOFTWARE EXPERIMENTS

VIVA QUESTIONS:

1. What do you mean by a multi stage amplifier? Mention its need.

2. What are the objectives of coupling elements?
3. What are the effects of bandwidth in multistage amplifier?
4. What is the expression for the band width of multistage amplifier?
5. Why RC coupling is popular?
6. What are the advantages & disadvantages of RC coupled amplifier?
7. Define the terms BW, gain BW product and dynamic range of an amplifier?
8. What is the effect of By pass capacitor in a RC coupled amplifier?
9. What is the use of transformer coupling in the output stage of multistage amplifier?
10. What is a DC amplifier? What are its advantages and drawbacks?

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 EC and PC LAB MANUAL SOFTWARE EXPERIMENTS

EXPERIMENT- 4

CURRENT SHUNT FEEDBACK AMPLIFIER

AIM: calculate the bandwidth of the amplifier with and without feed back using transistor BC
107. Obtain DC operating point and frequency response.

APPARATUS: Multisim software.

CIRCUIT DIAGRAM:

VCC 12V

VCC R9
R3 R4 R7
2.2kohm
33kohm 2.2kohm 14kohm
C2
C4
7

47uF
4.7uF Q2
C1 4 11
BC107BP
R1 BC107BP
R10 6 R11
Q1
15kohm 2 22kohm
4.7uF
5kohm 8
1 3
V1 C3 R6 R8
1mV 5
R2 R5 2.55kohm 470ohm
0.71mV_rms 470uF
5.1kohm 510ohm
1000Hz
0Deg
0

XSC1

G
T
A B

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 EC and PC LAB MANUAL SOFTWARE EXPERIMENTS

PROCEDURE:- 1. Verify the circuit using multisim software and observe the input and output
waveforms and calculate the Bandwidth using Frequency Response.

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 EC and PC LAB MANUAL SOFTWARE EXPERIMENTS

3 Results using DC operating point analysis (simulate ---- analysis ----- DC operating
point).

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 EC and PC LAB MANUAL SOFTWARE EXPERIMENTS

4. Design the circuit using multisim soft ware and verify the results using Parameter
Sweep(Simulate ---- analysis ----- Parameter Sweep)

RESULT:
The current shunt feed back amplifier is designed with feed back resistance of 5K . The DC
operating point values are obtained and the frequency response is plotted.

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 EC and PC LAB MANUAL SOFTWARE EXPERIMENTS

VIVA QUESTIONS:

1. What is feedback in Amplifiers?

2. Explain the terms feed back factor and open loop gain.
3. What are the types of feedback?
4. Explain the term negative feedback in amplifiers?
5. What are the disadvantages of negative feedback?
6. What are the advantages of negative feedback?
7. When will a negative feedback amplifier circuit be unstable?
8. Compare the negative feedback and Positive feedback.
9. Give the expression for closed loop gain for a negative feed back amplifier?
10.How does negative feedback reduce distortion in an amplifier?
11.How does series feedback differ form shunt feedback?
12.What is the difference between voltage feedback and current feedback?

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 EC and PC LAB MANUAL SOFTWARE EXPERIMENTS

EXPERIMENT- 5

RC PHASE SHIFT OSCILLATOR

AIM:
a) Design RC phaseshift oscillator to have resonant frequency of 6KHz.
Assume R1 = 100k, R2 = 22K, RC = 4 K ,RE =1K & VCC = 12V.
b) Obtain hfe for the above designed value for AV > - 29, R≥ 2 RC.

APPARATUS: Multisim software.

DESIGN PROCEDURE:

a) Let R = 10K
1 RC
fr  When K 
2 RC 6  4 K R
1
C 
4K
2  10 K  6 K 6  4 
10 K
 0.962nF  1nF ( Select s tan dard )

 R  10K ; C  1nF

29
b) hfe  23   4 K for sustained oscillatio n
K
 97.1

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 EC and PC LAB MANUAL SOFTWARE EXPERIMENTS

CIRCUIT DIAGRAM:

VCC
12V

VCC

R1
R3
100kohm
4kohm
C2
XSC1
10
C1

A
10uF
Q2

B
4 12
10uF 2N2222A

G
T
C3
R2 11 100uF
R4
22kohm
1kohm

C6 C5 C4

1.0nF 6 1.0nF 7 1.0nF

9
R7 R6 R5
10kOhm_5% 10kOhm_5% 10kOhm_5%

PROCEDURE:
Design the circuit using multisim software and verify the results using Oscilloscope.

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 EC and PC LAB MANUAL SOFTWARE EXPERIMENTS

RESULT:
RC phase shift oscillator with fr =6KHz is designed. The value of hfe for the designed value is
computed.

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 EC and PC LAB MANUAL SOFTWARE EXPERIMENTS

VIVA QUESTIONS:

1. What is an Oscillator circuit?

2. What is the main difference between an amplifier and an oscillator?
3. State Barkhausen criterion for oscillation.
4. State the factors on which oscillators can be classified.
5. Give the expression for the frequency of oscillation and the minimum gain required for
sustained oscillations of the RC phase shift oscillator.
6. Why three RC networks are needed for a phase shift oscillator? Can it be two or four?
7. What are the merits and demerits of phase shift oscillator?
8. At low frequency which oscillators are found to be more suitable?
9. What are the two important RC oscillators?
10. What makes Quartz produce stable oscillations?
11. What are the factors which contribute to change in frequency in oscillators?

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 EC and PC LAB MANUAL SOFTWARE EXPERIMENTS

EXPERIMENT- 6

CLASS A Power Amplifier

AIM :

To study the operation of Class A power amplifier(series fed).

APPARATUS: Multisim software.

CIRCUIT DIAGRAM:

12V R2 R5
V2 1kohm 1kohm
47uF
C2

XSC1
R3
30kohm Q1
47uF G
R1 C1 PN2369A
T
A B
100ohm

V1
50mV R4
35.36mV_rms 100ohm
1000Hz
0Deg

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 EC and PC LAB MANUAL SOFTWARE EXPERIMENTS

THEORY:

The classification of amplifiers is based on the position of the quiescent point and extent of
the characteristics that is being used to determine the method of operation.

There are 4 classes of operations.They are

1.Class A 2.Class AB 3.Class B 4.Class C

CLASS A:- In class A operation the quiescent point and the input signal are such that the
current in the output circuit (at the collector) flows for all times. Class A amplifier operates
essentially over a linear portion of its characteristic there by giving rise to minimum of
distortion .

CLASS B:- In class B operation , the quiescent point is at an extreme end of the characteristic ,
so that under quiescent conditions the power drawn from the dc power supply is very small .If
the input signal is sinusoidal, amplification takes place for only half cycle.

CLASS AB:- A class AB amplifier is the one that operates between the two extremes defined
for class A and Class B. Hence the output signal exists for more than 1800 of the input signal.

CLASS C :- In class C operation, the quiescent operating point is chosen such that output signal
(voltage or current)is zero for more than on half of the input sinusoidal signal cycle.

PROCEDURE:

1. An input sine wave (peak-peak)of 50mV is applied to the circuit.

2. connect the output to the C.R.O.

3. varying R3 value, observe and record the output waveforms for different classes of
operation.

4. Also observe the Vi & Vo waveforms using parameter sweep for different classes of
operation.

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 EC and PC LAB MANUAL SOFTWARE EXPERIMENTS

OBSERVATIONS:

CLASS A:

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RESULT :

1. In class A amplifier output current flows for whole 3600

2. In class AB power amplifier output current flows between 1800 and 3600
3. In class B power amplifier output current flows for 1800
4. In Class C power amplifier output current flows for less than 180

Dept of ECE
 EC and PC LAB MANUAL SOFTWARE EXPERIMENTS

VIVA QUESTIONS:
1. How do you bias class A operation?
2. What is conversion efficiency?
3. Define Class B mode of operation.
4. What are the advantages & disadvantages of Class B mode of operation?
5. Distinguish between voltage and power amplifier?
6. Which power amplifier gives minimum distortion?
7. What are the drawbacks of class C amplifier?
8. In Which class of amplifier, the efficiency is high? And why?
9. Classify power amplifiers on the basis of the mode of operation.
10. Give two drawbacks of Class A power amplifier.

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 EC and PC LAB MANUAL SOFTWARE EXPERIMENTS

EXPERIMENT- 7

WEIN BRIDGE OSCILLATOR

AIM:-

To generate a sine wave designed for 1 KHz frequency using Wein Bridge Oscillator.

APPARATUS : PC & MULTISIM SOFTWARE

CIRCUIT DIAGRAM:-

THEORY:-
The wein bridge oscillator is a standard circuit for generating low frequencies in the
range of 10 Hz to about 1MHz.The method used for getting +ve feedback in wein bridge
oscillator is to use two stages of an RC-coupled amplifier. Since one stage of the RC-coupled.
Since one stage of the RC-coupled amplifier introduces a phase shift of 180 deg, two stages

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 EC and PC LAB MANUAL SOFTWARE EXPERIMENTS

will introduces a phase shift of 360 deg. At the frequency of oscillations f the +ve feedback
network shown in fig makes the input & output in the phase. The frequency of oscillations is
given as
f =1/2π√R1C1R2C2

PROCEDURE

1. Start MULTISIM. Wire the circuit as per the circuit diagram.

2. Save the circuit file.
3. Connect the output of the Wein Bridge oscillator to the CRO.
4. Find the frequency of oscillations fo by measuring the time period of
the output waveform.
5. Compare with the theoretical value.
6. The theoretical value of frequency is given by f =1/2π√R1C1R2C2

MODEL GRAPH:

OBSERVATIONS :-

Time period T of the ac signal available at the output = ________

Frequency = 1 Hz _____________ KHz.
T
Amplitude , Vo = ____________________________V.

RESULT:- For a given Circuit of Wein Bridge Oscillator the sine Wave
of 1 KHz frequency is observed.

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 EC and PC LAB MANUAL SOFTWARE EXPERIMENTS

SINGLE TUNED AMPLIFIER (Hardware)

AIM: -
Plot the frequency response of a single tuned amplifier. Calculate
gain.
Calculate bandwidth.

COMPONENTS & EQUIPMENTS REQUIRED: -

S.No Device Range/Rating Qty

1. (a) DC supply voltage 12V 1
(b) BJT BC107 1
(c) Capacitors 10µF 2
100µF 1
220Ω,22KΩ,1k
(d) Resistors Ω 1
(e) inductor (1mH) 5.6KΩ,10kΩ 1
2. Signal generator 0.1Hz-1MHz 1
3. CRO 0Hz-20MHz 1
4. Connecting wires 5A 4

CIRCUIT DIAGRAM:

VCC
12V

C2
L1
1nF
1mH
R2
22kΩ

C5

Q2 10µF CRO out put

R3

10kΩ
BC107BP
V1
C4 R1
R9 100µF
50mVrms 1kΩ
60kHz 5.6kΩ

0°
R10
220Ω

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 EC and PC LAB MANUAL SOFTWARE EXPERIMENTS

Fig: Single Tuned amplifiercircuit12.b

PROCEDURE: -
1. Connect the circuit diagram as shown in figure.
2. Set the input signal amplitude in the function generator and observe an amplified
voltage at the output without distortion.
2. By keeping input signal voltage, say at 50mV, vary the input signal frequency from 0 to
1MHz in steps as shown in tabular column and note the corresponding output
voltages.

PRECAUTIONS:
1. Avoid loose connections and give proper input Voltage

TABULAR COLUMN:
Input = 50mV

Frequency Output Gain Gain

(in Hz) Voltage (Vo) Av=Vo/Vi (in dB) =
20log10(Vo/Vi)
20
40
80
100
500
1000
5000
10k

RESULT: -
1. Frequency response of BJT amplifier is plotted.
2. Gain = _______dB (maximum).
3. Bandwidth= fH--fL = _________Hz.

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EXPECTED GRAPH:

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HARTLEY OSCILLATOR (Hardware)

AIM:
Find practical frequency of a Hartley oscillator and to compare it with theoretical frequency
for L = 10mH and C = 0.01µF, 0.033µF and 0.047µF.
COMPONENTS AND EQUIPMENTS REQUIRED:
S.No Device Range/Rating Quantity

1 a) DC supply voltage 12V 1

b) Inductors 5mH 2
0.01µF,0.022µF;0.033µ
c) Capacitor F 1
0.047µF 1
d) Resistor 1KΩ,10KΩ,47KΩ 1
e) NPN Transistor BC 107 1
2 Cathode Ray Oscilloscope (0-20) MHz 1
3. BNC Connector 1
4 Connecting wires 5A 4

CIRCUIT DIAGRAM:

VCC
12V

R5
R4 5kΩ
100kΩ C2

100nF
CRO output
Q1
C1

100nF
BC107BP
L1
1mH R6
10kΩ
R7 C3
1kΩ 0.1µF
C4
.01µF
L2
1mH

Fig: Hartley oscillator circuit.13.b

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 EC and PC LAB MANUAL SOFTWARE EXPERIMENTS

PROCEDURE:

1. Connect the circuit as shown in figure.

2. With 0.1µF capacitor and 20mH in the circuit and observe the waveform
3. Time period of the waveform is to be noted and frequency is to be calculated by the
formula f = 1/T .
4. Now fix the capacitance to 0.033 µF and 0.047µF and calculate the frequency and
tabulate the readings as shown.
5. Find the theoretical frequency from the formula f=1/2Π√LC

Where LT = L1 + L2 = 5mH + 5mH = 10mH and compare theoretical and practical

values.

PRECAUTIONS: No loose contacts at the junctions.

TABULATIONS:
S.No LT(mH) Theoretical Practical Vo (peak to
C (µF) frequency frequency peak)
(KHz) (KHz)
1 10 0.01
2 10 0.033

3 10 0.047

RESULT:
1. For C = 0.01µF, & LT = 10 mH;
2. Theoretical frequency = Practical
frequency =
For C = 0.033µF, & LT = 10 mH;
Theoretical frequency =
Practical frequency =
3. For C = 0.047µF, & LTs = 10 mH;
Theoretical frequency =
Practical frequency =

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 EC and PC LAB MANUAL SOFTWARE EXPERIMENTS

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 EC and PC LAB MANUAL SOFTWARE EXPERIMENTS

COLPITTS OSCILLATOR (Hardware)

AIM:

Find practical frequency of Colpitt’s oscillator and to compare it with theoretical

Frequency for L= 5mH and C= 0.001µF, 0.0022µF, 0.0033µF respectively.

COMPONENTS & EQIUPMENT REQUIRED: -

Quantit
S.No Device Range/Rating y
1 a) DC supply voltage 12V 1
b) Inductors 5mH 1
c) Capacitor 0.01µF,0.01µF,100µF 1
d) Resistor 1KΩ,10KΩ,47KΩ 1
e) NPN Transistor BC 107 1
2 Cathode Ray Oscilloscope (0-20) MHz 1
3. BNC Connector 1
4 Connecting wires 5A 4

CIRCUIT DIAGRAM:

VCC
12V

R5
R4 5kΩ
100kΩ C2

CRO output
100nF
Q1
C1

100nF
BC107BP
C4
0.1µF R6
L1 10kΩ
20mH R7 C3
1kΩ 0.1µF
C5
0.1µF

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PROCEDURE:-
1. Connect the circuit as shown in the figure
2. Connect C2= 0.001µFin the circuit and observe the waveform.
3. Time period of the waveform is to be noted and frequency should be
calculated by the formula f=1/T
4. Now, fix the capacitance to 0.002 µF and then to 0.003µF and calculate the frequency
and tabulate the reading as shown.
5. Find theoretical frequency from the 1
formula f= 2 LC T
C1C2 and compare theoretical and practical
Where CT values.
C1 C2

PRECAUTIONS:-
1. No loose connections at the junctions.

TABULAR COLUMN:
S.NO L(mH) C1 (µF) C2 (µF) CT (µF) Theoretical Practical Vo(V)
Frequency Frequency Peak to
(KHz) (KHz) peak
1 1mH .1u 0.1u

2 1mH 0.01u 0.1u

3 1mH 0.01 0.0iu

RESULT:
1. For C=0.01µF, 0.1uf & L= 1mH
Theoretical frequency =
Practical frequency =
2. For C=0.1µF, 0.1uf & L=
1mH Theoretical
frequency =
Practical frequency =
3. For C=0.01µF, 0.01uf & L=

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 EC and PC LAB MANUAL SOFTWARE EXPERIMENTS

5mH Theoretical
frequency = Practical
frequency =

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DARLINGTON PAIR AMPLIFIER (Hardware)

AIM: - To Plot the frequency response of a Darlington amplifier. Calculate gain.
Calculate bandwidth.

COMPONENTS & EQUIPMENTS REQUIRED: -

S.No Device Range/Rating Qty

1. (a) DC supply voltage 12V 1
(b) BJT BC547 2
(c) Capacitors 10µF 2

22kΩ,2.2KΩ,1k
(d) Resistors Ω 1
82KΩ,390Ω 1
2. Signal generator 0.1Hz-1MHz 1
3. CRO 0Hz-20MHz 1
4. Connecting wires 4

CIRCUIT DIAGRAM:

VCC
12V

R1
R4 2.2kΩ C2
82kΩ

C1 Q7 10µF CRO

Q6
BC547C BC547C
V1 10µF
R3
50mVpk R5 390Ω 1kΩ
1kHz 22kΩ
0°
R2

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 EC and PC LAB MANUAL SOFTWARE EXPERIMENTS

PROCEDURE: -
1. Connect the circuit diagram as shown in figure. Set the RPS voltage at 12V and input
signal amplitude (sine wave) 50mV, 1 KHz in the function generator.
2. Feed the sine wave signal to the input of the amplifier and observe an amplified
voltage at the output without distortion.{ input at CH-1 & output at CH-2}
3. By keeping input signal voltage, constant 50mV, Select the Range switch of FG input
signal frequency from {10Hz to 1MHz} in steps. Note down the output Vo peak-to-peak
amplitude of signal for different frequencies in tabular column.
4. Calculate the Bandwidth from the plot of graph.

TABULAR FORM Input 50mV

Frequency Output Gain Gain

(in Hz) Voltage (Vo) Av=Vo/Vi (in dB) =
20log10(Vo/Vi)
20
40
80
100
500

EXPECTED GRAPH:

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EXPERIMENT-8
LINEAR WAVE SHAPING
AIM:
To Design High pass and Low pass, RC circuit for an input signal of time period 0.1m sec and
observe the conditions under which they respectively act as differentiator and integrator.
EQUPIMENT & COMPONENTS REQUIRED:
1. Resistors : 100Ω,1kΩ, 10kΩ, 100kΩ
2. Capacitor : 0.1µf
3. CRO
4. Function Generator
5. Bread Board
6. Connecting wires

THEORY:

The process whereby the form of a non sinusoidal signal is altered by transmission
through a linear network is called “linear wave shaping”. An ideal low pass circuit is one that
allows all the input frequencies below a frequency called cutoff frequency fc and attenuates all
those above this frequency. For practical low pass circuit (Fig.1) cut-off is set to occur at a
frequency where the gain of the circuit falls by 3 dB from its maximum. At very high frequencies
the capacitive reactance is very small, so the output is almost equal to the input and hence the
gain is equal to 1. Since circuit attenuates low frequency signals and allows high frequency
signals with little or no attenuation, it is called a high pass circuit.

When a high pass filter is used with a sine wave input, the output is also a sine wave. The
output will be reduced in amplitude and phase shifted when the frequency is low, but it is still a
sine wave. This is not the case for square or triangular wave inputs. For non-sinusoidal inputs the
circuit is called a differentiator. For a Low pass filter if the input is a sine wave the output will be
cosine wave. If the input is a square wave, the output will be a triangular wave. For accurate
integration, the time period of the input signal T must be longer than or equal to RC. Low Pass

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Filter allows the DC component of input signal and High Pass Filter blocks the DC component of
input Signal.

CIRCUIT:
HIGH PASS FILTER (HPF)

Fig.1. High Pass Filter

EXPECTED WAVEFORMS:

OBSERVATIONS:
Fig.1 (a) for low time constant

Fig.1 (b) for large time constant

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Fig.1(c) for medium time constant

%Tilt: This is defined as decay in the amplitude of the output waveform with respect to input
voltage been kept constant. % tilt is found in a high pass circuit for the condition τ<<T. When
square wave input of V volts peak is applied to a high pass RC circuit, % Tilt is given by
P= [(V1 – V11)/V/2] x100
Where V1 and V1 are voltages indicated in fig (1b). The approximate expression for % Tilt
when τ<<T is given by
P= (T/2/RC) x100
Low Pass Filter allows the DC component of I/P signal and High Pass Filter block the
DC component of I/P Signal.

DESIGN / CALCULATIONS:
Choose C = 0.1f, Vi = 4 VP-P, f = 10 KHz.
T = 1/10KHz = 0.1msec
a) RC << T
Choose RC = 0.1 T = 0.1x0.1x10-3= 0.1x10-4sec
0.1x10 4
R=  100
0.1x10 6
b) RC == T
Choose RC = T = 0.1x10-3 sec
R = T/C = 0.1x 10-3 / 0.1f = 1 KΩ
V1 = Vi / (1 + e-T/2RC) = 2.49 V
Vi
V1|  T
 1.51V
1 e 2 RC

V V |
%tilt  1 1 = (2.49 – 1.51)/2 = 49%
V
2
c) RC >> T
Choose RC = 10T = 10x0.1x10-3 =1x10-3 = 1 msec,
10 x0.1x10 3
R=  10 K
0.1x10 6
The O/P waveform will be identical to the input waveform.

LOW PASS FILTER (LPF)

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Fig.2. Low Pass Circuit

EXPECTED WAVEFORMS: OBSERVATIONS:

Fig.2 (a) for low time constant

Fig.2 (b) for medium time constant

Fig.2(c) for large time constant

DESIGN / CALCULATIONS:
Choose C = 0.1f, Vi = 4 VP-P, f = 10 KHz. T = 1/10KHz = 0.1msec
a) RC << T

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Choose RC = 0.1 T = 0.1x0.1x10-3= 0.1x10-4sec

0.1x10 4
R=  100
0.1x10 6
b) RC == T
Choose RC = T = 0.1x10-3 sec
R = T/C = 0.1x 10-3 / 0.1f = 1 KΩ
Vi  T 2 RC
e  1
V2  2    0.49V
 e 2 RC  1
T

 
V1 = -0.49 V
c) RC >> T
Choose RC = 10T = 10x0.1x10-3 =1x10-3 = 1 msec,
10 x0.1x10 3
R=  10 K
0.1x10 6
Vi  T 2 RC
e  1
V2  2  T   0.05V , V 0.05V
1=
 e 2 RC  1
 
DESIGN:
T-------Time period of the input waveform, τ ---Time constant of the circuit
τ = RC, T=1 m sec, Choose ‘C’ as 0.1 µf
(i) When τ << T, RC<<T, R*0.1µF<<1ms, R<<10K
Therefore choose R= 560Ω
(ii) When τ >>T, R*0.1µF >> 1ms, R>>10K
Therefore choose R= 15KΩ

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TABULAR COLUMN

Theoretical values Practical values

%tilt ‘P’

Rise time ‘tr’

PROCEDURE:
1. Connect the circuit as shown in fig.1 with RC values corresponding to case T=RC
2. Apply Square wave input voltage of Vi = 4 VP-P, at frequency, f = 10 KHz to the
circuit.
3. Observe the output waveform for (a) RC = T, and (b) RC>>T and (c) RC<<T.
4. Verify the output waveform voltage levels with theoretical calculations.
5. Repeat steps 1 to 4 for Low pass filter circuit.

RESULT:
The responses of High pass & Low pass RC circuits are observed for a square wave input. The
Percentage tilt and rise time were calculated and compared with theoretical values.

VIVA QUESTIONS
1. What is linear wave shaping?
2. What is the function of High pass RC circuit?
3. What is the function of Low pass RC circuit?
4. What is mean by Tilt?
5. What is mean by Rise Time?
6. What is the condition for perfect differentiation in a High pass RC circuit?
7. What is the condition for perfect integration in a Low pass RC circuit?

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NON-LINEAR WAVE SHAPING - CLIPPERS

AIM: To study the clipping circuits for different reference voltages and to verify
the responses.

APPARATUS:
1. Diodes 1N4001 – 2 NOS
2. Resistor 1K
3. Regulated power supply
4. CRO
5. Function Generator
6. Bread Board
7. Connecting wires

CIRCUIT DIAGRAMS:

1. Shunt diode positive clipper

Figure :1

i) Input signal ii) Output signal

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2. Shunt diode negative clipper

Figure : 2

i) Input signa ii) Output signal

3. Series diode positive clipper

Figure :3

i)Input signal ii) Output signal

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4. Series diode negative clipper

Figure :4

4. Series diode negative clipper

Figure :4

i) Input signal ii) Output signal

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5. Two level clipper

Figure:5

i)Input signal ii) Output signal

THEORY:
When sinusoidal or non-sinusoidal waveforms are applied to non linear networks consisting one
nonlinear device such as diode or transistor the resultant output waveform may be different from the
i/p waveform. Hence the nonlinear circuit said to shape the i/p voltage waveform. This is called non
linear wave shaping.
The clipping circuit may be defined as a circuit that limits the amplitude of a voltage by
removing the signal above or below the reference voltage. Either +ive side or –ive side or both sides
of the waveform may be clipped. Clipping circuits are also known as voltage or current limiters.The
diode clipper circuits are classified according to the placement of the diode in the circuit as a series
diode clipper or shunt diode clipper.

SHUNT DIODE CLIPPERS:

i) WITH POSITIVE BIAS CLIPPERS:

Assuming the diode used is an ideal the shunt diode clipper with +ve bias is shown in the figure. The
diode is forward biased only when Vi > Vr as the cathode is at the potential of Vr. To make the diode
forward bias the potential at the cathode must be greater than Vr.

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During the +ve half cycle Vi>Vr the diode acts as a short circuit and o/p voltage is equals to
the reference voltage Vr. When Vi <Vr the diode is reverse bias and the total i/p voltage Vi appears
across the open circuit o/p terminals as shown in the figure.

ii) WITH NEGATIVE BIAS CLIPPERS:

Assuming the diode used is an ideal in the shunt clippers with –ve bias is shown in the figure.
The diode is forward bias during –ve half cycle when Vi<Vr during this period diode acts as a short
circuit and the o/p voltage equals to the reference voltage Vr.
During complete +ve half cycle as well as during –ve half cycle when Vi > Vr the diode is
reverse biased and it acts as a open circuit. Therefore Vi appears across open circuit terminals of the
o/p circuit.

SERIES DIODE CLIPPERS:

Assuming the diode used is an ideal the series diode clippers with +ve bias as shown in the
figure, The diode conducts during –ve half cycle as well as during +ve half cycle when Vi<Vr as the
anode of the diode is at the potential Vr. During this conduction the current flows through the resistor
when an o/p voltage appears across the open circuited o/p terminals which is equal to Vi . During +ve
half cycle when Vi >Vr the diode is reverse biased no current flows through the resistor and the o/p
voltage equal to the reference voltage Vr.
Assuming the diode used is an ideal one the series diode clipper with +ve bias is shown in the
figure. The diode conducts only when Vi >Vr as the cathode is at the potential of Vr. To make diode
forward bias anode potential must be greater than Vr. During +ve half cycle when Vi > Vr the diode
is forward bias and the current flows through the diode as well as resistor. An o/p voltage appears
across the open circuit output terminals which are equal to Vi. During –ve half cycle as well as
during +ve half cycle when Vi<Vr the diode is reverse bias and no current flows through the diode ,
hence through the resistor . Thus o/p voltage equals to the reference voltage Vr.

UNBIASED SHUNT CLIPPERS:

During the +ve half cycle the diode is forward biased and diode acts as a short circuit for the i/p
signal. Therefore o/p voltage is zero. During –ve half cycle the diode is reverse biased and the diode
acts as an open circuit. Thus Vi=Vr . During –ve half cycle the diode is forward bias and acts as a
short circuit for the i/p signal. Therefore o/p is equal to zero. During +ve half cycle the diode is
reverse biased and the diode acts as an open circuit thus the o/p voltage = i/p voltage.

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DOUBLE DIODE CLIPPERS:

This type of clippers is to clip at two independent levels. When both diodes are not
conducting o/p follows the i/p. Diode D1 conducts during +ve half cycle when Vi>Vr1. Where as
Diode D2 conducts during the –ve half cycle when Vi> Vr2. Thus during the period Vi<Vr1 and
Vi>Vr2 both diodes are reverse biased and the o/p voltage follows the i/p as shown in the figure.

PROCEDURE:
1. Connect the circuit as shown in the figure 1.
2. Connect the function generator at the input terminals and CRO at the output
terminals of the circuit.
3. Apply a sine wave signal of frequency 1KHz, Amplitude greater than the
reference voltage at the Input and observe the output waveforms of the
circuits.
4.Repeat the procedure for remaining figures.

PRECAUTIONS:
1. Connections should be tight.
2. Take care when applying proper supply.

RESULT:
VIVA QUESTIONS:
1. Define clipping?
2. Define clamping?
3. Define peak inverse voltage of diode?
4. What are the other names for the clamper?
5. What are the applications of clampers?
6. Explain the clipping process?

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Work sheet

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EXPERIMENT-9

NON - LINEAR WAVE SHAPING – CLAMPERS

AIM: To study the operation of various clamping circuits using diodes and capacitor.
APPARATUS:
1. Regulated DC power supply 0 – 30 Volts
2. Diode- IN4007
3. Resistors- 100kΩ
4. Capacitors – 0.1µf
5. CRO
6. Function Generator (0 – 1MHz)
7. Bread Board
8. Connecting wires

THEORY:
A capacitive coupling network (i.e., RC High pass circuit) loses its dc component when a
signal is transmitted through it. A clamping circuit is used to introduce a dc component by
fixing the positive or negative extremity of the waveform to some reference level. A clamper is
also referred to as DC restorer or DC re-inserter. These circuits are known as positive or
negative clamping circuits. In positive clamping, the negative extremity of the waveform is
fixed at the reference level and the entire waveform appears above the reference level. In
negative clamping circuit, the positive extremity of the waveform is fixed at the reference level
and the entire waveform appears below the reference.
Because the voltage across the capacitor cannot change instantaneously the output
voltage is simply equal to the peak-to-peak input voltage and there is no distortion of the output
waveform.

Primary clampers are two types

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1. Positive peak clamper or negative clamping

2. Negative peak clamper or positive clamping

Negative clamping:
It introduces a negative dc. This circuit clamps the positive peak of the signal to the given
reference voltage level VR
Positive clamping:
It introduces a positive dc voltage i.e. it clamps the negative peak of the signal to the
given reference voltage VR

INPUT WAVEFORM

CIRCUIT DIAGRAM OUTPUT WAVEFORM

Fig.1 (a) –ve Clamper Fig.1 (b) –ve Clamper Output waveform

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Fig.2 (a) +ve Clamper Fig.2(b)+ve Clamper Output waveform

Fig.3 (a) Biased –ve Clamper. Fig.3 (b) Biased –ve Clamper Output waveform

The direction of the diode determines whether the circuit is a positive or negative
clamper. Clamper operation is based on the concept of switching time constants. The capacitor
charges through the diode and discharges through the load. A biased clamper allows a waveform
to be shifted above (or below) a dc reference other than 0V.A clamper is a circuit that is designed
to shift a waveform above or below a dc reference voltage without altering the shape of the
waveform.

PROCEDURE:
1. Connect the circuit as shown in Fig.1.
2. Apply a sine wave of 10VP-P, at a frequency of 1 KHz at the input terminals from a
Signal Generator.
3. Observe the input & output waveforms of clamper circuit and plot the waveforms.
4. The above procedure is repeated for clamping circuits shown in fig.2 to fig.6.

RESULT:

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Various (different) clamping circuits are constructed and their outputs are observed theoretical
and practical values of clamping levels are compared.

VIVA QUESTIONS:
1. What is clamping circuit?
2. State Clamping Circuit Theorem?
3. What are the applications of a clamper circuit?
4. Explain the operation of positive clamper?
5. Explain the operation of negative clamper?
6. Describe the charging and discharging of the capacitor in each circuit?
7. Why a clamper circuit called a dc inserter?
8. Differentiate between –ve clamping circuit and +ve clamping circuit.
9. Explain about synchronized clamping?

CIRCUIT DIAGRAM OUTPUT WAVE FORM:

Fig.4 (a) Biased +ve Clamper Fig.4 (b) Biased +ve Clamper Output waveform

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Fig. 5(a) Biased –ve Clamper Fig. 5(b) Biased –ve Clamper Output waveform

Fig.6 (a) Biased +ve Clamper Fig. 6(b) Biased +ve Clamper Output waveform

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Work sheet

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EXPERIMENT-10

10.SWITCHING CHARACTERISTICS OF TRANSISTOR

AIM: To Design and verify the operation of Transistor as a Switch.

COMPONENTS & EQUIPMENT REQUIRED:

1. Resistors - 1K, 8.2K - 1 No.
2. Transistor (BC 107) - 1 No. each
3. DC power supply.
4. Function Generator.
5. CRO.
6. Connecting wires.
7. Breadboard.

THEORY:

Transistor can be used as a simple electronic Switch or logic gate.

When Vi = 0V the transistor is OFF (in cut-off region), IC = 0 mA; providing a constant voltage
at collector to emitter, therefore VO = VCE= VCC. This refers to open switch. When Vi is applied,
IC = (VCC - VCE-sat) / RC, the transistor is ON (in saturation region). Now Vo =VCE-sat = 0.2V =
0V. This refers to closed switch.
The Transistor circuit shown in Fig.1 is also called an "inverter" or a "NOT" logic
gate. Let's assume that the low state is at 0.2 V and the high state is at 5 V, where VCC = 5V.
Design:
Choose VCC = 10V, IC max = 10 mA, hfe = 50, VCESat = 0.2V, Vin = 5Vp-p, VBESat = 0.6 V
Vcc  Vcesat
When Transistor is in conduction, RC =
Ic max
= (10-0.2) / 10 mA
= 9.8 / 10x10-3= 0.98K≈1KΩ
IB ICmax / hfe  10mA / 50
IB 0.2 mA
To keep the transistor in ON state, IB should be greater than IB min = 0.2mA
Vin = IBRB + VBE Sat
2.5V = 0.2 mA RB + 0.6V
RB =2.5-0.6 /0.2 = 9.5K≈10KΩ

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CIRCUIT DIAGRAM:

Fig.1.Transistor as a switch

EXPECTED WAVEFORM OBSERVATIONS

Fig 2.Output waveform

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PROCEDURE:
1. Connect the circuit as shown in Fig.1.
2. Apply the Square wave input of 5 V p-p at a frequency of 1 KHz
3. Observe the waveforms at Collector and Base and plot them.
RESULT:
The operation of Transistor as a switch has been studied and its output waveforms are
observed as shown in fig.2.

VIVA QUESTIONS:
1. Differentiate between Diode and Transistor as a switch?
2. Mention typical values of VBE Sat, VCE Sat for both Si, Ge Transistors?
3. Define ON time, OFF time of the transistor?
4. In which regions does Transistor act as a switch?
5. Explain the phenomenon of “latching“ in a Transistor switch?
6. Define Rise time & fall time of a transistor switch?

Work Sheet

I/P VCB VBE VCE Transistor Mode of

Voltage Mode LED
(volts) ON/OFF

0 volts

5 volts

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EXPERIMENT-11

BISTABLE MULTIVIBRATOR
AIM: To study the operation of Bistable multivibrator and observe the waveforms.

COMPONENTS AND EQUIPMENT REQUIRED:

1. Regulated DC power supply 0 – 30 Volts-2 no’s

2. Resistors 1 KΩ - 3 no’s, 10 KΩ-2 no’s, 100KΩ-2 no’s
3. Potentiometer 10K-2 no’s
4. Function generator-2 no’s
5. Capacitors 0.001µf-2 no’s, 0.33µf-3 no’s
6. Transistors BC 107 - 2 no’s
7. PN junction diode- 3
8. CRO
9. Bread Board
10. Connecting wires

THEORY:

A Bistable multivibrator circuit is one which can exist indefinitely in either of two stable
states namely Q1 is ON and Q2 is OFF or Q2 is ON and Q1 is OFF, which can be induced to make
an abrupt transition from one state to other by means of external triggering.Symmetrical
triggering uses only one trigger pulse to be applied. The diodes are used to trigger the circuit.
Each transistor is biased from the collector of the other device. When either transistor is ON, the
other transistor is biased OFF. Capacitors C1 and C2 operate as commutating capacitors to
improve the switching speed of the transistors.
The value of resistors R1, R2 and the supply voltage VBB must be selected so that in one
state the base current is large enough to drive the transistor into saturation whereas in the second
state the emitter junction must be below cut-off.

Design:

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Choose R1 = 10K, C = 0.3f,C1=0.01f, VCE Sat = 0.2V, ICmax = 15mA, VCC = 15V,
VBB = 15V, VB1 = -1.2V
V  VCESat
RC = CC
I C max
RC = (15 – 0.2) / 15mA  1K
V BBR1 VCESat R2
Choose RC = 1K, VB1 = 
R1  R2 R1  R2

CIRCUIT DIAGRAM:

BISTABLE MULTIVIBRATOR

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EXPECTED WAVEFORMS:

Vin

Q1

 15 x10  0.2 R2
-1.2 = ; R2 =100K
10  R 2

R1  R2 10  100K
fmax = =  55KHz
2CR1 R 2 2 x0.3x10 6 x10Kx100K

PROCEDURE:

1. Connections are made as per the circuit diagram.

2. Apply two Square waves with same frequency of 500Hz at terminals T1 & T2.
Observe both I/P & O/P waveforms on CRO.
3. Set the I/P frequency at 500Hz.
4. Increase the trigger I/P amplitude til you get a 500Hz signal at the O/P, this is the
minimum pulse step required to trigger the bi-stable Multivibrator with the given
circuit parameters.
5. Now slowly increase the frequency of two square waves , at one particular frequency
the circuit does not respond and the output disappears. Just lesser than this frequency,
the circuit again responds, this is the maximum allowable frequency (fmax).
6. Sketch the O/P waveforms. Sample O/P waveforms are as shown in figure.
7. Compare fmax theortical and practical values.

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RESULT:
Bistable multivibrator circuit is designed and the output waveforms are observed

VIVA QUESTIONS:

1. What are the other names of Bistable Multivibrator?

2. Explain the working of Bistable Multivibrator?
3. What is stable state?
4. How many stable states are there in BM?
5. What are the applications of Bistable Multivibrator?
6. What is triggering? What are the types of triggering?

Work sheet

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EXPERIMENT-12

ASTABLE MULTIVIBRATOR
AIM: To design an Astable Multivibrator to produce a square wave of 1000Hz.

COMPONENTS AND EQUIPMENT REQUIRED:

1. Regulated DC power supply 0 – 30 Volts

2. Resistors 1 KΩ - 2 no’s, 72.4KΩ - 2 no’s, 7.24KΩ - 2 no’s
3. Capacitors 10nf – 2 no’s, 100nf – 2 no’s
4. Transistors BC107 - 2 no’s
5. CRO
6. Bread Board
7. Connecting wires

THEORY:

This is also called as free running multivibrator and it has two quasi stable states and it keeps on
switching between these two states by itself, without application of external triggering signal.
The output of Astable multivibrator is square wave so it is also known as square wave generator
or square wave oscillator.

DESIGN:
Given frequency of the input square wave is 1000Hz ,
Therefore,
Timeperiod T=1/F= 1/1000=10-3 sec
For Astable multivibrator
T = T1 + T2 = 0.69 (R1C1 + R2C2)
For symmetrical square wave R1 = R2 = R & C1=C2=C
T = 1.38 RC
Choose C = 10nf, 100nf.
For C=10nf:

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10 3
R =  72.4 K
1.38 x10 x10 9

For C=100nf:

CIRCUIT DIAGRAM:
+12V

1KΩ 72.4kΩ 72.4kΩ 1KΩ

10nF 10nF

BC107Q2
BC107Q1

ASTABLE MULTIVIBRATOR

EXPECTED WAVEFORMS:

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TABULAR COLUMN
C=10nf, R=72.4KΩ C=100nf, R=7.24KΩ
Theortical frequency
Practical frequency

10 3
R =  7.24 K
1.38 x100 x10 9

R = 7.24K

Let VCC = 12V (for BC107)

VBESat = 0.7V; VCESat = 0.3V

Choose ICmax = 10mA,

RC = (VCC – VCESat) / ICmax = (12 – 0.3) / (10 x 10-3) = 1.17K  RC  1K

PROCEDURE:
1. Connections are made as per the circuit diagram.
2. Switch ON the DC power supply and set the voltage to +12V
3. Observe the waveform at the Collector and base of both the transistors(Q1,Q2) by
connecting output terminals to CRO.
4. Measure the frequency of oscillations from the observed waveform and compare it with
the designed value.
5. Plot the wave forms.
6. Repeat the steps3, 4 and 5 for R=7.24KΩ,C=100nF.

RESULT:
Astable Multivibrator is designed to generate a square wave of 1KHz and its working is verified.

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VIVA QUESTIONS:
1. What is the other name of Astable Multivibrator?
2. Explain the working of Astable Multivibrator?
3. What is the quasi-stable state?
4. What are the applications of Astable Multivibrator?
5. Is it possible to change time period of the waveform without changing R & C? Support
your answer?
6. Collector waveforms are observed with rounded edges. Explain?
7. Explain charging and discharging of capacitors in an Astable Multivibrator?
8. How can an Astable multivibrator be used as VCO?

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Work Sheet

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EXPERIMENT-13

MONOSTABLE MULTIVIBRATOR

AIM: To design a Monostable Multivibrator to produce a pulse waveform of pulse width

0.5msec.

COMPONENTS AND EQUIPMENT REQUIRED:

11. Regulated DC power supply 0 – 30 Volts-2 no’s

12. Resistors 1 KΩ - 2 no’s, 15 KΩ, 4.7KΩ, 10KΩ, 20KΩ
13. Capacitors 0.01µf, 0.1 µf
14. Transistors BC 107 - 2 no’s
15. PN junction diode- 1
16. CRO
17. Bread Board
18. Function generator
19. Connecting wires

THEORY:

The monostable circuit has one permanently stable and one quasi-stable state. In the monostable
configuration, a triggering signal is required to induce a transition from the stable state to the
quasi-stable state. The circuit remains in its quasi-stable for a time equal to RC time constant of
the circuit. It returns from the quasi-stable state to its stable state without any external triggering
pulse. It is also called as one-shot a single-cycle, a single step circuit or a univibrator.

DESIGN:

T = Time period of the Quasi stable state or Pulse width of output wave form
T= 0.69RC
Take T = 1mSec
Choose ‘C’ as 100nf
R = T/0.69C
R = 15KΩ
Choose Rc such that hfe Rc>R
hfe range from 150 to 200
Therefore 150 Rc>15K
Rc > 15K =100Ω

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150
Therefore choose Rc = 1KΩ

CIRCUIT DIAGRAM:

+6V

4.7KΩ 1KΩ 15KΩ 1KΩ

10nF 100nF 10KΩ
Trigger I/O IN4007
BC107
BC107
20KΩ

-1.5V
MONOSTABLE MULTIVIBRATOR
EXPECTED WAVEFORMS:

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PROCEDURE:

1. Connections are made as per the circuit diagram.

2. Switch ON the DC power supply and set the voltages to + 6V and -1.5V
3. Verify the stable state of a monostable multivibrator i.e. according to the circuit
configuration Q1 must be OFF and Q 2 should be ON
4. After getting the stable state, apply trigger input of 2 – 4V square wave at 200Hz from
the function generator
5. Observe the waveform at the Collector and base of both the transistors
6. Measure the o/p pulse width and compare it with the required value.
7. Plot the wave form on graph sheet to the scale.

RESULT:

The collector and base wave form of monostable multivibrator are observed and the output pulse
width is compared with the required value.

VIVA QUESTIONS:

1. What are the other names for monostable multivibrator?

2. Explain the working of monostable multivibrator?
3. How many stable states does Monostable multivibrator has?
4. What is quasi stable state?
5. What is delay time or gating time?

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6. Give the applications of Monostable Multivibrator?

7. Why is a Monostable multivibrator called a gating circuit? Explain the waveform of VB1?
8. Why is the time period T also called Delay time?
9. Justify, why Monostable multivibrator is caleed one-shot circuit?
10. Why is the negative voltage given at the base of Q1 transistor?

Tabular Column:

Theoretical value Practical value

Pulse width 0.69R C =

Pulse frequency

State of the transistors before applying triggering input:

Q1 = _____ Q2 = _____

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EXPERIMENT-14

SCHMITT TRIGGER
AIM:
(a) To Obtain the UTP and LTP values practically and verify it theoretically.
(b) To verify schmitt trigger as a squaring circuit.

COMPONENTS AND EQUIPMENT REQUIRED:

20. Regulated DC power supply 0 – 30 Volts-2 no’s
21. Resistors 10 KΩ - 1 no, 22 KΩ, 220KΩ, 3.3KΩ, 5.6KΩ
22. Potentiometer
23. Capacitors 1µf, 10 µf
24. Transistors BC 107 - 2 no’s
25. CRO
26. Bread Board
27. Connecting wires

THEORY:

Schmitt trigger is a bistable circuit, which has two stable states(Q1 ON and Q2 OFF or Q1
OFF and Q2 ON) , this is due to positive feedback incorporated into the circuit and making loop
gain of the circuit greater than unity. There are several ways to adjust the loop gain. One way is
to vary the collector circuit resistor of transistor Q1. Under quiescent conditions Q1 is OFF and
Q2 is ON , when a external trigger signal is given they change their state i.e, Q1 is ON Q2 is OFF.

PROCEDURE:-

1. Connect the circuit as per circuit diagram.

2. Switch on the DC power supply adjust Vcc to +12V and keep Vi = 0V
3. Keep the CRO in XY mode, now slowly increase the input voltage from 0V to
maximum(+12V) and observe the LOW to HIGH transition of output.
4. At the LOW to HIGH transition measure the input voltage Vi which will be UTP.

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5. Now, slowly decrease the input voltage Vi and observe for the HIGH to LOW
transition at the output, the input voltage at this point is called the LTP.
6. Note the readings of UTP and LTP by keeping CRO in DC mode.
7. Apply a sine wave input with amplitude 10v p-p and frequency 1KHz to the circuit.
8. Observe the input and output waveforms on CRO.
9. Measure the voltages for UTP and LTP on CRO.

CIRCUIT DIAGRAM:

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EXPECTED WAVEFORMS:

Observations:
With Re = 480ohms

DC AC

UTP = 2.9V UTP = 3V

LTP = 1.8V LTP = 2V
VH = UTP – LTP VH = UTP – LTP

THEORETICAL CALCULATIONS:

V1 calculation:

VBE2 = 0.6V for Si

Vr1 = 0.5V
(=VBE at cut in)
VCC R2 R2 ( RC1  R1 )
V’ = ; Rb = VCC = 12V
RC1  R1  R2 RC1  R1  R2

Re (hFE  1)
VEN = (V’ - VBE2) *
Rb  Re (hFE  1)

V1 = VEN + Vr1 (Accurate value)

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V1 = V’ - 0.1 v (approximate value)

V2 calculation:

R2 RC1 ( R1  R2 )
a = ; R = ;
R1  R2 RC1  R1  R2
1
Re’ = Re(1+ );
hFE

Re ' Rs / hFE VBE = 0.6V

V2 = VBE1 + (V’ - Vr2) Vr = 0.5V
a R  Re '

Re
(or) V2 = VBE1 + (V’ – Vr2) (approximately)
aR  Re

RESULT:
Schmitt Trigger as a squaring circuit has been verified.

VIVA QUESTIONS:

1. What are the applications of Schmitt Trigger?

2. Define hysteresis action?
3. Why Schmitt Trigger is called a squaring circuit?
4. What is UTP?
5. What is LTP?
6. What is the difference between a Binary and Schmitt Trigger?

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EXPERIMENT-15

UJT RELAXATION OSCILLATOR

AIM: To design a UJT Relaxation oscillator to produce a sweep wave form of 2KHz

EQUIPMENT AND COMPONENTS REQUIRED:

1. Regulated DC power supply 0 – 30 Volts

2. Resistors : 100KΩ, 470Ω,220 Ω each – 1 no’s
3. Capacitor : 0.9µf
4. Unijunction Transistor
5. CRO
6. Bread Board

THEORY:

A unijunction transistor (UJT) is an electronic semiconductor device that has only one
junction. The UJT has three terminals: an emitter (E) and two bases (B1 and B2). The base is
formed by lightly doped n-type bar of silicon. Two ohmic contacts B1 and B2 are attached at its

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ends. The emitter is of p-type and it is heavily doped. The resistance between B1 and B2, when
the emitter is open-circuit is called inter base resistance.

The UJT exhibits a negative resistance characteristics, which makes it’s to work as
oscillator to generate sawtooth wave form. The external resistances RB1 and RB2 are of the UJT
base. The emitter potential Ve is varied depending on the charging rate of capacitor C. The
Charging resistance Rc should be such that the load line intersects the device characteristics only
, in the negative resistance region.
As the Capacitor charges, when the emitter voltage goes to the peak point voltage (Vb
+VD ) , regeneration will start and the capacitor will discharges through resistor R B1. The rise
time of the output pulse will depend on the switching speed of the UJT, and the duration will be
proportional to the time constant RB1C of the discharge circuit. The emitter –base -1 diode will
again be reverse biased until the capacitor is charged to (Vb +VD ) . The output pulses are
shown in figure and the duration and their period T is given by T = RC ln (1/1-)

CIRCUIT DIAGRAM:

WAVEFORMS:

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TABULAR COLUMN
Capacitors Frequency

PROCEDURE:

1. Connect the circuit as per circuit diagram with C=0.1µF.

2. Switch on the DC power supply and set the voltage to +12V
3. Observe the waveform across capacitor and at base B1,B2.
4. Measure the frequency of oscillator from the observed waveform.
5. Repeat the steps 3&4 for C=1µF and C=0.01µF
6. Plot the wave forms on graph sheet

RESULT:

Working of UJT relaxation oscillator is studied.

VIVA QUESTIONS:

1. What is the UJT?

2. What is a relaxation oscillator?
3. What is sweep voltage?
4. What is the difference between UJT & FET?
5. Explain the working of UJT relaxation oscillator?
6. What are the applications of UJT relaxation oscillator?

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EXPERIMENT-16

BOOT STRAP VOLTAGE SWEEP CIRCUIT

AIM: To study the operation of Boot Strap Voltage Sweep circuit.

EQUPIMENT AND COMPONENTS REQUIRED:

1. Resistors : 10KΩ, 1KΩ, 4.7KΩ -1

2. Diode : IN4007-1no
3. Capacitors : 0.1µF-1, 10 µF- 2
4. Transistors : BC 107-2
6. Function Generator
7. Regulated DC Power Supply ( 0 – 30 V)
8. Bread Board
9. CRO
10. Connecting wires

THEORY:

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The basic principle involved in this is when a constant current is maintained in a capacitor it
generates ramp voltage.
The circuit employs a positive feed back and generates a negative going ramp. It employs
an emitter follower whose gain is nearly unity and the amplifier is having high input resistance.
Bootstrap sweep generator is a technique that is used to generate a sweep with a
relatively less slope error when compared to exponential sweep circuit. This is achieved by
maintaining a constant current through a resistor by maintaining a constant voltage across it.
Transistor Q1 acts a switch and initiates a sweep voltage across the resistor resulting in a constant
current (i.e., Vcc/R) through the capacitor. Transistor Q2 acts as an amplifier with high input
impedance and voltage gain ‘1’. Hence the same sweep that is generated across C appears across
the output.

Sweep time (TS) =RC

CVs
Fly back time (Tr) =  h fe 1 
Vcc   
 R b R
Where Vs =(VCC.Tg)/RC

PROCEDURE:

1. Connect the circuit as per the circuit diagram.

2. Without applying the input square wave switch on the dc power supply and check for
the dc conditions.
(i.e. Q1 ON, Q2 OFF VCE1(SAT) =0.2V VBE2(sat) = 0.8V)
3. Feed the input square wave of frequency 1 KHz and peak to peak amplitude is 2V.
4. Note down the output waveform with respect to input waveform using CRO for
different values of ‘C’.
5. Compare the values of sweep time and fly back time with theoretical values.

CIRCUIT DIAGRAM:

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EXPECTED WAVEFORMS:

Vi

Tg

Tg

Ts
Tr

RESULT:

The output of Boot strap circuit is verified and compared theoretical and practical values of
sweep time and fly back time.

VIVA QUESTIONS:

1. What is time-base generator?

2. What is basic principle involved in Bootstrap voltage generator?
3. Define sweep time and fly back time?
4. What are the other names for fly back time?
5. What type of feedback is employed in Bootstrap sweep circuit?

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