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RRI Design Concepts

Relay interlocking has several advantages over mechanical interlocking, including redundancy, flexibility in achieving interlocking functions, and additional facilities. The design concepts for relay interlocking circuits involve fully complying with interlocking essentials, using energized contacts wherever possible, grouping conflicting circuits, and ensuring both ways locking between functions. Important principles for designing level route, route setting, and point control circuits include proving critical positions, achieving sequential operation, and using back locking to prevent conflicting routes from being set.
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0% found this document useful (0 votes)
746 views5 pages

RRI Design Concepts

Relay interlocking has several advantages over mechanical interlocking, including redundancy, flexibility in achieving interlocking functions, and additional facilities. The design concepts for relay interlocking circuits involve fully complying with interlocking essentials, using energized contacts wherever possible, grouping conflicting circuits, and ensuring both ways locking between functions. Important principles for designing level route, route setting, and point control circuits include proving critical positions, achieving sequential operation, and using back locking to prevent conflicting routes from being set.
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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RRI DESIGN CONCEPTS

S & T PROJECTS WING


DESIGN CONCEPTS OF RELAY INTERLOCKING

1. ADVANTAGES OVER MECHANICAL INTERLOCKING WITH REGARD TO DESIGN


CONCEPTS:

i) Redundancy in various stages of interlocking, which will enhance the safety.

ii) Flexibility in achieving the interlocking:

Interlocking which is achieved through Point to Point in mechanical


interlocking can simply be directly achieved between functions.

iii) More facilities:

a) Centralisation of operation
b) Alternate routes
c) Alternate overlaps
d) Swinging isolation
e) Calling-on below starters

2. CIRCUIT DESIGN CONCEPTS:

GENERAL PRINCIPLES IN DESIGNING:

i) Essentials of interlocking to be fully complied with.

ii) wherever possible use only energised contacts of any relay to achieve vital
interlocking, etc.

iii) Cycle of operation of any relay shall be ensured even to metal to carbon
contact relays.

iv) Grouping of circuits for conflicting signals

Example: TSR circuits


JSLR circuits
Timers

v) Not more than 45 contacts in a circuit to avoid voltage drop across relay coil.

vi) Economisation of common contacts when two or more parallel circuits are
drawn.

vii) Ensuring both ways locking between two functions.

a) Point and signals


b) Crank handle and signal
c) Signal and LC gate interlocking.

viii) Double cutting for all outdoor circuits and for certain vital Internal circuits viz.
WLR.

ix) Cross protection for all TPRs, NWKRs/RWKRs and HR circuits.


x) Blank aspect Protection.

xi) Cutting in arrangement of Signal aspects.

xii) Ensuring signal aspect sequence as per sequence chart.

xiii) When single track circuit is available ahead of a signal to control/ensure the
movement of a train to release the route, it shall be ensured that in addition
to sequential opertion of track circuits (TSSLR↑), 60 seconds time delay is
also incorporated.

xiv) All emergency cancellation operations are registered by a counter.

xv) Energise repeater relays sequentially using the front contact of previous
picked up relays in the next relay and so on. Never energise repeaters
parallel to each other. This is to avoid the effect of induced e.m.f. of one
relay on the other.

xvi) Three stages of interlocking viz. LR stage, UCR stage & HR stage.

B) Important Principles of designing various circuits:

a) LR Circuit

i) Except where parallel movements are possible, one LR shall pick up at a time.

ii) Achieved through proving back contacts

iii) SM’s key ‘IN’, signal knob reversed and route button pressed

b) UCR circuit:

i) All points in the route, overlap and isolation – NWKR/RWKR in energised


position.

ii) Conflicting signals ASR in energised position.

Certain exceptions are:

(1) Home and Calling-on below it


(2) Calling-on signal and Starter ahead.

In Home signal UCR, Calling-on signal ASR↑ is proved and vice versa it is
Home signal UCR↓ is proved.

In Starter signal UCR, Calling-on signal ASR↑ is proved and vice versa it is
Starter UCR↓ is proved.
These are to enable i) taking OFF calling on signal during the failure of Home
signal, ii) Run through signal given but Home signal failed subsequently and
Calling-on signal being taken OFF.

iii) Signal knob LR in energised position.

c) HR Circuit:

i) All points are proved in the required position in addition to proving of UCR↑
(Route + overlap + isolation)

ii) All TPRs in the (Route + overlap) section are in the energised position.

iii) concerned crank handles are ‘IN’ and CH-CRs in de-energised condition.

iv) conflicting signal ASRs in energised condition.

v) all LC gates closed position (LCP) relays in energised position.

vi) concerned ASR, JSLRs, TPZRs, TSSLR in dropped condition.

vii) concerned LR in energised position.

viii) For diverging line, UGR will energise first and with UECR↑, HR will energise.

ix) ASR energised contact across HR coil to achieve cross protection.

d) Designing of (ASR, JSLR, NJPR) route releasing circuits:

i) For achieving automatic route release, minimum of the two track circuits shall
drop and pick up sequentially (if only one track circuit is available ahead of a
signal in addition to TSSLR, 60 sec. Timer is to be incorporated).

ii) concerned signal UCR, HR, HECR, DECR, UECR in dropped condition.

iii) all back lock track circuits in energised condition.

iv) when common timers/JSLRs are used for two or more conflicting signals, it
shall be ensured that only one JSLR picks up at a time (achieved through
RJPR).

v) wherever approach locking is effective, prove TSR↑ also in series with


approach track circuit TPR↑ to ensure that the train has not passed the signal.

e) WLR Circuits (Point control circuits)

i) Concerned signal ASRs, OHRs and Point track circuit TPRs in energised
position.

ii) SM’s key is ‘IN’

iii) concerned CHR in energised position.


iv) Any one signal LR in energised position to throw the point in a particular
position with drop contacts of all LRs which do not require the point in that
position.

f) Circuits CHR, CHR-CR, LCXR/LCAR, LCPR

When the crank handle chained with EKT key is ‘IN’ – the CHR picks up. The
concerned signal UCR and HR in dropped condition are proved to energise
CHR-CR to enable crank handle extraction.

The signals governing the movement (towards LC) ASRs in energised position
and Gate control knob in ‘Normal’ are proved to pick up LXCR/LCAR to enable
extraction of key from EKT to open the gate.

LCPR picks up when the key extracted after closing the gate is inserted
& turned in the EKT and through the de-energised contact of LCAR/LCXR.

g) Indications and Warning Circuits:

i) All signal aspects using concerned aspect ECR are given.

ii) All track down indications are given through TPR↓ contact.

iii) When a particular signal is taken ‘OFF’, the route locked indication (white) is
given through the de-energisd contact of ASR.

iv) Timer cancellation indications are given through respective JSLR↑ and NJPR↓.

v) LC closed indication is given through LCPR↑ contact.

vi) Crank handle ‘IN’ indication is given by CHR↑ contact.

vii) Crank handle ‘Free’ indication (white) is given by CHR-CR↑ contact and ‘OUT’
indication (Red) is given CHR-CR↓ contact.

viii) Power supply failure indication is given by ‘R’ relay ↓ contact.

ix) SM’s key ‘IN’ indication is given by SMR↑ contact.

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