Renault Virtual Ems
Renault Virtual Ems
Abstract
Virtualization allows the simulation of automotive ECUs on a Windows PC executing in closed-loop
with a vehicle simulation model. This approach enables to move certain development tasks from road
or test rigs and HiL (Hardware in the loop) to PCs, where they can often be performed faster and
cheaper. Renault has recently established such a virtualization process for powertrain control software
based on Simulink models. If the number of runnables exceeds a threshold (about 1500) the execution
of the virtual ECU is no longer straight forward and specific techniques are required. This paper
describes the motivation behind a Simulink model based process, the virtualization process and
applications of the resulting virtual ECUs.
1. Motivation
Since 2010, Renault has established a framework to develop engine control software for Diesel and
Gasoline engines [6]. The framework is heavily based on MATLAB/Simulink and the idea of model-
based development, which facilitates the carry-over and carry-across of application software between
software projects. In the Renault EMS architecture software is composed in to about 20 functions,
such as Air System, Combustion etc. A function consists of modules. A module is the smallest testable
software unit and contains runnables to be scheduled and executed by the Operating System (Os) of
the ECU. The Renault EMS development process includes basically the following steps [5].
1. Specification of about 200 generic configurable modules per ECU using MATLAB/Simulink.
2. Generation of C code (EMS application software) from all module specifications using
MATLAB/Simulink Embedded Coder.
3. MiL (Model in the Loop) test and validation of the resulting executable specifications at module
level in a simulated system environment, considering only essential interactions with other
modules and system environment. This is essentially a back-to-back test to make sure that the
Simulink model of a module and the corresponding production C code show equivalent and
intended behaviour. To insure software quality, this step is repeatedly performed with steps 1
and 2, based on the simulation capabilities of MATLAB/Simulink.
4. Configuration of modules to fit to the specific needs of a software project, such as absence or
presence of certain components.
5. Integration of generated configured C code and hand-coded platform software (basic software)
on supplied target hardware, a real ECU that communicates with other controllers via CAN
and other busses.
6. Validation and test of all modules on system level using the real ECU. In contrast to step 3, the
interactions of all modules and interactions with the system environment are visible then and
subject to testing. For example, the Os runs all scheduled runnables then, not just those of the
modules considered to be ‘essential’ for a module under test.
Critical assessment of the above process shows that there is a considerable delay between delivery of
a set of specifications to the software project team (at the end of step 3) and system-level tests
based on an ECU that runs entire software (step 6). Typical delays are weeks or months.
Consequently, module developers get feedback about the behaviour of their modules late, i.e., weeks
or months after releasing a specification (cf. Figure 1).
The cycle can be considerable shortened by frontloading system-level validation and test. Ideally,
system-level test and validation should be performed interleaved with steps 1, 2 and 3 replacing the
actual MiL, SiL validation process by a full ECU validation which would provide the software project
team with the possibility to validate integrated software within minutes. Technically, such a
frontloading of test activities can be achieved using a virtual ECU, shown as “New” in Figure 1:
specifications are used to build a virtual ECU for a model in the loop validation, before production code
is generated and integrated with real ECU hardware. This way, the software integration test cycle can
then be shortened from weeks and months to minutes.
The virtualization process is structured as shown in Fig. 2. Starting point is a consistent set of
modules, i.e. executable specifications given as Simulink models and MATLAB m scripts, a dictionary
that defines data types for all variables exchanged between modules, and an Os specification. Based
on this, an incremental, fully automated build process for a virtual ECU is implemented as follows: first,
time-stamp information available from the file system is used to identify all modules whose
specification has been updated since the previous build. For each such module, a wrapper model is
generated that implements the interface of the module to other modules and the Os. The wrapper is a
Simulink model and contains all runnables of the corresponding module plus some wiring to enable
the Os to call the runnables and to establish signal flow with other modules. In a next step the
generated wrapper and the wrapped module is turned into C code using Simulink coder. For this step,
the General Realtime Target (grt.tlc) shipped with Simulink Coder is used without modification.
The C code generated for the module is then post-processed to support on-line calibration. Finally, the
C code of all modules of the EMS is compiled together with an Os generated from the given Os
specification. The resulting binary runs on Windows PC and is available either as MATLAB/Simulink
Sfunction (.mexw32 or .mexw64), as FMU for Co-Simulation [4] or as a binary (Windows DLL) for
execution in Silver.
The above build process is controlled by three configuration files to be provided to the build script
Module interface data types: A dictionary that defines a data type such as float, int16,
uint8 etc. for each input and output of the wrapped module. To generate C code, Simulink
actually determines data types of signals dynamically via propagation through the block
diagram. This can lead to conflicting data types when generating C code for each module
separately, as we do here. To prevent this, we need to define signal data types statically. One
task of the wrapper is to fix the data types of inputs and outputs to the ones given in the
dictionary. A user does not need to list all inputs and outputs of a module. This would be
cumbersome, because interfaces are frequently changing. Instead, the wrapper generator
derives the list of inputs and output automatically by inspecting the wrapped module.
vECU config options: This selects configuration options to adapt the vECU to specific use
cases. A user can specify which additional inputs and outputs the vECU should expose at top-
level. For example, he can mark a module as ‘by-passable’, to support co-simulation of the
vECU with Simulink, with the bypassed module running in Simulink as described in section
4.2. He can also decide to turn all tuneable parameters of a certain module into inputs, to
support online-tuning of these parameters, see section 4.3.
Os specification: this is a table that maps each Os event to a list of runnables. The table is
used to generate the Os of the virtual ECU. When the named event occurs, the Os runs the
corresponding runnables in the given order. We distinguish periodic events such as “10 ms
clock tick” from aperiodic events, such as “ignition on”. Periodic events are generated by the
Os based on simulation time, while aperiodic events are inputs of the Os, to be generated by
the engine- or driver model.
Code generation takes about 40 seconds per module, while compilation of the entire C code for a
virtual ECU takes about 90 seconds. This means: when only one module is updated, and incremental
rebuild of the entire vECU takes less than 3 minutes. This is fast enough to test and validate an
updated module in system context immediately after editing the specification of the module. At
runtime, a vECU reads a configuration file that contains calibration data. This means, calibration data
can be varied and validated without recompiling the virtual ECU. This way, calibration data becomes
part of the validation and test loop as well.
The incremental strategy used to build a vECU allows us to generate C code for a single module
independent from all other modules. We also tried the opposite strategy: load all modules of the ECU
and a generated model of the Os into Simulink and generate C code in one pass. This proved to be
infeasible because initialization of the resulting model takes very long (> 10 hours) and the code
generator tends to run out of memory during subsequent code generation, even with 64-bit Simulink.
Depending on the use case to be supported, a virtual ECU is created from either
virtual PiL: the hex file resulting from compiling C code for the target processor
SiL: C code compiled for PC
MiL: models that generate the C code
which instructs the MCU to take the 32-bit integer currently stored in data register d1, decrement the
value by one and store the result in data register d5. A chip simulator reads instructions like this from
simulated memory, decodes these and performs the corresponding computation, which may update
register and memory content. Chip simulators come in different flavours: A chip simulator is instruction
accurate, if it correctly simulates the entire instruction set of the target MCU. A chip simulator is cycle
accurate, if the simulator also correctly predicts how many clock ticks it takes the MCU to run an
instruction. Instruction accurate simulators at typically an order of magnitude faster than cycle
accurate simulators because a cycle accurate simulator requires a far more detailed model of the
underlying MCU, to take into account effects of multi-core processing, instruction pipelines, caching
strategy, and speed of memory access on processor speed. Besides, chip simulators differ in the
coverage of their chip model: An instruction set simulator just simulates the instruction set of the MCU,
while a platform simulator covers also on-chip peripherals integrated on the chip, and maybe even
ASICs and other MCU external chips found in the ECU. A pure instruction set simulator can be
evolved into a platform simulator by integrating additional models, typically using some kind of plugin
API provided by the simulator.
Cycle accurate platform simulators can be implemented using hardware description languages such
as SystemC or VHDL, often based on design data (IP) owned by the chip maker, while instruction set
simulators are typically implemented based on a description of the corresponding instruction set.
In the context of engine control (and beyond), there are two major use cases for chip simulation
Suppliers of ECU hardware and MCUs use chip simulators to validate their ECU and chip
designs, for example w.r.t computing performance. Such analysis typically requires a cycle
accurate platform simulator as e.g. provided by Synopsys.
OEMs that need to integrate and calibrate supplied EMS software use chip simulators to run
the EMS software on PC in cases where they have access to the hex file, but no access to the
C code of the EMS. Fast instruction set simulators are often used for this type of application.
For example, [2, 3] reports about simulation of an engine controller using Silver’s chip
simulator. On a typical PC, a modern ECU runs then approximately in real-time.
Some tools used to create virtual ECUs based on given C code are EVE (ETAS), Silver (QTronic, [1,
2, 3]) and VEOS (dSPACE). Available tools differ w.r.t. the build process for vECUs, their handling of
AUTOSAR and non-AUTOSAR projects, their ability to process standardized ECU and bus
descriptions (such as ASAP2 .a2l, AUTOSAR .arxml, CAN .dbc, LIN .ldf, and FlexRay/Fibex
.xml), treatment of Os and drivers and runtime support for debugging, scripting, measurement and
calibration. Good support for the above descriptions enables to automate the creation of virtual ECUs.
In principle, a ECU can also be virtualized using a hypervisor as discussed in [10]. In our case, this
would require to run the Os of the EMS ('guest Os') on Windows ('host Os').
Surprisingly, the dominance of MBD does not mean that developers are typically able to simulate their
ECU on PC, even if they have full access to all models of the ECU. For example, loading and
initializing all 200 modules of a typical Renault EMS into 64-bit Simulink takes about 10 hours. As far
as we can see, the delay is mostly caused by the run-time propagation of data types in the model
initialization phase. Interactive simulation of a module in full ECU context is clearly out of reach then.
The only way to achieve reasonable execution times is to apply compilation techniques, either within
the Simulink environment, or (as we did here), in a Simulink external integration environment, based
on exported C code. As the case study presented here shows, such a compiled environment is not
straight forward to set up. In our case, it took many months. We could also not find reports about
similar attempts in the literature. It seems that developers have widely accepted the fact, that they
cannot run the ECU model inside their model-based IDE. Instead, they have to wait until the C code
generated by the models has been integrated with the target ECU hardware, and the ECU software
can be executed on a HiL system. Of course, this practice fundamentally contradicts the idea of MBD
which is about executable models whose behaviour can be explored and assessed during design.
3.4 Motivation for choosing the MiL type of virtual ECU
The objective of the project reported here has been to improve the quality of executable module
specifications by providing a virtual ECU that runs all ECU modules simultaneously, only minutes after
a module has been edited. It was therefore a natural choice to build the vECU from the module source
(Simulink .mdl files), which lead us to a MiL type of vECU. The production C code generator is a
shared and limited resource here, not easily available in the working environment of module
developers. This currently rules out the SiL type of vECU. Hex files for the target MCU become only
available weeks after a module edit (see Fig. 1), which rules out the vPiL type of vECU.
5. Conclusion
Renault started to use virtual ECUs to frontload test and calibration related activities during the
development of engine management software. First results of these activities are reported in this
paper and have been encouraging so far. In the long run, the existing MiL-based virtual ECUs will be
complemented by SiL-based virtual ECUs. The latter are based on production C code and will contain
basic software as well, which further minimizes the behavioural gap between real and virtual ECUs.
This will enable us to move even more development steps to the virtual platform.
References
[1] Andreas Junghanns, Jakob Mauss, Michael Seibt: Faster Development of AUTOSAR
compliant ECUs through simulation. Full paper presented at ERTS 2014, Toulouse, 2014.
http://qtronic.de/doc/ERTS_2014_autosar_sil.pdf
[2] Jakob Mauss: Chip simulation used to run automotive software on PC. Full paper presented
at ERTS 2014, Toulouse, 2014. http://qtronic.de/doc/ERTS_2014_chip_simulation.pdf
[3] René Linssen, Frank Uphaus, Jakob Mauss: Simulation of Networked ECUs for Drivability
Calibration. ATZ elektronik 4/2016. http://qtronic.de/doc/ATZe_04_2016_en.pdf
[4] Functional Mock-up Interface (FMI). https://www.fmi-standard.org/
[5] Dirk von Wissel, Pedro Moreno Lahore, et al.: Renault Model-Based Design - Powertrain
control development process. 23rd Int. AVL Conference “Engine & Environment”, Graz,
Austria, Sep.8th - 9th, 2011. https://www.researchgate.net/profile/Dirk_Von_Wissel/publications
[6] J. M. Dressler: A Walk through EMS 2010 Modular Software Development, 4th European
Congress ERTS, Toulouse, 2008.
[7] Dirk von Wissel, Jean-Marie Quelin, et al.: Industrial use of HIL Engine Management System
validation. 9th Symposium Automotive Powertrain Control Systems, Berlin, Sep. 20th – 21st,
2012. https://www.researchgate.net/profile/Dirk_Von_Wissel/publications
[8] Akira Watanabe, Asuka Sotome: Functional Development Methodology for On-Board
Distributed ECU Systems for Production Vehicle Application, SAE Int. J. Passeng. Cars -
Electron. Electr. Syst. 5(2):492-500, 2012, https://doi.org/10.4271/2012-01-0929.
[9] Michael Burke: Templates for Modeling Scheduling Behavior with Simulink and Stateflow. The
MathWorks, June 20, 2007.
[10] G.Heiser:The Role of Virtualization in Embedded Systems, Proc. of 1st Workshop on Isolation
and Integration in Embedded Systems, ser. IIES ’08. New York, NY, USA: ACM, 2008, pp.
11–16