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MPS Lecture 7 - Data Movement Instructions

The document discusses data movement instructions in microprocessor systems, explaining different addressing modes like register, direct, indexed, and immediate addressing that are used to specify the operands and destinations of instructions. It covers 16-bit and 32-bit instruction formats, different types of data sizes, and how symbolic assembly instructions are translated into binary machine code.

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Shehroze Talat
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116 views

MPS Lecture 7 - Data Movement Instructions

The document discusses data movement instructions in microprocessor systems, explaining different addressing modes like register, direct, indexed, and immediate addressing that are used to specify the operands and destinations of instructions. It covers 16-bit and 32-bit instruction formats, different types of data sizes, and how symbolic assembly instructions are translated into binary machine code.

Uploaded by

Shehroze Talat
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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EE222 – Microprocessor Systems

Data Movement Instructions

Arbab Latif
Spring 2021

Resources:
The Intel Microprocessors: Architecture, Programming, and Interfacing, Eighth Edition Barry B. Brey
(Section 4.1)
REVIEW
Machine Language
• Native binary code microprocessor uses as its
instructions to control its operation.
– instructions vary in length from 1 to 13 bytes
• Over 100,000 variations of machine language
instructions.
– there is no complete list of these variations
• Some bits in a machine language instruction
are given; remaining bits are determined for
each variation of the instruction.
Figure 4–1 The formats of the 8086–Core2 instructions. (a) The
16-bit form and (b) the 32-bit form.

MOV AL,[DI]
D=1 data flow to the register REG field from the R/M
MOV field
AL,[DI+2]
D=0 data flow to the register R/M field from the REG
MOV field
AL,[DI+1000H]
W=1 data size Word/DW
W=0 data size Byte
• All 8-bit displacements are sign-extended into
16-bit displacements when the processor
executes the instruction.
– if the 8-bit displacement is 00H–7FH (positive),
it is sign-extended to 0000H–007FH before
adding to the offset address
– if the 8-bit displacement is 80H–FFH (negative),
it is sign-extended to FF80H–FFFFH
Register Assignments
• Suppose a 2-byte instruction, 8BECH,
appears in a machine language program.
– neither a 67H (operand address-size override
prefix) nor a 66H (register-size override prefix)
appears as the first byte, thus the first byte is the
opcode
• In 16-bit mode, this instruction is converted to
binary and placed in the instruction format of
bytes 1 and 2, as illustrated in Figure 4–4.
Figure 4–4 The 8BEC instruction placed into bytes 1 and 2 formats from Figures 4–2
and 4–3. This instruction is a MOV BP,SP.

– the opcode is 100010, a MOV


instruction

– D and W bits are a logic 1, so a word moves


into the destination register specified in the
REG field
– REG field contains 101, indicating register BP,
so the MOV instruction moves data into
register BP
Figure 4–5 A MOV DL,[DI] instruction converted to its machine language form.

– If the instruction changes to MOV DL, [DI+1],


the MOD field changes to 01 for 8-bit
displacement
– first 2 bytes of the instruction remain the
same
– instruction now becomes 8A5501H instead of
8A15H
Figure 4–5 A MOV DL,[DI] instruction converted to its machine language form.

– If the instruction changes to MOV DL,


[DI+1000H]?
Special Addressing Mode
• A special addressing mode occurs when
memory data are referenced by only the
displacement mode of addressing for 16-bit
instructions.
• Examples are the MOV [1000H],DL and MOV
NUMB,DL instructions.
– first instruction moves contents of register DL
into data segment memory location 1000H
– second moves register DL into symbolic data
segment memory location NUMB
• When an instruction has only a displacement,
MOD field is always 00; R/M field always 110.
– You cannot actually use addressing mode [BP]
without a displacement in machine language
• If the individual translating this symbolic
instruction into machine language does not
know about the special addressing mode, the
instruction would incorrectly translate to a
MOV [BP], DL instruction.
Figure 4–6 The MOV [1000H],DI instruction uses the special addressing mode.

– bit pattern required to


encode the MOV
[1000H],DL instruction
in machine language
Figure 4–7 The MOV [BP],DL instruction converted to binary machine language.

– actual form of the MOV


[BP],DL instruction
– a 3-byte instruction with
a displacement of 00H
32-Bit Addressing Modes
• Found in 80386 and above.
– by running in 32-bit instruction mode or
– In 16-bit mode by using address-size prefix 67H
• A scaled-index byte indicates additional forms
of scaled-index addressing.
– mainly used when two registers are added to
specify the memory address in an instruction
• A scaled-index instruction has 215 (32K)
possible combinations.
• Over 32,000 variations of the MOV instruction
alone in the 80386 - Core2 microprocessors.
• Figure 4–8 shows the format of the scaled-
index byte as selected by a value of 100 in
the R/M field of an instruction when the 80386
and above use a 32-bit address.
• The leftmost 2 bits select a scaling factor
(multiplier) of 1x, 2x, 4x, 8x.
• Scaled-index addressing can also use a
single register multiplied by a scaling factor.
Figure 4–8 The scaled-index byte.

– the index and base fields


both contain register
numbers
An Immediate Instruction
• An example of a 16-bit instruction using
immediate addressing.
– MOV WORD PTR [BX+1000H] ,1234H moves a
1234H into a word-sized memory location
addressed by sum of 1000H, BX, and DS x 10H
• 6-byte instruction
– 2 bytes for the opcode; 2 bytes are the data of
1234H; 2 bytes are the displacement of 1000H
• Figure 4–9 shows the binary bit pattern for
each byte of this instruction.
Figure 4–9 A MOV WORD PTR, [BX=1000H] 1234H instruction converted to binary
machine language.
• This instruction, in symbolic form, includes
WORD PTR.
– directive indicates to the assembler that the
instruction uses a word-sized memory pointer
• If the instruction moves a byte of immediate
data, BYTE PTR replaces WORD PTR.
– if a doubleword of immediate data, the DWORD
PTR directive replaces BYTE PTR
• Instructions referring to memory through a
pointer do not need the BYTE PTR, WORD
PTR, or DWORD PTR directives.

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