Scribd
Upload
33 views12 pages

SRAM Based FPGAs

SRAM based FPGAs allow the logic functions implemented by logic elements to be reprogrammed by changing the values stored in SRAM cells. Logic elements typically contain look-up tables (LUTs) that can implement any function of their inputs. Logic elements may also contain registers and specialized adder circuits. FPGA architectures vary in their logic element designs but commonly include LUTs, registers, and specialized functions like addition.

Uploaded by

Ramesh Nair
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
33 views12 pages

SRAM Based FPGAs

SRAM based FPGAs allow the logic functions implemented by logic elements to be reprogrammed by changing the values stored in SRAM cells. Logic elements typically contain look-up tables (LUTs) that can implement any function of their inputs. Logic elements may also contain registers and specialized adder circuits. FPGA architectures vary in their logic element designs but commonly include LUTs, registers, and specialized functions like addition.

Uploaded by

Ramesh Nair
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 12

SRAM based FPGAs

Review
• FPGA configuration – 3 major circuit
technologies
• Design of FPGA architectures
• Granularity
• SRAM based FPGAs – Merits, De-merits
• Logic Elements – A LUT
Programming a LUT
• Unlike a typical logic gate , the function represented
by the LE can be changed by changing the values of
bits stored in the SRAM
• The n input LE can represent 22^n functions.
• A typical LE has 4 inputs
• Delay through the LUT is independent of bits stored
in the SRAM
• LE contains registers, flipflops, latches and
combinational logic
A flip flop in a LE
Complex LE
• A flipflop or latch is small compared to the
combinational logic element
• Using a separate cell for the memory element
would consume routing resources
• As shown in the figure the memory element is
connected to the output
• Whether it stores a given value is controlled by
its clock and enable inputs
Complex LE
• Many logic elements also contain special circuitry for
addition
• Some FPGAs has specialized adder logic in the LE
• Critical component of an adder is the carry chain
• 2 examples that describe the logic elements in a
FPGA
• Commonality between FPGA structures and the
varying approaches to the design of LE
Xilinx Spartan II CLB
Xilinx Spartan II CLB
• A slice includes two logic cells
• Foundation of logic cell is the pair of 4 bit
LUTs
• Their inputs are F1-F4 and G1-G4
• Each CLB also contains two three state
drivers
Altera Apex II LEs
Cascade chain
Arithmetic mode
Counter Mode

You might also like