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64 Gb/s Multilayer Switch: Product Brief

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0% found this document useful (0 votes)
135 views2 pages

64 Gb/s Multilayer Switch: Product Brief

Uploaded by

Joey
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Product Brief BCM53346

64 Gb/s Multilayer Switch

Overview 802.1p Quality of Service (QoS),


Energy Efficient Ethernet (EEE),
The Broadcom® BCM5334X and HiGig™ stacking.
System-on-a-Chip (SoC) switch
family offers industry-leading
integration and performance Features
in a small footprint. The device • Highly integrated 24-port
offers up to 24 multilayer GbE 10/100/1000 Mb/s Ethernet
ports and four XFI ports. Offering switch SoC
the industry’s highest level of
Key Features • Integrated copper 10/100/1000
integration, the BCM5334X has
PHYs
• Low-power Websmart switch for embedded GPHYs and a powerful
SMB networks. Arm A9 processor. The BCM5334X • Two integrated QSGMII
is ideal for cost-sensitive edge interfaces supporting eight
• Small footprint, low-power, and
connectivity applications, such as 10/100/1000 Mb/s ports
flexible switch based on StrataXGS®
WebSmart switches for Small and • Up to four XFI/two XFI and two
IV architecture.
Medium Businesses (SMB). HiGig[13] uplink/stacking ports
• EEE capability is ideal for SMB
desktop environment where there The BCM5334X device family • Up to two HiGig-Duo™[13]
are sustained periods of inactivity. offers I/O configurations that ports for nonblocking 48-port
• HiGig stacking for seamlessly address key segments of edge stackable design
stacking with other StrataXGS connectivity. A single device • Supports HiGig, HiGig2™, and
switch families. supports the popular 24x GbE HiGig-Lite stacking protocols
switch with 4x 10GbE uplinks.
• Stack 2x HGd[13]: sufficient for • Nonblocking architecture, line
24G line rate when cascading two Two devices can be connected to rate for all packet sizes
devices. build nonblocking 48x GbE switch • Fully integrated packet buffer
systems with 4x 10GbE uplinks. To
reduce the overall system cost, the • Intelligent Memory Management
device is engineered for low-power Unit (MMU) optimized for
operation to enable 48x GbE + 4x handling bursty data traffic
10GbE (or 13G stacking) designs. • L2, IPv4/IPv6 L3 packet
Furthermore, the device I/O is classification
optimized for board layout.
• Flexible Access Control List
When used with the Broadcom (ACL)
QSGMII PHY, the BCM53346 device • Full IPv4 and IPv6 L3 routing
can be connected to the PHYs support
without any trace crossovers. The
• Enhanced DoS attack statistics
optimized I/O map reduces system
gathering
design effort and enables low-cost
PCB design. The BCM5334X device • EEE support
family offers many advanced • Support for industrial
features, such as IEEE 802.1Q temperature
VLAN, VLAN translation, enhanced
• Low power consumption
Denial of Service (DoS) protection,
IPv4 and IPv6 support, advanced • 1588 Timestamping support
ContentAware™ Engine, IEEE (2-Step)

StrataConnect® Switching Technology


Product Brief

Benefits Key Features


• Based on industry-leading and • Integrated CPU
market-proven StrataXGS® IV • Two integrated QSGMII interfaces supporting eight 10/100/1000 Mb/s ports
architecture.
• Advanced three-stage ContentAware Engine
• Single-chip switch SoC optimized
for Websmart connectivity • Optimized for Websmart applications in SMB networks
applications for SMB networks. • Nonblock, full wirespeed performance for 24x GbE and 48x GbE systems
• Seamless connection to • 10GbE uplinks or HiGig[13] stacking
StrataXGS fabric using the
• Embedded GPHYs and High-Performance Arm A9 CPU
HiGig2 protocol.
• Enhanced buffer management for robust burst absorption
• Enhanced memory technology
delivers optimum usage of • Flexible ContentAware Engine for ACL and QoS
packet-buffer resources. • Full IPv4 and IPv6 support
• Eight flexible Class of Service • Low-power Energy Efficient Ethernet support
(CoS) queues per port assure the
lowest latency to high-priority • Enterprise-class L2 scalability
traffic. Figure. BCM53346 Block Diagram
• IPv6 support provides future- 4x 10GbE or (2x 10GbE + 2x HiGig)
proofing.
• Leverages Broadcom unified
API for software reuse and quick
time-to-market.
2x XFI 2x XFI/HiGig-Duo [13]
• Optimized ball pattern for low-
cost PCB design and single-
PCIe CPU Memory Management
system clock source.

L3 Rou�ng L2 Switching

ContentAware Meters/Policers

2 Integrated QSGMII Interfaces Suppor�ng Eight


10/100/1000 Mb/s Ports and 24x 10/100/1000
MACs with Integrated GPHYs

24x GbE

Ordering Information
Part Number Description

BCM53346 24 GbE + 4x XFI/Stack

BCM53344 24 GbE + 4x1G

BCM53343 16 GbE + 4x1G

BCM53342 8GbE

For more product information: broadcom.com


Copyright © 2020 Broadcom. All Rights Reserved. Broadcom, the pulse logo, ContentAware, HiGig, HiGig2. HiGig-Duo,
StrataConnect, StrataXGS, and Connecting everything are among the trademarks of Broadcom. The term “Broadcom” refers to
Broadcom Inc. and/or its subsidiaries.
53346-PB102 June 11, 2020

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