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Ldic Final Set2

The document is an exam paper containing 8 questions about linear and digital integrated circuits applications. The questions cover topics like operational amplifiers, PLL, AD converters, multiplexers, flip-flops, counters, DACs, decoders and shift registers. Students are required to answer 5 out of the 8 questions in the paper.

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Niranjan Reddy
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0% found this document useful (0 votes)
28 views1 page

Ldic Final Set2

The document is an exam paper containing 8 questions about linear and digital integrated circuits applications. The questions cover topics like operational amplifiers, PLL, AD converters, multiplexers, flip-flops, counters, DACs, decoders and shift registers. Students are required to answer 5 out of the 8 questions in the paper.

Uploaded by

Niranjan Reddy
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Code No.

: EC-PCC-222
R18 H.T.No . R 0

CMR INSTITUTE OF TECHNOLOGY: HYDERABAD


UGC AUTONOMOUS
II–BTECH II–Semester End Examinations (Supply) – March– 2021
LINEAR AND DIGITAL IC APPLICATIONS
(ELECTRONICS AND COMMUNICATION ENGINEERING )

[Time: 3 Hours] [Max. Marks: 70]


Answer Any Five Questions. Each Question Carries 14 Marks

[5 x 14=70M]
S. No. Question BTL CO PO
i. Briefly explain each block in the block diagram of operational amplifier. II 1 3
1
ii.Outline a neat circuit diagram of an integrator circuit. Explain its functioning
with the Input-Output wave forms.
i. How the PLL can be used as a FSK demodulator? Explain[5M] I 2 3
2
ii.Discuss briefly about the DC characteristics of an operational amplifier? [9M]
VI
i. Explain the working of a counter type A/D converter and state its important II 3 3
3
features.
ii. Illustrate the schematic circuit diagram of dual-slope A/D converter and
explain its operation. Derive expression for output voltage.
i. With the help of logic diagram explain 74×157 multiplexer. II 4 3
4 ii. Design a 5 to 32 line decoder using 3 to 8 line decoder, active low outputs VI
with 2 active low and one active high enable
i. Explain how a JK- flip-flop can be constructed using a T- flip-flop. II 5 3
5 ii. Design a 4-bit binary synchronous counter using 74×74. VI
i. Explain the operation of instrumentation amplifier. II 1,2 3
6 I
ii. Why are active filters preferred? List the commonly used filters.
i. Briefly explain the working of weighted resistor D/A converter. II 3,4 3
7 VI
ii. Design a 4 to 16 decoder using two 74×138 decoders.
i. Design an 8-bit parallel- in and serial-out shift register. Explain the operation VI 5,1 3
8
of the above shift register with the help of timing waveforms. [9M]
II
ii. Illustrate the Bias current compensations circuit and explain the working. [5M]
________*********________

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