FSQ0565R, FSQ0765R Green-Mode Fairchild Power Switch (FPS™) For Quasi-Resonant Operation
FSQ0565R, FSQ0765R Green-Mode Fairchild Power Switch (FPS™) For Quasi-Resonant Operation
October 2007
FSQ0565R, FSQ0765R
Green-Mode Fairchild Power Switch (FPS™) for
Quasi-Resonant Operation - Low EMI and High Efficiency
Features Description
Optimized for Quasi-Resonant Converter (QRC) A Quasi-Resonant Converter (QRC) generally shows
Low EMI through Variable Frequency Control and AVS lower EMI and higher power conversion efficiency than a
(Alternating Valley Switching) conventional hard-switched converter with a fixed
High-Efficiency through Minimum Voltage Switching switching frequency. The FSQ-series is an integrated
Narrow Frequency Variation Range over Wide Load Pulse-Width Modulation (PWM) controller and
and Input Voltage Variation SenseFET specifically designed for quasi-resonant
Advanced Burst-Mode Operation for Low Standby operation and Alternating Valley Switching (AVS). The
Power Consumption PWM controller includes an integrated fixed-frequency
Simple Scheme for Sync Voltage Detection oscillator, Under-Voltage Lockout (UVLO), Leading-
Pulse-by-Pulse Current Limit Edge Blanking (LEB), optimized gate driver, internal soft-
Various Protection functions: Overload Protection
start, temperature-compensated precise current sources
(OLP), Over-Voltage Protection (OVP), Abnormal for a loop compensation, and self-protection circuitry.
Over-Current Protection (AOCP), Internal Thermal Compared with a discrete MOSFET and PWM controller
Shutdown (TSD) with Hysteresis, Output Short solution, the FSQ-series can reduce total cost,
Protection (OSP) component count, size, and weight; while simultaneously
Under-Voltage Lockout (UVLO) with Hysteresis increasing efficiency, productivity, and system reliability.
Internal Start-up Circuit This device provides a basic platform that is well suited
Internal High-Voltage Sense FET (650V) for cost-effective designs of quasi-resonant switching
Built-in Soft-Start (15ms) flyback converters.
Applications
Power Supply for LCD TV and Monitor, VCR, SVR,
STB, and DVD & DVD Recorder
Adapter
Related Resourses
Visit: http://www.fairchildsemi.com/apnotes/ for:
AN-4134: Design Guidelines for Offline Forward
Converters Using Fairchild Power Switch (FPS™)
AN-4137: Design Guidelines for Offline Flyback
Converters Using Fairchild Power Switch (FPS™)
AN-4140: Transformer Design Consideration for
Offline Flyback Converters Using Fairchild Power
Switch (FPS™)
AN-4141: Troubleshooting and Design Tips for
Fairchild Power Switch (FPS™) Flyback Applications
AN-4145: Electromagnetic Compatibility for Power
Converters
AN-4147: Design Guidelines for RCD Snubber of
Flyback
AN-4148: Audible Noise Reduction Techniques for
Fairchild Power Switch Fairchild Power Switch(FPS™)
Applications
AN-4150: Design Guidelines for Flyback Converters
Using FSQ-Series Fairchild Power Switch (FPS™)
VO
AC
IN
Vstr
Drain
PWM
Sync GND
FB VCC
FSQ0765R Rev.00
AVS OSC
Vref
0.35/0.55
VCC good
VCC Vref VBurst
8V/12V
Idelay IFB
FB 3R PWM
S Q
4
Gate
Soft- LEB
R R Q driver
Start 250ns
tON < tOSP
after SS
VOSP LPF
AOCP
2
VSD TSD S Q VOCP
(1.1V)
GND
LPF R Q
VOVP
VCC good
FSQ0765R Rev.00
6. Vstr
5. Sync
4. FB
3. VCC
2. GND
1. Drain
FSQ0765R Rev.00
Pin Definitions
Pin # Name Description
1 Drain SenseFET drain. High-voltage power SenseFET drain connection.
2 GND Ground. This pin is the control ground and the SenseFET source.
Power Supply. This pin is the positive supply input. This pin provides internal operating cur-
3 VCC
rent for both start-up and steady-state operation.
Feedback. This pin is internally connected to the inverting input of the PWM comparator. The
collector of an opto-coupler is typically tied to this pin. For stable operation, a capacitor should
4 FB
be placed between this pin and GND. If the voltage of this pin reaches 6V, the overload pro-
tection triggers, which shuts down the FPS.
Sync. This pin is internally connected to the sync-detect comparator for quasi-resonant switch-
5 Sync
ing. In normal quasi-resonant operation, the threshold of the sync comparator is 1.2V/1.0V.
Start-up. This pin is connected directly, or through a resistor, to the high-voltage DC link. At
start-up, the internal high-voltage current source supplies internal bias and charges the exter-
6 Vstr
nal capacitor connected to the VCC pin. Once VCC reaches 12V, the internal current source is
disabled. It is not recommended to connect Vstr and Drain together.
Thermal Impedance
TA = 25°C unless otherwise specified.
Notes:
8. Free standing with no heat-sink under natural convection.
9. Infinite cooling condition - refer to the SEMI G30-88.
Notes:
8. Propagation delay in the control IC.
9. Guaranteed by design; not tested in production.
10. Includes gate turn-on time.
1.2 1.2
Normalized
Normalized
1.0 1.0
0.8 0.8
0.6 0.6
0.4 0.4
0.2 0.2
0.0 0.0
-25 0 25 50 75 100 125 -25 0 25 50 75 100 125
Temperature [°C] Temperature [°C]
Figure 4. Operating Supply Current (IOP) vs. TA Figure 5. UVLO Start Threshold Voltage
(VSTART) vs. TA
1.2 1.2
Normalized
Normalized
1.0 1.0
0.8 0.8
0.6 0.6
0.4 0.4
0.2 0.2
0.0 0.0
-25 0 25 50 75 100 125 -25 0 25 50 75 100 125
Temperature [°C] Temperature [°C]
Figure 6. UVLO Stop Threshold Voltage Figure 7. Start-up Charging Current (ICH) vs. TA
(VSTOP) vs. TA
1.2 1.2
Normalized
Normalized
1.0 1.0
0.8 0.8
0.6 0.6
0.4 0.4
0.2 0.2
0.0 0.0
-25 0 25 50 75 100 125 -25 0 25 50 75 100 125
Temperature [°C] Temperature [°C]
Figure 8. Initial Switching Frequency (fS) vs. TA Figure 9. Maximum On Time (tON.MAX) vs. TA
1.2 1.2
Normalized
Normalized
1.0 1.0
0.8 0.8
0.6 0.6
0.4 0.4
0.2 0.2
0.0 0.0
-25 0 25 50 75 100 125 -25 0 25 50 75 100 125
Temperature [°C] Temperature [°C]
Figure 10. Blanking Time (tB) vs. TA Figure 11. Feedback Source Current (IFB) vs. TA
1.2 1.2
Normalized
Normalized
1.0 1.0
0.8 0.8
0.6 0.6
0.4 0.4
0.2 0.2
0.0 0.0
-25 0 25 50 75 100 125 -25 0 25 50 75 100 125
Temperature [°C] Temperature [°C]
Figure 12. Shutdown Delay Current (IDELAY) vs. TA Figure 13. Burst-Mode High Threshold Voltage
(Vburh) vs. TA
1.2 1.2
Normalized
Normalized
1.0 1.0
0.8 0.8
0.6 0.6
0.4 0.4
0.2 0.2
0.0 0.0
-25 0 25 50 75 100 125 -25 0 25 50 75 100 125
Temperature [°C] Temperature [°C]
Figure 14. Burst-Mode Low Threshold Voltage Figure 15. Peak Current Limit (ILIM) vs. TA
(Vburl) vs. TA
1.2 1.2
Normalized
Normalized
1.0 1.0
0.8 0.8
0.6 0.6
0.4 0.4
0.2 0.2
0.0 0.0
-25 0 25 50 75 100 125 -25 0 25 50 75 100 125
Temperature [°C] Temperature [°C]
Figure 16. Sync High Threshold Voltage 1 Figure 17. Sync Low Threshold Voltage 1
(VSH1) vs. TA (VSL1) vs. TA
1.2 1.2
Normalized
Normalized
1.0 1.0
0.8 0.8
0.6 0.6
0.4 0.4
0.2 0.2
0.0 0.0
-25 0 25 50 75 100 125 -25 0 25 50 75 100 125
Temperature [°C] Temperature [°C]
Figure 18. Shutdown Feedback Voltage (VSD) vs. TA Figure 19. Over-Voltage Protection (VOV) vs. TA
1.2 1.2
Normalized
Normalized
1.0 1.0
0.8 0.8
0.6 0.6
0.4 0.4
0.2 0.2
0.0 0.0
-25 0 25 50 75 100 125 -25 0 25 50 75 100 125
Temperature [°C] Temperature [°C]
Figure 20. Sync High Threshold Voltage 2 Figure 21. Sync Low Threshold Voltage 2
(VSH2) vs. TA (VSL2) vs. TA
VCC Vref
VDC Idelay IFB
VO VFB SenseFET
4 OSC
FOD817A
D1 D2
Ca CB 3R
+ Gate
VFB* R driver
VCC Vstr KA431 -
3 6
OLP Rsense
ICH VSD
FSQ0765R Rev. 00
Vref
8V/12V VCC good
Figure 23. Pulse-Width-Modulation (PWM) Circuit
Internal
Bias 3. Synchronization: The FSQ-series employs a quasi-
FSQ0765R Rev.00
resonant switching technique to minimize the switching
noise and loss. The basic waveforms of the quasi-
Figure 22. Start-up Circuit
resonant converter are shown in Figure 24. To minimize
the MOSFET's switching loss, the MOSFET should be
2. Feedback Control: FPS employs current-mode turned on when the drain voltage reaches its minimum
control, as shown in Figure 23. An opto-coupler (such as value, which is indirectly detected by monitoring the VCC
the FOD817A) and shunt regulator (such as the KA431) winding voltage, as shown in Figure 24.
are typically used to implement the feedback network.
Vds
Comparing the feedback voltage with the voltage across
the Rsense resistor makes it possible to control the
VRO
switching duty cycle. When the reference pin voltage of
the shunt regulator exceeds the internal reference
VRO
voltage of 2.5V, the opto-coupler LED current increases, VDC
VDS
VCC
4.4V
12V
Vsync
1.2V
1.0V
8V
6.0V VFB
0
Minimum turn-on time
2.5V D
Vo 1.2us
t1 t2 t Io
FSQ0765R Rev. 00
Figure 29. Overload Protection 0
Npri
VDC VFB
NVcc
VCLAMP
VDS
Figure 32. OVP Triggering
Features
Average efficiency of 25%, 50%, 75%, and 100% load conditions is higher than 80% at universal input
Low standby mode power consumption (<1W at 230VAC input and 0.5W load)
Reduce EMI noise through valley switching operation
Enhanced system reliability through various protection functions
Internal soft-start (15ms)
1. Schematic
FSQ0765R Rev.00 D201 L201
T1 5μH
MBRF10H100
EER3016
12V, 3A
10
1
C202
C201
R103 C104 1000μF
1000μF
R102 33kΩ 4.7nF 25V
2 8 25V
68kΩ 1W 630V
R104
D101
20Ω
C103 1N 4007
0.5W 3
100μF
2 400V
BD101
2KBP06M3N257 FSQ0565R
6
1 3 Vstr 1
Drain
5 R105 C106 C107 L202
D202
Sync 100Ω 100nF 47μF 5μH
MBRF1060
Vcc 0.5W SMD 50V
4 3 5V, 2A
4 Vfb 4 7
GND D102 C204
C102 C105 2 UF 4004 R107 C203
1000μF
150nF 33nF 18kΩ 1000μF
10V
275VAC 100V 6 10V
5
ZD101
1N4745A
C301
4.7nF
LF101 1kV
R108
34mH
12kΩ
R201
1kΩ
R101 R204
2MΩ 4kΩ
1W R202 C205
R203
1.2kΩ 47nF
1.2kΩ
Optional components IC301
FOD817A IC201
C101 KA431
RT1 150nF R205
F1
5D-9 275VAC 4kΩ
FUSE
250V
2A
3. Winding Specification
4. Electrical Characteristics
MKT-TO220A06revB
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS
HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE
APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS
PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S
WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.