DIGITAL

LOGIC LAB MANUAL

DESIGN

College of Computer Science & Information Studies |

Engr. Adeel Rifaat Mirza
 DIGITAL LOGIC DESIGN

List of Experiments:
1 To verify the truth table of basic logic gates:
a) OR gate
b) AND gate
c) NOT gate (INVERTER)
d) XOR gate (Exclusive OR)

2 To implement Half and Full-Adder.

3 To implement Half-Subtracter.

4 To implement NOT, OR and AND gates using NOR and NAND gates.

5 To implement BCD-to-Excess 3 code converter.

6 To implement 3 bit parity generator and checker.

7 To implement BCD to 7 segments decoder function.

8 To implement 2-to-4 line decoder.

9 To implement demultiplexer.

10 To implement Octal to Binary Encoder.

11 To implement 4-to-1 Multiplexer.

12 To implement RS Flip Flop.

13 To implement D Flip Flop.

14 To implement JK Flip Flop.

15 To implement Clocked master slave Flip Flop.

16 To implement Edge Triggered Flip Flop.

17 To Observe the function of 555 timer IC.

Experiment No. 1
To verify the truth tables of basic Logic Gates.

Apparatus:
1) Bread board (ePal) 2) +5v Power Supply (ePAL) 3) Related ICs
4) 2 resisters 1K ohm 5) Connecting wires 6) 2 switches (on-off)
7) 1 LED (ePal)

Precautions:

1) Switch off power supply while connecting wires.

2) Handle ICs carefully so that their pins do not turn or break.
3) Be careful while choosing right power supply.

a) To verify the truth table of ‘OR’ Gate.

OR Gate IC: 7432 (TTL)

Procedure:
Step 1) Fix the IC (7432) on the bread board across the middle separation line.
Step 2) Connect the +5v power supply with one of the upper horizontally shorted
row of Bread board and ground to the other row.
Step 3) Connect the Vcc (Pin 14) and GRND (Pin 7) of IC with the +5v supply and
ground from bread board respectively.
Step 4) Select now one of the OR gates from the IC and connect the inputs circuit
using pull down resisters and switches accordingly.
Step 5) Connect an LED at the output Pin of the OR gate to observe the output.
Step 6) Verify now the OR gate’s truth table by varying the A and B inputs accordingly.

Result:
A HIGH output (1) results if one or both the inputs to the OR gate are HIGH (1).
If neither input is HIGH, a LOW output (0) results.

1
Symbol:

Circuit Diagram:

OR gate’s TRUTH TABLE:

INPUTS OUTPUT
A B Y
0 0 0
0 1 1
1 0 1
1 1 1

7432 Connection Diagram:

2
 b) To verify the truth table of ‘AND’ Gate.

OR Gate IC: 7408 (TTL)

Procedure:
Step 1) Fix the IC (7408) on the bread board across the middle separation line.
Step 2) Connect the +5v power supply with one of the upper horizontally shorted row
of Bread board and ground to the other row.
Step 3) Connect the Vcc (Pin 14) and GRND (Pin 7) of IC with the +5v supply and
ground from bread board respectively.
Step 4) Select now one of the AND gates from the IC and connect the inputs circuit
using pull down resisters and switches accordingly.
Step 5) Connect an LED at the output Pin of the AND gate to observe the output.
Step 6) Verify now the AND gate’s truth table by varying the A and B inputs
accordingly.

Result:
A HIGH output (1) results only if both the inputs to the AND gate are HIGH (1).
If either input is LOW (0), a LOW output (0) results.

3
Symbol:

Circuit Diagram:

AND gate’s TRUTH TABLE:

INPUTS OUTPUT
A B Y
0 0 0
0 1 0
1 0 0
1 1 1

7408 Connection Diagram:

4
 c) To verify the truth table of ‘NOT’ Gate (INVERTER).

OR Gate IC: 7404 (TTL)

Procedure:
Step 1) Fix the IC (7404) on the bread board across the middle separation line.
Step 2) Connect the +5v power supply with one of the upper horizontally shorted row
of Bread board and ground to the other row.
Step 3) Connect the Vcc (Pin 14) and GRND (Pin 7) of IC with the +5v supply and
ground from bread board respectively.
Step 4) Select now one of the NOT gates from the IC and connect the input circuit
using pull down resisters and switches accordingly.
Step 5) Connect an LED at the output Pin of the INVERTER to observe the output.
Step 6) Verify now the NOT gate’s truth table by varying the input accordingly.

Result:
INVERTER just inverts the input, HIGH into LOW and LOW into HIGH.

5
Symbol:

Circuit Diagram:

NOT gate’s TRUTH TABLE:

Input(A) Output(Y)
0 1
1 0

7404 Connection Diagram:

6
 d) To verify the truth table of ‘XOR’ Gate (Exclusive OR).

OR Gate IC: 7486 (TTL)

Procedure:
Step 1) Fix the IC (7486) on the bread board across the middle separation line.
Step 2) Connect the +5v power supply with one of the upper horizontally shorted row
of Bread board and ground to the other row.
Step 3) Connect the Vcc (Pin 14) and GRND (Pin 7) of IC with the +5v supply and
ground from bread board respectively.
Step 4) Select now one of the XOR gates from the IC and connect the inputs circuit
using pull down resisters and switches accordingly.
Step 5) Connect an LED at the output Pin of the XOR gate to observe the output.
Step 6) Verify now the XOR gate’s truth table by varying the A and B inputs
accordingly.

Result:
A HIGH output (1) results if one, and only one, of the inputs to the gate is HIGH (1). If
both inputs are LOW (0) or both are HIGH (1), a LOW output (0) results.

7
Symbol:

Circuit Diagram:

XOR gate’s TRUTH TABLE:

INPUTS OUTPUT
A B Y
0 0 0
0 1 1
1 0 1
1 1 0

7486 Connection Diagram:

8
Experiment No. 2
2) To implement Half and Full-Adder.

Apparatus:
1) Bread board (ePal) 2) +5v Power Supply (ePAL) 3) IC 7408, 7486, 7432
4) 2 resisters 1K ohm 5) Connecting wires 6) 2 switches (on-off)
7) 1 LED (ePal)

Precautions:

4) Switch off power supply while connecting wires.

5) Handle ICs carefully so that their pins do not turn or break.
6) Be careful while choosing exact power supply.

a) Half-Adder.
Function Expressions:
C=xy
S=x’y+xy’

Procedure:
Step 1) Fix both ICs (7486, 7408) on the bread board across the middle separation line.
Step 2) Connect the +5v power supply with one of the upper horizontally shorted
row of Bread board and ground to the other row.
Step 3) Connect the Vcc (Pin 14) and GRND (Pin 7) of both ICs with the +5v supply and
ground from bread board respectively.
Step 4) Select now one of the XOR gates from the IC (7486) and connect the inputs
circuit using pull down resisters and switches accordingly.
Step 5) Connect an LED at the output Pin of XOR gate to observe the output as ‘S’
(sum).
Step 6) Connect now the input pins of XOR gate with the input pins to one of the
AND gates of IC 7408.
Step 7) Connect an LED at the output Pin of the AND gate to observe the output as ‘C’
(carry).
Step 8) Verify now the HALF Adder’s outputs by varying the ‘x’ and ‘y’ inputs
accordingly using ON-OFF switches.

Result:
The CARRY output (C) is LOW (0) unless both inputs are HIGH (1).

The SUM output (S) represents the least significant bit of the sum.

9
Circuit Diagram:

Half-Adder’s TRUTH TABLE:

|--INTPUTS---| |--OUTPUTS--|
X Y C S
0 0 0 0
0 1 0 1
1 0 0 1
1 1 1 0

10
 b) FULL adder.

Function Expressions:
C=xy+z(x y)
S=x y z

Procedure:
Step 1) Fix the ICs (7486, 7408, 7432) on the bread board across the middle separation
line.
Step 2) Connect the +5v power supply with one of the upper horizontally shorted
row of Bread board and ground to the other row.
Step 3) Connect the Vcc (Pin 14) and GRND (Pin 7) of the ICs with the +5v supply and
ground from bread board respectively.
Step 4) Select now one of the XOR gates from the IC (7486) and connect the
inputs (x, y) circuit using pull down resisters and switches accordingly.
Step 5) Then, select another XOR and connect the output of first XOR to one of its
inputs.
Step 6) Connect now the input (z) circuit using pull down resister and switch.
Step 7) Connect an LED at the output Pin of second XOR gate to observe the output
as ‘S’ (sum).
Step 8) Connect now the input pins of first XOR gate to the input pins to one of the
AND gates of IC 7408.
Step 9) Then, connect input pins of second XOR gate to the input pins of another
AND gate of IC 7408.
Step 10) Connect now the output pins of both AND gates to the input pins of one of OR
gates of IC 7432.
Step 11) Connect an LED at the output Pin of the OR gate to observe the output as ‘C’
(carry).
Step 12) Verify now the Full-Adder’s outputs by varying the ‘x’, ‘y’ and ‘z’ inputs
accordingly using ON-OFF switches.

Result:
The CARRY output (C) is LOW (0) unless both inputs are HIGH (1).

The SUM output (S) represents the least significant bit of the sum.

11
Circuit Diagram:

Full-Adder’s TRUTH TABLE:

|---------INTPUTS---------| |--OUTPUTS--|
x y Z C S
0 0 0 0 0
0 0 1 0 1
0 1 0 0 1
0 1 1 1 0
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 1 1

12
Experiment No. 3
To implement Half-Subtracter.

Apparatus:
1) Bread board (ePal) 2) +5v Power Supply (ePAL) 3) IC 7408, 7486, 7432
4) 2 resisters 1K ohm 5) Connecting wires 6) 2 switches (on-off)
7) 2 LEDs (ePal)

Precautions:

1) Switch off power supply while connecting wires.

2) Handle ICs carefully so that their pins do not turn or break.
3) Be careful while choosing exact power supply.

Function Expressions:
B = x’ y
S=x y

Procedure:
Step 1) Fix both ICs (7486, 7408, 7404) on the bread board across the middle separation
line.
Step 2) Connect the +5v power supply with one of the upper horizontally shorted
row of Bread board and ground to the other row.
Step 3) Connect the Vcc (Pin 14) and GRND (Pin 7) of the ICs with the +5v supply and
ground from bread board respectively.
Step 4) Select now one of the XOR gates from the IC (7486) and connect the inputs
circuit using pull down resisters and switches accordingly.
Step 5) Connect an LED at the output Pin of XOR gate to observe the output as ‘D’
(Difference).
Step 6) Connect now the input pin (y) of XOR gate to first input pin of one of the
AND gates of IC 7408.
Step 7) Connect now the input pin (x) of XOR gate to the input pin of one of the
NOT gates of IC 7404.
Step 8) Then connect the output pin of NOT gate to the second input pin of AND gate.
Step 9) Connect an LED at the output Pin of the AND gate to observe the output as ‘B’
(borrow).
Step 10) Verify now the HALF-Subtracter’s outputs by varying the ‘x’ and ‘y’ inputs
accordingly using ON-OFF switches.

Result:
Then output borrow B is 0 as long as ‘x’ greater than or equal to ‘y’. It is a 1 for x = 0 and
y = 1.
The logic for D output is exactly the same as the logic for output S in the Half-Adder.

13
Circuit Diagram:

Half-Subtracter’s TRUTH TABLE:

|----INPUTS----||-----OUTPUTS-----|
x Y B D
0 0 0 0
0 1 1 1
1 0 0 1
1 1 0 0

14
Experiment No. 4
To implement NOT, OR and AND gates using NOR and NAND gates.

Apparatus:
1) Bread board (ePal) 2) +5v Power Supply (ePAL) 3) IC 7400
4) 2 resisters 1K ohm 5) Connecting wires 6) 2 switches (on-off)
7) 1 LED (ePal)

Precautions:
1) Switch off power supply while connecting wires.
2) Handle ICs carefully so that their pins do not break.
3) Be careful while choosing exact power supply.

Using NAND Gate:

NOT Gate

Procedure:
Step 1) Fix the IC (7400) on the bread board across the middle separation line.
Step 2) Connect the +5v power supply with one of the upper horizontally shorted
row of Bread board and ground to the other row.
Step 3) Connect the Vcc (Pin 14) and GRND (Pin 7) of IC with the +5v supply and
ground from bread board respectively.
Step 4) Select now one of the NAND gates from the IC and connect both of its input
pins with each other and connect the input circuit with one of input pins using
pull down resister and switch accordingly.
Step 5) Connect an LED at the output Pin of the NAND gate to observe the output.
Step 6) Verify now the NOT gate’s truth table by varying the input accordingly.

Circuit Diagram:

TRUTH TABLE:
Input Output
0 1
1 0

15
 AND Gate
Procedure:
Step 1) Fix the IC (7400) on the bread board across the middle separation line.
Step 2) Connect the +5v power supply with one of the upper horizontally shorted
row of Bread board and ground to the other row.
Step 3) Connect the Vcc (Pin 14) and GRND (Pin 7) of IC with the +5v supply and
ground from bread board respectively.
Step 4) Select now one of the NAND gates from the IC and connect the inputs circuit
using pull down resisters and switches accordingly.
Step 5) Connect the output of this NAND gate with the input of another NAND gate.
Short the inputs of second NAND gate with each other.
Step 6) Connect an LED at the output Pin of the second NAND gate to observe the
output.
Step 7) Verify now the AND gate’s truth table by varying the inputs accordingly.

Circuit Diagram:

AND gate’s TRUTH TABLE:

Input (A) Input (B) Output(Y)

0 0 0
0 1 0
1 0 0
1 1 1

16
 OR Gate
Procedure:
Step 1) Fix the IC (7400) on the bread board across the middle separation line.
Step 2) Connect the +5v power supply with one of the upper horizontally shorted
row of Bread board and ground to the other row.
Step 3) Connect the Vcc (Pin 14) and GRND (Pin 7) of IC with the +5v supply and
ground from bread board respectively.
Step 4) Select now one of the NAND gates from the IC and connect the input circuit
using pull down resister and switch accordingly. Connect its input pins with
each other.
Step 5) Select second NAND gate and connect the input circuit using pull down resister
and switch accordingly. Connect its input pins with each other.
Step 5) Connect now the outputs of both NAND gates with input pins of third NAND
gate.
Step 6) Connect an LED at the output Pin of this NAND gate to observe the
output.
Step 6) Verify now the OR gate’s truth table by varying the inputs accordingly.

Circuit Diagram:

OR gate’s TRUTH TABLE:

INPUTS OUTPUT
A B Y
0 0 0
0 1 1
1 0 1
1 1 1

17
Using NOR Gate:
NOT Gate

Procedure:
Step 1) Fix the IC (7402) on the bread board across the middle separation line.
Step 2) Connect the +5v power supply with one of the upper horizontally shorted
row of Bread board and ground to the other row.
Step 3) Connect the Vcc (Pin 14) and GRND (Pin 7) of IC with the +5v supply and
ground from bread board respectively.
Step 4) Select now one of the NOR gates from the IC and connect both of its input
pins with each other and connect the input circuit with one of input pins using
pull down resister and switch accordingly.
Step 5) Connect an LED at the output Pin of the NOR gate to observe the output.
Step 6) Verify now the NOT gate’s truth table by varying the input accordingly.

Circuit Diagram:

TRUTH TABLE:
Input Output
0 1
1 0

18
 OR Gate
Procedure:
Step 1) Fix the IC (7400) on the bread board across the middle separation line.
Step 2) Connect the +5v power supply with one of the upper horizontally shorted
row of Bread board and ground to the other row.
Step 3) Connect the Vcc (Pin 14) and GRND (Pin 7) of IC with the +5v supply and
ground from bread board respectively.
Step 4) Select now one of the NOR gates from the IC and connect the inputs circuit
using pull down resisters and switches accordingly.
Step 5) Connect the output of this NOR gate with the input of another NOR gate.
Short the inputs of second NOR gate with each other.
Step 6) Connect an LED at the output Pin of the second NAND gate to observe the
output.
Step 7) Verify now the OR gate’s truth table by varying the inputs accordingly.

Circuit Diagram:

OR gate’s TRUTH TABLE:

Input (A) Input (B) Output(Y)

0 0 0
0 1 1
1 0 1
1 1 1

19
 AND Gate
Procedure:
Step 1) Fix the IC (7400) on the bread board across the middle separation line.
Step 2) Connect the +5v power supply with one of the upper horizontally shorted
row of Bread board and ground to the other row.
Step 3) Connect the Vcc (Pin 14) and GRND (Pin 7) of IC with the +5v supply and
ground from bread board respectively.
Step 4) Select now one of the NOR gates from the IC and connect the input circuit
using pull down resister and switch accordingly. Connect its input pins with
each other.
Step 5) Select second NOR gate and connect the input circuit using pull down resister
and switch accordingly. Connect its input pins with each other.
Step 5) Connect now the outputs of both NOR gates with input pins of third NOR
gate.
Step 6) Connect an LED at the output Pin of this NOR gate to observe the
output.
Step 6) Verify now the AND gate’s truth table by varying the inputs accordingly.

Circuit Diagram:

AND gate’s TRUTH TABLE:

Input (A) Input (B) Output(Y)

0 0 0
0 1 0
1 0 0
1 1 1

Result:

Any combinational digital logic can be implemented using NAND or NOR

gates.
20
Experiment No. 5
To implement BCD-to-Excess 3 code converter.

Apparatus:
1) Bread board (ePal) 2) +5v Power Supply (ePAL) 3) ICs 7404, 7408, 7432
4) Resisters 1K ohm 5) Connecting wires 6) 4 switches (on-off)
7) LEDs (ePal)

Precautions:
1) Switch off power supply while connecting wires.
2) Handle ICs carefully so that their pins do not break.
3) Be careful while choosing right power supply.

SIMPLIFICATION:
INPUT (BCD) Excess-3
___________ ___--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------_ __ ____________--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------_

Decimal A B C D w X y z
0 0 0 0 0 0 0 1 1
1 0 0 0 1 0 1 0 0
2 0 0 1 0 0 1 0 1
3 0 0 1 1 0 1 1 0
4 0 1 0 0 0 1 1 1
5 0 1 0 1 1 0 0 0
6 0 1 1 0 1 0 0 1
7 0 1 1 1 1 0 1 0
8 1 0 0 0 1 0 1 1
9 1 0 0 1 1 1 0 0

21
z = D'

y=CD+C'D'=CD+(C+D)'

x = B'C + B'D + BC'D' = B'(C + D) + BC'D'

= B'(C + D) + B(C + D)'

w=A+BC+BD=A+B(C+D)

Procedure:
Step 1) Fix all the required ICs on the bread board across the middle separation line.
Step 2) Connect the +5v power supply with one of the upper horizontally shorted
row of Bread board and ground to the other row.
Step 3) Connect the Vcc (Pin 14) and GRND (Pin 7) of all ICs with the +5v supply and
ground from bread board respectively.
Step 4) Implement all the connections according to the circuit diagram.
Step 5) Verify now the EXCESS-3 code output accordingly.

22
Circuit Diagram:

23
Experiment No. 6
To implement 3-bit even parity generator and checker.

Apparatus:
1) Bread board (ePal) 2) +5v Power Supply (ePAL) 3) ICs 7486
4) Resisters 1K ohm 5) Connecting wires 6) Switches (on-off)
7) LEDs (ePal)

Precautions:
1) Switch off power supply while connecting wires.
2) Handle ICs carefully so that their pins do not turn or break.
3) Be careful while choosing right power supply.

Procedure:
Step 1) Fix all the required ICs on the bread board across the middle separation
line.
Step 2) Connect the +5v power supply with one of the upper horizontally shorted
row of Bread board and ground to the other row.
Step 3) Connect the Vcc (Pin 14) and GRND (Pin 7) of all ICs with the +5v power supply
and ground from bread board respectively.
Step 4) Implement all the connections according to the circuit diagrams of parity
generator and checker respectively.
Step 5) Verify now the outputs accordingly.

Circuit Diagram of 3-bit even parity generator:

24
Truth Table of 3-bit even parity generator:

INPUTS OUTPUT
x y z P
0 0 0 0
0 0 1 1
0 1 0 1
0 1 1 0
1 0 0 1
1 0 1 0
1 1 0 0
1 1 1 1

Circuit Diagram of 3-bit even parity Checker:

25
Truth Table of 3-bit even parity generator:

INPUTS OUTPUT
x y z p E
0 0 0 0 0
0 0 0 1 1
0 0 1 0 1
0 0 1 1 0
0 1 0 0 1
0 1 0 1 0
0 1 1 0 0
0 1 1 1 1
1 0 0 0 1
1 0 0 1 0
1 0 1 0 0
1 0 1 1 1
1 1 0 0 0
1 1 0 1 1
1 1 1 0 1
1 1 1 1 0

All 1s (ones) represent errors at receiving end.

26
Experiment No. 7
To implement BCD to 7-segments decoder function.

Apparatus:
1) Bread board (ePal) 2) +5v Power Supply (ePAL) 3) IC 7447
4) Resisters 500 ohm (pull down), 330 ohm 5) Connecting wires
6) Switches (on-off) 7) 7-segment (common anode)

Precautions:
1) Switch off power supply while connecting wires.
2) Handle ICs carefully so that their pins do not turn or break.
3) Be careful while choosing right power supply.

Procedure:
Step 1) Fix the required IC and 7-segment on the bread board across the middle
separation line.
Step 2) Connect the +5v power supply with one of the upper horizontally shorted
row of Bread board and ground to the other row.
Step 3) Connect the Vcc pin of the 7-segment with the +5v power supply.
Step 4) Connect the Vcc (Pin 16) and GRND (Pin 8) of the IC with the +5v power supply
and ground from bread board respectively.
Step 4) Implement all the connections accordingly.
Step 5) Verify now the outputs accordingly.

7-segment:

27
7447 Connection Diagram:

Truth Table:

Deci INPUTS OUTPUTS

mal ___ ____ ___ ____ _ _ _ _ _ _ _
LT RBI D C B A BI/RBO a b c d e f g
0 1 1 0 0 0 0 1 0 0 0 0 0 0 1
1 1 X 0 0 0 1 1 1 0 0 1 1 1 1
2 1 X 0 0 1 0 1 0 0 1 0 0 1 0
3 1 X 0 0 1 1 1 0 0 0 0 1 1 0
4 1 X 0 1 0 0 1 1 0 0 1 1 0 0
5 1 X 0 1 0 1 1 0 1 0 0 1 0 0
6 1 X 0 1 1 0 1 1 1 0 0 0 0 0
7 1 X 0 1 1 1 1 0 0 0 1 1 1 1
8 1 X 1 0 0 0 1 0 0 0 0 0 0 0
9 1 X 1 0 0 1 1 0 0 0 1 1 0 0

Resultant Display:

0 1 2 3 4 5 6 7 8 9

28
Experiment No. 8
To implement 2-to-4 line decoder.
Apparatus:
1) Bread board (ePal) 2) +5v Power Supply (ePAL) 3) IC 7404, 7408
4) Resisters 1k ohm 5) Connecting wires 6) Switches (on-off)
7) LEDs

Precautions:
1) Switch off power supply while connecting wires.
2) Handle ICs carefully so that their pins do not turn or break.
3) Be careful while choosing right power supply.

Procedure:
Step 1) Fix the required ICs on the bread board across the middle separation line.
Step 2) Connect the +5v power supply with one of the upper horizontally shorted
row of Bread board and ground to the other row.
Step 4) Connect the Vcc and GRND pins of the ICs with the +5v power supply
and ground from bread board respectively.
Step 4) Implement all the connections accordingly.
Step 5) Verify the outputs accordingly.

Truth Table:

INPUTS OUTPUTS
E A B D0 D1 D2 D3
1 X X 0 0 0 0
0 0 0 1 0 0 0
0 0 1 0 1 0 0
0 1 0 0 0 1 0
0 1 1 0 0 0 1

Expressions:
__
D0=A B
_
D1=AB
_
D2=AB

D3=AB

NOTE:
Draw the circuit diagram and mention any decoder IC.
29
Experiment No. 9
To implement a demultiplexer.
Apparatus:
1) Bread board (ePal) 2) +5v Power Supply (ePAL) 3) IC 7404, 7408
4) Resisters 1k ohm 5) Connecting wires 6) Switches (on-off)
7) LEDs

Precautions:
1) Switch off power supply while connecting wires.
2) Handle ICs carefully so that their pins do not turn or break.
3) Be careful while choosing right power supply.

Procedure:
Step 1) Fix the required ICs on the bread board across the middle separation line.
Step 2) Connect the +5v power supply with one of the upper horizontally shorted
row of Bread board and ground to the other row.
Step 4) Connect the Vcc and GRND pins of the ICs with the +5v power supply
and ground from bread board respectively.
Step 4) Implement all the connections accordingly.
Step 5) Verify the outputs accordingly.

Truth Table:

INPUTS OUTPUTS
A B D0 D1 D2 D3
0 0 E 0 0 0
0 1 0 E 0 0
1 0 0 0 E 0
1 1 0 0 0 E

Expressions:
__
D0=A B
_
D1=AB
_
D2=AB

D3=AB

NOTE:
Write down the difference between decoder and demultiplexer.

30
Experiment No. 10
To implement a demultiplexer.
Apparatus:
1) Bread board (ePal) 2) +5v Power Supply (ePAL) 3) IC 7404, 7408
4) Resisters 1k ohm 5) Connecting wires 6) Switches (on-off)
7) LEDs

Precautions:
1) Switch off power supply while connecting wires.
2) Handle ICs carefully so that their pins do not turn or break.
3) Be careful while choosing right power supply.

Procedure:
Step 1) Fix the required ICs on the bread board across the middle separation line.
Step 2) Connect the +5v power supply with one of the upper horizontally shorted
row of Bread board and ground to the other row.
Step 4) Connect the Vcc and GRND pins of the ICs with the +5v power supply
and ground from bread board respectively.
Step 4) Implement all the connections accordingly.
Step 5) Verify the outputs accordingly.

Truth Table:

INPUTS OUTPUTS
D0 D1 D2 D3 A B
1 0 0 0 0 0
0 1 0 0 0 1
0 0 1 0 1 0
0 0 0 1 1 1

Expressions:
__
D0=A B
_
D1=AB
_
D2=AB

D3=AB

NOTE:
Write down the difference between decoder and demultiplexer.
29