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CHAPTER 3

SOLID STATE FAULT CURRENT LIMITER

3.1 INTRODUCTION

Solid state devices are invented for frequent switching of resistive

loads and motors in industry. High power solid state devices such as SCRs,
GTOs and IGBTs are used to implement solid state fault current limiters, that
are independent on natural zero crossing to interrupt the fault current. When a
short circuit fault is detected, a signal is sent to the controller part to turn off
the current in the main circuit.

Solid state relay consists of sensors that respond to control signal

and solid state device switches power to the load. The relay is designed for
both AC and DC loads. The function of solid state relay is same as that of
electromechanical relay but has no moving part. Solid sate relay uses power
semiconductor devices to switch current up to hundred amperes.

3.2 SWITCHING CHARACTERISTICS OF SCR

Thyristor is one of the important solid state power semiconductor

devices. Thyristor was invented in the year 1957 at Bell laboratory. The basic
structure of SCR is shown in Figure 3.1. It is a four layer, three terminal
bistable switch. Each layer consists of N-type and P-type material
alternatively. When gate signal is received, it starts conducting and continues
to conduct until the voltage across the device is reversed. During operation, it
does produce noise. It is small in size, compact, cheaper and long life. SCR
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can able to handle high voltage, current and power. The triggering circuit for
SCR is simple and it is easy to turn on. It can also control AC power.

Anode

P
J1
N
Gate J2
P

N J3

Cathode

(Source: http://electriciantraining.tpub.com/14179/css/Figure-3-18A-Scr-
Structure-134.htm)

Figure 3.1 Basic structure of Silicon Controlled Rectifier

Thyristors operate in three different modes. Figure 3.2 shows the

characteristics of SCR.

(i) Reverse blocking mode

Anode is connected to negative potential with respect to cathode.

Junctions J1 and J3 are reverse biased while J 2 is forward biased. A small
leakage current is flowing. Once the voltage reaches the breakdown voltage,
an avalanche occurs and the reverse current increases rapidly. This may
increases the losses in SCR and results in heating. This may also leads to
damage the device. Therefore, it should be ensured that the maximum reverse
voltage should not exceed breakdown voltage. When the reverse applied
voltage is lesser than the breakdown voltage, SCR offers a very high
resistance and acts as an open circuit.
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(Source: https://www.elprocus.com/silicon-controlled-rectifier-tutorial-and-
characteristics/)

Figure 3.2Characteristics of Silicon Controlled Rectifier

(ii) Forward blocking mode

Anode is connected to positive potential with respect to cathode

and gate is opened. Junctions J 1 and J3 are forward biased while J 2 is reverse
biased. A small amount of leakage current flows from anode to cathode. Once
the applied voltage attains breakdown voltage, junction J2 goes to avalanche
breakdown and starts conducting below breakover voltage. During this mode
of operation, it provides high resistance and is said to be in ‘OFF’ state.

(iii) Forward conduction mode

The operation of SCR is brought into forward conduction mode by

increasing the applied voltage above the breakdown voltage and also by
applying positive pulse to the gate terminal. Once the SCR starts to conduct, it
does not require gate voltage to remain in ‘ON’ state.
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Thyristor can be turned on by one of the following methods

i. Thermal turn on or high temperature triggering

ii. Light triggering

iii. High voltage triggering

iv. dv/dt triggering

v. Gate triggering

By increasing the junction temperature of thyristor, the reverse

biased junction collapsed and starts conducting. Thermal turn on method is
avoided due to thermal run away. Light is allowed to strike the terminals.
Thyristor starts conducting, when intensity of light is greater than the normal
values. When SCR is forward biased, if the applied voltage is increased, then
the depletion layer will be decreased. At breakdown voltage, the depletion
layer is destroyed and SCR is turned on. If the rate of rise of voltage
increases, the SCR will turn on and will start conducting. By applying
positive signal between the gate and cathode, the SCR can be triggered. The
firing angle can be controlled in gate triggering.

3.3 BEHAVIOUR OF SOLID STATE SWITCH DURING FAULT

A single phase circuit is shown in Figure 3.3. It consists of a

voltage source, line inductance, solid state switch and a pure resistive load.
The current and voltae waveform is shown in Figure 3.4. During normal
operating condition, the solid state switch is turn on. At short circuit
condition, the current increases very fast until the switch is turned off. The
voltage will reach a very high value which leads to destroy the solid state
switch. To reduce the peak voltage, usually the varistor is connected in
parallel with semiconductor switch. By this way, the magnitude of voltage is
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limited during turn OFF. So that the switch is not damaged. Thus, the current
is decreased until it reaches zero. Then, the neutral to line voltage is blocked.

(Source :Meyer et al. 2004)

Figure 3.3Single phase equivalent circuit with solid state switch

(Source : Meyer et al. 2004)

Figure 3.4Current and voltage waveform during turn off of switch

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The solid state circuit breakers provide many features as compared

to the mechanical circuit breakers such as controlling capability for current
and voltage, nearly unlimited short circuit capability by current limitation
(Nasereddine et al. 2013). A Silicon Carbide (SiC) can also be used instead of
Silicon (Si) semiconductor devices (Liu et al. 2014).

3.4 OPERATING PRINCIPLE OF SSFCL

The basic configuration of SSFCL is shown in Figure 3.5. It

consists of a pair of solid state switches, current limiting reactor and voltage
limiting element. All the elements are connected in parallel. During normal
operating condition, the solid state switches conduct continuously. When
short circuit fault occurs, the turn off signal is sent to the solid state switches
to interrupt the fault current. The sudden interruption of fault current may
cause an overvoltage in the circuit. This can be prevented by the voltage
limiting element. The current is diverted through the current limiting reactor.

The fault current is limited by the reactor and it is automatically

returns to normal condition. Temperature rise of solid state switch for
conduction has been reduced by using self cooling equipments(Ueda et al.
1993).A SSFCL can also limit the fault current and also to avoid the DC grid
from heat caused by high fault current (Luo et al 2008). By using Transformer
based Solid State Fault Current Limiter (TBSSFCL), switching voltage is
reduced and power quality is also improved (Radmanesh et al. 2015) and (Ji-
Seong Kang & Young-Hyun Moon 2014).
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Figure 3.5Basic structure of Solid State Fault Current Limiter

The control device detects the fault current and generates the turn
ON and turn OFF signals for the solid state switches. In normal operating
condition, the solid state switches conduct continuously. When fault occurs,
the fault current can be detected by comparing the RMS value with pre-set
value. After fault detection, the turn-off signal is given to the switches. The
impedance of the SSFCL is controlled by varying the firing angle of the
thyristor(Boribun & Kulworawanichpong 2008).

3.5 CLASSIFICATION OF SSFCL

SSFCL is classified into Series switch type FCL, Bridge type FCL
and Resonant type FCL.

3.5.1 Series Switch Type SSFCL

Figure 3.6 shows the series switch type SSFCL, it consists of

bidirectional controlled semiconductor switch and bypass circuit. The
bidirectional semiconductor switch can be implemented with any type of
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semiconductor device. The bypass circuit consists of over voltage protection

bypass, snubber, normal state bypass and fault current bypass. The normal
state bypass is realized by an electromechanical switch. It is used to reduce
the semiconductor losses and waveform distortion during normal operation.
The fault current bypass controls the fault current. Control design can switch
off the switches to interrupt the fault current or it can adjust the firing angle to
limit the fault current within the acceptable level. Overvoltage protection is
essential, when fault current bypass is working under normal state. It absorbs
the energy stored by the inductance. The snubber circuit limits the rate of rise
of voltage across the switch at turn off instant and also limit the dv/dt within
the permissible limit.

(Source:Abramovitz et al. 2012)

Figure 3.6 Simple topology of series switch type Solid State Fault
Current Limiter
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3.5.2 Bridge Type SSFCL

The bridge type SSFCL is shown in Figure 3.7. It is implemented

using current fed-full bridge arrangement with diodes. Over voltage
protection, normal state bypass and fault current bypass are not necessary in
bridge type SSFCL. At normal working condition, the elements in the bridge
circuit are in ON state. This provides a continuous current flow for AC line
current. The current limiting reactor is connected in DC side of the rectifier.
During fault condition, there may be inductor saturation. Due to inductor
saturation, FCL may lose current limiting ability.

D L D2
Iline

D3 D4
Fault

Figure 3.7 Bridge type Solid State Fault Current Limiter

3.5.3 Resonance Type SSFCL

Series resonant circuit is utilized in FCL is shown in Figure 3.8.

During normal operating condition, the tuned circuit is tuned to line frequency
and thus, provides zero impedance to the line. On the occurrence of fault, the
circuit is switched to fault state and provides high impedance to the line.
Thus, the fault current can be reduced without interruption. It limits the
electromagnetic stress, voltage sag and phase angle jump at PCC after
occurrence of fault (Hemanth & Arun kumar 2016) and (Nagarathna et al.
2015). Voltage sag due to faults such as single phase to ground, phase to
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phase and two phase to ground faults and also phase angle jump for each
phase are analysed (Suresh & Chandrasekar 2014).

Iline L C

S
Fault

Figure 3.8 Basic resonant type Solid State Fault Current Limiter

Series switch type SSFCL is classified into

(i) Bidirectional SCR switch FCL

(ii) Bidirectional ETO switch FCL

(iii) GTO Assisted Vacuum switch FCL

(iv) IGBT switch FCL and Interrupter

Bidirectional SCR switch FCL is implemented by connecting

varistor with classical bidirectional thyristor switch. The varistor is used to
reduce the voltage across the device at the time of switch off. Under normal
operating condition, the current flows through the main thyristors with
precharged capacitor. If fault occurs, main thyristors are turned off and
auxillary thyristors will be turned on. It offers low conduction losses and
reduced current rating.

A bidirectional switch can also be realized by Emitter Turn Off

(ETO) thyristor. ETO is advantageous than IGBT, GTO and IGCO in FCL
applications due to fast switching speed, high current interruption capacity,
simple in structure and less conduction losses. Since, it is provided withbuild-
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in current sensor and self power generation, the overall cost of the system is
reduced.

In GTO assisted Vacuum switch FCL, Vacuum Circuit Breaker

(VCB) is used as a normal state bypass. During normal operation, the VCB
conducts the line current and GTOs are in turned off. When fault occurs, the
GTOs are triggerd to turn on and VCB is opened. It offers high efficiency,
low losses and power quality.

The IGBT bidirectional switches are implemented in IGBT switch

FCL and interrupter. During normal operation, the IGBTs are in conduction
mode. When fault occurs, the fault current is diverted into varistor and
snubber. At the same time the IGBT switches are turned off. It produces high
switch voltage stress and high conduction losses.

The SSFCLs again classified into self controlled, externally

controlled and hybrid controlled. Self controlled SSFCL is simple in structure
and quick response. In externally controlled SSFCL, the fault current is
detected by using a fault current algorithm. It has high accuracy. Hybrid
controlled SSFCL has the advantages of both self controlled and externally
controlled SSFCL (Ghanbari & Farjah 2012).

3.6 COORDINATION METHODOLOGY BETWEEN SSFCL

AND OTHER PROTECTIVE DEVICES

Coordination betweeen SSFCL and other protective devices is

necessary to clear the temporary fault and to separate the permanent fault. The
coordination can be obtained using the time current characteristics of the
protective devices. The impedance range of equivalent FCL has been
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estimated to maintain the coordination with the other protective devices (Feng
et al 2010). The different coordination methodologies are as follows.

i. SSFCL Downstream Recloser Coordination

ii. SSFCL-Upstream Recloser Coordination

iii. SSFCL Downstream Fuse Coordination

iv. SSFCL-Upstream Fuse Coordination

In SSFCL downstream recloser coordination, the current flow is

interrupted within first quarter cycle by the SSFCL to limit the fault current.
The Automatic Charge Relay (ACR) is connected with each feeder. Each
feeder is connected with load. As the SSFCL is controlled by phase control,
the limited fault current is lesser than the actual fault current. Since, two more
feeders are connected with bus, the SSFCL does not operate as a recloser. It is
operated as a current limiting device. SSFCL will be operated to clear the
fault, if the fault is not able to cleared by the normal recloser.

In SSFCL upstream recloser coordination, the SSFCL is to limit

and clear the fault before upstream protective devices enters into lockout. The
power flow is interrupted within first quarter cycle by the SSFCL to limit the
fault current.The extended time delay curve is positioned below the time
delay curve of the recloser. Since, it is needed to clear the fault by SSFCL
before the recloser ACR1 goes into time delayed operation. By this, the
sesitivity and reliability are guaranteeed.

In SSFCL downstream fuse coordination, the SSFCL is used to

provide a backup protection when it is coordinated with downstream fuse to
avoid unnecessary outages. Also, it is used to isolate the permanent fault
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when fuse is failed. SSFCL operates with both time delayed operation as well
as extended time delayed operation. The time delay operation is introduced
after the fault current is limited to prevent the fuse from clearing the
fault.Extended time delay operation will be introduced, if the fault is not
cleared. Once the fault is detected, the phase control is applied to limit the
fault current within the fuse rating. Therefore, the fuse will clear the fault
before SSFCL goes into lockout.

In SSFCL upstream fuse coordination, the time delay operation is

not required for the coordination of fuse and upstream SSFCL. To obtain the
coordination, the SSFCL lock out curve should lie below the minimum
melting curve of fuse.

3.7 PROPOSED SSFCL

The basic configuration of the proposed SSFCL is shown in

Figure 3.9. It consists of two parallel connected solid state switches for single
phase system. The thyristor branch 1 comprising of thyristors and current
limiting reactor and the thyristor branch 2 consist of thyristor switches.
Switches are connected in inversely parallel manner for both the branches.
Surge arrester is used to protect the system from voltage surge during
switching.

Three phase supply of 440 V is connected with three phase load

through SSFCL. During normal condition, the thyristor Branch 2 is gated
continuously and allows the current to flow to the load. When a fault occurs
on the load, load current exceeds a certain pre-set level which activates the
control circuit and rapidly turns off thyristor switches at Thyristor Branch 2.
Immediately after the thyristors are turned off, the current will be diverted
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into Thyristor Branch 1 through the current limiting reactor. The current
limiting reactor is used to reduce the magnitude of fault current. This can be
done by the proper design of current limiting reactor.

Figure 3.9 Basic configuration of the proposed Solid State Fault

Current Limiter
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When the fault is cleared and the line current drops back to its
normal value. The thyristor switches from Thyristor branch 2 will turn back
on at an instant. The inductance of the limiting reactor can be determined by
taking into account the magnitude of the FCL impedance equal to the
inductive reactance of the limiting reactor, which is given in Equation (3.1).

ZFCL
 LFCL  V (3.1)
IFCL

Where,

LFCL is inductance of limiting reactor

ZFCL is impedance of limiting reactor

IFCL is fundamental current of FCL

V is the magnitude of system phase voltage

Thus, the Equation (3.1) can be rewritten as Equation (3.2)

V
LFCL  (3.2)
2 f  FCL
I

3.8 CONTROLLER DESIGN

The control system of the SSFCL is shown in block diagram in

Figure 3.10. In the operation of SSFCL, fault current need to be detected
accurately before it affects the other equipment. The fault current is detected
by comparing the RMS current level with preset value. The output from the
comparator used to generate the gate signal for the thyristors.
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Figure 3.10 Block Diagram of Solid State Fault Current Limiter control
system

The Synchronized 6-Pulse generator isused to trigger the gates of

six thyristors for each state of operation. For each state of operation, 6
thyristors need to be gated continuously. Thus, for 2 states of operation, 12
thyristors need to be controlled and 2 Synchronized 6-Pulse generators are
needed for the whole operation. The output of the block is a vector of six
pulses individually synchronized on the six thyristor voltages. The pulses are
generated after increasing the zero crossings of the thyristor commutation
voltages.

The working of this control system practically takes in the system

voltage under fault condition and fed to the pulse generator. But the pulse
generator takes the RMS value of the system fault current in order to
determine the period of pre-fault, fault and post-fault conditions. Also, the
RMS value of the fault current is compared with the pre-determined value of
current and accordingly pulses are generated. One pulse generator operates
under normal condition and other pulse generator operates under fault
condition.
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3.9 SOLID STATE DEVICES IN FCL APPLICATIONS

The solid state power semiconductor devices are realized in FCL

applications due to high blocking voltage, high continuous current flow, less
on state voltage, minimum conduction loss, easy control and thermal
management. High speed of switching, less switching loss, high reliability
and long life are also important characteristics of solid state devices.

There are many advanced power semiconducting solid state devices

are available for FCL applications. They are,

i. Insulated Gate Bipolar Transistor (IGBT)

ii. Silicon Controlled Rectifier (SCR)

iii. Gate Turn-Off thyristor (GTO)

iv. Emitter Turn-Off thyristor (ETO)

v. Integrated Gate-Commutated Thyristor (IGCT)

IGBT is a minority carrier device with high input impedance and

requires small energy to switch the device. It has low on state voltage, small
size and cheaper. IGBT is used in Uninterrupted Power Supply (UPS),
Switched Mode Power Supply (SMPS) and also suitable for many power
electronics applications. SCRs are used in motor control, power regulators,
control of high power, etc.

GTO is a high power semiconductor device. It is a fully controlled

switch. It is turned on by gate signal and turned off by gate signal of negative
polarity. The applications of GTO are in high power inverter, variable speed
motor drives and traction.
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ETO is a type of thyristor and combines the advantages of GTO

and MOSFET. The first generation ETO was developed in 1999. It has fast
switching speed, low conduction loss and high power rating. ETOs are used in
distributed energy sources, motor drive and power system protection.

The structure of IGCT is similar to GTO thyristor. It is turned on

and turned off by gate signal. The gate turn off current is greater than the
anode current. IGCT is used in variable frequency inverters, drives and
traction.

Advantages of SSFCL

i. It enhances the quality and reliability of power system by

reducing the fault current.

ii. It has no power loss during steady state

iii. It enhances the transient stability

iv. Fast operation and automatic recovery

v. Simple structure