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Half Subtractor and Full Subtractor Experimaent 4: Lab Manual 3 Semester

This lab manual document describes an experiment to realize half and full subtractors using only NAND gates. The procedure involves verifying the gates, making connections according to circuit diagrams, applying input combinations, and noting the output readings. Truth tables are provided for a half subtractor and full subtractor. The conclusion states that the experiment taught how half and full subtractors work. An assignment section asks questions about the differences between half and full subtractors, how to design them using NAND gates, how adders can be used as subtractors, and applications of half and full subtractors.

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174 views

Half Subtractor and Full Subtractor Experimaent 4: Lab Manual 3 Semester

This lab manual document describes an experiment to realize half and full subtractors using only NAND gates. The procedure involves verifying the gates, making connections according to circuit diagrams, applying input combinations, and noting the output readings. Truth tables are provided for a half subtractor and full subtractor. The conclusion states that the experiment taught how half and full subtractors work. An assignment section asks questions about the differences between half and full subtractors, how to design them using NAND gates, how adders can be used as subtractors, and applications of half and full subtractors.

Uploaded by

Rana jamshaid Rana jamshaid
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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LAB MANUAL Digital Logic design 3rd Semester

EXPERIMAENT 4
HALF SUBTRACTOR AND FULL SUBTRACTOR

Name: Muhammad Amir Roll No: 20TC1016

AIM:
To realize half subtractor and full subtractor using only NAND gates.

Apparatus Required:.

Digital breadboard Kit, IC 7400


Procedure:-

1. Verify the gates.


2. Make the connections as per the circuit diagram.
3. Switch on VCC and apply various combinations of input
according to the truth table.
4. Note down the output readings for half subtractor and full
subtractor difference /borrow bit for different combinations
of inputs.

1. Half - Subtractor using NAND gates only:

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Department of Information & Communication Engineering
LAB MANUAL Digital Logic design 3rd Semester

The truth table for Half - Subtractor:

A B S B

0 0 0 0

0 1 1 1

1 0 1 0

1 1 0 0

2. Full - Subtractor using NAND gates only

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Department of Information & Communication Engineering
LAB MANUAL Digital Logic design 3rd Semester

Truth table for Full - Subtractor:

A B Cn-1 D B

0 0 0 0 0
0 0 1 1 1
0 1 0 1 1
0 1 1 0 1
1 0 0 1 0
1 0 1 0 0
1 1 0 0 0

Conclusion:-

In this Experiment I learn the Half and Full Subtractor

Preparation for the lab:-

Assignment:-

1. What is the difference between half subtractor and full subtractor?


The main difference between the Full Subtractor and the previous Half Subtractor circuit is
that a full subtractor has three inputs.

2. Design half subtractor using NAND gates?


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Department of Information & Communication Engineering
LAB MANUAL Digital Logic design 3rd Semester

1. We can design the half-subtractor circuit with five NAND gates.


2. Consider A and B as the inputs to the first stage of NAND gate, its output again
connected as one input to the second NAND gate as well as third NAND gate.
3. As per their inputs, it gives the output and at the final stage from the NAND gates, the
difference output D and barrow output B will be at their output.
4. The final difference D output equation is D = A⊕B and barrow B equation as B=A’B.
5. By using different combination of NAND gates for constructing the half-subtractor,
the final equations of difference and barrow will be D= A⊕B and B=A’B only.

3. Design full subtractor using NAND gates?

1. Step-01: Identify the input and output variables- Input variables = A, B, Bin (either 0 or
1) ...
2. Step-02: Draw the truth table- Inputs. ...
3. Truth Table.
4. Step-03: Draw K-maps using the above truth table and determine the simplified
Boolean expressions- ...
5. Step-04: Draw the logic diagram.

4. How can adders be used as a subtractor?

If that same control input is also connected to the Cin input to the adder, then a '1' is added to
the inverted bits, which results in that input being converted to a 2's compliment-encoded
number. Thus, the adder is summing a positive number with a negative number, which is the
same as subtraction.

6. Write some applications of half subtractor and full subtractor?


The applications of half subtractor include the following.

 Half subtractor is used to reduce the force of audio or radio signals


 It can be used in amplifiers to reduce the sound distortion
 Half subtractor is used in ALU of processor
 It can be used to increase and decrease operators and also calculates the addresses
The applications of Full Subtractor include the following.
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Department of Information & Communication Engineering
LAB MANUAL Digital Logic design 3rd Semester

The full subtractor is a combinational circuit which is used to perform subtraction of three
input bits: the minuend, subtrahend, and borrow it . The full subtractor generates two output
bits: the difference and borrows out.

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Department of Information & Communication Engineering

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