DEGREE PROJECT IN ELECTRICAL ENGINEERING,

SECOND CYCLE, 30 CREDITS

STOCKHOLM, SWEDEN 2017

Modeling of Hybrid
STATCOM in PSSE
ABDULAZIZ MIKWAR

KTH ROYAL INSTITUTE OF TECHNOLOGY

SCHOOL OF ELECTRICAL ENGINEERING
KTH Royal Institute of Technology

Modeling of Hybrid STATCOM in

PSSE

Author:
Abdulaziz Mikwar

Supervised by:
Martin Wästljung (ABB)
Muhammad Taha Ali (KTH)

Examiner:
Prof. Mehrdad Ghandhari Alavijh (KTH)

Master Thesis
Department of Electric Power and Energy Systems
School of Electrical Engineering
Royal Institute of Technology (KTH)
Stockholm, Sweden 2017
TRITA-EE 2017:150
Abstract

Flexible AC Transmission Systems (FACTS) have the ability of voltage sup-

port and increase transmission capacity. In order to specify a FACTS device
that is performing according to expectations in a network, a set of studies
and network analyses must be performed. Part of these studies are done us-
ing power system analysis programs such as PSS®E, which is a planning tool
simulating large power systems in phasor domain using RMS values. These
planning tools are used for evaluating stability and reinforcement needs in
a power system. The results play a vital role in investment decisions in
the power system. FACTS devices are modeled in PSS®E using a program-
ming language called FORTRAN. It is important to model FACTS devices
accurately to avoid misleading results. In this Master thesis, STATCOM
and Hybrid-STATCOM models are proposed and programmed according
to ABB’s control strategy. The models are tested in PSS®E and verified
against detailed models in PSCAD. Also, the models are compared against
other industry wide spread generic models.

Key words: FACTS, STATCOM, TSC, TSR, Hybrid-STATCOM, PSSE,

FORTRAN, ABB, Dynamic model

i
Sammanfattning

System inom produktgruppen FACTS (Flexible AC Transmission Systems)

har möjligheten att stödja spänning och höja överföringskapacitet på ex-
isterande ledningar. För att kunna specificera en FACTS-anläggning som
beter sig som förväntat i ett elnät behövs ett antal studier och nätanalyser
utföras. Delar av dessa studier är gjorda genom att använda verktyg för
kraftsystemanalys som t.ex. PSS®E, som är ett verktyg för nätplanering
där fasvektorer och RMS-värden används i beräkningarna. Dessa verktyg
används för att evaluera stabilitet och utbyggnadsbehov i elnätet. Resul-
taten från verktygen spelar en vital roll i investeringsbeslut i ett elnät.
FACTS-system modelleras i PSS®E med hjälp av programmeringsspråket
FORTRAN. Det är viktigt att använda korrekta modeller för att und-
vika missledande resultat. I denna Master-uppsats föreslås och utvecklas
STATCOM och Hybrid-STATCOM modeller i enlighet med ABBs kontroll-
strategi. Modellerna testas i PSS®E och verifieras mot detaljerade modeller
i PSCAD. Modellerna jämförs även mot andra generiska modeller som är
accepterade och spridda över branschen i stort.

Key words: FACTS, STATCOM, TSC, TSR, Hybrid-STATCOM, PSSE,

FORTRAN, ABB, Dynamic model

ii
Acknowledgments

I would like to thank my supervisor at ABB, Martin Wästljung, for his

constant support. His motivation and guidance helped a lot through this
project. He dedicated long hours to discuss and solve every obstacle I faced.
Many thanks also to Shane R. Hutchinson for his helpful comments and
suggestions, and to all my colleagues in ABB for their help. I’m also grate-
ful to my supervisor in KTH, Muhammed Taha Ali, for his support. His
comments on the report improved it significantly. He helped me as well in
all the project-related work in KTH. I would like to dedicate this master
thesis project to my parents, Dr.Zaher and Hanan. My sincere thanks to
their constant motivation and support through my studies.

Abdulaziz Mikwar
October 2017

iii
Acronyms

API Application Program Interface.

BJT Bipolar Junction Transistor.

CHB Cascaded H-Bridge.

DAE Differential Algebraic Equation.

DLL Dynamically Linked Libraries.

EAF Electric Arc Furnace.

EMT Electromagnetic Transient.

FACTS Flexible AC Transmission Systems.

FC Flying Capacitor.

GTO Gate Turn-off Thyristor.

IGBT Insulated Gate Bipolar Transistor.

IGCT Integrated Gate-Commuted Thyristor.

MMC Modular Multilevel Converter.

MOSFET Metal Oxide Semiconductor Field Effect Transistor.

MSC Mechanically Switched Capacitor.

MSR Mechanically Switched Reactor.

MSS Mechanically Switched Shunts.

OV Overvoltage.

PCC Point of Common Coupling.

iv
PI Proportional Integral.

PLL Phase Locked Loop.

POD Power Oscillation Damping.

POM Program Operation Manual.

PSS Power System Stabilizer.

PSS®E Power System Simulator for Engineering.

PWM Pulse Width Modulation.

RMS Root Mean Squared.

SMIB Single Machine Infinite Bus.

STATCOM Static Synchronous Compensator.

SVC Static Var Compensator.

TCLC Thyristor Controlled LC.

TCR Thyristor Controlled Reactor.

TSC Thyristor Switched Capacitor.

TSR Thyristor Switched Reactor.

TSS Thyristor Switched Shunts.

UV Undervoltage.

VSC Voltage Source Converter.

WECC Western Electricity Coordinating Council.

v
List of Figures

1.1 A step response of STATCOM with MSC tuned to act as a

TSC with setting the MSC switching in time to 2 ms . . . . . 3

2.1 Symbol of a thyristor . . . . . . . . . . . . . . . . . . . . . . . 13

2.2 Symbol of an IGBT . . . . . . . . . . . . . . . . . . . . . . . 15
2.3 Five-level CHB STATCOM (2 cells) . . . . . . . . . . . . . . 17
2.4 Voltage level and harmonics in different VSC topologies [1] . 17
2.5 Basic structure of SVC . . . . . . . . . . . . . . . . . . . . . . 18
2.6 SVC model . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2.7 V-I characteristics of SVC . . . . . . . . . . . . . . . . . . . . 20
2.8 Flow chart of dynamic simulations . . . . . . . . . . . . . . . 23

3.1 General structure of STATCOM . . . . . . . . . . . . . . . . 26

3.2 Simple STATCOM model . . . . . . . . . . . . . . . . . . . . 27
3.3 V-I characteristics of STATCOM with slope applied . . . . . 28
3.4 Voltage regulator in STATCOM . . . . . . . . . . . . . . . . . 29
3.5 STATCOM Slow MVAR function . . . . . . . . . . . . . . . . 30
3.6 STATCOM POD function . . . . . . . . . . . . . . . . . . . . 31
3.7 STATCOM Slope function . . . . . . . . . . . . . . . . . . . . 32
3.8 STATCOM gain Supervisor and Optimizer . . . . . . . . . . 32
3.9 STATCOM MSS control . . . . . . . . . . . . . . . . . . . . . 33
3.10 STATCOM Limiters control . . . . . . . . . . . . . . . . . . . 35
3.11 STATCOM Undervoltage and Overvoltage Strategy . . . . . 36
3.12 Overvoltage Strategy . . . . . . . . . . . . . . . . . . . . . . . 37
3.13 Undervoltage Strategy . . . . . . . . . . . . . . . . . . . . . . 38

4.1 Hybrid-STATCOM configuration . . . . . . . . . . . . . . . . 40

4.2 Hybrid-STATCOM load flow model . . . . . . . . . . . . . . . 40
4.3 V-I characteristics of Hybrid-STATCOM . . . . . . . . . . . . 41
4.4 Hybrid-STATCOM regulator function . . . . . . . . . . . . . 42
4.5 Hybrid-STATCOM switching methodology . . . . . . . . . . 42
4.6 TSC and TSR switching function . . . . . . . . . . . . . . . . 43
4.7 Undervoltage strategy in Hybrid-STATCOM . . . . . . . . . 44
4.8 Undervoltage strategy in Hybrid-STATCOM . . . . . . . . . 45

vi
4.9 Hybrid STATCOM Limiters configuration . . . . . . . . . . . 46
4.10 Hybrid-STATCOM Slope function . . . . . . . . . . . . . . . 47

5.1 Test System used for STATCOM model verification . . . . . . 48

5.2 Voltage regulator test for STATCOM model in PSS®E . . . . 49
5.3 Slow MVAR test for STATCOM model in PSS®E . . . . . . . 50
5.4 Slope test for STATCOM model in PSS®E . . . . . . . . . . 51
5.5 Gain Supervisor test for STATCOM model in PSS®E . . . . 52
5.6 MSC test for STATCOM model in PSS®E . . . . . . . . . . . 53
5.7 MSR test for STATCOM model in PSS®E . . . . . . . . . . . 54
5.8 Limiters test for STATCOM model in PSS®E . . . . . . . . . 55
5.9 Overvoltage test for STATCOM model in PSS®E . . . . . . . 57
5.10 Undervoltage test for STATCOM model in PSS®E . . . . . . 58
5.11 Comparing Regulator function between STATCOM model
and WECC model . . . . . . . . . . . . . . . . . . . . . . . . 59
5.12 Comparing Slope function between STATCOM model and
WECC model . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
5.13 Comparing MSC switching function between STATCOM model
and WECC model . . . . . . . . . . . . . . . . . . . . . . . . 61
5.14 Regulator with a slope test for PSS®E and PSCAD models . 62
5.15 Secondary side voltage limiter test for PSS®E and PSCAD
models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
5.16 Current limiter test for PSS®E and PSCAD models . . . . . 64
5.17 Reactive power limiter test for PSS®E and PSCAD models . 65
5.18 Undervoltage Strategy test for PSS®E and PSCAD models . 66
5.19 Test System used for Hybrid-STATCOM model verification . 67
5.20 TSC test for Hybrid-STATCOM model in PSS®E . . . . . . . 68
5.21 TSR test for Hybrid-STATCOM model in PSS®E . . . . . . . 69
5.22 Limiters test for Hybrid-STATCOM model in PSS®E . . . . 70
5.23 Overvoltage test for Hybrid-STATCOM model in PSS®E . . 71
5.24 Undervoltage test for Hybrid-STATCOM model in PSS®E . . 72
5.25 TSC switching test for PSS®E and PSCAD models . . . . . . 74

6.1 Comparison between Hybrid-STATCOM and STATCOM+MSC

with a step in Vref . . . . . . . . . . . . . . . . . . . . . . . . 76
6.2 Comparison between Hybrid-STATCOM and STATCOM+MSC
with a step in Vref (Total currents and Q) . . . . . . . . . . . 77
6.3 The importance of chosen the proper TSC and VSC capacities
for correct switching behavior . . . . . . . . . . . . . . . . . . 78
6.4 The importance of chosen the correct switching parameters
for TSC and TSR . . . . . . . . . . . . . . . . . . . . . . . . . 79
6.5 Hybrid-STATCOM operating in the middle operational re-
gion between TSC switch on/off . . . . . . . . . . . . . . . . 80
6.6 TSC valves pulses with respect to PSS®E and PSCAD currents 81

vii
6.7 Single Machine Infinite Bus (SMIB) used for dynamic stabil-
ity study . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
6.8 Comparison between the dynamic stability of Hybrid-STATCOM,
STATCOM only and No FACTS . . . . . . . . . . . . . . . . 83
6.9 Dynamic stability of Hybrid-STATCOM . . . . . . . . . . . . 84

viii
List of Tables

2.1 The different types of parameters used by models in PSS®E . 22

2.2 Modes of operations and its description in PSS®E . . . . . . 24

ix
Contents

Abstract i

Sammanfattning ii

Acknowledgments iii

Acronyms iv

List of Figures v

List of Tables viii

1 Introduction 1
1.1 Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Problem Statement . . . . . . . . . . . . . . . . . . . . . . . . 2
1.3 Goals and Objectives . . . . . . . . . . . . . . . . . . . . . . . 4
1.3.1 Goal . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.3.2 Objectives . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.4 Literature Review . . . . . . . . . . . . . . . . . . . . . . . . 5
1.4.1 Overview and search methodology . . . . . . . . . . . 5
1.4.2 Power electronics switching devices and MMC . . . . 6
1.4.3 STATCOM and SVC performance . . . . . . . . . . . 7
1.4.4 Hybrid-STATCOM . . . . . . . . . . . . . . . . . . . . 8
1.4.5 STATCOM modeling . . . . . . . . . . . . . . . . . . . 9
1.4.6 Alternative Hybrid-STATCOM . . . . . . . . . . . . . 10
1.4.7 PSS®E and model verification . . . . . . . . . . . . . 10
1.5 Tools and Limitations . . . . . . . . . . . . . . . . . . . . . . 11
1.6 Overview of the report . . . . . . . . . . . . . . . . . . . . . . 12

2 Theoretical Background 13
2.1 Power Electronics Switching Devices . . . . . . . . . . . . . . 13
2.1.1 Thyristor . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.1.2 Gate Turn-off Thyristor . . . . . . . . . . . . . . . . . 14
2.1.3 Insulated Gate Bipolar Transistor . . . . . . . . . . . 14

x
 2.1.4 Integrated Gate-Commuted Thyristor . . . . . . . . . 15
2.2 Voltage Source Converter . . . . . . . . . . . . . . . . . . . . 15
2.2.1 Pulse Width Modulation . . . . . . . . . . . . . . . . . 16
2.2.2 Modular Multilevel Converter . . . . . . . . . . . . . . 16
2.3 Static Var Compensator . . . . . . . . . . . . . . . . . . . . . 18
2.3.1 SVC Overview . . . . . . . . . . . . . . . . . . . . . . 18
2.3.2 SVC Model . . . . . . . . . . . . . . . . . . . . . . . . 19
2.4 PSS®E and Dynamic Simulations . . . . . . . . . . . . . . . . 21
2.4.1 Power System Simulator for Engineering (PSS®E) . . 22
2.4.2 Dynamic Simulations . . . . . . . . . . . . . . . . . . . 22
2.4.3 Fortran Programming . . . . . . . . . . . . . . . . . . 24

3 STATCOM Modeling 25
3.1 Static Synchronous Compensator . . . . . . . . . . . . . . . . 25
3.1.1 STATCOM Overview . . . . . . . . . . . . . . . . . . 25
3.1.2 STATCOM Model . . . . . . . . . . . . . . . . . . . . 26
3.1.3 Control . . . . . . . . . . . . . . . . . . . . . . . . . . 29

4 Hybrid-STATCOM Modeling 39
4.1 VSC Branch Modeling . . . . . . . . . . . . . . . . . . . . . . 39
4.2 TSC/TSR Branch Modeling . . . . . . . . . . . . . . . . . . . 39
4.3 Hybrid-STATCOM Regulator . . . . . . . . . . . . . . . . . . 41
4.4 Hybrid-STATCOM Switching . . . . . . . . . . . . . . . . . . 42
4.5 OV and UV Strategies with Hybrid-STATCOM . . . . . . . . 44
4.5.1 UV strategy in Hybrid STATCOM . . . . . . . . . . . 44
4.5.2 OV strategy in Hybrid STATCOM . . . . . . . . . . . 45
4.6 Limiters with Hybrid-STATCOM . . . . . . . . . . . . . . . . 45
4.7 Slope with Hybrid-STATCOM . . . . . . . . . . . . . . . . . 46

5 Model Verification 48
5.1 STATCOM model . . . . . . . . . . . . . . . . . . . . . . . . 48
5.1.1 STATCOM Functions Test . . . . . . . . . . . . . . . 49
5.1.2 Comparison between STATCOM Model and WECC
Model . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
5.1.3 Comparison between STATCOM Model and PSCAD
Model . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
5.2 Hybrid-STATCOM Model Verification . . . . . . . . . . . . . 66
5.2.1 Hybrid-STATCOM Functions Test . . . . . . . . . . . 67
5.2.2 Comparison between Hybrid-STATCOM Model and
PSCAD Model . . . . . . . . . . . . . . . . . . . . . . 73

6 Discussion 76
6.1 Performance of the Hybrid-STATCOM Model . . . . . . . . . 76
6.2 Hybrid-STATCOM Switching issues . . . . . . . . . . . . . . 78

xi
 6.2.1 TSC/TSR capacities with respect to VSC capacity . . 78
6.2.2 TSC/TSR switching parameters . . . . . . . . . . . . 79
6.2.3 Operating in the region between switching on/off . . . 79
6.3 PSS®E and PSCAD simulation differences . . . . . . . . . . . 81
6.4 Dynamic Stability with Hybrid-STATCOM . . . . . . . . . . 82

7 Closure 85
7.1 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
7.2 Recommendations . . . . . . . . . . . . . . . . . . . . . . . . 86
7.2.1 Future work: . . . . . . . . . . . . . . . . . . . . . . . 86

References 87

xii
Chapter 1

Introduction

1.1 Background
In recent years, the electric power system have been expanding rapidly, es-
pecially the integration of renewables. The stability of the electric power
system is always a topic of concern when installing new components in the
system. The rise of Flexible AC Transmission Systems (FACTS), with their
capabilities of supporting reactive power in the system and regulating the
voltage levels, allows more flexible and stable power transmission in the sys-
tem. There are many FACTS devices that could be used for voltage stability.
This study is considering two of the shunts devices, the Static Synchronous
Compensator (STATCOM) and Static Var Compensator (SVC). Both de-
vices have the capability of injecting or consuming reactive power in order
to regulate the voltage at their Point of Common Coupling (PCC). The
difference between the STATCOM and SVC is in their components. The
STATCOM uses Voltage Source Converter (VSC) to synthesize AC volt-
age from a DC reference voltage. The difference of voltage magnitude and
angle between the VSC and the voltage at the PCC allows the current to
either flow towards the STATCOM or the system. The SVC uses Thyristor
Switched Capacitor (TSC) or Thyristor Switched Reactor (TSR) or both.
Thyristor Switched Shunts (TSS) can have 2 modes, full conduction and
block. The reactor branch can use Thyristor Controlled Reactor (TCR),
which allows the SVC to adjust the firing angle of the thyristor to vari-
ous values. The difference between TSR and TCR is that TSR can have 2
modes only, full conduction and block, on the other hand, TCR can adjust
its output to any value between full conduction and blocking modes. Con-
sequently, the voltage at the PCC can be regulated smoothly.

STATCOM used to be a device with high voltage and current harmonics

components when VSC was using 2-and 3-level converters. But with the
technology of H-bridge converters, which is a cascaded multilevel full bridge

1
IGBT modules, the harmonics are dropped down significantly in addition
to the reduction in active power losses caused by switching [2].

Although STATCOM showed a better voltage support and a faster response

than SVC in undervoltage conditions, the use of SVC is more popular around
the world [1]. The reason is that STATCOM has a symmetrical operation
range only. Also, for high reactive power ratings, SVC is much economi-
cal than STATCOM. But since STATCOM has a smaller physical footprint
compared to SVC (it doesn’t require tuned filters to suppress harmonics),
in some cases, STATCOM or Hybrid-STATCOM could be more economical
to use than SVC. On the other hand, the STATCOM is superior to SVC
when it comes to undervoltage disturbances due to the reduction of SVC’s
reactive power output by the square of the voltage at PCC, whereas the re-
active power of STATCOM is reduced linearly with the drop in the voltage
at PCC as shown in the following equations:

QV SC = IV SC UV SC (1.1)

2
QSV C = ISV C USV C (1.2)
The equations are derived in sections 3.1.2 and 2.3.1 respectively. The solu-
tion is to use a hybrid STATCOM, which is a combination of VSC and TSS
branches. The main topology is to install VSC in parallel with TSC/TSR or
both. It incorporates the capabilities of both STATCOM and SVC. The ad-
vantages of hybrid STATCOM is the wider range of operation, smaller size,
reduced footprint (asymmetrical operation ranges), removal of filters and a
faster response [2, 1]. ABB developed a Hybrid-STATCOM solution but it
needs modeling in a power system simulation software for further analysis.
The model of Hybrid-STATCOM is developed in Power System Simulator
for Engineering (PSS®E) in order to be used in dynamic RMS simulations.

1.2 Problem Statement

The PSS®E library includes a STATCOM model, called SVSMO3U2,
which has the capability of utilizing Mechanically Switched Shunts (MSS).
The STATCOM model source code cannot be modified; however, the param-
eters used in tuning the model can be altered. The external shunts can be
switched in or out depending on the STATCOM output current. There are
three delays associated with the operation of MSS, the breaker operation de-
lay, the delay associated with switching in a MSS and the time shunt capac-
itor should be out before being connected again. If the breaker delay is zero
and the MSS switch in delay was reduced, MSS can operate as TSC/TSR.
Hence, the STATCOM model can behave as a Hybrid-STATCOM.

2
But the problem with this existing model is the large overshoot that oc-
curs when the MSS switches in or out. The reason behind that is when MSS
switch in/out, STATCOM doesn’t counteract the injection/consumption of
reactive power. STATCOM control in SVSMO3U2 lacks this control func-
tion, which will cause a large overshoot as shown in figure 1.1. The following
STATCOM with MSC Step Response
V_BUS
VREF
Voltage (pu)

1.1

1.05

0.15 0.2 0.25 0.3 0.35 0.4

(a)
0.6

0.4
I_VSC (pu)

0.2

-0.2
0.15 0.2 0.25 0.3 0.35 0.4
(b)

100
Q_VSC (pu)

50

0.15 0.2 0.25 0.3 0.35 0.4

(c)
Time [S]

Figure 1.1: A step response of STATCOM with MSC tuned to act as a TSC
with setting the MSC switching in time to 2 ms

example shows the behaviour of a STATCOM in parallel with Mechanically

Switched Capacitor (MSC). A step change was applied on the scheduled
voltage at the STATCOM. Vref was raised from 1 p.u. to 1.05 p.u. The
first graph shows the reference voltage in the STATCOM and the Voltage
at PCC. The second graph shows the STATCOM output current, where
positive current refers to capacitive operation. The third graph shows the
reactive power compensation from MSC, where positive MVAR refers to
capacitive operation. The step change is applied at 0.2 seconds. The STAT-

3
COM starts increasing the injected current until it reaches 0.5 p.u., which is
the threshold for MSC to switch in. When MSC switch in, the voltage will
overshoot and the STATCOM will try to bring down the voltage by switch-
ing to the inductive mode. The voltage will take around 50ms to reach
the Vref point. The control is missing a feed-forward loop that can expect
MSC switching and switch the STATCOM to inductive mode of operation to
counteract MSC; hence, reduce the overshoot and help the voltage at PCC
to reach Vref in a shorter time. In order to create a Hybrid-STATCOM
model that includes the previous property, a STATCOM model should be
developed first.

1.3 Goals and Objectives

1.3.1 Goal
The goal of this master thesis project is to program and model Hybrid-
STATCOM in PSS/E for dynamic simulations. The developed model should
behave as close as possible to an actual Hybrid-STATCOM under different
contingencies.

1.3.2 Objectives
In order to develop an accurate Hybrid-STATCOM model in PSS®E, the
following objectives were achieved:

1. Literature review:
A thorough review of different STATCOM models and controls was
conducted. Also, the topics of integrating TSS in parallel with VSC
was looked into. The advantages of multilevel converters and their
topologies are topics of concern since the VSC in Hybrid-STATCOM
is built by MMC. Finally, dynamic simulation in PSS®E and pro-
gramming models in Fortran are very important topics that helped in
completing the rest of the objectives.

2. STATCOM Model and control:

There are many STATCOM models that have been used in dynamic
simulations. The Model to be used in this project is clearly defined in
a control block diagram. All state variables are stated, and the control
strategy is demonstrated. The functionality of the control blocks are
explained as well.

3. Hybrid-STATCOM Model and control:

The Hybrid-STATCOM is defined as a control block diagram. The
control strategy and blocks are defined and explained in details.

4
 4. Program the Model in Fortran:
The STATCOM and Hybrid-STATCOM mathematical models are pro-
grammed in Fortran. The developed model are converted to Dynami-
cally Linked Libraries (DLL) file and imported into PSS®E for verifi-
cation.

5. Verify STATCOM and Hybrid-STATCOM models in PSS®E:

The functionality of the Fortran models are tested in PSS®E. Several
cases were used to test different functions and control blocks in the
models.

6. Verify STATCOM and Hybrid-STATCOM models in PSS®E against

PSCAD models:
The STATCOM and Hybrid-STATCOM models in PSCAD are us-
ing the actual controls implemented in the real components. Hence,
these models represents the real devices accurately. The outputs of
the developed PSS®E models are compared to PSCAD outputs for
verification.

7. Prepare comprehensive documentation for the developed models:

The developed models are documented by means of the project report
and a user manual. The report contains the project description, im-
plementation, discussion and conclusion. The user manual is a guide
for using the models in PSS®E.

8. Suggest future work:

A list of recommendations is prepared to help future development of
the models.

1.4 Literature Review

The literature review section discusses the topics and papers related to the
thesis, including the search methodology used to obtain the information.

1.4.1 Overview and search methodology

In order to conduct a comprehensive literature review on modeling of Hybrid-
STATCOM in PSS®E, many topics are covered. The review started by
understanding the functionality of power electronics switching devices such
as the thyristor valve, IGBT and Gate Turn-off Thyristor (GTO). These
power electronics devices are the building blocks of the VSC branch (STAT-
COM) and the TSR/TSC branch (SVC). After getting familiar with the
functionality of VSC and thyristors, the topics of STATCOM (VSC branch)
and SVC (TSC and/or TSR branches) were covered. The topics of interest
in STATCOM and SVC were there functionality and importance in power

5
grids. The difference between the two devices is an important topic as well
since it forms the basis of the notion of Hybrid-STATCOM. The different
models and control methodologies of STATCOM and SVC were the next
topics in the review. It was important to search for existing models for
Hybrid-STATCOM, or VSC branch in parallel with TSC/TSR. The liter-
ature review was concluded with FACTS models in PSS®E and dynamic
simulation in PSS®E.

The Hybrid-STATCOM model and control developed in PSS®E for this

master thesis project is taken from the model used by ABB. A STATCOM
model is built in Fortran first and verified in PSS®E, then the TSR and TSC
branches are integrated in the model. Most of the papers reviewed are mod-
eling STATCOM for Electromagnetic Transient (EMT) studies. This level
of modeling cannot be applied in PSS®E since it is a Root Mean Squared
(RMS) based software. However, it is important to conduct a generic re-
view on different STATCOM models and controls before proceeding in the
project.

The literature review was conducted by searching on different journals’ and

universities’ websites. The search words used were general at the begin-
ning then it became more specific as the review progressed. Search words
used were (STATCOM, SVC, Thyristor valve, VSC, TSR, TSC, Hybrid-
STATCOM, Hybrid-SVC, STATCOM modeling, STATCOM control, STAT-
COM MMS, STATCOM TSC/TSR, SVC modeling, SVC control, SVC MSS,
SVC TSC/TSR, PSS®E, PSS®E dynamic simulation).Many scientific pa-
pers are available on the topics of modeling and control of STATCOM and
SVC. However, only three papers were found that combines the VSC branch
and TSR/TSC branch to create Hybrid-STATCOM. Two of the papers are
published by ABB and Siemens. Both of the papers introduce the concept of
hybrid-STATCOM and its advantages. ABB and Siemens create the Hybrid-
STATCOM by using VSC branch in parallel with TSC/TSR or both. The
third paper was published by the university of Macau. The authors provided
a mathematical model and control strategy for their proposed model. The
models cascaded the VSC and the TSS branch.

1.4.2 Power electronics switching devices and MMC

The topics of the switching devices are not crucial for the actual model-
ing of FACTS devices in PSS®E since these modules are not part of the
model. Therefore, an overview of the functionality and differences between
the switching devices was sufficient for this study. The materials cover-
ing power electronics switching devices was taken from ’Power Electronics,
Converters Applications and Design’ [3]. Multilevel converters utilized in
STATCOM generate an AC synthesized voltage from a DC source. Multi-

6
level converters can have three topologies in general, diode-clamped, Flying
Capacitor (FC) and Cascaded H-Bridge (CHB). The most used topology is
CHB since it proved to give a better performance over FC and diode-clamped
topologies [4]. MMC’s can have many topologies by cascading the convert-
ers. The modularity refers to the technique of integrating (cascading in this
case) small subsystems to create a large system. The cascading of MMC is
referred to as chain-links. The advantage of chain-link modules is less stress
on switching devices and higher compensation range. The drawback is the
separate dc sources for each module. Some papers such as [2][1] used dif-
ferent voltage levels in the modules to achieve smoother output wave. The
ABB MMC consists of chain-link modules. Each Module is composed of H-
bridge multilevel converters. [5] introduces a novel hybrid cascade multilevel
inverter scheme. It uses multiple modules with different DC voltages. The
STATCOM modeled in [5] have multilevel H-bridge converters. The number
of modules depends on the rating of the STATCOM. Most of the papers that
concentrates on STATCOM modeling with MMC state that the advantages
obtained by integrating MMC are less power losses, reduced harmonics and
higher compensation range [5][6][7].

1.4.3 STATCOM and SVC performance

In order to understand the need for Hybrid-STATCOM, it was important to
go through papers that compare between STATCOM and SVC in terms of
performance and functionality. In [8] the author concludes that STATCOM
performs better than SVC with first-swing stability enhancement. Based
on the calculations, STATCOM provides higher reactive power output than
SVC under voltage disturbance. [9] compares the damping performance of
STATCOM, SVC and Power System Stabilizer (PSS). The author concluded
that PSS have the best damping on inter-area oscillation modes. STATCOM
and SVC can provide adequate damping if placed in the right location in the
system. STATCOM have a better damping than SVC since it can exchange
active power during transient response. This paper is not of large importance
to the thesis project since it is focused on different aspect of STATCOM
and SVC. However, It can be used to show that STATCOM and SVC have
power oscillation damping capabilities. [10] is comparing the performance
of STATCOM and SVC with several study cases in the Chinese grid. The
authors expressed three advantages of using SVC and STATCOM:
1. Enhanced voltage support.

2. Improved transient stability.

3. Improved damping of low frequency oscillation.

The authors concluded that the use of a single FACTS device in the grid
is not sufficient for voltage support. Multiple devices should be installed in

7
order to achieve the expected result. In transient stability, both devices im-
prove the stability of the system; however, STATCOM has a better response
due to its “short time over load capability”. Finally, the STATCOM has a
better time response but the authors state that the correlation between the
time response, voltage support and transient stability is not clear. In [11]
the author discusses the connection of STATCOM and SVC to a grid with
Asynchronous generator. STATCOM and SVC improved the transient re-
sponse under load fluctuations with STATCOM having a better response.
On the other hand, with short circuit faults, the contributions of SVC and
STATCOM were not significant, but SVC had a better response.

[12] compares SVC and STATCOM in a specific application. Electric Arc

Furnace (EAF) uses a large amount of power in a non-linear manner which
causes large fluctuations in voltage. Therefore, the use of FACTS devices
would improve voltage stability by providing the required reactive power to
raise the voltage at PCC and minimize the effect of power swings in EAF. By
comparing the performance of SVC and STATCOM, both devices provided
the required voltage support. But STATCOM with the help of a capacitor
bank can compensate for active power which makes it superior to SVC in this
application. The problem with having a capacitor bank only is the recharge
time. The use of a battery is more efficient for active power compensation.
Most of the studies showed that STATCOM is superior to SVC. However,
the studies made on the Chinese grid and on EAF present the need of having
a VSC branch in parallel with TSR/TSC branch for a better reactive power
compensation and voltage support. [13] shows the benefits of STATCOM
and SVC for utility applications. The authors modeled STATCOM and SVC
and compared their performances. The main topics compared were under-
voltage/overvoltage contingencies, physical footprint, harmonics, cost and
losses. In general, STATCOM has smaller physical footprint and reduced
low order harmonics generation compared to SVC. Also, STATCOM has a
better performance during undervoltage conditions. Where as SVC has a
better performance during overvoltage conditions. SVC can have lower cost
and losses in general. The authors in [13] concluded that these comparisons
depends on the design and application of STATCOM and SVC.

1.4.4 Hybrid-STATCOM
The advantages of Hybrid-STATCOM was realized by large companies such
as ABB and Siemens. A paper published by Siemens was reviewed [2]. The
paper discusses the advantages of SVC and STATCOM and their applica-
tions in the power system. A hybrid SVC, which is a combination of VSC
and TSS, is introduced in the paper to combine the advantages of STAT-
COM and SVC. The main topology is to install VSC in parallel with TSC,
TSR or both. ABB as well published a paper on the same topic [1]. The

8
authors outlined the main difference between STATCOM (SVC Light) and
SVC (SVC Classic). The STATCOM is superior during undervoltage dis-
turbances, whereas SVC outperform STATCOM during overvoltage events.
The reason for these behaviors is the relation between voltage and the reac-
tive power supplied by STATCOM and SVC to the power system. MVAR
generated by STATCOM has a linear relation to the bus voltage. On the
other hand, MVAR generated by SVC has a quadratic relation to the bus
voltage as shown earlier. This being said, a drop in bus voltage will cause
the MVAR provided by SVC to drop by a factor of V 2 , which is not the
case with STATCOM since it has a linear relation. STATCOM can pro-
vide constant MVAR during undervoltage disturbances. For overvoltage
events, SVC can provide a better MVAR compensation for the same rea-
son mentioned, V 2 . The authors also mentioned the utilization of MMC
in STATCOM and harmonics and active power losses reduction. The ad-
vantage of reducing harmonics is the removal of low order harmonics filters.
The Hybrid-STATCOM is introduced at the end of the paper to solve the
issues mentioned earlier.

1.4.5 STATCOM modeling

The author in [14] states different types of STATCOM modeling. For steady-
state, STATCOM can be modeled as an ideal reactive current source. On the
other hand, in dynamic studies, STATCOM can be modeled in two different
methods. The first model is a balanced 3-phase voltage source with con-
trollable magnitude and angle. This model is usually used for studies that
does not require fast response of STATCOM. The other dynamic model of
STATCOM is realized as a controllable reactive current source. The dy-
namic model includes a Phase Locked Loop (PLL) that capture the phase
angle of the current supplied by the STATCOM. Authors in [15] are using
fuzzy logic to obtain gains and time constants of Proportional Integral (PI)
regulator of the STATCOM. The dynamic model uses d-q reference frame
with PLL. In [16] STATCOM is modeled as a voltage source with the AC
side voltage multiplied by a parameter k that relates dc side voltage to ac
side voltage. k is usually dependent on the VSC topology. The phase angle
of the ac side can be controlled by a logic block to produce the desired out-
put. Another approach to STATCOM modeling is to use a voltage source
to represent the VSC in series with a transformer with tap changer as in
[17]. A similar model is used in [18]. STATCOM is modelled using a volt-
age source to represent the VSC in series with a transformer with a tap
changer. Voltage at Point of Common Coupling (PCC) controls the switch-
ing of power electronics components in VSC. Another paper was reviewed
that introduces a STATCOM with a capacitor bank, it is called Hybrid-
STATCOM by the author [19]. It consists of a VSC and a shunt capacitor

9
bank. The authors claim that the integration of the capacitor bank will de-
crease the stress on the switching devices and reduce the required converter
rating. The STATCOM will be operating in inductive mode to regulate the
voltage. The existence of the capacitor bank will allow the STATCOM to
go from inductive to fully capacitive and restore the voltage fast in under-
voltage events. STATCOM is modeled as voltage source in parallel with a
capacitor bank.

1.4.6 Alternative Hybrid-STATCOM

The authors in [20] proposed another topology for a Hybrid-STATCOM.
The model consists of an active inverter (VSC) cascaded with a Thyristor
Controlled LC (TCLC), the name used for this topology in this paper is
Hybrid-STATCOM. LC is defined in the paper as a reactor in parallel with
a capacitor. TCLC is connected through a coupling inductor, for filtering,
to the grid. TCLC consists of a TCR in parallel with a capacitor. The
VSC is in series with the TCLC. The motivation behind this design is that
SVC and STATCOM have disadvantages from performance and economi-
cal perspective. The problem with SVC devices are the speed of response,
injection of harmonics current (the need for filters) and resonances. The
STATCOM with active filters proved to be better in performance and har-
monics reduction compared to SVC. The main issue with STATCOM is the
cost when used with high power ratings since the power electronic switches
should be dimensioned to withstand high voltage stress. In the proposed
model in [20], the main compensation is done by the TCLC part of the
Hybrid-STATCOM. The VSC part is responsible for tuning any mismatch
of firing angle in TCLC. The authors claim that by adjusting the firing
angle, the Hybrid-STATCOM can compensate for unbalanced currents and
reduce harmonics generated by TCLC. In this thesis project, the Hybrid-
STATCOM modeled uses a different topology. Instead of cascading the VSC
and TCLC branches, the VSC is in parallel with TSS.

1.4.7 PSS®E and model verification

There are different programs to perform RMS power system analysis on net-
works. PSS®E, E-TAP and PowerFactory are such programs. These pro-
grams are widely used by different companies for planning studies. These
power simulation programs produce equivalent outputs when used for power
flow calculations since they use equivalent models in power flow calcula-
tions. However, in dynamic simulations, each power simulation program
has its own models with different parameters. Therefore, their outputs for
the same network could differ significantly if the parameters were not tuned

10
correctly [21]. This raises the concept of the importance of accurate mod-
eling and parameter tuning. A significant part of this thesis is done using
PSS®E. The best method to learn about the software and its functions is
to review the Program Operation Manual (POM) [22]. PSS®E is capable
of performing different calculations and applying several functions on power
systems. Many powerful functions can be used like power flow calculations,
dynamic simulations, building network equivalent and fault and contingency
analysis. In order to perform dynamic simulations, a model of the device
to be tested should either be in the library provided by PSS®E, or a user
defined model can be used.

The main objective of the final part of this thesis is to prove the function-
ality of the model in PSS®E. All functions and blocks of STATCOM and
Hybrid-STATCOM should be tested. Model verification and testing method
are taken from the guideline produced by Western Electricity Coordinating
Council (WECC) for developing a generic STATCOM and SVC models [23].
These models are part of the PSS®E model library. WECC used different
types of tests to verify the functionality of the controls and logic blocks of
their STATCOM and SVC models. As WECC suggests, the applied tests
could be faults at different times and locations in the network. Also, a step
changes for different STATCOM parameters in order to observe the effect
of these changes on the dynamic behavior of the STATCOM.

1.5 Tools and Limitations

The development of a Hybrid-STATCOM model in PSS®E requires prior
knowledge of the PSS®E software environment, understanding of FACTS
devices, programming skills, especially in Python and Fortran, capabilities
of modeling controllers and high understanding of power systems. The mod-
eling is mostly done in Fortran, a scripting language used by PSS®E to model
components. Python is used to control the PSS®E environment since the
Application Program Interface (API) of PSS®E is Python compatible. A
thorough study of FACTS devices, their controls and power system dynam-
ics must be performed. The verification of the Hybrid-STATCOM model is
required to ensure full functionality during different events and disturbances.
One of the limitations is that the time-span of the project might be short
to complete the implementation of the model. It might require additional
time to fulfill all the requirements of the model. Another limitation is the
programming language used for modeling. Fortran is a programming lan-
guage which requires building a lot of common blocks and algorithms from
scratch. Finally, the integration of the model in PSS®E might be limited by
the capabilities of PSS®E. Where for example the voltage source converter
(VSC) with its building blocks is represented by a current source.

11
1.6 Overview of the report
The report is organized in the following structure. Chapter 1 covers the
introduction and background of the thesis with the literature review. Chap-
ter 2 is the theoretical background of all the important topics covered in
the report. Chapter 3 covers the implementation and development of the
STATCOM model. Chapter 4 covers the implementation and development
of the hybrid-STATCOM model. Chapter 5 is the verification of the imple-
mented models. Chapter 6 covers the discussion of the proposed model and
its performance. Chapter 7 is the final chapter and it covers the summary
of the report with recommendations.

12
Chapter 2

Theoretical Background

The theory behind the main topics required to develop a model is discussed
in this chapter. The working principle of SVC proposed in this chapter is
used to explain the operation of the devices only.

2.1 Power Electronics Switching Devices

FACTS are based on power electronics switching devices. These devices
differ in their structure, which will generate different V-I characteristics for
each device. Some devices have advantages over others in terms of speed of
switching, harmonics generation and active power losses. The following are
the most common switching devices for FACTS.

2.1.1 Thyristor
The thyristor can be seen as a diode with a turn-on switch. This switch
is a gate that controls the operation of the thyristor. In order to turn on
the thyristor (i.e. turn the thyristor to forward biased state of operation),
a voltage signal, with certain magnitude and duration, must be sent to the
gate. The thyristor then will be forward biased (full conduction mode).
Thyristors cannot be turned off from the gate. In order to turn off the
thyristor, a voltage with reverse polarity should be applied across it for
a certain duration. Figure 2.1 show the symbol of a thyristor. Thyristor

Figure 2.1: Symbol of a thyristor

off mode is called the reverse biased mode or blocking state. During the

13
blocking state, the thyristor will act as an open switch with some leakage
current iT . On the other hand, during full conduction state, thyristor will
act as a closed switch with a small drop of voltage across it vT . The product
of vT and iT is the active power losses pT . By applying a small current to
the gate, thyristor can switch from blocking state to on-state at low voltages
across it. During conduction state, thyristor can conduct currents up to 4
kA with low voltage drop. One of the main advantages of the thyristor
is its high power capability. It can handle a reverse voltage up to 8 kV
[24]. Thyristors are used in the SVC branches. It controls the reactor and
capacitor branches by regulating the gate firing angle.

2.1.2 Gate Turn-off Thyristor

The structure of the thyristor and Gate Turn-off Thyristor (GTO) Thyristor
is similar. GTO is a switching device that operates like a normal thyristor
but with the ability to turn-off. The gate can turn-off GTOs by applying a
high negative current that can be up to -750 A. The turn-off capability of
GTOs reduced the reverse voltage blocking to 20-30 V. The forward block-
ing state of GTOs is equivalent to a thyristor. Normal thyristors valves lack
the turn off capability, which makes GTOs a better candidate for switch-
ing devices. However, normal thyristors will always be the best to handle
high power stress across it. GTOs are used in voltage source controllers,
i.e. STATCOM. However, GTOs are being replaced by Integrated Gate-
Commuted Thyristor (IGCT).

2.1.3 Insulated Gate Bipolar Transistor

Metal Oxide Semiconductor Field Effect Transistor (MOSFET)s have a fast
switching capability, but it features high switching losses. On the other
hand, Bipolar Junction Transistor (BJT)s has a low conduction losses but
slower switching speed compared to MOSFETs. A new semiconductor device
that combine the best features of MOSFETs and BJTs has been developed,
Insulated Gate Bipolar Transistor (IGBT). IGBTs are capable of switch-
ing between conduction state and blocking state in a high frequency, much
higher than the network frequency. Figure 2.2 shows the IGBT symbol. It
only requires a voltage at the gate to switch. IGBTs are usually connected
in stacks, many modules are connected in series. It is crucial to keep syn-
chronism among all modules connected. They all must switch at the same
instant. The VSC in STATCOMs are usually built by IGBTs since they can
switch in a high frequency and synthesize AC voltage through Pulse Width
Modulation (PWM), which is explained in section 2.2.1.

14
 Figure 2.2: Symbol of an IGBT

2.1.4 Integrated Gate-Commuted Thyristor

Integrated Gate-Commuted Thyristor (IGCT) is an electronics device de-
veloped from GTOs. The main difference between the two devices is the
internal structure, and the fact that IGCT doesn’t require a snubber cir-
cuit. These changes allowed IGCT to have lower on-state losses and turn-
off losses compared to GTOs [25]. IGCTs have the blocking capability of
an IGBT and the conduction capability of thyristors (with lower on-state
losses). Both IGBTs and IGCTs are used in building VSCs for STATCOMs.
For applications with high power and lower switching frequency, IGCT is
the best choice. For high switching frequency applications IGBTs are the
better choice.

2.2 Voltage Source Converter

Voltage Source Converter (VSC) has been used for voltage regulation in
transmission lines for years. It has the capability of synthesizing AC voltage
from a DC voltage source. There are many topologies, configurations and
controls for VSC. Considering a simple VSC topology, a basic 3 phase 2-
level converter. The 2-level refers to the number of possible voltage levels
synthesized by the converter, in this case +VA and ≠VA . A capacitor is used
in the DC side to generate the voltage Vdc . The switching devices must have
the capability of turning on and off in a fast manner, therefore, GTOs or
IGBTs are used with antiparallel diodes. In order to generate the AC voltage
from Vdc , the switching devices can be controlled using PWM or square wave
modulation. The problem with 2-level VSC is the high level of harmonics
generated by the converter. There are many topologies and configurations
that can reduce the harmonics and synthesize a smoother sinusoidal wave.
To achieve this, the number of voltage levels can be increased by using the
Modular Multilevel Converter (MMC).

15
2.2.1 Pulse Width Modulation
Pulse Width Modulation (PWM) is a control strategy that creates the sig-
nals sent to the VSC switches to synthesize the desired wave. The control
strategy consists of two waves, the control signal vcontrol and the triangular
signal vtri . PWM can be controlled by varying the width and amplitude
of the control signals. By Switching the IGCTs or IGBTs, the desired out-
put voltage can be obtained. PWM can create low order harmonics in the
system [3]. A parameter that relates the AC side voltage to the DC side
voltage is the amplitude modulation ratio ma , and it can be found by:

ˆ
vcontrol
ma = (2.1)
vˆtri
Then the peak fundamental output voltage can be found as:

Vˆo1 = ma Vd ; for (ma Æ 1) (2.2)

Where Vd is the DC side voltage. Equation 2.2 is used for 2-level single
phase converter. Different converter topologies will have different equations.
For this thesis, the topology of the VSC is not important since the VSC is
modeled as an ideal current source.

2.2.2 Modular Multilevel Converter

As mentioned earlier, the 2-level VSC topology generates harmonics into
the system. Harmonics and voltage stress on the switching devices are re-
duced with Modular Multilevel Converter (MMC). The Hybrid-STATCOM
model proposed in this project is using CHB in VSC branch. Figure 2.3
shows a three phase five-level CHB STATCOM. Each phase is composed
of two full bridge modules (H-bridge) connected in series. CHB topology
requires separate DC voltage sources for each module. Each module (cell)
is capable of generating 3 voltage levels V+ , V≠ and zero. Hence, the
relation between the voltage levels (VL ) and the number of cells (N ) is
VL = 2N + 1. Figure 2.4 shows the output voltage and harmonics of differ-
ent VSC topologies. A higher number of voltage level produces a smoother
wave. Hybrid-STATCOM can be built without active filtering since the har-
monics magnitude is very low, which will drop down its cost and footprint.

16
 Figure 2.3: Five-level CHB STATCOM (2 cells)

Figure 2.4: Voltage level and harmonics in different VSC topologies [1]

17
2.3 Static Var Compensator
2.3.1 SVC Overview
Static Var Compensator (SVC) is a FACTS device that provides reactive
power compensation. SVC can regulate the voltage at the PCC and increase
the transmission capacity of the line. It is usually composed of atleast 3
branches, a TCR and filters for specific harmonic components. It can include
a TSC branch as well in parallel with the TCR and the filters. Figure 2.5
shows a simple SVC with a TCR in parallel with a fixed capacitor, which
is used as a harmonics filter. The reactor branch has antiparallel thyristor

Figure 2.5: Basic structure of SVC

valves in order to conduct in both directions. Each thyristor will conduct for
half a cycle. The firing angle of the thyristors (–) is regulated by the SVC
controller. The conduction interval of the thyristors can be defined as ‡ =
2(fi ≠ –). – must not be chosen in the range [0,90] degrees since that would
create asymmetrical currents. The allowable range for – is [90,180] degrees
for TCR, but for TSR is either – = 90 or – = 180, where – = 90 degrees
corresponds to ‡ = 180 which is the maximum conduction interval (full
conduction). For – = 180 degrees, the corresponding conduction interval is
‡ = 0 which is the minimum conduction interval (zero conduction). As –
increases, the conduction interval ‡ decreases. Assuming that the voltage
at PCC is u(t) = Û sin(Êt), the current through the reactor for the 2-half

18
cycles can be defined as follows:

Û
iL (t) = (cos(–) ≠ cos(Êt)) ; for (– < Êt < – + ‡) (2.3)
ÊL

Û
iL (t) = ≠ (cos(–)+cos(Êt)) ; for (–+fi < Êt < –+‡+fi) (2.4)
ÊL
By applying Fourier transformation on equations 2.3 and 2.4 and taking the
fundamental component, the amplitude of the current going through the
reactor iL(1) (t) can be calculated as shown in equation 2.5:

Û (2(fi ≠ –) + sin(2–))
IˆL (–) = (2.5)
fiÊL
The TCR branch is usually modeled as a controllable susceptance (BL (–)),
where the thyristors firing angle – is the control signal. Hence, the suscep-
tance as a function of – is defined as:

IˆL (–) 2(fi ≠ –) + sin(2–)

BL (–) = = (2.6)
Û fiÊL
And the overall susceptance of the SVC (BSV C (–)) is found as:

BSV C (–) = BC ≠ BL (–) ; where BC = ÊC (2.7)

Assuming active power exchange is zero, then the reactive power output can
be found as:

QSV C (–) = ISV C (–)UP CC

= (BSV C (–)UP CC )UP CC

QSV C (–) = BSV C (–)UP2 CC (2.8)

2.3.2 SVC Model

SVC is modeled as a controllable susceptance as shown in figure 2.6. BSV C
is a combination of a fixed capacitor and a TCR as shown in figure 2.5, and
it can be found using equation 2.7.
SVC can have other configurations such as a TCR in parallel with TSC.
Also, in addition to the TCR and TSC branches, SVC will have a filter
branches tuned to suppress a certain harmonic components. These filters
depends on the network impedance and the rating of the SVC. The filers
will not be studied in this project since the model to be developed are in
RMS and will not consider EMT.

19
 Figure 2.6: SVC model

SVC have two operation regions, Capacitive and inductive. In the Capac-
itive region, the current ISV C is leading the voltage at PCC, and the SVC
is injected reactive power into the power system. In the Inductive region,
the current ISV C is lagging the voltage at PCC, and the SVC is consuming
reactive power from the power system. BSV C will be limited by the rating
of the SVC. It will have a range BSV min < B
C SV C < BSV C . The V-I char-
max

acteristics of SVC is shown in figure 2.7. The nominal operation point of

Figure 2.7: V-I characteristics of SVC

SVC is at Uref when ISV C = 0. Imaxcap and I ind represent the maximum
max
capacitive and inductive currents at which SVC can regulate the current
in a continuous manner. Umaxref and Uminref represent the maximum and

20
minimum reference voltages for continues current control. If the voltage in-
creased beyond Umaxref , SVC will be kept at BSVmin until the voltage come
C
back to the controllable range. The same procedure is followed when the
voltage drops below Uminref . SVC will be kept at BSVmax until the voltage
C
come back to the controllable range. The actual strategy for Undervoltage
(UV) and Overvoltage (OV) events is more complicated than this. It is simi-
lar to the strategies used for STATCOMs, which is explained in section 3.1.3.

The linear slope (droop) XSL is the ratio of the change of voltage to the
change of current over the controllable range of operation. The droop value
is regulated by the grid operators, it represents the allowable amount of
reactive power contribution from different sources in the grid. It prevents
the SVC from injecting/consuming more reactive power than the allowable
amount by the grid operator. The slope ensures that the contributions of
various devices at the grid don’t counteract each other, which would com-
promise the stability of the network. The droop typically ranges between
1-10%. The slope can have different values for capacitive and inductive
regions. As shown in figure 2.7, the slope for the capacitive region is XC ,
where the slope for the inductive region is XI . Considering the simple model
in figure 2.6, the SVC characteristics can be calculated as follows:

U = Uref ± (Xc or Xi )ISV C ; controllable range (2.9)

2.4 PSS®E and Dynamic Simulations

Most of the thesis work was done in this phase. The STATCOM model
developed in section 3.1.3 will be interpreted to Fortran and used as a
model in PSS®E. It must be mentioned that models of STATCOM and SVC
have already been developed by Western Electricity Coordinating Council
(WECC), and they are part of PSS®E models library. The models devel-
oped by WECC is a generic models and can be used for several applica-
tions. All the parameters of STATCOM and SVC models such as gains
and time constants can be tuned to meet the required specifications. How-
ever, the models are part of PSS®E library and cannot be modified as
mentioned earlier. Hybrid-STATCOM doesn’t have a model to be used
in PSS®E that would represent its behaviour accurately. Some tests were
made by using a STATCOM in parallel with fixed switch shunt with zero
time constant on the breaker as shown in section 1.2. But the results of
these tests did not show the actual behaviour of hybrid-STATCOM since
the model lacked the actual control loops that coordinates the outputs of
VSC and TSR/TSC in hybrid-STATCOM. Therefore, it is necessary to de-
velop a model in PSS®E that contains all the controls required for a hybrid-
STATCOM. The STATCOM model is developed in Fortran programming

21
language then the TSR/TSC branch will be added after verifying STAT-
COM model functionality in PSS®E.

2.4.1 Power System Simulator for Engineering (PSS®E)

Power System Simulator for Engineering (PSS®E) is an electric power sys-
tem simulator as the name suggest. It is capable of performing different

Table 2.1: The different types of parameters used by models in PSS®E

Parameter name Parameter Description

CONs Constant parameters
Algebraic variables that can be determined at any
VARs
instant of time if all States and constants are known
State variables that can be determined
STATEs
at any instant by differential equations
Integer parameters
ICONs
(can be constants or algebraic variables)

calculations and applying several functions on power systems. Many power-

ful functions can be used like power flow calculations, dynamic simulations,
building network equivalent and fault and contingency analysis. Many com-
panies use PSS®E for feasibility studies when integrating a new electric
power component into the grid. There are two types of models used in
PSS®E. The first type are the models exists in the PSS®E library such as
the WECC models mentioned earlier. The other type of models are the user
defined models. These models are developed by the user in Fortran, and
then they are converted to a Dynamically Linked Libraries (DLL) file and
imported to PSS®E. The STATCOM and hybrid-STATCOM models devel-
oped in this thesis work are of the second kind. All the parameters used in
the model can be tuned by the user through PSS®E or a dynamic file (.dyr).
Table 2.1 shows the different types of parameters used by models in PSS®E.
These parameters are defined in PSS®E based on the user-defined model
developed in Fortran. CONs and ICONs parameters are tuned to meet the
required specifications. VARs and STATEs are calculated by PSS®E when
dynamic simulations are performed. PSS®E will calculate the time response
of the system by integration of systems’ Differential Algebraic Equation
(DAE).

2.4.2 Dynamic Simulations

The main objective of doing dynamic simulation is to observe the behavior
of the system at different instants of time when exposed to disturbance. All
the component of the network have a dynamic model that contains state

22
and algebraic variables. These variables are determined by solving the DAE
at each time step ’T + t’. Figure 2.8 shows the flow chart of dynamic sim-
ulations. At the first stage all constant data are accumulated and state

Figure 2.8: Flow chart of dynamic simulations

variables are initialized by the output of the load flow calculations. The
time derivative of the state variables are then found in order to be used
in the DAE. Finally, the equations will be integrated and the new state
variables will be found. At this stage, all the variables are known and the
system behaviour at this instant of time is determined. Then, the time is
increased by one integration step and the whole process is repeated until
the finish time. During simulations, several types of disturbances can be
applied such as faults, the loss of a system component or a sudden change
of one of the system parameters. These disturbances can be used to under-
stand the system behaviour under different conditions. It can also be used
to test the system behaviour after installing a new component in the system.

23
The STATCOM and hybrid-STATCOM models will be tested under several
types of disturbances in order to verify their functionality.

2.4.3 Fortran Programming

The user-defined models must be written in Fortran while abiding PSS®E
rules for models. Fortran is a programming language that is used by PSS®E
in all its models. There are many rules specified by PSS®E that must be
followed accurately in order for the model to perform as intended by the
user. Different types of calculations are applied by PSS®E during each time
step. These calculations are applied in different stages during one time step,
or as PSS®E defines it ’Modes’. The model in Fortran must specify the
calculations or actions done in each mode. These modes must be considered
carefully in the Fortran model. Table 2.2 demonstrates the different modes
of operations and its description. All the parameters in table 2.1 must be
specified clearly in the script.

Table 2.2: Modes of operations and its description in PSS®E

Mode Number Mode Description

Initialization stage,
1 all state and algebraic variables
must be initialized
All the blocks in the model must
2 find the output of their time derivatives
and place them in an array called DSTATE.
Since Elementary blocks are used in Fortran,
3
mode 3 can be omitted .
The variables of subsequent models must be
4
initialized at this stage.
5 The model data report is written
6 The output data recorded is written
Data check mode, this mode ensures that
7 all the constants used in the model
are within the acceptable limits.
Description mode, this mode provides
8 description of ICONs and CONs
when it is called

24
Chapter 3

STATCOM Modeling

The STATCOM representation described in this chapter is developed using

ABB’s control logic. The Hybrid-STATCOM model is proposed in chapter
4.

3.1 Static Synchronous Compensator

3.1.1 STATCOM Overview
Static Synchronous Compensator (STATCOM) is a reactive power compen-
sator that uses VSC to regulate the voltage using PWM at PCC. The bene-
fits of STATCOM over SVC is the speed of operation and reduced footprint
(physical size). The operations of VSC and PWM have been explained in
section 2.2. Figure 3.1 shows a simple structure of STATCOM. The VSC
branch is usually connected to the grid through a transformer that reduces
the voltage on the power electronics components in the VSC. The DC volt-
age source of the VSC can be a capacitor or a battery. The reactive power
exchange between the grid and the STATCOM depends on the voltage and
phase angle of STATCOM AC-side. If voltage magnitude and phase an-
gle are the same at VSC and PCC, there will be no exchange of reactive
power. The voltages considered here are in (pu) since the VSC is connected
to the PCC through a transformer. If the voltage magnitude at the VSC
is raised, the current will start to flow from VSC to the grid. STATCOM
will inject reactive power in the grid and raise the voltage at PCC. On the
other hand, lowering the voltage magnitude at VSC will cause the current
to flow from the grid towards VSC. STATCOM will consume reactive power
and reduce the voltage at PCC. The DC side voltage in the VSC can be
controlled by regulating the active power exchange between the grid and
VSC. Active power exchange occurs when the VSC current and voltage at
PCC are out of phase. Power electronics switching devices do not have the
capability to store energy; hence, the capacitor is the only element that can

25
 Figure 3.1: General structure of STATCOM

store or generate active power. The change in active power exchanged will
cause the voltage across the capacitor to change. Therefore, DC voltage can
be regulated by regulating the phase angle of VSC current with respect to
PCC voltage.

3.1.2 STATCOM Model

STATCOMs can be modeled as an ideal voltage source or current source.
Figure 3.2 shows the STATCOM as a voltage source. The voltage magnitude
Esh and angle “sh can be controlled to inject or consume reactive power. The
current IST is going through the reactance XST , which can be considered
as the transformer leakage reactance. In some literature, the losses in the
VSC is considered in the model by either adding a resistor in parallel with
the capacitor at the DC side, or by adding a resistance to XST to make
it RST + jXST = ZST . For simplicity in calculations, assume losses are
negligible XST >> RST , hence, ZST = XST . The complex power transferred
from busP CC to bussh is calculated in equation 3.1.

26
 Figure 3.2: Simple STATCOM model

S̄ST = Ūpcc I¯ST

ú

ú ≠ Ē ú
Ūpcc
= Ūpcc ú
sh
Z̄ST
2 ≠ Ū
Upcc ú
pcc Ēsh
=
≠jXST
2
= jbST (Upcc ≠ Upcc Esh \(◊ ≠ “sh ))
2 # $
= jbST Upcc ≠ Upcc Esh [cos(◊ ≠ “sh ) + jsin(◊ ≠ “sh )]

2 # $
S̄ST = bST Upcc Esh sin(◊ ≠ “sh ) + jbST Upcc ≠ Upcc Esh cos(◊ ≠ “sh ) (3.1)
And,
PST = bST Upcc Esh sin(◊ ≠ “sh ) (3.2)

2 # $
QST = bST Upcc ≠ Upcc Esh cos(◊ ≠ “sh ) (3.3)
From equation 3.2, it is clear that active power exchange can only occur when
the voltage phase angles at busP CC and bussh are out of phase. Assuming
the phase angle is kept constant at ◊ = “sh , then equations 3.2 and 3.3
becomes:

PST = bST Upcc Esh sin(◊ ≠ “sh ) = 0 (3.4)

27
 # $
QST = bST Upcc Upcc ≠ Esh (3.5)
And,
# $
IST = bST Upcc ≠ Esh (3.6)
Equation 3.6 shows that it is possible to represent STATCOM by a current
source with the control signal as the voltage at the AC side of VSC. By reg-
ulating Esh , the current IST can flow from the VSC towards the grid (QST
injection), or IST can flow towards the VSC from the grid (QST consump-
tion). The current source then can be limited by ≠Imaxcap < I
ST < Imax . The
ind

V-I characteristic of STATCOM is shown in figure 3.3. STATCOM have

Figure 3.3: V-I characteristics of STATCOM with slope applied

two operation regions, Capacitive and inductive. In the Capacitive region,

the current IST is leading the voltage at PCC, and the STATCOM injects
reactive power into the system, which raises the voltage at PCC. On the
other hand, in the Inductive region, the current IST is lagging the voltage at
PCC, and the STATCOM consumes reactive power from the system, which
reduces the voltage at PCC. IST will be limited by the rating of the STAT-
COM. The nominal operation point of STATCOM is at Uref when IST = 0.
cap and I ind represent the maximum capacitive and inductive currents at
Imax max
which STATCOM can regulate the current in a continues manner. STAT-
COM has the capability to provide Imaxcap or I ind when the voltage is outside
max

28
the linear region. This characteristic makes STATCOM superior to SVC in
undervoltage events as mentioned in chapter 1. STATCOM has the same
droop concept mentioned earlier in section 2.3.2. Capacitive slope (XC ) and
inductive slope (XI ) can differ in value depending on the network operator.

3.1.3 Control
The dynamic model of STATCOM consists of different functions that can be
split into control functions and protective functions. The control functions
are responsible for regulating the output of the STATCOM. The protective
functions have two main roles: The first role is to protect the system by
applying undervoltage and overvoltage ride through strategies. The second
role is to protect the power electronics devices in VSC by limiting the output.
The following sections describes the objective and implementation of all
STATCOM functions.

3.1.3.1 STATCOM Control functions

The STATCOM control function developed in the PSS®E model are as
follows:

3.1.3.1.1 Automatic Voltage Regulator:

The voltage regulator loop is the most important logic block in the model.
It uses a Proportional Integral (PI) regulator with the proportional gain
as Kpv and the integral gain as Kiv . The block takes the voltage error as
input and tune IV SC to the desired value. The regulator has a non windup
function that limits the output to IV SCM AX and IV SCM IN .The dynamic
model of the PI regulator is shown in figure 3.4. The lag block after the

Figure 3.4: Voltage regulator in STATCOM

voltage regulator block represents the delay of the STATCOM firing circuit
with T0 as time constant. The delay block with Ts as time constant is used
to add additional delay to model the firing circuit as well. The voltage
error Verr is calculated by subtracting the voltage at the regulated bus from

29
the reference voltage. The Lead-Lag block after Vbus is representing the
delay in voltage measurements. The reference voltage consists of four signals
SV ref , Vref , VP ODL and Vslope . The main reference voltage is set by the
STATCOM internal signal Vref . The other three signals are outputs of
the Power Oscillation Damping (POD), Slow MVAR and Droop functions.
They are used to correct the reference voltage. Vmax1 and Vmin1 are limits
for the reference voltage. In a real STATCOM, there is an inner control
that regulates the current to the reference IV SC . However, since PSS®E
typically have time steps in the range 2-7 ms, it is not applicable to add the
inner current control because in PSS®E the whole STATCOM is modeled
as a current source. VSC outputs any current supplied by the model if it
was within its limits.

3.1.3.1.2 Slow MVAR Control:

The slow MVAR function is a high operation function that regulates the
voltage with the PI regulator. This function is slow compared to the PI
regulator. Figure 3.5 shows the dynamic model of slow MVAR. The func-

Figure 3.5: STATCOM Slow MVAR function

tion allows the STATCOM to operate dynamically in the range [VREF M IN

, VREF M AX ] and [QP rim > QREGM AX ] for capacitive operation, and the
range [QP rim < QREGM IN ] for inductive operation. Slow MVAR will bring
the voltage at PCC slowly below VREF M AX during capacitive operation
and above VREF M IN during inductive operation. The small change in
STATCOM output saves some capacitive or inductive MVAR for emergency
operation. The difference between STATCOM MVAR output QP rim and
QREGM AX (capacitive) or QREGM IN (inductive) is passed to an integrator.
To ensure the slow operation of this function, the integrator contains a large
time constant TIREG . The output of this function is SV ref which is added

30
to the reference voltage. The maximum allowable change to the reference
voltage is DVIREGM IN (capacitive) and DVIREGM AX (inductive).

3.1.3.1.3 Power Oscillation Damping (POD):

POD is a function used to damp active power oscillations in the system
by regulating the STATCOM output. It takes the change of the system’s
frequency or active power as input. The output signal is VP ODL which is
added to the STATCOM reference voltage. POD consists of a series of
Lead-Lag and Washout filters as shown in figure 3.6. The time constants

Figure 3.6: STATCOM POD function

of these blocks must be tuned according to the system’s modes. VP ODL

is limited by HLIM and LLIM . These limits are founded by multiplying
VP ODM AX and VP ODM IN , which are constants specified by the user, by
the output of the ramp function. The ramp function is used to increase
the POD limits gradually instead of using the full value of VP ODM AX and
VP ODM IN . The ramp function is useful in extreme events immediately after
UV or OV strategies are switched off since POD might start acting during
the switching off events. It helps in avoiding unnecessary damping in the
system. Each time step, the ramp function output increases by ramprate,
which is a constant specified by the user. Eventually, the output will reach
1 and the full range [VP ODM IN ,VP ODM AX ] will be utilized. If UV or OV
strategies are on, the ramprate will be a large negative value (-1000), which
forces the ramp function to output zero and disable POD since The limits

31
will become zeros. POD is not allowed to operate during these events since
it will create a conflict with UV and OV strategies.

3.1.3.1.4 Slope (droop) Control:

Is a gain block that multiplies the STATCOM output current IV SC3 by
the slope value XSL . The output is Vslope which is subtracted from the
reference voltage. The slope function is shown in figure 3.7. The droop can

Figure 3.7: STATCOM Slope function

have different values for inductive and capacitive modes of operation. XSL
will have one value only during the controllable each region. For capacitive
operation region, the applied slope is XC . And for inductive operation
region, the applied slope is XI .

3.1.3.1.5 Gain Supervisor and Optimizer:

The gain supervisor regulates the integral gain used in the PI regulator.
This function monitors the output of the regulator and reduces the gain if
IV SC is oscillating. The gain will be reduced by 5% each time step until

Figure 3.8: STATCOM gain Supervisor and Optimizer

the peak-to-peak value in IV SC is below a specified value and the current

is stabilized. The gain optimizer will monitor IV SC as well and resume the

32
integral gain to its original value used. The Gain Supervisor and Optimizer
are shown in figure 3.8. Their outputs are fed directly to the PI-regulator.

3.1.3.1.6 External Bank Control (MSS):

MSS can be used as an external shunt reactors or capacitors. The MSC and
MSR are usually connected to buses on the high voltage side of the trans-
former, close to PCC. MSS switching is controlled by the STATCOM con-
troller. The MSS logic block monitors the STATCOM output current IV SC3
and send a switching in/out signal to MSS. There are two switching meth-
ods applicable for both MSC and MSR. The first method is slow switching.
Three parameters are used in this method IHigh slow , I slow and T slow . MSS is
Low Delay
switched in if IV SC3 > IHigh
slow for T slow . MSS is switched out if I
Delay
slow
V SC3 < ILow
for TDelay
slow . The second method is fast switching. Three parameters are used

in this method IHigh

f ast
, ILow
f ast
and TDelay
f ast
. MSS is switched in if IV SC3 > IHigh
f ast

for TDelay
f ast
. MSS is switched out if IV SC3 < ILow
f ast
for TDelay
f ast
. Fast switching
is applied in extreme conditions. The relationship between the parameters
used for fast and slow switching is:
f ast slow < I slow < I f ast
ILow < ILow High High

f ast slow
TDelay < TDelay

The STATCOM controller prevents MSC and MSR from being switched in
at the same time. For instance, if MSR was in and the current dropped
below the MSC switching-in threshold, the controller will switch out MSR
first and monitor the current. If the current is still below the MSC switching-
in threshold, the controller will switch in MSC. This feature is important
to prevent rapid switching between MSC and MSR. The delay for switching
MSS in/out can be specified by the user. In reality, the switching delay is
long in MSS, it takes a long time to be switched in or out.

Figure 3.9: STATCOM MSS control

33
3.1.3.2 STATCOM protective functions
The protective functions are developed to protect the STATCOM and the
network. The STATCOM controller imposes limits on the output current
and reactive power in addition to the voltage at the STATCOM bus. The
limiters are tuned according to the equipment used in the STATCOM. For
instance, the IGBTs can withstand a certain amount of current through
them, the limiters should reduce the output current if a limit is violated for
some specified time. Some protective functions such as thermal protection
cannot be modeled accurately in PSS®E; hence, they will be dropped from
the model. The network protection functions applied in the model are the
overvoltage and undervoltage strategies.

3.1.3.2.1 Limiters:
STATCOM model used in this project contains 5 limiters as shown in figure
3.10. The limiters are either for capcitive or inductive mode of operation.
The capacitive limiters control the maximum current limit on the PI regu-
lator. The minimum output of the capacitive limiters will be passed to the
PI regulator and will overwrite IV SCM AX . The inductive limiters control
the minimum current limit on the PI regulator. The maximum output of
the inductive limiters will be passed to the PI regulator and will overwrite
IV SCM IN . The 5 limiters are:

1. Secondary Voltage Limiter:

The limiter monitors the voltage on the secondary side of the trans-
former V2LV and ensures that it doesn’t exceed V2max for a period
longer than Ton1 . The lag block with time constant T6 represents a
delay in voltage measurements. The error signal is passed to the inte-
grator with time constant T7 , which controls the speed of integration
(i.e. the speed of the limiter).

2. Capacitive Current Limiter:

The limiter monitors the current between STATCOM and the sec-
ondary side of the transformer I1HV . It ensures that the current
doesn’t exceed I1maxC for a period longer than Ton2 . The lag block
with time constant T8 represents a delay in current measurements.
The error signal is passed to the integrator with time constant T9 ,
which controls the speed of integration (i.e. the speed of the limiter).

3. Capacitive Reactive Power Limiter:

The limiter monitors the reactive power between STATCOM and the
secondary side of the transformer QP rim (STATCOM MVAR output).
It ensures that the reactive power doesn’t exceed Q1maxC for a period
longer than Ton3 . The error signal is passed to the integrator with time

34
 Figure 3.10: STATCOM Limiters control

constant T14 , which controls the speed of integration (i.e. the speed of
the limiter).

4. Inductive Current Limiter:

The limiter monitors I1HV as well. It ensures that the current doesn’t
exceed I1minI for a period longer than Ton4 . The lag block with time
constant T10 represents a delay in current measurements. The error
signal is passed to the integrator with time constant T11 , which controls
the speed of integration (i.e. the speed of the limiter).

5. Inductive Reactive Power Limiter:

The limiter monitors QP rim as well. It ensures that the reactive power
doesn’t exceed Q1minI for a period longer than Ton5 . The error signal
is passed to the integrator with time constant T15 , which controls the
speed of integration (i.e. the speed of the limiter).

35
3.1.3.2.2 Undervoltage and Overvoltage Strategy:
The main purpose of Overvoltage (OV) and Undervoltage (UV) strategies
are STATCOM and network protection. The OV and UV strategies output
will override the PI regulator as shown in figure 3.11. OV and UV functions

Figure 3.11: STATCOM Undervoltage and Overvoltage Strategy

monitor the voltage at Vbus . If a voltage limit was violated, the OV and
UV function will switch the STATCOM output from the PI regulator to
a constant value specified in the strategy. The OV and UV strategies are
developed as follows:

1. Overvoltage Strategy:
There are 2 voltage levels specified in the OV strategy OVthreshold and
OVtrip , where (OVthreshold < OVtrip ). If Vbus is withing the range
[OVthreshold Æ Vbus < OVtrip ], the OV strategy will do the following:

(a) Full inductive:

The STATCOM output current will be at the maximum inductive
current. If Vbus remained within [OVthreshold Æ Vbus < OVtrip ] for
TOV Block , the strategy will switch to the next stage.
(b) Block:
The output current will be blocked to protect the equipment
(IV SC3 = 0). If Vbus remained within [OVthreshold Æ Vbus <
OVtrip ] for TOV T rip , the strategy will switch to the next stage,
where TOV Block < TOV T rip .
(c) Trip:
The STATCOM will trip and it cannot be reconnected. The user
should restart the simulation to use the STATCOM model.

36
 Figure 3.12: Overvoltage Strategy

2. Undervoltage Strategy:
The UV strategy is usually applied with severe undervoltage conditions
which is caused by a fault. UV function is a voluntary strategy that
is not required in all applications. Ideally, STATCOM should be able
to support fully during undervoltage conditions. During a fault, the
STATCOM will initially attempt to bring the voltage back to Vref by
applying maximum capacitive current until UV strategy is applied.
There are 2 voltage levels specified in the UV strategy U V1Low and
U V2Low , where (U V2Low < U V1Low ). UV strategy is applied as follows:

(a) Constant Value:

If Vbus is withing the range [U V2Low < Vbus Æ U V1Low ], STAT-
COM output current will be at a user-specified value IU V 1 . The
chosen value should be close to zero to prevent a voltage over-
shoot when the fault is cleared. STATCOM output will remain
at IU V 1 until Vbus > U V1Low .
(b) Block:
If Vbus Æ U V2Low , the output current will be blocked to pro-
tect the equipment (IV SC3 = 0). STATCOM output will remain
blocked until Vbus > U V1Low .

37
Figure 3.13: Undervoltage Strategy

38
Chapter 4

Hybrid-STATCOM Modeling

The Development of the Hybrid-STATCOM model starts with STATCOM

dynamic modeling, i.e. modeling of VSC branch. The dynamic model of
STATCOM is described in section 3.1.3. This chapter describes the integra-
tion of TSR/TSC branches into the PSS®E STATCOM model with all the
required functions and parameters.

4.1 VSC Branch Modeling

The developed STATCOM model will be modified slightly to control TSC
and TSR branches. TSR and TSC could have their own dynamic models
in PSS®E; however, this modeling configuration doesn’t work because it is
necessary for all three branches to exchange control signals, and it is not
possible to have an external controller. Therefore, TSC and TSR must be
controlled from the STATCOM model.

4.2 TSC/TSR Branch Modeling

Thyristor valves cannot be modeled in PSS®E. Therefore, TSC and TSR are
modeled as switched shunts in PSS®E. The parameter of a switched shunt
that can be controlled in PSS®E is the susceptance. Hence, TSC and TSR
are defined by their susceptance as BT SC and BT SR respectively. Figure 4.1
shows the hybrid-STATCOM configuration implemented in PSS®E. TSC
and TSR branches are in parallel with the VSC branch. The VSC device
contains the STATCOM dynamic model developed earlier. Modeling the
Hybrid-STATCOM for load flow calculations can be realized by the models
developed in chapter 2 for STATCOM and SVC as shown in figure 4.2. The
VSC branch is modeled as an ideal current source. The TSC and TSR
branches are modeled as controllable susceptance. Assuming no exchange
of active power exists, hence, ◊ = “sh . By modifying equation 3.6, the total

39
 Figure 4.1: Hybrid-STATCOM configuration

Figure 4.2: Hybrid-STATCOM load flow model

output current of the Hybrid-STATCOM is calculated as follows:

# $
IT ot = bST Upcc ≠ Esh = IV SC + IT SC + IT SR (4.1)

Where, IT SC and IT SR are calculated from equation 2.7 as follows:

IT SC = Esh BT SC (–) (4.2)

IT SR = Esh BT SR (–) (4.3)

Since the developed model is using switched shunts, – can take two values
only – = 90 (full conduction) or – = 180 (block). The V-I characteristics

40
 Figure 4.3: V-I characteristics of Hybrid-STATCOM

of Hybrid-STATCOM is shown in figure 4.3. The controllable region for

the VSC is the same as the STATCOM discussed in section 3.1.2. The
additional part is the operational regions when TSC or TSR are switched-
in for capacitive or inductive operation respectively. As shown in figure
4.3, TSC and TSR expands the operational region of VSC when it reaches
SC and Imax,V SC . The exact switching method is discussed in section
cap ind
Imax,V
4.4. The I-V characteristics of hybrid-STATCOM includes capacitive Xc
and inductive Xi slopes as the case of STATCOM V-I plot.

4.3 Hybrid-STATCOM Regulator

Most of the functions developed in the STATCOM model will be used in the
Hybrid. The main change in the model is the regulator. The currents from
TSC (IT SC ) and TSR (IT SR ) branches are subtracted from the total output
of the Hybrid STATCOM IT ot (voltage regulator output). VSC current
IV SC is the output required from the VSC branch in order to achieve IT ot ,
and counteract the injection of IT SC or IT SR . When TSC and TSR are off,
IV SC = IT ot . The currents are calculated as follows:

IT SC = (V2LV )(BT SC )(T SCsig ) ; where T SCsig = {0, 1} (4.4)

IT SR = (V2LV )(BT SR )(T SRsig ) ; where T SRsig = {0, 1} (4.5)

IV SC = IT ot ≠ IT SC ≠ IT SR (4.6)
Figure 4.4 shows the Hybrid-STATCOM regulator model. The voltage reg-
ulator limits are extended to include the maximum TSC current (IT SCmax )

41
 Figure 4.4: Hybrid-STATCOM regulator function

in capacitive operation and maximum (IT SRmax ) in inductive operation.

T SCsig and T SRsig are integer values used to determine whether to include
IT SC and IT SR in the calculations. T SCsig and T SRsig can be either 0 or
1. V2LV is the voltage on the secondary-side of the transformer. BT SC and
BT SR are constants defined by the user in the PSS®E network. The VSC
ensures that it switches at the same moment as TSC or TSR switch to avoid
voltage overshoot.

4.4 Hybrid-STATCOM Switching

The functions used to switch in/out MSS can be modified and used for TSC
and TSR switching. But there is only fast switching in TSC and TSR. The

(a) TSC switching in (b) TSC switching out

Figure 4.5: Hybrid-STATCOM switching methodology

42
switching functions uses 4 constants (CONs) defined by the user ITswitch SC
in
,
IT SR , IT SC
switchin switchout
and IT SR
switchout
. These constants are determined by the
user. They are VSC current values in pu used to determine TSC and TSR
switching. As shown in figure 4.5a, When IV SC exceeds ITswitchSC
in
, TSC will
be switched in. IV SC counteracts IT SC to maintain IT ot constant during
TSC switching in state. TSC is switched out when IV SC is smaller than
ITswitch
SC
out
as shown in figure 4.5b. IV SC counteracts IT SC to maintain IT ot

Figure 4.6: TSC and TSR switching function

constant during TSC switching out state. The switching function prevents
TSC and TSR from being switched in at the same time. If an OV event
occurred while TSC is switched in, the controller will switch out TSC first
and monitor the voltage. If the voltage remained high, TSR will be switched

43
in. The same logic applies for inductive mode of operation. The switching
mechanism is shown in figure 4.6.

4.5 OV and UV Strategies with Hybrid-STATCOM

The OV and UV strategies must be modified to account for for TSC and
TSR switching. The VSC controller should regulate the TSC/TSR switching
and VSC output according to the disturbance in order to avoid constant
switching.

4.5.1 UV strategy in Hybrid STATCOM

UV strategy will go full capacitive at the beginning (TSC+VSC). Then VSC
will be forced to a certain value and TSC will be blocked to avoid overshoot
when clearing. The last step is to block VSC as well to avoid misfiring if the
voltage is still below the UV threshold. Figure 4.7 shows the UV Strategy
in Hybrid-STATCOM.

Figure 4.7: Undervoltage strategy in Hybrid-STATCOM

44
4.5.2 OV strategy in Hybrid STATCOM
The OV strategy will go full inductive at the beginning (TSR+VSC), then
it will block after a certain period (only VSC blocked) to protect the VSC
since the power electronics switching devices (IGBTs or IGCTs) might not
be able to handle the stress of the high voltage. If the voltage is still above
the OV threshold for a certain time, Hybrid-STATCOM will trip. Figure
4.8 shows the OV Strategy in Hybrid-STATCOM.

Figure 4.8: Undervoltage strategy in Hybrid-STATCOM

4.6 Limiters with Hybrid-STATCOM

The limiters functions are modeled in the same way as in STATCOM. The
main difference is the the limits on the PI regulator. The limits now consist
of IVmax
SC + IT SC and IV SC + IT SR . All four signals are variables that must be
max min max

updated in every time step. The limiters should be acting on VSC current
only, but it appears that they are acting on the total current required by
TSC/TSR and VSC. However, since TSC and TSR currents are subtracted

45
 Figure 4.9: Hybrid STATCOM Limiters configuration

from the total and their limits are being updated continuously, the limiters
will actually only be applied on VSC. Figure 4.9 shows the limiters in hybrid-
STATCOM model.

4.7 Slope with Hybrid-STATCOM

The slope functionality was explained in section 3.1.3.1.4. The main differ-
ence between the slope function in STATCOM and hybrid-STATCOM is the
input current. STATCOM uses the VSC output IV SC3 . Hybrid-STATCOM
uses the total output current IT ot as an input for the function. Slope is a
gain block that multiplies the hybrid-STATCOM output current IT ot by the
slope value XSL . The output is Vslope which is subtracted from the reference
voltage. The slope function is shown in figure 4.10.
The droop can have different values for inductive and capacitive modes of

46
 Figure 4.10: Hybrid-STATCOM Slope function

operation. XSL will have one value only during the controllable each region.
For capacitive operation region, the applied slope is XC . And for inductive
operation region, the applied slope is XI .

47
Chapter 5

Model Verification

In this section the developed STATCOM and Hybrid-STATCOM models are

verified. The functions of the models are tested first with different events
and models parameter. STATCOM model is also verified against WECC
STATCOM model and PSCAD model. Hybrid-STATCOM model is verified
against a PSACAD model only.

5.1 STATCOM model

The STATCOM model developed in chapter 3 is verified in this section. In
this chapter, the current and reactive power from STATCOM to the grid
(capacitive operation) is considered as positive values. The current and re-
active power from the grid to STATCOM (inductive operation) is considered
as negative values. The test system used in the model verification is shown in

Figure 5.1: Test System used for STATCOM model verification

figure 5.1.A network Thevenin equivalent is used to represent the grid. MSS

48
are connected directly to PCC to test the MSC/MSR switching function.
The VSC is connected to the grid through a step-down transformer.

5.1.1 STATCOM Functions Test

All the functions mentioned in section 3.1.3 will be tested. Each STATCOM
function is tested separately. The list of STATCOM functions tests are as
follows:

5.1.1.1 Automatic Voltage Regulator:

The voltage regulator is tested by applying several steps to the voltage
reference and monitoring the voltage and VSC output current. As shown in
Regulator Test
1.05 VBUS [PU]
VREF [PU]
Voltage (pu)

0.95

0 0.5 1 1.5 2 2.5

(a)

I_VSC_OUT [PU]
1
Current (pu)

-1

0 0.5 1 1.5 2 2.5

(b)

2 Q_VSC

1
Q (pu)

-1

0 0.5 1 1.5 2 2.5

(c)
Time [S]

Figure 5.2: Voltage regulator test for STATCOM model in PSS®E

figure 5.2.(a), the voltage at the PCC follows the change in Vref accurately.

49
The VSC output in figures 5.2.(b) and 5.2.(c) shows the current and reactive
power output respectively. It corresponds to the required change in VSC
output by the voltage regulator.

5.1.1.2 Slow MVAR Control:

Slow MVAR function is tested by applying a voltage change at PCC bus.
The voltage change is applied by connecting a shunt capacitor to raise the
voltage, and a shunt reactor to reduce the voltage at PCC. The monitored
signal is the change in reference voltage applied by slow MVAR. The shunt
Slow MVAR TEST
Voltage (pu)

1.05 VBUS [PU]

VREF [PU]
1

0.95
0 0.5 1 1.5
(a)
Current (pu)

1 I_VSC_OUT [PU]

0
-1

0 0.5 1 1.5
(b)

Q_VSC
1
Q (pu)

0
-1
0 0.5 1 1.5
(c)
1.04
V_REF_L [PU]
1.02
V_REF

VREF [PU]
1
0.98
0.96
0 0.5 1 1.5
(d)
Time [S]

Figure 5.3: Slow MVAR test for STATCOM model in PSS®E

capacitor is connected at 0.1 sec and disconnected at 0.6 sec. The voltage at
PCC is raised and STATCOM operational point changed as shown in figure
5.3.(a). It can be seen that the voltage is raised above Vref in inductive
operation. The shunt reactor is connected at 1.3 sec and disconnected at

50
1.5 sec. The voltage at PCC is reduced and STATCOM operational point
changed. It can be seen that the voltage is reduced below Vref in capacitive
operation. The slight change allows the STATCOM to operate dynamically.
The VSC output in figures 5.3.(b) and 5.3.(c) shows the current and reactive
power output respectively. Figure 5.3.(d) shows Vref and VrefL , which is the
new voltage reference signal after being modified by the slow MVAR func-
tion. The voltage at PCC follows the new signal VrefL . The time constant
used in Slow MVAR is slow but in order to test the function, a fast one is
used

5.1.1.3 Slope (droop) Control:

The slope test is the same as voltage regulator test but with adding two
different slopes for inductive and capacitive operation. The slope values
Slope Test
1.05 VBUS [PU]
VREF [PU]
Voltage (pu)

0.95

0 0.5 1 1.5 2 2.5

(a)

I_VSC_OUT [PU]
1
Current (pu)

0.5
0
-0.5

0 0.5 1 1.5 2 2.5

(b)

1.5
Q_VSC
1
Q (pu)

0.5
0
-0.5

0 0.5 1 1.5 2 2.5

(c)
Time [S]

Figure 5.4: Slope test for STATCOM model in PSS®E

51
used are Xi = %6 and Xc = %2. Monitor signals are VSC output and
voltage at PCC. As shown in figure 5.4.(a), the voltage at the PCC follows
the change in Vref accurately with the addition of a slope. The voltage
doesn’t reach the required Vref in capacitive and inductive operation due to
the addition of a slope. It can be seen from figure 5.4.(a) that two different
slope values are used for capacitive and inductive operation. The VSC
output in figures 5.4.(b) and 5.4.(c) shows the current and reactive power
output respectively. It corresponds to the required change in VSC output
by the voltage regulator.

5.1.1.4 Gain Supervisor:

Gain Supervisor test is done by applying two large changes to the reference
voltage with raising the integral gain in the voltage regulator to a very large
value. The first change in Vref is done with the gain supervision function

Gain Supervision Test

Voltage (pu)

1.1 VBUS [PU]

VREF [PU]
1.05
1
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
(a)
4
Current (pu)

I_VSC_OUT [PU]

0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
(b)
6
Q_VSC
Q (pu)

4
2
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
(c)
Gain Supervision (pu)

1
GAIN SUPERVISION

0.8

0.6
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
(d)
Time [S]

Figure 5.5: Gain Supervisor test for STATCOM model in PSS®E

52
turned off. The second change in Vref is done with the gain supervision
function turned on. Signals to be monitored are VSC output, voltage at
PCC and gain supervision factor. As shown in figure 5.5.(a), the voltage at
the PCC follows the change in Vref . Since the gain in the voltage regulator
is raised to a very large value, the voltage at PCC is oscillating as seen in
figure 5.5.(a). The oscillation triggers the gain supervision function and it
starts acting as shown in the second part of figure 5.5.(d). Gain reduction
reduces the signal’s settling time. The VSC output in figures 5.5.(b) and
5.5.(c) shows the current and reactive power output respectively.

5.1.1.5 Mechanically Switched Capacitor (MSC):

MSC test is done by raising Vref . The signals to be monitored are VSC
output, voltage at PCC and MSC reactive power output. As shown in
MSC Switching Test
1.1 VBUS [PU]
VREF [PU]
Voltage (pu)

1.05

0 0.2 0.4 0.6 0.8 1 1.2

(a)

2
I_VSC_OUT [PU]
Current (pu)

-1
0 0.2 0.4 0.6 0.8 1 1.2
(b)

Q_VSC
2
Q (pu)

0 0.2 0.4 0.6 0.8 1 1.2

(c)
Time [S]

Figure 5.6: MSC test for STATCOM model in PSS®E

53
figure 5.6.(a), the voltage at the PCC follows the change in Vref . As soon as
the current reaches the switching threshold, MSC is turned on. The MSC
used in the test consists of 4 shunt capacitors. The MSC switching function
turns the shunt capacitors in steps to avoid constant switching of breakers.
The STATCOM used in the test can raise the voltage at PCC to 1.05 pu
only. However, with the aid of MSC, the voltage is raised to a value close
to 1.09 pu as shown in figure 5.6.(a). The VSC output in figures 5.6.(b)
and 5.6.(c) shows the current and reactive power output respectively. Vref
is changed back to 1.0 pu and VSC current starts increasing. The current
reaches the switching out threshold, and MSC will start turning off in steps.

5.1.1.6 Mechanically Switched Reactor (MSR):

MSR test is done by reducing Vref . The signals to be monitored are VSC
output, voltage at PCC and MSR reactive power output. As shown in figure
MSR Switching Test
VBUS [PU]
1 VREF [PU]
Voltage (pu)

0.95

0.9

0 0.2 0.4 0.6 0.8 1 1.2

(a)

1
I_VSC_OUT [PU]
Current (pu)

-1

-2
0 0.2 0.4 0.6 0.8 1 1.2
(b)

1 Q_VSC
Q (pu)

-1

0 0.2 0.4 0.6 0.8 1 1.2

(c)
Time [S]

Figure 5.7: MSR test for STATCOM model in PSS®E

54
5.7.(a), the voltage at the PCC follows the change in Vref . As soon as the
current reaches the switching threshold, MSR is turned on. The MSR used
in the test consists of 4 shunt reactors. The MSR switching function turns
the shunt reactors in steps to avoid constant switching of breakers. The
STATCOM used in the test can lower the voltage at PCC to 0.95 pu only.
However, with the aid of MSR, the voltage is lowered to a value close to 0.91
pu as shown in figure 5.7.(a). The VSC output in figures 5.7.(b) and 5.7.(c)
shows the current and reactive power output respectively. Vref is changed
back to 1.0 pu and VSC current starts decreasing. The current reaches the
switching out threshold, and MSR will start turning off in steps.

5.1.1.7 Limiters:
The Limiters are tested by raising or reducing Vref . High Vref value tests

Limiters Test
1.1
Voltage (pu)

VBUS [PU]
1.05 VREF [PU]
1
0.95

0 0.5 1 1.5 2
(a)
2
Current (pu)

I_VSC_OUT [PU]

-2
0 0.5 1 1.5 2
(b)

2 Q_VSC
Q (pu)

1
0
-1
0 0.5 1 1.5 2
(c)
1
Ilimits (pu)

I_VSC_MAX [PU]
I_VSC_MIN [PU]
0

-1
0 0.5 1 1.5 2
(d)
Time [S]

Figure 5.8: Limiters test for STATCOM model in PSS®E

55
the capacitive limiters, and low Vref tests inductive limiters. The limiters
are turned on at different times to clarify the behavior of each limiter. The
signals to be monitored are VSC output, voltage at PCC and the limits of the
voltage regulator. As shown in figure 5.8.(a), the voltage at the PCC follows
the change in Vref , but the limiters function forces the STATCOM output
to a certain value defined by the user. The windup limits at the voltage
regulator are shown in figure 5.8.(d). The limiters change these limits to
restrict the output of VSC. The capacitive limiters are acting between 0.5
sec and 1.5 sec, and the inductive limiters are acting between 1.7 sec and 2.1
sec. Each limiter has an on and off delays. The secondary voltage limiter and
capacitive current limiter were turned off before 1.45 sec, but the reactive
power limiter was still acting. At 1.45 sec, the capacitive reactive power
limiter was turned off since the reactive power output was not violating the
limit anymore. At the turning off moment, the difference between VP CC and
Vref was high. The current was not limited anymore, and it jumped back
to its maximum capacitive output. All the delays can be modified by the
user. The VSC output in figures 5.8.(b) and 5.8.(c) shows the current and
reactive power output respectively.

5.1.1.8 Overvoltage Strategy:

Overvoltage test is done by connecting a shunt capacitor to PCC bus. The
sudden high voltage will trigger the OV strategy. The signals to be moni-
tored are VSC output, voltage at PCC and the limits of the voltage regula-
tor. As shown in figure 5.9.(a), the voltage is raised above the OV threshold.
STATCOM output shown in figures 5.9.(b) and 5.9.(c) become fully induc-
tive. The windup limits at the voltage regulator are shown in figure 5.9.(d).
The limiters change these limits to restrict the output of VSC. The OV
strategy change the windup limits at the voltage regulator to be full induc-
tive (-1.0 pu). The OV strategy blocks STATCOM output after a certain
time to avoid an overshoot. The output is blocked at the time 0.3 Sec. If
the voltage remained high for a predefined time after STATCOM block, OV
strategy trips the STATCOM to protect the equipment as shown in figures
5.9.(b), 5.9.(c) and figures 5.9.(d). All STATCOM variables will become
zeros when it trips at 0.3 sec.

56
Voltage (pu) Overvoltage Strategy Test
1 VBUS [PU]
VREF [PU]

0.5

0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7
(a)
0
Current (pu)

I_VSC_OUT [PU]

-1

-2
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7
(b)
0
Q_VSC
Q (pu)

-1

-2
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7
(c)
1
Ilimits (pu)

I_VSC_MAX [PU]
I_VSC_MIN [PU]
0

-1
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7
(d)
Time [S]

Figure 5.9: Overvoltage test for STATCOM model in PSS®E

5.1.1.9 Undervoltage Strategy:

Undervoltage test is done by applying a fault at PCC bus. The sudden
change in voltage will trigger the UV strategy. The signals to be monitored
are VSC output, voltage at PCC and the limits of the voltage regulator. As
shown in figure 5.10.(a), the voltage has dropped below the UV threshold
(0.3 pu). STATCOM output shown in figures 5.10.(b) and 5.10.(c) become
fully capacitive. The UV strategy change the windup limits at the voltage
regulator as shown in figure 5.10.(d). STATCOM output usually is kept at
full capacitive for a longer time, but for the purpose of testing, the output
is changed to a predefined value in a fast manner. The UV strategy change
the STATCOM output current after a certain time to avoid an overshoot.
The value chosen here is 0.6 pu as shown in figure 5.10.(d). STATCOM will
continue injecting 0.6 pu until fault clearance as shown in figures 5.10.(b)

57
 Undervoltage Strategy Test
1
Voltage (pu)

VBUS [PU]
VREF [PU]

0.5

0 0.05 0.1 0.15 0.2 0.25

(a)
2
Current (pu)

I_VSC_OUT [PU]

0
0 0.05 0.1 0.15 0.2 0.25
(b)
1
Q_VSC
Q (pu)

0.5

0
0 0.05 0.1 0.15 0.2 0.25
(c)
1
Ilimits (pu)

I_VSC_MAX [PU]
I_VSC_MIN [PU]
0

-1
0 0.05 0.1 0.15 0.2 0.25
(d)
Time [S]

Figure 5.10: Undervoltage test for STATCOM model in PSS®E

and 5.10.(c). The STATCOM resumes normal operation after fault clearance
with a small delay defined by the user.

5.1.2 Comparison between STATCOM Model and WECC

Model
Comparing the developed STATCOM model to the WECC model to ob-
serve the difference in performance. A common test that can be used in
both models is the regulator test with slope. Another function that can
be tested is MSC switching. All the other main functions are modeled dif-
ferently. Hence, it is irrelevant to compare them. For instance, UV/OV
strategies and Slow MVAR functions exist in both models, but they use dif-
ferent parameters in each model. The functions used to compare the models
are:

58
5.1.2.1 Automatic Voltage Regulator:
The voltage regulator and the slope tests are equivalent to the ones done
earlier. They are performed by applying different Vref values. Figures 5.11
and 5.12 show the regulator and slope test respectively. It can be observed
that the response of both models to the changes in Vref are equivalent.
Thus, the regulator and slope functions in the developed STATCOM model
are performing as expected.
ABB STATCOM Model and WECC Model Regulator Test
1.05 VBUS _WECC_Model
Voltage (pu)

VBUS _ABB_Model [PU]

VREF [PU]
1

0.95

0 0.5 1 1.5 2 2.5

(a)

I VSC _WECC_Model
0.5
Current (pu)

I VSC _ABB_Model

-0.5

-1
0 0.5 1 1.5 2 2.5
(b)

200 QVSC _WECC_Model

QVSC _ABB_Model
100
Q (pu)

-100
0 0.5 1 1.5 2 2.5
(c)
Time [s]

Figure 5.11: Comparing Regulator function between STATCOM model and

WECC model

59
 ABB STATCOM Model and WECC Model Slope Test
1.05 VBUS _WECC_Model
Voltage (pu)

VBUS _ABB_Model [PU]

VREF [PU]
1

0.95

0 0.5 1 1.5 2 2.5

(a)

I VSC _WECC_Model
0.5
Current (pu)

I VSC _ABB_Model

-0.5

0 0.5 1 1.5 2 2.5

(b)

QVSC _WECC_Model
100 QVSC _ABB_Model
Q (pu)

-100
0 0.5 1 1.5 2 2.5
(c)
Time [s]

Figure 5.12: Comparing Slope function between STATCOM model and

WECC model

5.1.2.2 Mechanically Switched Capacitor (MSC):

MSC test is done by raising Vref . The signals to be monitored are VSC out-
put, voltage at PCC and MSC reactive power output. As shown in figure
5.13.(a), the voltage at the PCC follows the change in Vref for both models.
The current switching threshold is the same in both models. As soon as
the current reaches the switching threshold, MSC is turned on. The output
current and switching times are equivalent as shown in figures 5.13 (a), (b)
and (c). Thus, the MSC switching function in the developed STATCOM
model is valid.

60
 ABB STATCOM Model and WECC Model MSC Test
1.1 VBUS _WECC_Model
Voltage (pu)

VBUS _ABB_Model [PU]

VREF [PU]
1.05

0 0.2 0.4 0.6 0.8 1 1.2

(a)

1 I VSC _WECC_Model
Current (pu)

I VSC _ABB_Model
0.5

-0.5
0 0.2 0.4 0.6 0.8 1 1.2
(b)

QVSC _WECC_Model
200
QVSC _ABB_Model
Q (pu)

100

0 0.2 0.4 0.6 0.8 1 1.2

(c)
Time [s]

Figure 5.13: Comparing MSC switching function between STATCOM model

and WECC model

5.1.3 Comparison between STATCOM Model and PSCAD

Model
The developed STATCOM model is verified against the PSCAD model in
this section. As mentioned earlier, the PSCAD STATCOM model is using
the real controller installed in ABB STATCOMSs. Therefore, it is important
to validate the PSS®E model by comparing it to the PSCAD one. Some
functions are not tested in PSCAD because they are being updated. The
STATCOM functions tested are the following:

61
5.1.3.1 Automatic Voltage Regulator:
The regulator test is equivalent to the one done earlier with Vref altered
as shown in figure 5.14 (a). The current and reactive power outputs are
equivalent for both models as shown in figures 5.14 (b) and (c). There is a
small delay in the output of the PSCAD model, which could be the result
of a slight difference in the network or transformer parameters.
PSSE STATCOM Model and PSCAD Model Regulator Test
1.05 VBUS _PSCAD_Model
Voltage (pu)

VBUS _PSSE_Model
VREF
1

0.95

0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8
(a)

I VSC _PSCAD_Model
1
Current (pu)

I VSC _PSSE_Model

-1

0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8
(b)

QVSC _PSCAD_Model
100 QVSC _PSSE_Model
Q (MVAR)

-100

0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8
(c)
Time [s]

Figure 5.14: Regulator with a slope test for PSS®E and PSCAD models

5.1.3.2 Limiters:
In order to clarify the functionality of each limiter, the limiters test is split
into three separate tests. The first test is the secondary side voltage limiter
test shown in figure 5.15. As in the previous limiters test, the function is
tested by changing Vref . The secondary side voltage limiter acts in the ca-
pacitive region only. The function parameters used in PSS®E and PSCAD

62
models are equivalent. Figure 5.15 shows that the limiter function in both
models are behaving similarly. The second test is intended for the current
PSSE STATCOM Model and PSCAD Model Usec Limiter Test
1.05 VBUS _PSCAD_Model
Voltage (pu)

VBUS _PSSE_Model
VREF
1

0.95

0.3 0.4 0.5 0.6 0.7 0.8 0.9

(a)

I VSC _PSCAD_Model
1
Current (pu)

I VSC _PSSE_Model

-1

0.3 0.4 0.5 0.6 0.7 0.8 0.9

(b)

QVSC _PSCAD_Model
100 QVSC _PSSE_Model
Q (MVAR)

-100

0.3 0.4 0.5 0.6 0.7 0.8 0.9

(c)
Time [s]

Figure 5.15: Secondary side voltage limiter test for PSS®E and PSCAD
models

limiter test. The function is tested by changing Vref as shown in figure 5.16.
The capacitive and inductive regions have separate limiter functions. Both
limiters are acting perfectly in the PSS®E model by matching the PSCAD
model output. The third test is intended for the reactive power limiter test.
The function is tested by changing Vref as shown in figure 5.17. The capac-
itive and inductive regions have separate limiter functions. There is a small
difference between the PSS®E model output and PSCAD model output, es-
pecially in the reactive power output. The difference could be caused by a
harmonics filter used in the PSCAD model. The filter value is not included
anywhere in the PSS®E model.

63
 PSSE STATCOM Model and PSCAD Model I_Limiter Test
1.05 VBUS _PSCAD_Model
Voltage (pu)

VBUS _PSSE_Model
VREF
1

0.95

0.3 0.4 0.5 0.6 0.7 0.8 0.9

(a)

I VSC _PSCAD_Model
1
Current (pu)

I VSC _PSSE_Model

-1

0.3 0.4 0.5 0.6 0.7 0.8 0.9

(b)

QVSC _PSCAD_Model
100 QVSC _PSSE_Model
Q (MVAR)

-100

0.3 0.4 0.5 0.6 0.7 0.8 0.9

(c)
Time [s]

Figure 5.16: Current limiter test for PSS®E and PSCAD models

64
 PSSE STATCOM Model and PSCAD Model Q_Limiter Test
1.05 VBUS _PSCAD_Model
Voltage (pu)

VBUS _PSSE_Model
VREF
1

0.95

0.3 0.4 0.5 0.6 0.7 0.8 0.9

(a)

I VSC _PSCAD_Model
1
Current (pu)

I VSC _PSSE_Model

-1

0.3 0.4 0.5 0.6 0.7 0.8 0.9

(b)

QVSC _PSCAD_Model
100 QVSC _PSSE_Model
Q (MVAR)

-100

0.3 0.4 0.5 0.6 0.7 0.8 0.9

(c)
Time [s]

Figure 5.17: Reactive power limiter test for PSS®E and PSCAD models

5.1.3.3 Undervoltage Strategy:

The UV strategy is tested by applying a fault at 0.3 sec for a duration of 0.1
sec. The fault used in the simulation is a balanced 3-phase to ground fault.
As shown figure 5.18, the voltage at PCC drops at 0.3 sec. The VSC in
both models goes to full capacitive mode. The UV strategy in both models
is turned on after 40ms. The VSC is set to 0 pu to avoid overshoot when
clearing. The PSS®E model output is stable with no oscillation since the
VSC is modeled as a controllable current source. The output of the current
source can be exactly as specified by the model even in extreme events. On
the other hand, the PSCAD model contains a lot of components that could
cause oscillations or instability especially in extreme events. Hence, it is
very hard to get a matching output from both models during UV events.
But it can be seen that the outputs are close with a slight delay in the

65
PSCAD output. The voltage in PSCAD is slower to return to 1.0 pu after
fault clearance because the PSCAD model is an EMT based software. The
3-phases are cleared separately unlike PSS®E, which is instantaneous and
based on RMS values.
PSSE STATCOM Model and PSCAD Model UV Test
1 VBUS _PSCAD_Model
Voltage (pu)

VBUS _PSSE_Model
VREF
0.8

0.6

0.28 0.3 0.32 0.34 0.36 0.38 0.4 0.42 0.44 0.46 0.48
(a)

2 I VSC _PSCAD_Model
Current (pu)

I VSC _PSSE_Model
1.5
1
0.5
0
0.28 0.3 0.32 0.34 0.36 0.38 0.4 0.42 0.44 0.46 0.48
(b)
150
QVSC _PSCAD_Model
QVSC _PSSE_Model
Q (MVAR)

100

50

0
0.28 0.3 0.32 0.34 0.36 0.38 0.4 0.42 0.44 0.46 0.48
(c)
Time [s]

Figure 5.18: Undervoltage Strategy test for PSS®E and PSCAD models

5.2 Hybrid-STATCOM Model Verification

The Hybrid-STATCOM model developed in chapter 4 is verified in the fol-
lowing sections. First the Hybrid-STATCOM functions are tested and veri-
fied in PSS®E. Then, the PSS®E model will be verified against an equivalent
model in PSCAD.

66
5.2.1 Hybrid-STATCOM Functions Test
The main model developed for STATCOM is used in the development of
Hybrid-STATCOM. In this section, the modified functions only will be veri-
fied. The test system used in Hybrid-STATCOM model verification is shown
in figure 5.19. A network Thevenin equivalent is used to represent the grid.

Figure 5.19: Test System used for Hybrid-STATCOM model verification

MSS are connected directly to PCC to test the MSC/MSR switching func-
tion. The VSC is connected to the grid through a step-down transformer in
parallel with TSC and TSR branches. The following functions were tested
in the Hybrid-STATCOM model:

5.2.1.1 Thyristor Switched Capacitor (TSC):

TSC switching test is done by raising Vref . The signals to be monitored
are VSC and TSC outputs, and the voltage at PCC. As shown in figure
5.20.(a), the voltage at the PCC follows the change in Vref . As soon as
the current reaches the switching in threshold (1.5 pu), TSC is turned on.
At the switching in instance the VSC will counteract TSC current by con-
suming the same amount of current injected by the TSC. A small notch in
PCC voltage is visible at the switching instance, which is caused by a small
difference between TSC output current and VSC consumed current. The
same switching method is applied when Vref is changed back to 1 pu. The
current reaches the switching out threshold (-0.8 pu), and TSC is turned

67
 TSC Switching Test
1.1 VBUS [PU]
VREF [PU]
Voltage (pu)

1.05

0 0.1 0.2 0.3 0.4 0.5

(a)

3 I_TOT_OUT [PU]
I_VSC_OUT [PU]
Current (pu)

I_TSR_OUT [PU]
2 I_TSC_OUT [PU]

0 0.1 0.2 0.3 0.4 0.5

(b)

Q_TOT_OUT [PU]
4 Q_VSC
Q_TSR_OUT [PU]
Q (pu)

Q_TSC_OUT [PU]
2

0 0.1 0.2 0.3 0.4 0.5

Time [S]

Figure 5.20: TSC test for Hybrid-STATCOM model in PSS®E

off. At the switching out instance the VSC will inject the same amount of
current injected by the TSC before switching out to keep IT ot constant. The
STATCOM used in the test can raise the voltage at PCC to 1.05 pu only.
However, with the aid of TSC, the voltage is raised to a value close to 1.09
pu as shown in figure 5.20.(a). The VSC and TSC outputs in figures 5.20.(b)
and 5.20.(c) shows the current and reactive power output respectively.

5.2.1.2 Thyristor Switched Reactor (TSR):

TSR test is done by reducing Vref . The signals to be monitored are VSC
and TSC outputs, and the voltage at PCC. As shown in figure 5.21.(a), the
voltage at the PCC follows the change in Vref . As soon as the current reaches
the switching in threshold (-1.5 pu), TSR is turned on. At the switching
in instance, VSC will inject the same amount of current consumed by the

68
 TSR Switching Test
1 VBUS [PU]
VREF [PU]
Voltage (pu)

0.95

0.9

0 0.1 0.2 0.3 0.4 0.5

(a)

I_TOT_OUT [PU]
I_VSC_OUT [PU]
Current (pu)

0 I_TSR_OUT [PU]
I_TSC_OUT [PU]
-1

-2

0 0.1 0.2 0.3 0.4 0.5

(b)

Q_TOT_OUT [PU]
0.5
Q_VSC
Q_TSR_OUT [PU]
0
Q (pu)

Q_TSC_OUT [PU]
-0.5
-1
-1.5

0 0.1 0.2 0.3 0.4 0.5

Time [S]

Figure 5.21: TSR test for Hybrid-STATCOM model in PSS®E

TSR. A small notch in PCC voltage is visible at the switching in instance,

which is caused by a small difference between TSR consumed current and
VSC injected current. The same switching method is applied when Vref
is changed back to 1 pu. The current reaches the switching out threshold
(-0.8 pu), and TSR is turned off. At the switching out instance the VSC will
consume the same amount of current consumed by the TSR before switching
out to keep IT ot constant. The STATCOM used in the test can reduce the
voltage at PCC to 0.95 pu only. However, with the aid of TSR, the voltage is
reduced to a value close to 0.93 pu as shown in figure 5.21.(a). The VSC and
TSR outputs in figures 5.21.(b) and 5.21.(c) shows the current and reactive
power output respectively.

69
5.2.1.3 Limiters:
The Limiters are tested by raising or reducing Vref . High Vref value tests
the capacitive limiters, and low Vref tests inductive limiters. The limiters

Limiters Test
1.1
Voltage (pu)

VBUS [PU]
1.05 VREF [PU]
1
0.95

0 0.5 1 1.5 2
(a)
Current (pu)

I_TOT_OUT [PU]
2 I_VSC_OUT [PU]
I_TSR_OUT [PU]
0 I_TSC_OUT [PU]

-2
0 0.5 1 1.5 2
(b)

4 Q_TOT_OUT [PU]
Q (pu)

Q_VSC
2 Q_TSR_OUT [PU]
Q_TSC_OUT [PU]
0

0 0.5 1 1.5 2
(c)
1
Ilimits (pu)

I_VSC_MAX [PU]
I_VSC_MIN [PU]
0

-1
0 0.5 1 1.5 2
(d)
Time [S]

Figure 5.22: Limiters test for Hybrid-STATCOM model in PSS®E

are turned on at different times to clarify the behavior of each limiter. The
limiters functions are applied on the VSC output only. TSC and TSR output
are not affected by the limiters functions. However, if the VSC current was
limited to the point of TSC or TSR switching threshold it could cause them
to switch out. The signals to be monitored are VSC output, voltage at
PCC and the limits of the voltage regulator. As shown in figure 5.22.(a),
the voltage at the PCC follows the change in Vref , but the limiters function
forces the VSC output to a certain value defined by the user. The limiters
change the windup limits at the voltage regulator as shown in figure 5.22.(d).
Figures 5.22.(b) and 5.22.(c) shows the current and reactive power outputs

70
respectively. It can be seen from figures 5.22.(b) and 5.22.(c) that TSC and
TSR outputs remained constant during capacitive and inductive operations
respectively.

5.2.1.4 Overvoltage Strategy:

Overvoltage test is done by connecting a shunt capacitor to PCC bus. The
Overvoltage Strategy Test
Voltage (pu)

1 VBUS [PU]
VREF [PU]

0.5

0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7
(a)
0
Current (pu)

I_TOT_OUT [PU]
-1 I_VSC_OUT [PU]
I_TSR_OUT [PU]
I_TSC_OUT [PU]
-2

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7

(b)
0
Q_TOT_OUT [PU]
Q (pu)

Q_VSC
-1 Q_TSR_OUT [PU]
Q_TSC_OUT [PU]
-2

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7

(c)
2
Ilimits (pu)

I_TOT_MAX [PU]
I_TOT_MIN [PU]
0

-2
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7
(d)
Time [S]

Figure 5.23: Overvoltage test for Hybrid-STATCOM model in PSS®E

sudden high voltage will trigger the OV strategy. The signals to be mon-
itored are VSC output, voltage at PCC and the limits of the voltage reg-
ulator. As shown in figure 5.23.(a), the voltage is raised above the OV
threshold. VSC output shown in figures 5.23.(b) and 5.23.(c) become fully
inductive and TSR is switched on. The OV strategy change the windup
limits at the voltage regulator as shown in figure 5.23.(d) to control VSC
output. The OV strategy forces the VSC output to a settable value after a

71
certain time to avoid an overshoot. The output is changed to 0.0 pu (Block)
at the time 0.3 Sec. If the voltage remained high for a predefined time after
the VSC output change, OV strategy trips the STATCOM to protect the
equipment as shown in figures 5.23.(b), 5.23.(c) and figures 5.23.(d). TSR
remained on until VSC is tripped.

5.2.1.5 Undervoltage Strategy:

Undervoltage test is done by applying a fault at PCC bus. The sudden
Undervoltage Strategy Test
1
Voltage (pu)

VBUS [PU]
VREF [PU]

0.5

0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45

(a)
Current (pu)

I_TOT_OUT [PU]
2 I_VSC_OUT [PU]
I_TSR_OUT [PU]
1 I_TSC_OUT [PU]

0
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45
(b)
1.5
Q_TOT_OUT [PU]
1
Q (pu)

Q_VSC
Q_TSR_OUT [PU]
0.5 Q_TSC_OUT [PU]

0
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45
(c)
2
Ilimits (pu)

I_TOT_MAX [PU]
I_TOT_MIN [PU]
0

-2
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45
(d)
Time [S]

Figure 5.24: Undervoltage test for Hybrid-STATCOM model in PSS®E

change in voltage will trigger the UV strategy. The signals to be monitored

are VSC output, voltage at PCC and the limits of the voltage regulator. As
shown in figure 5.24.(a), the voltage has dropped below the UV threshold.
Hybrid-STATCOM output shown in figures 5.24.(b) and 5.24.(c) become
fully capacitive with TSC switched on. The UV strategy change the windup
limits at the voltage regulator as shown in figure 5.24.(d). STATCOM out-

72
put usually is kept at full capacitive for a longer time, but for the purpose of
testing, the output is changed to a predefined value in a fast manner. The
UV strategy change the VSC output current after a certain time to avoid an
overshoot. TSC is blocked when UV strategy starts operating. The value
chosen here is 0.3 pu as shown in figure 5.24.(d). VSC output is blocked
after a certain time to protect the equipment if the fault was not cleared in
a predefined time. Hybrid-STATCOM resumes normal operation after fault
clearance with a small delay as shown in figures 5.24.(b), 5.24.(c) and figures
5.24.(d).

5.2.2 Comparison between Hybrid-STATCOM Model and

PSCAD Model
In this section, the developed Hybrid-STATCOM model is compared to the
PSCAD model. Since most of the functions modeled in STATCOM and
Hybrid-STATCOM are equivalent, the main function to be tested against
PSCAD model is TSC/TSR switching. The power system used in this test
is different than all the previous tests. The network, transformer and STAT-
COM parameters are changed. However, the network configuration is equiv-
alent to the one shown in figure 5.1. Only TSC switching is used in the
comparison between the PSS®E and PSCAD models since TSC and TSR
switching methodologies are equivalent.

5.2.2.1 Thyristor Switched Capacitor (TSC):

TSC switching test is done by raising Vref . The signals to be monitored in
PSS®E and PSCAD simulations are the primary and secondary voltages,
IV SC and reactive power outputs of VSC and TSC. The hybrid-STATCOM
used contains a TSC+VSC. The capacity of TSC is roughly 1.5 the capacity
of VSC. The secondary currents are not shown since they should be identi-
cal to the primary side currents in pu as there is no path for the secondary
currents to go through except the transformer. As shown in figure 5.25.(a)
and (b), the primary and secondary voltages follow the change in Vref re-
spectively. The secondary side voltage is different in PSS®E and PSCAD
since TSC switching is done differently. PSCAD switches TSC in 3 stages
with some delays while PSS®E does it in one large step. As such VSC will
counter only parts of TSC in 3 stages, while in PSS®E, VSC will counter one
large Mvar step. Since the reactive power provided by TSC is proportional
2 , TSC will provide more reactive power in PSS®E initially because
to VSec
it is switched in one large step. As a result, VSec is higher in PSS®E than
PSCAD. The secondary side voltage limiter is acting in PSS®E to bring the
voltage down to the PSCAD level. IV SC is plotted in figure 5.25.(c). As
soon as the current reaches the switching threshold, TSC is turned on. At
the switching instance the VSC will counteract TSC current by consuming

73
 PSSE and PSCAD Hybrid-STATCOM Models TSC Switching Comparision
1.06 PSSE: VPri [PU]
Voltage Pri (pu)

PSCAD: VPri [PU]

1.04 V REF [PU]

1.02

0.98
2.3 2.35 2.4 2.45 2.5 2.55 2.6
(a)

1.2 PSSE: VSec [PU]

Voltage Sec (pu)

PSCAD: VSec [PU]

1.15 V REF [PU]

1.1

1.05

1
2.3 2.35 2.4 2.45 2.5 2.55 2.6
(b)

1 PSSE: IVSC [PU on STAT base]

PSCAD: IVSC [PU on STAT base]
Current (pu)

0.5

-0.5

-1
2.3 2.35 2.4 2.45 2.5 2.55 2.6
(c)

PSSE: QVSC [PU]

4
PSSE: QTSC [PU]
PSCAD: QVSC [PU]
2
Q (pu)

PSCAD: QTSC [PU]

-2

2.3 2.35 2.4 2.45 2.5 2.55 2.6

(d)
Time [s]

Figure 5.25: TSC switching test for PSS®E and PSCAD models

74
the same amount of current injected by the TSC. This behavior is clear in
PSS®E output more than PSCAD. The reason for this difference in IV SC
is explained in section 6.3. A small notch in PCC voltage is visible at the
switching instance, which is caused by a small difference between TSC out-
put current and VSC consumed current. The same switching method is
applied when Vref is changed back to 1 pu. The reactive power outputs of
VSC and TSC are plotted in figure 5.25.(d).

75
Chapter 6

Discussion

6.1 Performance of the Hybrid-STATCOM Model

The main issue solved in this project is TSC/TSR switching. Section 1.2
demonstrates the problem of using MSC with STATCOM as an equiva-
lent model to Hybrid-STATCOM. The missing feed-forward loop causes a
TSC and MSC Switching Comparision
1.08 STATCOM+MSC: VBUS [PU]
1.06
Voltage (pu)

HYBRID STATCOM: V BUS [PU]

1.04 VREF [PU]

1.02
1
0.98
0.96
0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6
(a)

STATCOM+MSC: I MSC [PU]

1
Current (pu)

STATCOM+MSC: I VSC [PU]

HYBRID STATCOM: IVSC [PU]
0.5
HYBRID STATCOM: ITSC [PU]

-0.5

0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6
(b)

1.5 STATCOM+MSC: QMSC [PU]

STATCOM+MSC: QVSC
1 HYBRID STATCOM: Q VSC
Q (pu)

0.5 HYBRID STATCOM: Q TSC [PU]

0
-0.5

0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6
(c)
Time [s]

Figure 6.1: Comparison between Hybrid-STATCOM and STATCOM+MSC

with a step in Vref

76
voltage overshoot which doesn’t actually exist in Hybrid-STATCOM solu-
tions as indicated in chapter 5. Figures 6.1 and 6.2 shows the difference in
performance between Hybrid-STATCOM switching and STATCOM+MSC
switching. As mentioned in section 1.2, STATCOM is used with MSC to
mimic the behavior of hybrid-STATCOM. The comparison is done using
an MSC switched in with 2ms delay compared to the developed Hybrid-
STATCOM model’s switching. The signals indicated by STATCOM are the
output of the STATCOM + MSC. Where as the signals indicated by Hy-
brid are the output of the Hybrid-STATCOM model. As the figures show,
TSC and MSC Switching (Total I and Q)
1.08 STATCOM+MSC: VBUS [PU]
1.06
Voltage (pu)

HYBRID STATCOM: V BUS [PU]

1.04 VREF [PU]

1.02
1
0.98
0.96
0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6
(a)

STATCOM+MSC: I TOT [PU]

2
Current (pu)

HYBRID STATCOM: ITOT [PU]

0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6
(b)

3 STATCOM+MSC: QTOT [PU]

HYBRID STATCOM: Q TOT [PU]
2
Q (pu)

0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6
(c)
Time [s]

Figure 6.2: Comparison between Hybrid-STATCOM and STATCOM+MSC

with a step in Vref (Total currents and Q)

TSC switching would not cause a voltage overshoot at PCC as in the case
of MSC switching. VSC output in Hybrid-STATCOM adjust to the TSC
switching-in before it occurs. The injected current and reactive power by
MSC is not shown in the figures. But the switching time is clear from the
voltage overshoot at 0.12 sec. All the other functions in both models are
important to perform a complete network study. The performance of these
functions are shown in chapter 5.

77
6.2 Hybrid-STATCOM Switching issues
TSC and TSR switching depends on the parameters provided by the user in
the Hybrid-STATCOM model. There are some requirements for TSC/TSR
switching values and capacities with respect to the capacity of VSC. The
following two issues must be taken under considerations when using the
hybrid-STATCOM model.

6.2.1 TSC/TSR capacities with respect to VSC capacity

In order for the hybrid-STATCOM to function properly, VSC capacity must
be more than 50% of the capacity of TSC and TSR. The VSC must be able

Figure 6.3: The importance of chosen the proper TSC and VSC capacities
for correct switching behavior

to compensate for TSC/TSR switching completely. Figure 6.3 shows the

capacity issue. The case is shown for TSC and VSC only, but the same
concept applies for TSR. VSC must be at least half the capacity of the TSC
in order to counter act the switching of TSC. The total output current of the
hybrid-STATCOM must remain constant before and after the switching. In
the transition state, TSC will be at full capacitive current and VSC will be
close to its maximum inductive current. The total output current will remain
constant only if IVmax
SCcap - IV SCind = IT SC (in the case where VSC is roughly
max max

50% the capacity of TSC). Since the operational region of STATCOM is

symmetrical, VSC must be at least half the capacity of TSC.

78
6.2.2 TSC/TSR switching parameters
When both TSC and TSR branches exist in a hybrid-STATCOM, the ca-
pacity of VSC must be larger than 50% of TSC and TSR to allow for correct
switching and to avoid hunting, which is a constant switching of TSC and
TSR. Figure 6.4 explains the concept. Four parameters are important for

Figure 6.4: The importance of chosen the correct switching parameters for
TSC and TSR

TSC and TSR switching ITinSC , ITout

SC , IT SR and IT SR . IT SR and IT SC must
in out out in

not overlap, the same case is important for IT SR and IT SC . Also, the fol-
in out

lowing two equation must be valid for a proper switching:

ITinSC ≠ ITout max

SC > IT SC

ITinSR ≠ ITout max

SR > IT SR

If these two equation were not satisfied, Hybrid STATCOM might get into
hunting state, which is a state where the TSC or TSR will frequently switch
in and out because IV SC is alternating between the ON and OFF thresholds
of TSC, TSR or both. Therefore, choosing the correct switching parameters
are crucial.

6.2.3 Operating in the region between switching on/off

This is a special issue, it occurs when TSC or TSR are switched on and
IV SC reaches the required voltage by Vref without crossing the switching
off threshold. Figure 6.5 shows a case where this issue occurs. The TSC is
switched on but never switched off. VSC is operating in the inductive mode
and compensating for the voltage increase caused by TSC. The voltage at
PCC reached Vref , and VSC will not consume more reactive power. Conse-
quently, TSC will continue operating since IV SC didn’t reach the switch off

79
 Middle operational point case
1.15 VBUS [PU]
VREF [PU]
Voltage (pu)

1.1

1.05

1
0.15 0.2 0.25 0.3 0.35
(a)
4
I_TOT [PU]
I_VSC [PU]
Current (pu)

I_TSC [PU]
2

0.15 0.2 0.25 0.3 0.35

(b)

6 Q_TOT [PU]
Q_VSC
Q_TSC [PU]
4
Q (pu)

0.15 0.2 0.25 0.3 0.35

(c)
Time [s]

Figure 6.5: Hybrid-STATCOM operating in the middle operational region

between TSC switch on/off

threshold. Hybrid-STATCOM is operating in the region between the switch

on and off thresholds. The main problems are the efficiency of the device
and power losses caused by operating in that region. This case can happen
if VSC capacity is larger than TSC/TSR, or the switching-off threshold is
large. A solution to this problem could be to add a function that checks
if hybrid-STATCOM is operating in that region and manage to move the
operational point to a more efficient region by switching out the TSC and
adjust the output of VSC. However, This problem can be avoided if Hybrid-
STATCOM capacity and parameters were designed properly, and by using
hysteresis.

80
6.3 PSS®E and PSCAD simulation differences
As mentioned earlier, PSCAD is used for Electromagnetic Transient (EMT)
studies, which uses 3-phase, where as PSS®E is used for RMS based network
studies. Also, PSCAD models and controls are complex and contains all
the actual components used in the real system. PSS®E uses a simplified
version (model or a representation) of the whole system without modeling
all the components of each device. Therefore, in dynamic simulations, there
must be a slight difference in the outputs of these softwares, especially in
transient states. The difference in output can be seen in Figure 6.6 when
TSC is switched on or off. PSCAD switch-on the thyristor valves in TSC

Figure 6.6: TSC valves pulses with respect to PSS®E and PSCAD currents

in a phase by phase sequence as shown in Figure 6.6. The figure shows the
pulses sent to each valve in TSC. There are two thyristor stacks in each
phase, for positive and negative directions. The total number of pulses are
six as shown in the figure. The pulses are sent periodically to the values
until TSC is switched off. When the output of TSC (PSCAD) is plotted in
RMS values, it can be seen that reactive power injection is done in 3-steps.
However, in PSS®E, when TSC is switched on, the reactive power is injected
in one step.

81
6.4 Dynamic Stability with Hybrid-STATCOM
A brief study on the dynamic stability impact of Hybrid-STATCOM is per-
formed. A Single Machine Infinite Bus (SMIB) is used to conduct this study.
The system used is shown in figure 6.7. Hybrid-STATCOM is connected to

Figure 6.7: Single Machine Infinite Bus (SMIB) used for dynamic stability
study

the remote bus through a zero impedance line, and it controls the voltage at
that bus. The total output current of Hybrid-STATCOM IT ot is measured
through the zero impedance line. The lines connected to the remote bus are
assumed lossless with R = 0 pu and L = 0.1 pu. The load is initially at 0
MVA. After 1 sec, the load changes to 300 MVA, which creates oscillations
in the system. The frequency of oscillations is 0.54 Hz, which is an inter-area
mode of oscillations. Three simulations were performed on the system:
1. Hybrid-STATCOM:
The full Hybrid-STATCOM is connected to the remote bus. The ca-
pacity of VSC is +/- 100 MVA and the susceptance of TSC is 150
Mvar. TSR is not used in the simulation but it is connected with a
susceptance of -150 Mvar. POD function is not used in this simulation.

2. STATCOM only:
Only STATCOM is connected to the remote bus. The capacity of VSC
is +/- 100 MVA. TSC and TSR were disabled in this simulation. POD
function is not used in this simulation.

3. No FACTS:

82
 No FACTS device is connected to the remote bus. Hybrid-STATCOM
was disabled in this simulation.
The results of the three simulations are shown in figure 6.8. The change in
the remote bus voltage with respect to the nominal voltage (1.0 pu) is shown
in figure 6.8a and the total output current IT ot is shown in figure 6.8b. The
Dynamic Stability
0
Voltage (pu)

-0.1

-0.2

-0.3 Hybrid-STATCOM : Vbus

STATCOM : Vbus
NO FACTS : Vbus
-0.4
0 5 10 15 20 25
(a)

2
Hybrid-STATCOM : ITOT
STATCOM : I
1.5 TOT
NO FACTS : ITOT
Current (pu)

0.5

0
0 5 10 15 20 25
(b)
Time [s]

Figure 6.8: Comparison between the dynamic stability of Hybrid-

STATCOM, STATCOM only and No FACTS

No FACTS simulation is poorly damped and cannot bring the voltage back
to 1 pu. The STATCOM only simulation shows pretty good damping. It
can compensate for the extra load connected to the system and bring the
voltage back to 1 pu. However, it is limited by the capacity of VSC. The
Hybrid-STATCOM simulation damps the oscillations very fast because of
the additional compensation current injected by the TSC. The total current
injected by Hybrid-STATCOM is more than twice of the current injected
by VSC alone. IT ot in Hybrid-STATCOM simulation is smooth although

83
the TSC was being switched in and out constantly. VSC was counteracting
TSC current in all the switching moments as shown in figure 6.9b. VSC kept
Dynamic Stability

0.01 Hybrid-STATCOM : Vbus

Voltage (pu)

-0.01

-0.02

-0.03

-0.04
0 5 10 15 20 25
(a)

Hybrid-STATCOM : ITOT
2.5
Hybrid-STATCOM : I
TSC
2 Hybrid-STATCOM : IVSC
Current (pu)

1.5
1
0.5
0
-0.5
0 5 10 15 20 25
(b)
Time [s]

Figure 6.9: Dynamic stability of Hybrid-STATCOM

reaching the switching in (0.8 pu) and out (-0.7 pu) thresholds of TSC until
20 sec. After that, VSC was capable of regulating the voltage without the
help of TSC. TSR was not used because VSC didn’t reach to the switching
in threshold of TSR, which was at -0.8 pu. The notches at the change in
the remote bus voltage shown in figure 6.9a is due to the switching of TSC.
It can be seen that Hybrid-STATCOM can improve the dynamic stability
of the system with its high compensation current.

84
Chapter 7

Closure

7.1 Summary
A STATCOM and a Hybrid-STATCOM models were developed for dynamic
simulations in PSS®E. A control block diagram was created to represent the
functionality of STATCOM first. Then the block diagram was interpreted
into FORTRAN code and used as a user defined model in PSS®E for dy-
namic simulations. Most of the developed functions were tested in PSS®E
and compared to PSCAD and WECC models. The Hybrid-STATCOM
model is a modification of the STATCOM one. TSC and TSR branches were
added to the model and all the functions were modified accordingly. The
Hybrid-STATCOM model was tested fully in PSS®E, and the TSC/TSR
switching function was compared to the PSCAD model. The developed
STATCOM model showed a perfect step response when compared to WECC
model. The comparison with the PSCAD STATCOM model was done us-
ing three functions, Regulator, Limiters and UV strategy. In all tests the
primary voltage showed a good match between PSS®E and PSCAD models.
There were small differences in Current and reactive power outputs because
of inherent differences between the two models. The developed Hybrid-
STATCOM model was compared as well to the PSCAD model. TSC switch-
ing function was compared between the two models. The primary voltage
was equivalent in both models with a small error. The difference in TSC
switching methodology between PSS®E and PSCAD models caused the cur-
rent and reactive power outputs to be slightly different. A brief study on the
dynamic stability of the system with Hybrid-STATCOM was conducted. It
showed that Hybrid-STATCOM with the additional compensation of TSC
and TSR can enhance the dynamic stability of the system. The developed
models are property of ABB and will be used for planning studies in the
future.

85
7.2 Recommendations
The models were developed to include most of the functions required for
studies in PSS®E. Although the models were developed to withstand most
events, some special cases could cause the models to behave inaccurately.
The models are ready to be used for PSS®E dynamic simulations. Using
inaccurate parameters could cause PSS®E to crash. Users are advised to
check the parameters before running the dynamic simulations.

7.2.1 Future work:

1. Some functions such as UV strategy and gain supervision can be op-
timized to accurately match the output of the PSCAD model.

2. The models should be tested in other networks to verify its function-

ality. Code bugs might appear during special cases tests.

3. A subroutine that checks the validity of user input data could be added
to avoid corrupted data or unrealistic parameters.

4. The models could be added to PSS®E models library.

5. For hybrid-STATCOM, applying a step-wise switch-in of TSC to mimic

that of each phase has some inherent delay from each other.

86
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