Power Electronics Devices and Circuits Second Edition PDF
Power Electronics Devices and Circuits Second Edition PDF
Power
Electronics
Devices and Circuits
V. Jagannathan
Power Electronics
Devices and Circuits
SECOND EDITION
V. Jagannathan
Professor and Head
Department of Electrical and Electronics Engineering
Coimbatore Institute of Technology
Coimbatore
New Delhi-110001
2011
POWER ELECTRONICS: Devices and Circuits, Second Edition
V. Jagannathan
© 2011 by PHI Learning Private Limited, New Delhi. All rights reserved. No part of this book may
be reproduced in any form, by mimeograph or any other means, without permission in writing from
the publisher.
ISBN-978-81-203-4196-8
The export rights of this book are vested solely with the publisher.
Published by Asoke K. Ghosh, PHI Learning Private Limited, M-97, Connaught Circus,
New Delhi-110001 and Printed by Baba Barkha Nath Printers, Bahadurgarh, Haryana-124507.
Contents
Preface xi
1. Introduction 1–19
1.1 What is Power Electronics? 1
1.2 History 1
1.3 Power Electronics Applications 2
1.4 Power Semiconductor Devices and Their Classifications 3
1.5 Power Semiconductor Devices: Characteristics and Ratings 5
1.6 Ideal and Real Switches: Comparison of Characteristics 7
1.6.1 Ideal Switch Characteristics 7
1.6.2 Desirable Characteristics of a Real Switch 7
1.6.3 Power Loss Characteristics of an Ideal Switch 7
1.6.4 Power Loss Characteristics in a Real Switch 8
1.7 Power Electronic Systems 10
1.8 Types of Power Electronic Circuits/Converters 11
1.9 Merits and Demerits of Power Electronic Converters 12
1.10 Recent Developments 12
Summary 13
Solved Examples 14
Review Questions 18
Problems 18
2.3 Thyristors 24
2.3.1 Structure, Symbol, and V–I Characteristics 24
2.3.2 Transistor Analogy 26
2.3.3 Thyristor Turn-on Methods 27
2.3.4 Thyristor Turn-off Methods 30
2.4 Switching Characteristics of Thyristors 30
2.4.1 Switching Characteristics during Turn-on 30
2.4.2 Switching Characteristics during Turn-off 32
2.5 Thyristor Gate Characteristics 33
2.6 Thyristor Commutation Methods 35
2.6.1 Natural Commutation 35
2.6.2 Forced Commutation 35
2.7 Thyristor Protection 39
2.7.1 Over Voltage Protection 40
2.7.2 Suppression of Overvoltages 40
2.7.3 Overcurrent Protection 41
2.7.4 Snubber Circuits 44
2.8 Thyristor Ratings 44
2.8.1 Anode Voltage Ratings 45
2.8.2 Current Ratings 46
2.8.3 Surge Current Rating 49
2.8.4 I2t Rating 49
2.8.5 di/dt Rating 50
2.9 Series and Parallel Operation of Thyristors 50
2.9.1 Series Operation 51
2.9.2 Parallel Operation 53
2.10 Triggering of Thyristors 55
2.10.1 Triggering of Thyristors in Series 55
2.10.2 Triggering of Parallel Connected SCRs 57
2.11 Heat Sinks, Heating, Cooling and Mounting of Thyristors 57
2.11.1 Thermal Resistance 58
2.11.2 Thyristor Heat Sinks 59
2.12 Thyristor Trigger Circuits 59
2.12.1 RC Firing Circuits 59
2.12.2 Synchronized UJT Triggering (or Ramp Triggering) 61
2.12.3 Ramp and Pedestal Triggering 62
2.12.4 Pulse Transformers 63
2.13 Other Thyristor Devices 64
2.13.1 TRIAC 64
2.13.2 DIAC 65
2.13.3 LASCR 66
2.13.4 Programmable Unijunction Transistor (PUT) 67
2.13.5 Silicon Unilateral Switch (SUS) 67
2.13.6 Reverse Conducting Thyristor (RCT) 67
2.13.7 GTO (Gate-Turn-Off) Thyristor 68
Contents v
3. AC to DC Converters 109–166
3.1 Preliminaries 109
3.2 The Principle of Phase Control 110
3.3 Converter Classifications 113
3.3.1 Single-phase Half Wave Thyristor Rectifier with RL Load 114
3.3.2 Single-phase Half Wave Thyristor Rectifier with RL Load and
Free-wheeling Diode 116
3.3.3 Single-phase Half Wave Thyristor Rectifier with RLE Load 117
3.4 Single-phase Full Wave Thyristor Converters 118
3.4.1 Single-phase Full Wave Mid-point Thyristor Converter 118
3.5 Single-phase Full Wave Bridge Converters 120
3.5.1 Single-phase Bridge Rectifier Connected to Resistance Load 120
3.5.2 Series RL Load 121
3.5.3 RL Load with Free-wheeling Diode 122
3.6 Full Wave Bridge Rectifier Feeding RLE Load 122
3.7 Single-phase Semi-converter 124
3.8 Calculation of Active and Reactive Power Inputs 125
3.9 Effect of Load Inductance 127
3.10 Three-phase Thyristor Converter Circuits 127
3.10.1 Three-phase Half Wave Converter 128
vi Contents
4. AC to AC Converters 167–196
4.1 Preliminaries 167
4.2 AC Voltage Controllers 167
4.2.1 Types of AC Voltage Controllers 168
4.3 Methods of Voltage Control 170
4.3.1 Single-phase AC Voltage Controller Supplying R Loads
(Phase Control) 170
4.3.2 Single-phase AC Voltage Controller Supplying R Loads
(Integral Cycle Control) 172
4.4 Single-phase Voltage Controller Supplying RL Loads 173
4.5 Three-phase AC Voltage Controller 176
4.6 Single-phase Transformer Tap Changer 178
4.7 Cycloconverters 180
4.7.1 Principle of Operation 181
4.7.2 Single-phase to Single-phase Cycloconverter Feeding RL Load 183
4.7.3 Three-phase to Single-phase Cycloconverters 184
4.7.4 Three-phase to Three-phase Cycloconverter 187
4.8 Output Voltage Equation 188
4.9 Effect of Source Inductance 189
Solved Examples 190
Review Questions 194
Problems 195
6. Inverters 249–298
6.1 Preliminaries 249
6.2 Classification 249
6.3 Parallel Inverters 250
6.3.1 Basic Parallel Inverter 250
6.3.2 Modified Parallel Inverter 252
6.4 Series Inverters 253
6.4.1 Basic Series Inverter 253
6.4.2 Modifications of Series Inverter 255
6.5 Single-phase Bridge Voltage Source Inverter 256
6.5.1 Single-phase Half Bridge Inverter 256
6.5.2 Single-phase Full Bridge Inverter 259
6.5.3 Steady State Response of Single-phase Inverters 260
viii Contents
References 365
Index 367–371
Preface
Rapid developments in power electronics during the last few decades have revolutionized the art
of power modulation and control. Today, power semiconductor devices and converters using these
devices can handle high voltages and currents at high speeds. Their applications in different areas
are ever increasing aided by the use of sophisticated digital systems like microcontrollers and
computers. It is felt that this ever-growing subject, power electronics, must be learnt by students with
clarity and ease. It is therefore written in a simple straightforward style emphasizing the core
concepts underlying various power electronics circuits without delving deep into complex,
circuitous and mathematical elaborations. This book is expected to serve as a student-friendly text
to the undergraduate students of electrical and electronics engineering. It can also be used as a
textbook for one-semester course in power electronics.
The Book
The text begins with an introductory chapter on the area of power electronics with discussions
ranging around the characteristics and ratings of power semiconductor devices. Further, the chapter
gives a bird’s eye view of various types of converter circuits along with their major applications.
Chapter 2 details the underlying principle of operation of practical power semiconductor devices
such as power diodes, thyristors and devices like DIAC, TRIAC and LASCR belonging to thyristor
family. An elaborate treatment of gate-commutated devices like GTOpower BJT, power MOSFET,
and IGBT is also presented in the chapter 2. Chapters 3, 4 and 5 unlock the operating principles
of various types of converters, — ac to dc converters, ac to ac converters and dc to dc converters
(choppers and SMPS). These chapters integrate within themselves different methods of phase,
frequency and voltage control for achieving high level of performance. Analysis of each class of
converter circuit is undertaken leading to the evaluation of their performance parameters.
Chapter 6 provides an in-depth coverage of all inverter types such as parallel, series,
single phase bridge type, three phase bridge type and current source inverters, laying emphasis on
voltage and waveform control. Power controllers and their applications form the subject matter of
Chapter 7. This chapter outlines the dc and ac drives, HVDC transmission and uninterrupted power
supply (UPS). The last chapter relates the conventional power semiconductor devices to most
advanced integrated circuit fabrication technology. The microprocessor-based control and
xi
xii Preface
protection circuits have enhanced the quality of power modulation and control. This chapter not
only gives an overview of various microcontroller chips but also considers their applications in
triggering and fault diagnosis.
Each chapter is accompanied by adequate number of solved problems, review questions and
problems involving both short and lengthy answers and solutions. The solved problems are so
chosen that going through them reinforces the understanding of the basic concepts.
Acknowledgements
This book would not have been possible but for the timely assistance received from many quarters.
The author likes to express his heartfelt thanks to the correspondent and to the principal of
Coimbatore Institute of Technology, Coimbatore, for their support and encouragement throughout
the preparation of the book.
The author expresses his gratitude to his colleagues, Prof. R. Shanmuga Sundaram and
Prof. S. Uma Maheswari for their invaluable help during the writing of the book.
The author wishes to thank his wife and children for the understanding, encouragement and
patience exhibited by them during the preparation of the book.
The author is extremely grateful to PHI Learning for coming forward to undertake publication
of this book and his special thanks are due to its editorial and production departments.
The author would appreciate feedbacks from the readers of this book towards further
improvements of its content and presentation.
V. Jagannathan
1
Introduction
1.2 HISTORY
The history of power electronics dates back to the year 1900 when the mercury arc rectifiers were
introduced. Then the metal tank rectifier, grid-controlled vacuum-tube rectifier, ignitron, phanotron,
and thyratron were introduced one after another. These were the devices employed for power control
until the 1950s.
The first revolution in electronics occurred in the year 1948 when the silicon transistor was
invented at Bell Telephone Laboratories by Bardeen, Brattain, and Schockley. Most of present day’s
advancements in electronic technology are traceable to this particular invention.
1
2 Power Electronics: Devices and Circuits
The second electronics revolution is said to have occurred in the year 1958 when the General
Electric Company, successfully developed a first commercial four-layer device called thyristor. The
advent of thyristor heralded the arrival of power semiconductor era. Since then, many different types
of power semiconductor devices and conversion techniques have been introduced. The
microelectronics revolution that followed enabled the processing of large chunk of information at
incredible speeds. The power electronics revolution had gained enough momentum by 1980s and
1990s which is entirely due to this phenomenon. Now it is possible to convert and control large
amount of power with relative ease at high efficiencies.
Reverse conducting
Asymmetrical SCR
Power MOSFET
voltage blocking
Thyristor (SCR)
transistor (IGBT)
Power diode
capability
thyristor
(MCT)
(GTO)
Triac
Capability to
block forward
voltage
Significant
capability to
block reverse
voltage
Reverse
conduction
Type of
forward C
on
switching
control L
Is control
available
for
C
switching
OFF
forward
current?
L
No control
Is control
available C
for reverse
conduction?
Not applicable
Not applicable
Not applicable
Not applicable
Not applicable
Not applicable
Not applicable
Is control
available
for C
switching
OFF
reverse
current? L
C – Continuous signal.
L – Latching signal.
Introduction 5
A diode is a two-layer p-n junction semiconductor device with two terminals, namely anode and
cathode. If a forward voltage that makes the anode potential greater than that of the cathode, is
applied, the device starts conducting and behaves essentially as a closed switch. For a reverse
voltage, the diode does not conduct but behaves as an open switch blocking the reverse voltage.
Power diodes are of three types: general purpose, high speed (or fast recovery), and Schottky types.
General-purpose diodes are available up to 3000 V, 3500 A. They are useful for low frequency
applications since their reverse recovery times are comparatively large around 25 ms.
The fast-recovery type diodes with relatively small reverse recovery times (0.1–5 ms) are useful
in high frequency circuits. The rating of fast recovery diodes can go up to 3000 V, 1000 A.
Schottky diodes have low on-state voltage drop and very small recovery time, typically
nanoseconds. They are suitable for very high frequency circuits operating from low voltages. Their
ratings are limited to 100 V, 300 A and the forward voltage drop of a power diode is very low,
typically 0.3 V.
A thyristor has three terminals, namely an anode, a cathode, and a gate. Unlike the diode, which
conducts only after its anode to cathode voltage exceeds the cut-in voltage, the thyristor will conduct
only when a small current is passed through the gate terminal to the cathode. This means that the
gate controls the beginning of conduction in thyristor. But once a thyristor attains the conduction
state, the gate loses its control since the thyristor continues to conduct even after the removal of gate
supply. When a thyristor is in a conduction mode, the forward voltage drop is very small, typically
0.5–2 V. A conducting thyristor can be turned off by making the potential of the anode equal to or
less than the cathode potential. The line-commutated thyristors are turned off due to the sinusoidal
nature of the input voltage and forced-commutated thyristors are turned off by an extra circuit
employed called commutation circuitry. Natural or line-commutated thyristors are available with
ratings up to 6000 V, 3500 A.
Light Activated SCRs (LASCR) are suitable for high voltage power systems especially HVDC.
They are available up to 6000 V, 1500 A with a switching speed of 200–400 ms.
GTOs are gate-turned-off thyristors. They are turned on by applying a short positive pulse to the
gate as in SCRs but are turned off by the application of short negative pulse to their gates. Hence,
these do not require any separate commutation circuit. GTOs are very attractive for forced
commutation converters and are available up to 4000 V, 3000 A.
TRIACs are widely used in all types of simple heat controls, light controls, and in ac switches
mostly in low power ac applications. The characteristics of TRIACs are similar to two thyristors
connected in antiparallel and having only one gate terminal. The current flow through a TRIAC can
be controlled in either direction.
A DIAC is a gateless TRIAC designed to breakdown at a low voltage.
High-power bipolar transistors are commonly used in power converters at a frequency below
10 kHz and are effectively applied in the power ratings up to 1200 V, 400 A. A bipolar transistor
has three terminals, namely base, emitter, and collector. It is normally operated in common-emitter
configuration as a switch. As long as the base of an NPN-transistor is at a higher potential than the
emitter and the base current is sufficiently large to drive the transistor to the saturation region, the
transistor stays on, provided the collector-emitter junction is properly biased. The forward
conduction drop lies in the range 0.5–1.5 V. If the base drive voltage is withdrawn, the transistor
switches into nonconduction (or off) state.
6 Power Electronics: Devices and Circuits
Power MOSFETs are used in high-speed power converters and are available at a relatively low
power rating in the range of 1000 V, 50 A at a frequency range of several tens of kilohertz. Power
MOSFETs are voltage controlled devices unlike transistors that are current controlled. Similar to
transistors that need continuous supply of base current to keep it in the ON state, MOSFETs also
require the continuous application of gate source voltage of appropriate magnitude in order to remain
in the ON state.
IGBTs are voltage-controlled power transistors. They are inherently faster than BJTs but not as
fast as MOSFETs. They are suitable for high voltage and high current applications up to 1200 V,
400 A. They are acceptable to frequencies up to 20 kHz. Characteristics and symbols of important
power devices are shown in Table 1.3.
A ID K ID
VAK
Diode 0
VAK
G IA Gate triggered
IA
Thyristor VAK
A K 0
IA Gate triggered
IA B
TRIAC VAK
A 0
G
Gate triggered
IA Gate triggered
LASCR
VAB
VAK
A IA G K 0
across the switch is zero while “ON” and the current through the device is zero during “OFF” state.
Further since the transitions from ON to OFF and OFF to ON are instantaneous the switching losses
are also zero. Device voltage and current waveforms are shown in Fig. 1.1(a) for the ideal switch.
Power loss in the switch is zero during ON state, OFF state and also during the transition from one
state to the other. This is depicted in power loss waveform shown in Fig. 1.1(b).
isw vsw
vsw
isw
Psw
isw Psw = 0
Switch Switch t t
ON OFF
(a) (b)
Fig. 1.1 Characteristics of an ideal switch: (a) voltage and current waveforms and (b) power loss.
SW
vsw vsw
Psw Psw
isw isw
Psw
V ± R v v
vsw
t1 t2 t3 t4 t
(a) (b)
Fig. 1.2 Power loss in the real switch: (a) circuit and (b) voltage and current waveforms and power
loss curve.
The switch of Fig. 1.2(a) is turned ON at t = t1. Prior to t = t1 the switch is in the forward blocking
state. During the turn-on operation that takes place from t1 to t2, the voltage across the switch reduces
from the initial value V to zero. During the same period, the current through the switch rises from
Introduction 9
zero to the static ON state value, I. The current waveform represents the instantaneous value of the
switch current during the turn-on transition. During this period, there is power dissipation inside the
switch. The instantaneous value of this power loss is given by the curve shown in Fig 1.2(b) as the
product of the instantaneous values of voltage and current. Depending on the nature of the current
and voltage waveforms, during the transition, the peak power can reach relatively large magnitudes.
The energy dissipated in this turn-on process can be assumed to be equal to the area under power
loss/power dissipation curve.
Turn-off switching operation takes place from t3 to t4 as shown in Fig 1.2(b). During this
transition, switch voltage rises from zero to V, (the supply voltage) as the current falls from I to zero.
Transition periods, Ton and Toff are not equal in power semiconductor switches though Toff is
generally larger.
The total energy, Jsw dissipated in a switching cycle is given by the sum of the areas under
power loss wave form during turn-on and turn-off. Therefore,
Jsw = Jon + Joff (1.1)
where Jon and Joff represent switching energy loss during turn-on and turn-off, respectively.
The average power loss in watts is given by
Psw = (Jon + Joff)f = Jswf (1.2)
‘f ’, is the switching frequency in Hz.
If the linear variation is assumed for voltage and current waveforms during turn-on and turn-
off transitions as shown in Fig. 1.4, an expression for Jon can be obtained as:
1
J on = VIton (1.3)
6
where V = initial voltage of the switch, I = final current in the switch and ton = turn-on period.
Similarly, during turn-off,
1
J off = VItoff (1.4)
6
The total energy loss/cycle is equal to
1
J sw = VI (ton toff ) joules.
6
The average power loss or power dissipation due to switching losses is equal to:
1
Psw = VI (ton toff ) f
6
where ‘f ’ is the switching frequency.
If the static performance of the switch is also non-ideal, i.e. ON-state resistance of the switch
is finite of the order of a few ohms, resulting in a small conduction voltage drop vf then, Jon, taking
into account the above voltage drop, vf,
1 1
J on VIton V f Iton (1.5)
6 3
A similar analysis for the turn-off period gives,
1 1
J off VItoff V f Itoff (1.6)
6 3
10 Power Electronics: Devices and Circuits
The block diagram shown in Fig. 1.3 depicts a typical power electronic system. Major system
components are shown in various blocks and an ac or a dc supply may be used as a main power
source.
Main power
source
Power
Command Control Digital electronic Load
unit circuit converter
Feedback
signal
The output from the power electronic converter may be variable dc, or ac voltage, or it may be
a variable voltage and variable frequency. In general, the output of a power electronic converter
circuit depends upon the requirements of the load. For example, if the load is a dc motor, the
converter output is a variable direct voltage. In case of an induction motor, the converter output is
a variable voltage and variable frequency ac.
The feedback voltage signal may correspond to the speed if it were a rotating machine and it
is then compared with the command signal. The difference of the two, when taken through the digital
circuit components, controls the instant of turn-on of semiconductor devices forming the solid-state
power converter system. In this manner, speed of the motor can be controlled, as desired, over a wide
range with the adjustment of the command signal.
Broadly speaking, power electronic converters (or circuits) can be classified into five types as:
1. Diode rectifiers: A diode rectifier circuit converts ac input voltage into a fixed dc voltage.
The input may be single-phase voltage or a three-phase voltage. Diode rectifiers find wide
use in electric traction, battery charging, electroplating, electrochemical processing, power
supplies, welding, and uninterruptible power supply (UPS) systems.
2. AC to DC converters (Phase-controlled rectifiers): These converters translate constant
ac voltage to variable dc output voltage. These rectifiers are also called line-commutated or
naturally commutated ac to dc converters since these rectifiers use line voltage or source
voltage for commutation. Phase-controlled converters use line-commutated thyristors. They
may be 1-phase or 3-phase converters depending on the number of the input supply phases.
These are used in dc drives, metallurgical and chemical industries, excitation systems for
synchronous machines and so forth.
3. DC to DC converters (DC choppers): A dc chopper converts fixed dc input voltage to
a variable dc output voltage. The chopper circuits use forced commutation. Thyristors
are used in high power DC choppers. For low power applications, thyristors are replaced by
power transistors, power MOSFETs, GTO thyristors, and the like. Choppers find a
wide application in dc drives, subway cars, trolley trucks, battery-driven vehicles, and many
more.
4. DC to AC converters (inverters): An inverter converts fixed dc voltage supply to ac
voltage supply. The converters of this type use the principle of Pulse Width Modulation
(PWM) to produce an output which may be a variable voltage and variable frequency
supply. Modern day inverters use power semiconductor devices such as power transistors,
power MOSFETs, and IGBTs. Forced-commutated inverters find wide use in induction-
motor drives, synchronous motor drives, induction heating, UPS, and so on. However, the
inverters used in HVDC transmission are dependent on the supply voltage for their
commutation. Hence, they are known as line-commutated inverters.
5. AC to AC converters: These convert fixed ac input voltage into variable ac output
voltage. There are two types of ac to ac converters.
(a) AC voltage controllers (AC voltage regulators): These converter circuits convert
fixed ac voltage directly to a variable ac voltage at the same frequency. AC voltage
12 Power Electronics: Devices and Circuits
Demerits
Power-electronic converter circuits introduce harmonics into the supply and the load systems,
adversely affecting the performance of the load and the supply. In the supply system, the harmonics
distort the voltage waveform and seriously influence the performance of other equipments connected
to the same supply line. In addition, the harmonics in the supply line can also cause interference with
communication lines. It is, therefore, necessary to insert filters at the input of a converter. Other
disadvantages of the converters include:
1. Ac to dc and ac to ac converters operate at a low input power factor under certain operating
conditions. In order to avoid a low power factor, some special measures have to be adopted.
2. Power-electronic controllers have low overload capacity. These converters must, therefore,
be rated for taking momentary overloads which increases the cost of power electronic
controllers.
3. Regeneration of power is difficult in power electronic converter systems.
The merits possessed by power electronic converters far outweigh their disadvantages. As a
consequence, semiconductor-based converters are being extensively employed in systems where
power flow is to be regulated. As already stated, conventional power controllers used in many
installations have already been replaced by semiconductor-based electronic controllers.
the new circuits. It is easier to study the circuit using simulation compared to accomplishing
the same in the laboratory on a hardware breadboard. Simulation packages such as SPICE and
SABER are popular amongst power electronic engineers and academicians for their usefulness in the
analysis, design, and education.
The demand for sophistication and growth for power electronics is expected to come from the
following areas:
1. SMPS and UPS,
2. Energy conservation,
3. Process control and factory automation (Robotics),
4. Transportation,
5. Electro-technical applications such as welding, electroplating, and induction heating, and
6. Utility related applications, for example, HVDC.
SUMMARY
The study of power electronics encompasses many fields within electrical engineering including
power systems, solid state electronics, analog and digital control and signal processing,
electromagnetic fields, and more. A combination of the knowledge of these diverse fields makes the
study of power electronics challenging as well as interesting. Advances in these fields are bound to
improve the prospects for further growth with emergence of new applications in power electronics.
Next chapter is devoted to study of power semiconductor devices beginning with power diodes.
Chapters 3, 4, 5, and 6 discuss various forms of power electronic converters and their operations.
Chapter 7 is devoted to brief discussion on popular applications areas of power electronic converters
while the last chapter describes the microcontroller based control and protection circuits.
14 Power Electronics: Devices and Circuits
SOLVED EXAMPLES
EXAMPLE 1.1 Typical switching waveforms for a real switch are given in Fig. 1.4.
(i) Show that switch-on energy loss in this case is given by
1
J on VIton
6
where
V = OFF state voltage
I = ON state current
ton = Turn-ON time.
(ii) For the same switch, obtain the expression for the switch-off energy loss as
1
J off VItoff
6
where toff = Turn-OFF time
(iii) Find the expression for average switching power loss.
(iv) Also obtain the expression for instantaneous peak power loss during switch-on and the
instant, it occurs.
Solution
(i) Assume linear variation for voltage and current during ton and toff. The OFF-state voltage
is V and the ON-state current is I. The switching frequency is f Hz. The switch is ideal
as far as its static performance is considered, i.e. the switch conduction loss is zero as its
ON-state resistance is zero. Figure 1.4 shows the voltage across the switch and the
current through it as functions of time.
ISW
I
VSW
V V
toff t
ton
It
i
ton
Introduction 15
È t Ø
v V É1
Ê ton ÙÚ
The instantaneous power will be
È t t2 Ø
p vi VI É 2 Ù
Ê ton ton Ú
The energy loss during ton is obtained by integrating p, from t = 0 to t = ton,
Therefore,
ton 1
J on
0 Ô
p dt
6
VIton J
(ii) Energy loss during turn-off:
vt
V
toff
È t Ø
i I É1
Ê ton ÙÚ
È t t2 Ø
p VI É 2 Ù
Ê toff toff Ú
toff 1
J off Ô 0
P dt
6
VItoff J .
dp È 1 2t Ø
VI É 2 Ù
dt Ê ton ton Ú
ton
?t
2
Substituting for t,
È t t2 Ø
Pmax (VI ) É 2 Ù
Ê ton ton Ú
VI
watts.
4
Pmax, the instantaneous peak power loss occurs at
t = ton/2
16 Power Electronics: Devices and Circuits
EXAMPLE 1.2 In case I = 80 A, V = 220 V, ton = 1.5 µs, and toff = 4 µs for switching waveforms
shown in Fig. 1.4, find the energy loss during switch-on and switch-off intervals. Find also the
average power loss in the switch for a switching frequency of 2 kHz.
Solution
1
J on VIton
6
220 80 1.5 10 6
= 4400 10 6 W-s
6
= 4.4 mW-s. (or) 4.4 mJ.
1
J off VItoff
6
220 80 4 10 6
11.73 mJ
6
Average power loss = (4.4 + 11.73) × 2000 × 10–3
= 32.26 W.
EXAMPLE 1.3 In case I = 100 A, V = 200 V, ton = 1.5 µs and toff = 4 µs. Find peak instantaneous
power dissipation.
Solution
Power dissipation,
VI
Pmax
4
100
200
4
5000 W.
EXAMPLE 1.4 Derive an expression for energy loss during turn-on transistion and turn-off
transistion for a switch whose V and I curves are given in Fig. 1.5. The switch is assumed to be non-
ideal both during static and dynamic conditions.
V
I
ton Vf toff
Solution
t
v V (V V f )
ton
It
i
ton
t t2
? p VI (V V f ) I 2
ton ton
ton È1 1 Ø
J on Ô 0
p dt ÉÊ 6 VIton 3 V f Iton ÙÚ
Î1 1 Þ
J Ï VI (ton toff ) V f I (ton toff )ß
Ð6 3 à
È1 1 Ø
ÉÊ 6 VI 3 V f I ÙÚ (ton toff )
EXAMPLE 1.5 Derive an expression for energy loss and power loss in the device during
conduction, given the following data:
Turn-on time = Ton
Turn-off time = Toff
The switched duty cycle = k
Frequency = f
Solution
Taking Ton = static on time, Ts + ½ (ton + toff)
Static ON-state duration of the switch is:
k
Ts = – ½ (ton + toff)
f
The energy dissipated during conduction is
Ëk Û
J Vf I Ì 1
2 (ton toff ) Ü J
Íf Ý
Ëk Û
Pcond Vf I Ì 1
2 (t on toff ) Ü f W
Íf Ý
18 Power Electronics: Devices and Circuits
REVIEW QUESTIONS
PROBLEMS
1.1 Transition times needed by a real switch are, ton = 2 µs and toff = 4 µs. The forward voltage
drop during ‘ON’ state is constant at 2 V, when the switch conducts a current of 10 A. The
OFF state voltage is 120 V. The switch has a repetitive switching frequency, f Hz. The
switching duty cycle, k = 0.6. Determine the frequency ‘f ’ at which the switching power loss
begins to rise above the static conduction losses. What is the total power dissipation in the
switch at this frequency? Assume linear variations for both voltage and current.
[Ans. 9.23 kHz, 22.9 W]
1.2 For the typical switching waveforms shown in Fig. 1.4 for a power semiconductor
switch:
(a) Find the expressions that give the peak instantaneous power loss during ton and toff
intervals, respectively.
(b) Calculate the peak values of instantaneous power loss during ton and toff given that on
state current is 50 A and off-state voltage is 200 V.
VI
[Ans. (a) during ton as well as toff (b) 2500 W]
4
1.3 The switching characteristics for a power semiconductor device is as shown in Fig. 1.6.
Derive the expressions for energy loss during turn-on and turn-off periods, and also for the
average switching loss. Sketch the variation of power loss during turn-on and turn-off
periods. For Vs = 220 V, Ia = 10 A, t1 = 1 µs, t2 = 2 µs, t3 = 1.5 µs and t4 = 3 µs, find the
average value of power switching loss in the device for a switching frequency of 1 kHz.
1 1 1
[Ans. Vs Ia(t1 + t2), VsIa(t3 + t4), VsIa f(ton + toff), 8.25 W]
2 2 2
Introduction 19
Vs . Ia
VS VS
Ia
t
t1 t2 t3 t4
ton toff
2.1 PRELIMINARIES
An overview of important power semiconductor devices and their essential characteristics has been
provided in section 1.4 of Chapter 1. Power semiconductor devices such as power diodes and power
transistors are more complex in structure and operation when compared to their low power counter-
parts, signal diodes, and signal transistors with more than the usual number of p-n layers to handle
higher voltages and currents. These devices can be broadly classified into two groups. One group is
the one that contains thyristors, the earliest and the most popular amongst them being SCR (Silicon
Controlled Rectifier). The other group contains power diodes and members of the power transistor
family. The devices in thyristor family include silicon controlled rectifier (SCR), TRIAC, DIAC,
LASCR, GTO thyristor, programmable UJT, silicon unilateral switch, asymmetrical thyristor, and
reverse conducting thyristor, and so on. The power transistor group comprises in addition to diodes,
bipolar junction transistors (BJTs), metal oxide semiconductor field effect transistors (MOSFETs),
and insulated gate bipolar transistors (IGBTs). Alternately, these devices can be classified into three
groups based on the degree of controllability as:
Diodes: Uncontrolled since ON and OFF states are controlled by the power circuits.
Thyristors: Turned ON by control signal but turned OFF by the power circuit. GTO thyristor
is an exception.
Controllable switches: Turned ON and turned OFF by control signals. BJT, MOSFET, IGBT,
MCT and the like come under this category in which GTO thyristor can also be included.
This chapter devotes itself to the study of the constructional features, characteristics, and
working of various power semiconductor devices. The ratings and protection methods of these
devices are also covered in some detail.
functions such as freewheeling of energy in inductive circuits, charge reversal in capacitors, and
trapped energy recovery in addition to the main function of rectification. Power diode is a two-layer,
two terminal, p-n junction semiconductor device. It has one p-n junction formed by alloying,
diffusing, or epitaxial growth. The two terminals of diode are called anode and cathode, refer
Fig. 2.1(a). Two important characteristics of power diodes, namely the V–I characteristics and the
reverse recovery characteristics are now described.
Forward
I voltage drop
Reverse
leakage
current Forward
Anode Cathode Anode Cathode VRRM characteristics
VS
p n
i i D Cut-in
voltage = 0.7 V
Reverse
VS VS breakdown
(a) (b) (c)
Fig. 2.1 (a) p-n junction, (b) diode equivalent circuit, (c) V–I characteristics.
if
trr
If ta tb
0 (a)
t
1I
4 RM
vf
IRM
vf
0 (b)
t
Power
loss in
diode
(c)
t
Fig. 2.2 Reverse recovery characteristics: (a) variation of forward current If, (b) forward voltage
drop vf and (c) power loss in diode.
The average value of vf If gives the total power loss in a diode. The major power loss in the diode
occurs during the period tb.
General-purpose diodes
These diodes have relatively large reverse recovery times, of the order of about 25 ms. Their current
ratings vary from 1 A to several thousand amperes and the range of voltage rating is from 50 V to
about 5 kV. Applications of power diodes of this type include battery charging, electric traction,
electroplating, welding, and UPS.
Fast-recovery diodes
The diodes with low reverse recovery time, of about 5 ms or less, are classified as fast-recovery
diodes. These are used in chopper circuits, commutation circuits, switched mode power supplies,
induction heating, and so forth. Their current ratings vary from about 1 A to several thousand
amperes and voltage ratings from 50 V to about 3 kV.
For voltage ratings below about 400 V, the epitaxy is used for diode fabrication. These diodes
have fast recovery time, as low as 50 ns. For voltage ratings above about 400 V, diffusion technique
is used in the diode fabrication. In order to reduce the reverse-recovery time, platinum or gold doping
may be carried out. But this doping increases the forward voltage drop in a diode.
Schottky diodes
This class of diodes uses metal-to-semiconductor junction for rectification purposes instead of
p-n junction. Schottky diodes are characterized by very fast reverse recovery time and low forward
voltage drop. Rectified current flow is by majority carriers only and this avoids the turn-off delay
accompanied with minority carrier recombination. Their reverse voltage ratings are limited to about
100 V and forward current ratings vary from 1–300 A. The Schottky diodes are ideal for low voltage
and high current DC power supplies.
+
Rs D2 D1
R1 D1 D1 D2
Steady- Cs Transient
+ R2 R1 +
state voltage Vs v vs
voltage Cs sharing – –
sharing R2 D2 R1 R2 L2 L1
Rs –
(a) (b)
Fig. 2.3 (a) Series operation, (b) parallel operation.
2.3 THYRISTORS
Silicon controlled rectifier (SCR) being the first amongst the thyristor family of four-layer devices
is frequently and often loosely referred as thyristor. While it shares the rectifying property of a diode,
it differs in its capability to block the forward biasing voltage until the gate receives the triggering
signal. Thus, SCR is a device with control over turn-on while its turn-off is determined by the circuit
voltages and parameters.
Anode Anode A
Threaded (Aluminium)
stud
p
J1 p
n J1
J2 n
p p J2
Gate J3 G
n
n Gate terminal J3
welded to p
region Cathode
Cathode K
Forward Forward
VVgss Reverse blocking leakage
– blocking state current
K
state
Avalanche break
down
(a) (b)
Fig. 2.5 (a) Circuit connections and (b) V–I characteristics.
The thyristor has three basic modes of operation, namely forward blocking mode (OFF state),
reverse blocking mode (OFF state), and forward conduction (ON state) mode as revealed by the
V-I characteristics.
Forward blocking mode: A thyristor remains in forward blocking mode if its anode to cathode
voltage is positive but the gate signal is insufficient or absent. It is seen from Fig. 2.6(a) that
junctions J1 and J3 are forward biased but junction J2 is reverse biased. Also a small leakage current
A A
Forward + –
leakage
current
p p
J1 J1
n n
J2 J2
p p
G J3 G J3
n n
Reverse
leakage
– + current
K K
(a) (b)
Fig. 2.6 (a) Forward blocking mode and (b) reverse blocking mode.
26 Power Electronics: Devices and Circuits
flows from anode to cathode due to the forward blocking voltage as shown in Fig. 2.6(a). In case
this voltage is increased to high values, then the reverse biased junction J2 will experience an
avalanche breakdown at a particular voltage called forward breakover voltage, VBO. As a result, the
thyristor switches to conduction (ON) state. When forward voltage is less than VBO, SCR offers high
impedance in forward blocking mode.
Forward conduction mode: In this mode, thyristor conducts large currents from anode to cathode
with a very small anode to cathode voltage drop. Now the device is said to be in the ‘ON’ state. It
can be made to switch from forward blocking mode to forward conduction mode even without gate
current (IG = 0) by raising the forward voltage to the level of the forward breakover voltage, VBO.
The transition from forward blocking mode to forward conduction mode, that is, switching ON, can
also be obtained for reduced forward breakover voltages if gate currents are applied. For large gate
currents, the device behaves almost in the same way as diode. With the thyristor in the ON state, if
the gate current is removed, the thyristor continues to remain in the ON state provided the anode
current is greater than the latching current. The gate loses control over the device as soon as the
device latches into conduction. Latching current is the minimum value of anode current for the SCR
to stay in conduction. If the gate current is removed before the anode current increases to latching
current value, the device goes back to the forward blocking mode. In the conduction mode, thyristor
behaves like a closed switch as it offers very low impedance. Voltage drop across thyristor in the
ON state is of the order of 1–2 V depending on the SCR rating. Therefore, in conduction mode,
anode current has to be limited only by load impedance. If the load impedance is increased gradually,
the anode current gradually falls. If the anode current reduces to a value below the holding current,
the device goes back to forward blocking mode. Holding current is the minimum value of anode
current the thyristor can conduct in the ON state. It is found from the thyristor characteristics that
holding current is less than the latching current for a given SCR. These two currents are of the order
of milliamperes. It is also seen from the V–I characteristics that the forward breakover voltage (VBO)
falls with gate current.
Reverse blocking mode: When anode to cathode voltage is made negative, junction J2 is forward
biased and the junctions J1 and J3 are reverse biased as shown in Fig. 2.6(b). The SCR now behaves
like two diodes (due to J1 and J3) connected in series experiencing a reverse voltage applied across
them. A small reverse leakage current of the order of a few milliamperes (or a few microamperes
depending upon the SCR rating) flows from cathode to anode. This is called the reverse blocking
mode. The thyristor is in the off or non-conducting state. If the reverse voltage is increased, then at
a critical breakdown level, called reverse breakdown voltage VBR, an avalanche occurs at J1 and J3
and the reverse current increases rapidly. The large current associated with VBR gives rise to more
losses in the SCR. This may lead to thyristor damage as the junction temperatures may exceed its
permissible temperature rise. It should, therefore, be ensured that maximum working reverse voltage
across a thyristor does not exceed VBR. The SCR in the reverse blocking mode is equivalent to an
open switch since very small (leakage) current flows in the reverse direction, that is, from cathode
to anode.
pnp transistor Tr1 becomes the base current for npn transistor Tr2 and vice versa. Let a1 and a2 be
the common base current gains of transistors Tr1 and Tr2 respectively. An expression for forward
blocking current Io with zero gate current can be easily derived from transistor fundamentals as:
ICBO1 ICBO 2
Io
1 (B1 B 2 ) (2.1)
where ICBO1 and ICBO2 are the leakage currents of transistors Tr1 and Tr2. In silicon transistors, as are
dependent on the emitter current. Therefore, initially when the applied forward voltage is small,
(a1 + a2) is less than 1. If the reverse leakage currents are increased, the values of as will also
increase, and at some level, (a1 + a2) becomes equal to 1. Under these conditions, Ia increases and
attains a value sufficient to start internal regeneration which ultimately takes the thyristor to the ON
state. This can be seen from Eq. (2.1). When (a1 + a2) approaches unity, current Ia tends to infinity.
The transistor analogy and Eq. (2.1) are not valid once the device goes into conduction. The forward
current is then limited by the external impedance and not dependent on the base currents of the two
transistors. The device can go back to the OFF state only when forward current falls below holding
current IH. At this instance, the a’s are very low, and therefore, (a1 + a2) is less than 1, and the
internal regeneration will cease. In other words, the depletion layer across J2 reappears and the
forward current remains low. It can also be seen that this process of internal regeneration is not
possible when the SCR is reverse biased.
A A A
Io Io Io
p p p
n IB1 = IC2
J1 J1 Tr11 α1
Tr
n n n n p IC2
J2 J2 IC2 J2 IC1 J2
G p p G p I p G n
C1
J3 J3
p α2 Tr2
Ig Ig
n n Ig IB2 n
Ik
K K K
(a) (b) (c)
Fig. 2.7 Two transistor model of an SCR.
Gate triggering
Gate triggering is simple, reliable and efficient. It is therefore, the most commonly used method of
turning on the thyristor. To explain gate triggering, a thyristor in forward blocking state is
considered. At a desired moment of turn-on, a suitable positive gate voltage is applied. This voltage
forward biases J3 junction diode. This results in the injection of the electrons into the p-layer by the
heavily doped n-layer. This also results in the gate current in the outer circuit. Some of these
electrons reach junction J2 and add to the minority carrier (electron) concentration in the p-layer near
the junction J2. Consequently, the reverse leakage current increases and leads to a breakdown even
though the applied forward voltage is lower than VBO. It can be shown that with the gate current Ig,
the forward blocking current Ia is given by the expression
a2 I g I CBO1 ICBO 2
Ia
1 (B1 B 2 )
(2.2)
If magnitude of gate current is increased, more electrons reach junction J2 in the manner explained.
Therefore, from Eq. (2.2) it can be concluded that Ia increases to sufficiently large values and starts
regeneration leading to turns on for a much lower forward applied voltage. Under gate triggering,
forward breakover voltage actually falls as gate current increases. This is illustrated in Fig. 2.8.
Typical gate current magnitudes are of the order of 20–200 mA
VO
Forward Breakover Voltage
VBO
0 a Ig Ig2 Ig3
1
Gate Current
Once the SCR starts conducting, reverse biased junction J2 vanishes. Gate current is no longer
required. However, if gate current is removed before the rising anode current attains the latching
current value, the thyristor will revert to the forward blocking mode. This problem mainly arises
when the SCR has to switch on into highly inductive loads. In such cases, the gate current should
be maintained until the anode current increases to latching current value. Thus, the gate provides a
very convenient method for switching the device from OFF to ON state even for low anode to
cathode voltages.
dv/dt triggering
With the anode to cathode voltage positive, the outer junctions J1 and J3 of the thyristor are forward
biased and inner junction J2 is reverse biased. Therefore, the entire anode to cathode forward
voltage VAK appears across J2. Also, due to space charges in the depletion region, junction J2
behaves like a capacitor having capacitance Cj. Then, charging current I of the capacitance Cj is
given by
d
I Cj VAK (2.3)
dt
From Eq. (2.3), it is inferred that the charging current depends on the rate of rise of forward voltage,
(VAK). For a suddenly applied voltage, the rate of rise of forward voltage will be high. Then the
charging current would be large enough so as to increase the a’s and from Eq. (2.1) it can be
concluded that device can be turned on due to this phenomenon even without gate signal. However,
this dv/dt turn-on has to be avoided as this is a false turn-on without gate current. To control the
operation of thyristor, dv/dt value is kept below the specified rated limit.
Temperature triggering
During forward blocking, entire anode to cathode voltage appears across the reverse biased junction
J2, increasing the leakage current. The large voltage across the junction coupled with this leakage
current increases power dissipation and hence increases the temperature of the junction J2. With
increase in temperature, leakage currents further increase. This causes the thyristor to turn-on since
regeneration starts as large values of leakage currents lead to increase in a’s as indicated in the
Eq. (2.1) for the two-transistor model.
Light triggering
Light can also be used to turn-on the SCR by causing the breakdown of the junction J2, with other
junctions J1, and J3 remaining forward biased. In light triggered SCRs, a recess (or niche) is made
in the inner p-layer and it is irradiated by a pulse of light of appropriate wavelength and intensity.
Electron hole pairs are generated by this irradiation and leakage currents through junction J2
increases, causing the forward biased SCR to turn on. A thyristor turned on by light irradiation is
known as Light Activated SCR (LASCR). Light triggering is used for SCRs of phase controlled
converters of HVDC transmission systems. Here, many SCRs, connected in series–parallel to meet
high voltage and high current requirements are light triggered with the advantage of electrical
isolation between power and control circuits.
30 Power Electronics: Devices and Circuits
Delay time td
The delay time td is measured from the instant at which gate current reaches 0.9Ig to the instant at
which anode current reaches 0.1Ia. Here, Ig and Ia are respectively the final values of gate and anode
currents. With the thyristor initially in the forward blocking state, the anode voltage is OA and anode
current is small leakage current as shown in Fig. 2.9. The starting of the turn-on process is indicated
by the rise in anode current from its small forward leakage current value and a corresponding fall
in anode–cathode voltage from its initial forward blocking voltage OA. The gate current flows from
gate to cathode with the application of gate signal. It has a non-uniform distribution of current
density over the cathode surface due to the p-layer. Its value is much higher near the gate but
decreases rapidly as the distance from the gate increases, see Fig. 2.10. This shows that during delay
time td, anode current flows in a narrow region near the gate where gate current density is the highest.
This delay time can be decreased by applying high gate currents and high forward anode to cathode
voltages. The delay time td is a fraction of a microsecond.
Power Switching Devices and Their Characteristics 31
Vg Vg
Gate pulse
t
VAK , ig
A 0.9
VAK
Ig On state voltage
0.9 Ig tc
drop across SCR
0.1 VAK tq
t
Reverse voltage due
ia Ia = Load current to power circuit
0.9 Ia
Recovery Recombination
0.1 Ia t1 t2 t3 t4 t5
Forward t
leakage td tr tp trr tgr
current ton
tq
VAK Ia tc
Power
loss
Time in μs t
Fig. 2.9 Turn-on and turn-off characteristics.
p
J1
n
p J2
J3 (i) (ii) (iii)
n
G K
(a) (b)
Fig. 2.10 (a) Distribution of anode and gate currents during delay time, and (b) conduction areas
of cathode (i) during td (ii) after tr (iii) after tp.
Rise time tr
The rise time tr is the time taken by the anode current to rise from 0.1Ia to 0.9Ia. The rise time is
inversely proportional to the magnitude of gate current and its build up rate. Thus, tr can be reduced
if high and steep current pulses are applied to the gate. The factors affecting the value of the rise
time are:
(i) nature of the gate pulse; for example, rise time is reduced if high and steep current pulses
are applied to the gate.
32 Power Electronics: Devices and Circuits
(ii) nature of the load circuit; in highly inductive circuits, rise time will be high whereas in
resistive and capacitive circuits it would be low.
During rise time, turn-on losses in the thyristor are the highest due to high anode voltage (Va)
and large anode current (Ia) simultaneously occurring in the thyristor, as shown in Fig. 2.9. As these
losses occur only over a small conducting region, local hot spots may be formed and the device may
be damaged.
Spread time tp
The anode current starts spreading from the beginning of the rise time from the narrow conducting
region near the gate to cover the entire cross-section of the thyristor at the end of the spread
time tp. The spread time is the time taken by the anode current to rise from 0.9 Ia to Ia. The spreading
interval depends on the area of cathode and on the gate structure of the SCR. After the spread time,
anode current attains its full steady state value and the voltage drop across SCR is equal to its on-
state voltage drop of about 1–1.5 V (Fig. 2.9).
Total turn-on time of an SCR is equal to the sum of delay time, rise time, and spread time.
Thyristor manufacturers usually specify the rise time which is typically of the order of 1–4 ms. Total
turn-on time depends upon the anode circuit parameters and the gate signal wave shapes. Usually
higher values of gate currents, that is, 3 to 5 times the minimum gate current is used for turn-on as
larger gate currents reduce the turn-on times.
At the end of reverse recovery period (t3 – t1), the inner two layers still have trapped charges
which can disappear only by way of recombination. This recombination is assisted by a reverse
voltage maintained across SCR. The time for the recombination of charges (t4 – t3) is called gate
recovery time tgr. At instant t4, junction J2 recovers and the forward voltage can be reapplied safely
between anode and cathode that is, the device does not go into conduction again without the gate
signal. Therefore, turn-off time tq = t4 – t1. The thyristor turn-off time tq is in the range of 3–100
ms. The turn-off time is influenced by the magnitude of forward current, di/dt at the time of
commutation, and junction temperature. An increase in the magnitude of these factors increases the
thyristor turn-off time.
The thyristor turn-off time tq is applicable to an individual SCR. The duration for which the
reverse voltage is applied to the thyristor (to be turned-off) by means of the external commutation
circuit is called circuit turn-off time tc. Also, tc must be greater than tq for reliable turn-off. If tc is
less than tq, commutation failure occurs.
Thyristors with slow turn-off time (50–100 ms) are called converter grade SCRs and those with
fast turn-off time (3–50 ms) are called inverter grade SCRs. Converter grade SCRs are cheaper and
are used in phase controlled rectifiers, ac voltage controllers, cycloconverters, and so on. Inverter
grade SCRs are used in inverters, choppers, and force commutated converters. They are costlier
compared to converter grade SCRs.
The gate characteristics of a thyristor is shown in Fig. 2.11. It is a graph connecting dc gate voltage
(Vg) and dc gate current (Ig) of the thyristor. These characteristics are the forward characteristics of
the J3 junction diode of the SCR device. The curves ‘of’ and ‘oc’ correspond to minimum and
maximum limits of the spread of these characteristics.
Vg
2
Vgm c d
Each thyristor has maximum limits of gate voltage and gate current in Vgm and Igm as shown in
Fig. 2.11. There is also permissible gate power dissipation curve specified for each SCR. Gate power
dissipation is obtained as the product of Vg and Ig. The permissible gate power dissipation curve is
calculated taking into account the maximum limiting values for Vg and Ig. These limits should not
be exceeded if permanent damage of junction J3 is to be avoided. There are also minimum values
34 Power Electronics: Devices and Circuits
for Vg and Ig for reliable turn-on. These minimum values are temperature dependent and they
decrease as the temperature increases. They are represented by lines ox and oy in
Fig. 2.11. It is also clear from the figure that for reliable triggering of an SCR its Vg, and Ig values
must fall inside the area bounded by bcdefgh. For best results, the operating point must be as close
as possible to the permissible power dissipation curve, Pgav.
The gate signal to a thyristor can be in the form of dc, or ac, or a sequence of high frequency
pulses. Since, thyristors may generally be considered as charge controlled devices, pulse firing can
be preferred with advantage. Here, the gate trigger current can be so chosen that it bears an inverse
ratio to the pulse width. It is important that the gate drive has to be maintained till the forward current
reaches the latching current level for a successful turn-on. Normally for design considerations, the
gate pulse width is taken to be equal to or greater than the turn-on time of the device. With pulse
firing, a larger amount of instantaneous gate power dissipation can be tolerated if the average value
of Pg is within permissible limits. In other words, the gate can be driven harder when pulse firing
is used (greater than Vg and Ig but less than Vgmax and Igmax). This provides reliable and faster turn-
on of the device. If VS is the source voltage, the gradient of line AS shown in
Fig. 2.13 will give the required gate source resistance Rs. The maximum value of the series resistance
A
Trigger circuit
Ig
Rs + G
+
VVsS Vg
–
– K
is given by a line AT (as shown in Fig. 2.13) where T is the point of intersection of lines indicating
the minimum gate voltage and gate current. The minimum value of the gate source series resistance
corresponds to the slope of line AC drawn as tangent to the power dissipation curve, Pgav.
Vg
Vs A 2
Vgm Pgav
S2 3
S
C
S1
1
T
0 Igm B Ig
Thus, for a given turn-on time, the minimum required gate current and the pulse width T can
be obtained. If the frequency of firing, f is known, the peak instantaneous gate power dissipation
Pgmax can be obtained as
Pgmax = VgIg (2.4)
Pgav
=
fT
where Pgav is the specified maximum permissible average gate power dissipation. Using this value
of Pgmax and the specified gate source voltage, the required series resistance is obtained as shown in
Fig. 2.13. Having obtained the operating point S, the voltage and current magnitudes Vg and Ig can
be computed.
Load R (Load)
i i
L C R L
i i C
0 to t 0 a t
(a) (b)
Fig. 2.14 Resonance commutation: (a) Load resistance in series with L, C and current wave.
(b) Load resistance in parallel with C and current wave.
For load resistance R in parallel with C, the current wave is shown in Fig. 2.14(b). At a certain
point a, the current reaches zero value and thyristor commutation takes place.
Class B or self-commutation
Figure 2.15 shows the circuit and waveforms for class B or self-commutation. In this method also,
the thyristor is turned off by the action of a resonating LC circuit but the commutation components,
L and C do not carry the load current. Therefore, L and C do not form a resonant circuit with the
load.
i VC
i , VC
C VC T
i
V IL
a t
L
R Load IL
VC
Initially the capacitor gets charged to battery voltage V with upper plate being positive. As soon
as the thyristor is turned on, it starts conducting and supply current (flows through T) load resistance
R. Now the capacitor starts discharging through the inductance and the thyristor. After getting
completely discharged, it starts getting charged in the opposite direction, that is, the charging current
Power Switching Devices and Their Characteristics 37
reverses and this negative current opposes the load current. At point ‘a’ in the Fig. 2.15, the load
current and the opposing capacitor current are equal and the thyristor is turned off. Once thyristor
is turned off, the capacitor starts charging again with upper plate being postive. Thus, thyristor
remains off for a certain time called off time at the end of which, it is turned on again only to be
commutated at the end of conduction period called on time. This cycle is repeated. The time for
which thyristor remains on depends on the value of L and C.
It is seen that both, class A and class B commutation methods are similar to some extent. The
main difference is that in class A, the commutation elements carry the load current but in class B
this is not so. The expression for the capacitor current is given by
C t (2.6)
i V sin
L LC
C
where, peak capacitor current, iCP V (2.7)
L
t
The capacitor voltage, VC V cos " (2.8)
LC
t0 Q LC (2.9)
VC C Ta
V IL
L D Load
Mode 1: Main thyristor T1 is triggered by a gate signal and the load current IL flows from the
battery through T1 and load. At the same time, capacitor discharges through T1. The path for this
capacitor discharge current is through T1, diode D, and inductor L. At the end of this mode, capacitor
C gets charged to opposite polarity. But, the diode D does not allow reverse discharging of capacitor.
Mode 2: To turn-off the main thyristor, the auxillary thyristor Ta is turned on by a gate signal. The
capacitor voltage VC appears as reverse bias across main thyristor T1. The capacitor C starts
discharging through Ta and T1. This discharge current flows from cathode to the anode of T1. When
this current becomes equal to load current flowing through T1, net current in T1 becomes zero leading
to the thyristor turn-off. Thus, the end of this mode sees the turn-off of T1 and capacitor C getting
charged to VC with upper plate being positive. Now, Mode 1 can be repeated.
38 Power Electronics: Devices and Circuits
This method uses the capacitor voltage to commutate the main thyristor. Therefore, it is also
known as voltage commutation. Now,
toff
1 I L toff
VC
C ÔI
o
L dt
C
(2.10)
I L toff
Therefore, C (2.11)
Vc
C t
iC V sin (2.12)
L LC
C
Peak capacitor current, iC p V (2.13)
L
Also iCp should be less than maximum thyristor current Im, i.e.,
c
V Im
L
V 2C
Therefore, L>
I m2
and C = (IL toff)/VC, where toff is the circuit turn-off time and VC is the capacitor voltage equal to V.
Class D or complementary commutation
The circuit shown in Fig. 2.17 is used to illustrate the method of complementary commutation. It
uses the main thyristor T1 and a complementary thyristor T2 in parallel with T1. The triggering of
one thyristor turns off other thyristor. The action can be described in the modes explained as follows:
Load 1 Load 2
Resistance R1 Resistance R2
V C
– +
T1 T2
Mode 1: Thyristor T1 is turned on by a gate pulse. Load current flows from battery to load 1
through thyristor T1. Along with this current, a capacitor charging current flows from battery through
load 2, capacitor C, and thyristor T1. This current charges capacitor C, to the battery voltage V with
the right side plate of the capacitor positive.
Mode 2: A gate pulse is applied to thyristor T2 that turns it on. The capacitor voltage now appears
as reverse bias across T1 and turns it off. In this mode, load current flows from battery to load 2
through thyristor T2. In addition, a charging current flows from battery through load 1, capacitor C,
Power Switching Devices and Their Characteristics 39
and T2. This charging current charges the capacitor to supply voltage V with polarity such that for
Fig. 2.17, the right side plate is negative.
When thyristor T1 is turned on in the next cycle, the voltage across C reverse biases thyristor
T2 and turns it off. The above cycle of events is repeated. This method of commutation is used in
inverters. The circuit turn-off time is given by toff = R1C ln 2.
VS Load C Ves
When thyristor T1 is turned on, the source voltage VS supplies current to the load. Thyristor T1
is the thyristor to be commutated at the end of required time interval. This is achieved by turning
on thyristor T2. When thyristor T2 is on, it reverse biases thyristor T1 using the voltage across the
capacitor. The capacitor is charged from the source Ves when T3 is turned on.
(a) Thyristor commutation: When a thyristor turns off, a reverse current flows to sweep away
the stored charge. This reverse current increases to its maximum value and then decays at a
high rate. This high di/dt induces a high overvoltage (Ldi/dt) due to the circuit inductance L. It has
been found that this overvoltage may be much higher than the rated value and may damage the
thyristor.
(b) Current chopping: When a small current is interrupted by a circuit breaker, the current may be
brought to zero abruptly and ahead of the normal current zero. This is known as current chopping
and is often observed when the no load current of a transformer is switched off. Current chopping
often leads to dangerous overvoltages.
(c) Lightning: HVDC systems are fed by high voltage transmission lines. Atmospheric lightning
causes high magnitude overvoltages, which travel along the lines as waves. When these waves reach
the converter station of HVDC system, the thyristors in the converter station may be subjected to
over-voltages.
(d) Transformer in-rush current: When a transformer is switched on, the initial magnetizing
current may be higher than its steady state value. The thyristor circuit connected to the secondary
of this transformer may be subjected to an overvoltage, which would be about twice the rated
secondary voltage because of this high in-rush magnetizing current.
One method to overcome this problem is to choose thyristors with their peak voltage ratings
2.5–3 times their normal working voltage. In this connection, a Voltage Safety Factor (VSF) is
introduced, which is defined as
For line commutated converters, VSF lies between 2 and 2.5 while for forced commutated
connverters, it lies between 1.5 and 3. In practice a value of 2.5 is used.
Current and
Resistance
Resistance
Current
Voltage
a safe value. The surge energy is dissipated in the non-linear resistor and the voltage clamping device
acquires high resistance thereafter. Selenium thyrector diodes, metal oxide varistors, and avalanche
diode suppressors are the commonly employed voltage clamping devices.
Figure 2.20 shows an overvoltage protection circuit using thyrector diode which has a low
resistance at high voltage and vice versa.
Fuse
L
Cs
Thyrector
The voltage transients are normally suppressed by the R–C network shunting the thyristor in
Fig. 2.20. The voltage transients are caused by reverse recovery currents and sudden cessation of
load currents in the circuit inductances, which are essentially the energy storing elements. The same
R–C network offers protection to the thyristor against dv/dt.
R2 G Cs
ZD R1 C1
A circuit breaker because of its longer tripping time is generally used for protecting a thyristor
against continuous overloads or against surge currents of long duration. For a circuit breaker to be
effectively used in such situations, its tripping time has to be properly coordinated with the device
rating. A fast acting fuse can also be used for protecting thyristors against large surge currents of
very short duration called sub-cycle surge currents. Here also, coordination of the fusing time with
sub-cycle duration rating of the device is essential. For reliable protection of the SCR, the circuit
breaker or the fuse must open before the SCR suffers any permanent damage due to large currents.
The desired fuse and circuit breaker coordination with the device ratings is shown in Fig. 2.22.
t
(s) Device rating
Fuse rating
Circuit breaker rating
A
1010ms
ms
I (A)
1A I (amp)
Fig. 2.22 Fuse and circuit breaker coordination.
The operation of fast acting current limiting fuse is illustrated in Fig. 2.23. These fuses and
thyristors are found to have similar thermal properties (the coordination therefore becomes simpler).
The current limiting fuse consists of one or more fine silver ribbons having very short fusing time.
In Fig. 2.23, fault is shown to occur at zero crossing of the ac sine wave, that is, at t = 0. Without
fuse, the fault current would rise up to A (as shown in Fig. 2.23), and then would follow dotted
curve. A properly selected current limiting fuse melts at A. An arc is then struck. For a brief interval
after A, the current continues to rise depending upon the circuit parameters and the fuse design. This
current reaches a peak value, called peak let through current, which is indicated by point B in
Fig. 2.23. Note that peak let through current is considerably less than the peak fault current without
the fuse, the latter is indicated by point D. After the point B, arc resistance increases and fault current
decreases. At point C, arcing stops and the fault current is cleared. The total clearing time tc is the
sum of melting time tm and arcing time ta, that is tc = tm + ta.
A Peak let
B
through
current
C
0
time
Melting Arcing
time, tm time, ta
Clearing time ,
tc
Fig. 2.23 Fuse characteristics.
Power Switching Devices and Their Characteristics 43
Proper coordination between fast acting current limiting fuse and thyristor is essential. A fuse
carries the thyristor current as both are placed in series. Therefore, the fuse must be rated to carry
full load current plus a marginal overload current for an indefinite period. But the peak let through
current of fuse must be less than the sub-cycle surge current rating of the SCR. In order that fuse
protects the thyristor reliably, the I2t rating of the fuse must be less than that of the SCR.
di/dt protection
At the instant of turn-on of the thyristor, conduction of anode current starts in the immediate
neighbourhood of the gate–cathode junction, refer Fig. 2.10. Thereafter, the current spreads rapidly
across the whole area of the junction. But it is necessary that the current spreads uniformly over the
surface of the junction. However, if the rate of rise of anode current, that is, di/dt, is very high, the
current may not spread uniformly and this will lead to the formation of local hot-spots near the gate–
cathode junction on account of high current density. This localized heating may destroy the thyristor.
Therefore, it is essential that the rate of rise of anode current at the time of turn-on is kept below
the specified limiting values. This is achieved by connecting a small inductor, in series with the
thyristor. Typical di/dt limiting values of SCRs range between 20–500 A/ms. The inductor values can
be obtained using these data.
dv/dt protection
It has been already seen that the two outer junctions are forward biased and the inner junction is
reverse biased when a forward voltage is applied across the anode and cathode of a thyristor. This
reverse biased junction J2 has the characteristics of a capacitor due to charges existing across the
junction. If the entire anode to cathode forward voltage Va appears across J2 junction and the charge
is denoted by Q, a charging current, i given by
dQ
i (2.14)
dt
d
dt
C j Va
dVa dC j
Cj Va (2.15)
dt dt
As Cj is the capacitance of junction J2 and is almost constant, the current is given by
dVa
i Cj (2.16)
dt
If the rate of application of forward voltage, that is, dVa/dt is high, the charging current i is large
enough to turn-on the SCR even without the gate pulse as discussed in section 2.3.3. Such a
phenomena of turning-on of a thyristor, called dv/dt turn-on, has to be avoided as it is a false turn-
on of the thyristor without the controlling gate signal. Therefore, for controllable operation of the
thyristor, the rate of rise of forward anode to cathode voltage dVa/dt must be kept below the specified
rated limit. Limiting values of dv/dt range between 20–500 V/ms. False turn-on of a thyristor is
prevented by suppressing the dv/dt values using R–C network called snubber.
44 Power Electronics: Devices and Circuits
Rs Cs Discharge
current
S L
+
Vs Load
–
higher than the required normal working values, thus allowing a safety margin. This safety margin
ensures that no damage is done to SCRs during their operation. In this section, various SCR ratings
are discussed. For correct application of the thyristor in power electronic circuits, knowledge of these
ratings is essential.
There are three types of ratings, namely continuous, repetitive, and surge or non-repetitive
ratings. Continuous ratings are given in terms of average or rms values depending on whether the
device is unilateral or bilateral. Repetitive and surge ratings normally correspond to peak values.
More than one subscript is employed to correctly identify different voltage and current ratings. The
first subscript denotes the direction or the state and includes
D —forward blocking region with gate circuit open,
T—on-state,
R—reverse, and
F—forward.
Second subscript letter denotes the operating values and includes
W—working value,
R—repetitive value,
S—surge or non-repetitive value,
T—trigger.
The letter M if appears as a third subscript, indicates the maximum or peak value.
Ratings with less than three subscripts may not follow these rules. Gate ratings involve the
subscript G. Subscript A usually stands for anode and subscript AV for average. For example, ITAV
represents the average value thyristor current in the on state.
Ia
voltage
VDRM VDSM
VDWM
VBR VRSM VRRM
ωt 0 +Vα
VDRM
Reverse
voltage
VDSM VBO
VRRM VRWM
VRSM
(a) (b)
components. Power dissipation in the SCR depends mainly on the I2R loss taking place during
conduction. Switching losses at lower frequencies, say at 50 Hz, and gate power dissipation can be
ignored. As already seen, thyristor is a device of low thermal capacity and short time constant. That
is, even for short time overcurrents, the junction temperature may exceed the rated value and the
device may get damaged. As the junction temperature is dependent on the current handled by a
thyristor, a correct choice of current ratings is essential for a long working life of the device. In this
section, current ratings of SCRs are discussed for both repetitive and non-repetitive type of current
waveforms.
The V–I characteristics for a conducting SCR can be approximated by
vt = V0 + it RT (2.17)
pd = vt it (2.18)
= V0it + it2RT (2.19)
The average power dissipation is then,
Pdav = V0ITav + I2Trms RT (2.20)
Average power dissipation is a function of the average value of the forward current and the
form factor K which is equal to the ratio of ITrms and ITav. The form factor K depends on the
waveform of the current.
The value of K is 1 for a thyristor conducting constant dc current. But in the case of thyristors
used in power converters, the thyristor current waveform depends on the firing angle a. For aÿ = 0,
that is for full conduction (180°), K is 1.57. For higher values of a, conduction angles get
correspondingly reduced. Table 2.1 gives different values of form factors for different conduction
angles for half-wave sinusoids applicable for resistance load. From the Table 2.1, it is clear that for
lower values of conduction angles, the value of K is higher. Therefore, for the given average forward
current ITAV, the rms value is higher for low conduction angles leading to higher junction
temperatures since more power loss will be produced in this case. In other words, if the maximum
junction temperature is to be limited, the permissible average forward current of the device has to
be lowered for low conduction angles.
Figures 2.26(a) and (b) show the average power dissipation as a function of ITAV for different
conduction angles considering rectangular and sinusoidal waves respectively. For a given ITAV, the
power dissipation increases because the value of form factor increases with reduction in conduction
periods. It may be noted that the maximum ITAV values are different for different conduction angles.
It is because the maximum rms current rating is attained at different average current values for
48 Power Electronics: Devices and Circuits
different conduction angles. This is due to variation of form factors with conduction angles.
Figures 2.26(c) and (d) show allowable on-state average current for different casing temperatures of
the device for a given conduction angle. As the casing temperature increases, the device rating
decreases since the maximum junction temperature is kept constant. For silicon semiconductors, the
maximum junction temperature is about 125°C. The end points of all the curves for different
conduction angles specify the same ITrms. Even though the current rating of the SCR is specified by
the average values the ratings of the associated leads, connectors and other passive components are
all specified by the rms current ratings. Thus, whatever may be the conduction angle, the maximum
rms current ratings should not be exceeded. It is a normal practice to specify the continuous average
rating ITAV of the SCR and also its ITrms rating on the assumption that the SCR carries a full half-
cycle sinusoidal current at 50 Hz.
300 DC 300
250 180º 250
120º 180º
200 200 120º
90º 90º
Conduc- 60º Contd.
Conduc-
Pav (in W)
Pav (in W)
Contd. 60º
150 tion 30º
angle 150 angle
tion
angle angle 30º
100 360º 100
50 180º
50 0º
Conduction angle Conduction angle
0 0
40 80 120 160 200 40 80 120 160
ITAV (in A) ITAV (in A)
(a) (b)
º( C)
qCM, º((°C)
CM,, (°C)
120 B 120 0º
Conduction Conduction
qCM
angle
temp, θ
temp θ
case temp,
C
80 A 80
Max. case
Max.case
30º 60º 90º 120º 180º 30º 60º 90º 120º 180º
60 60
Max.
Max.
For example, for a thyristor whose maximum rms current is 35 A, ITAV will be 22 A when carrying
half wave sinusoidal current with 180° conduction angle. The ITAV for rectangular wave under same
conditions is 25 A. It may be noted that the curves Figs. 2.26(c) and (d) can be derived from
Figs. 2.26(a) and (b) provided the thermal resistance between the thyristor case and the junction,
qjcs is known.
Power Switching Devices and Their Characteristics 49
Several thyristors are connected in series and/or in parallel when circuit applications demand voltage
and current ratings higher than those of a single thyristor. In such situations, certain precautions must
be observed to ensure satisfactory operation and proper utilization of individual thyristor ratings.
String efficiency is a measure of the utilization of the ratings of the thyristors in a string. It is defined
for SCRs connected in series/parallel as:
Voltage/current rating of the whole string
String efficiency =
(Voltage/current rating of one SCR)(No. of SCRs in series/parallel in the string)
In practice, this ratio is less than one. Because of the dissimilarities in characteristics of the
thyristors of same ratings and specifications, voltage and current sharing in series/parallel
connections are not equal. External equalizing circuits are used to ensure proper sharing.
Even in a string provided with external equalizing circuits, the string efficiency is less than unity.
In case one extra unit is added to the series/parallel string, the voltage/current shared by each device
would become lower than its normal rating. The use of this extra unit certainly improves the
reliability of the string though at an increased cost. This means more thyristors are used in the string
than required when voltage/current sharing is equal. This leads to de-rating of the device with respect
to voltage for series connected thyristors and current for parallel-connected thyristors. Voltage de-
rating of thyristors in series is given by:
Vs
De-rating factor = 1 – (2.24)
nsVD
where
nS = number of SCRs in series,
VD = voltage rating of each SCR, and
Vs = total voltage across the string.
Current de-rating of thyristors in parallel is given by:
Im
De-rating factor = 1 (2.25)
nP I T
where
nP = number of series strings in parallel,
Im = total current, and
IT = current rating of the individual thyristor.
Power Switching Devices and Their Characteristics 51
It can be shown that the de-rating factor (DRF) = 1 – (string efficiency). In fact, a measure of
the reliability of the string is given by this factor.
IIoO Io
T1 V1 T1 T2
VB02
T2 V2
I0 VB01
0 V2 V1 VO
(a) (b)
Fig. 2.27 Series connection of thyristors.
The string efficiency for these two series connected SCRs is given by:
String voltage
String efficiency =
Individual voltage rating of SCRs (=V1 ) × 2
V1 V2
V1 2
1È V Ø
É 1 2Ù (2.26)
2Ê V1 Ú
This shows that even though SCRs have identical ratings, voltage shared by each is not the same
and string efficiency is therefore, less than one. A nearly equal distribution of voltages in steady state
can be realized by connecting a suitable resistance in parallel with each thyristor such that each
parallel combination has the same resistance. For this, different resistances are required. A simple
arrangement, permitting reasonably uniform distribution of voltage, is to use the same resistance in
parallel with each thyristor.
This shunt resistance R is called the static equalizing resistance. The value of R is given by:
R
nVD Vs
(2.27)
(n 1) I B
where
n = number of SCRs in series,
52 Power Electronics: Devices and Circuits
Anode
String V1 V2 voltage
voltage Δtd t1 t2
T1 VSs V2
Vs
2 V1
Anode 1 t
VSs
VSs
Anode V
t1
@
V2 = VsS
t
current
2
T2 voltage a trr2
2
VsS V1 = 0 trr1
2 t2 t
t1 t 1 2
Fig. 2.28 Switching characteristics of series connected SCRs.
Figure 2.29 depicts equalizing circuits for two SCRs in series. The external capacitor C
connected across each thyristor tends to equalize the transient voltages. It also improves the dv/dt
rating of the device. The capacitors connected across the thyristors get charged to the voltage across
them under forward and reverse-blocking conditions. When such a thyristor is turned-on, a heavy
discharge current from the shunting capacitor flows through the thyristor. The resistance RC is used
to limit this discharge current. The diode D cuts off the resistance RC during the charging time of
the capacitors when a forward voltage is applied to the string. The value of C is then given as:
( n 1) 'Q
C (2.28)
nVD Vs
where
n = number of thyristors in series,
VD = voltage rating of each SCR,
Vs = total voltage across the string, and
DQ = maximum difference in recovery charge of SCRs in the string.
Power Switching Devices and Their Characteristics 53
D
RC D RC
R 1 R
1
C
C
RC D
RC D 2 R
2 R C
C
Reverse
recovery
current
Fig. 2.29 Equalizing circuits for two SCRs in series.
The value of DQ for various SCRs can be obtained from data sheets supplied by the
manufacturers. The choice of RC depends on the permissible peak repetitive current through the SCR.
During the turn-off period, when one SCR in the string has completely recovered, the shunt resistor
R provides an alternate path for the reverse current of the other SCRs to flow through. This facilitates
the turn-off of the whole string.
The value of Rp can be calculated from Eq. (2.29). The disadvantage of this type of
compensation is that there is considerable power loss due to series resistances. Figure 2.30 depicts
the parallel operation of two SCRs.
54 Power Electronics: Devices and Circuits
IT
VT1 VT2 T1
T1 T2
IT1 IT2 T2
Rp1 Rp2
In ac circuits, the current distribution can be made uniform by magnetic coupling shown in
Fig. 2.31. If the currents IT1 and IT2 are equal, the fluxes produced by the two inductors cancel each
other and net voltage drop in the inductors is zero. However, if the currents IT1 and IT2 are unequal,
the net flux linkage is not zero. Therefore, unequal voltages are induced in the two inductors. This
reduces the difference between IT1 and IT2.
+
IT1 IT2
T1 T2
A
+ L – +L –
1 2
It has been seen that inductive effect of current carrying conductors causes unequal current
distribution in thyristors connected in parallel. If thyristors are mounted in a row as shown in
Fig. 2.32, the conductor in the middle have more flux linkages and higher inductance than the other
two. Therefore, the thyristor in the middle carries lesser current compared to the other two. The same
Fig. 2.32 also shows an arrangement of the three thyristors on the vertices of an equilateral triangle.
By this arrangement the unequal flux linkages with the conductors are avoided.
Heat sink
T1
T3
T1 T2 T3
T2
+
Secondary T1 R D
Rg RC
C
T2 R RC D
Rg
C
T3 R RC D
Rg
Primary C
–
Fig. 2.33 Simultaneous or independent triggering.
Sequential triggering
The circuit for sequential triggering of thyristors in series is shown in Fig. 2.34. Here, only one SCR
connected at the bottom of the string is turned on by the external gate pulse. The discharge current
of the shunt capacitor through the SCR, which is turned on, fires the next SCR in the string. This
process continues until all the SCRs in series are turned on in a very short time. Since the SCRs are
turned on in sequence, the topmost SCR in the string experiences an increase in forward voltage.
This method is used to generate impulse voltages. The minimum capacitance required for satisfactory
triggering is
10
C
RG VGT /I GT (2.30)
56 Power Electronics: Devices and Circuits
RC1 D1 Rg1 T1 R
C1
P Q
RC2 D2 D¢
D22
Rg2 T2 R
C2
P Q
RC3 D3 D11
D¢
Gate T3 R
C3 pulse
–
Fig. 2.34 Sequential triggering.
where
C = capacitance (in mF)
RG = source–gate resistance, (in W)
VGT = maximum gate triggering voltage (in V)
IGT = maximum gate triggering current (in A)
The diodes D¢1 and D¢2, ensure that the capacitor discharge current flows through the gate circuit
of thyristors. However, due to the presence of D¢1 and D¢2, the potentials of points P and Q may not
be the same; resulting in circulating currents. These circulating currents may trigger the thyristors.
If the parameters of the equalizing circuit are selected properly, this effect can be eliminated. This
will further ensure that triggering takes place only when a gate pulse is applied to T3.
Optical triggering
Another convenient method of firing a string of SCRs is optical triggering. In this case, light
activated SCR is connected between the gate and capacitor C as shown in Fig. 2.35 through a suitable
resistance. One LASCR is used for each thyristor. The LASCR is fired by photon bombardment and
the capacitor discharges through the gate and turns-on the SCR.
R1 LASCR T1 R
C1 R4 C
R2 R3
R1 LASCR T2 R
C2 R2 R4 C
R3
R1 LASCR T3 R
C3 R2 R4 C
R3
–
T1 T2
Gate
pulse
R1 R2
D
In the analysis of power electronic systems, device losses are often not taken into account as they
constitute only a small percentage of load power. However, in practice, the effect of power loss
cannot be ignored as this leads to temperature rise in the junctions. A good and reliable thermal
design ensures that a specified maximum junction temperature is not exceeded during the device
operation since it is a critical parameter influencing all other device parameters and characteristics.
Device current ratings are so chosen that it operates within specified thermal limits. Permanent
device damage is thus avoided and long term reliability is ensured.
The power loss in SCRs has the following components:
(1) forward conduction loss,
(2) off-state loss due to leakage currents,
(3) switching losses at turn-on and turn-off, and
(4) gate triggering loss.
At power frequencies, the conduction or on-state loss is usually the major component of power
loss. Switching losses are small at power frequencies but become large only at high operating
frequencies. These electrical losses produce thermal heat, which must be conducted away from the
junction region to prevent temperature rise. The specifications require that the junction temperature
lies in the range of –25°C to 125°C for normal operation. The thermal losses and hence, the
temperature rise of the device increases with the thyristor rating. The cooling of thyristors, therefore,
becomes more necessary as the rating increases. The heat produced in a thyristor is dissipated to
58 Power Electronics: Devices and Circuits
ambient fluid (air or water) by mounting the device on a heat sink. When heat due to losses is equal
to that dissipated by the heat sink, the junction temperature becomes steady.
Thyristor heating and hence, its junction temperature rise is dependent primarily on current
handled by the device during its operation. As such, current ratings of thyristor are often based on
thermal considerations.
It is seen from the table that thermal resistance is the resistance offered to heat flow and is
denoted by q. If power loss, Pav (in watts) keeps the temperature of points 1 and 2 at T1°C and
T2°C respectively where T1 > T2, the thermal resistance between these two points is given by
T1 T2 D
R12 C/W (2.31)
Pav
The heat generated in a junction due to power loss takes the following path:
T j Tc Tc Ts Ts Ta T j Ta
Pav (2.32)
R jc Rcs R sa R ja
Power Switching Devices and Their Characteristics 59
Tj Tc Ts Ta
θjc θcs θsa
Pav
where qja = qjc + qcs + qsa is the total thermal resistance between junction and ambient.
Also, Tj, Tc, Ts and Ta refer to temperatures at the junction, case, heat sink and ambience
respectively. qjc, qcs, and qsa denote thermal resistance between junction and case, case and sink, and
between heat sink and ambience respectively.
The difference between junction and ambient can be written as
Tj – Ta = Pav (qjc + qcs + qsa) (2.33)
The equation is quite significant from the point of view of heat sink design. The junction
temperatures can be maintained at permissible levels by reducing the thermal impedances such as qsa.
This means that efficient cooling system of the kind of heat sinks, to the SCR, is essential.
serve this purpose. This subsection discusses only one half wave and one full wave RC trigger
circuits.
(a) RC half wave trigger circuit
Figure 2.38(a) illustrates a typical RC half wave trigger circuit suitable for firing a single SCR. The
firing angle a, that is, the instant of turning on can be varied with respect to supply voltage by
varying the value of R in the RC network that controls the charging rate of the capacitor C. The firing
angle a can be varied from 0° to 180° in this manner. The supply voltage VS, output voltage Vo,
thyristor voltage Vt, and capacitor voltage Vc are shown in Fig. 2.38(b). In the negative half cycle,
capacitor C charges through D2, with lower plate being positive, to the peak supply voltage Vm. This
capacitor voltage remains constant at –Vm until supply voltage attains zero value. Now, as the SCR
anode voltage passes through zero and becomes positive, C begins to charge through variable R from
the initial voltage –Vm. When capacitor charges to positive voltage equal to gate trigger voltage Vgt,
SCR is fired and after this, capacitor holds to a small positive voltage, as shown in
Fig. 2.38(b). Diode D1 is used to prevent the breakdown of cathode to gate junction through D2
during the negative half cycle.
VvSs Vm sin ωt
Vgt
π/2 0
0 ωt
Vc
a a Vc
va α α
vVoo
π 2π 3π ωt
Load
R VvTT
D2 +
vVsS Vm π
vVTT
VvCc D1
– α -Vm α ωt
C
(a) (b)
Fig. 2.38 RC half wave trigger: (a) circuit and (b) waveforms.
When SCR triggers, voltage drop across it falls to 1 to 1.5 V. This, in turn, lowers the voltage
across R and C to this low value of 1 to 1.5 V. Low voltage across SCR during conduction period
keeps C discharged during positive half cycle, until negative voltage cycle across C appears. This
charges C to maximum negative voltage –Vm as shown in Fig. 2.38(b) by dotted line. If R of the RC
network is increased, the time taken for C to charge up to the firing value, Vgt is more, resulting in
large firing angle a and therefore, the average output voltage is low. If R value is reduced, the firing
angle a is also reduced resulting in higher output voltage.
(b) RC full wave trigger circuit
RC half wave trigger circuit shown in Fig. 2.38 can be used to obtain only half wave rectified output
across the load. A full wave rectified output can be obtained across the load resistor by an RC trigger
circuit shown in Fig. 2.39. Diodes D1–D4 form a full wave diode bridge. In this circuit, the initial
voltage from which the capacitor C charges is almost zero. The capacitor C is set to this low positive
voltage (upper plate positive) by the clamping action of SCR gate. When capacitor charges to a
Power Switching Devices and Their Characteristics 61
Vvss Vm sin ωt
Vvo ωt
o
Load Vvoo
+ + ,voo
Vvcc,V
D1 D3 R
VvsS = V
vmm sin wv t Vvo
+
V
vTT vVcc vcc
V vcc
V ωt
s
– Vggtt
VvLL
D4 D V
vcc C α α α
– 2–
ωt
VvTT
ωt
(a) (b)
Fig. 2.39 RC full wave trigger: (a) circuit and (b) waveforms.
voltage equal to Vgt, SCR triggers and rectified voltage vd appears across load as vo. In Fig. 2.39(b),
firing angle a is more than 90°.
Z
Gates
Vvss C1
voltage
Pulse
Vvc C G2 α α α
D4 D2 i2 C2 X X X
– – – ωt
(a) (b)
Fig. 2.40 Synchronized UJT triggering: (a) circuit and (b) waveforms.
62 Power Electronics: Devices and Circuits
As the zener diode voltage Vz goes to zero at the end of each half cycle, the synchronization of
the trigger circuit with the supply voltage across SCRs is achieved. Thus, the time t, equal to a/w,
when the pulse is applied to SCR for the first time, remains constant for the same value
of R. Small variations in the supply voltage and frequency are not going to affect the circuit
operation.
In case R is reduced so that Vc reaches UJT threshold voltage twice in each half cycle, there will
be two pulses in any half cycle. As the first pulse will be able to turn-on the SCR, second pulse in
each cycle is redundant.
VvSs
Vm sin wt
VvLL ωt
vVoo
Vz Vz
Load Vvoo
+ + b ωt
D1 D3
R1 R R3 Vvcc Vvcc V V
vcc pd
+ D T11
Th a ηVz
Vvoo Z VVzz ωt
VvSs R2 T
Th2 2
Vvcc
Vpd
C Vvgg α
Vpd Vvcc V
vgg a
–
D4 D2
– – b ωt
VvLL
α
ωt
(a) (b)
Fig. 2.41 Ramp and pedestal triggering: (a) circuits and (b) waveforms.
With the setting of wiper on R2, pedestal voltage Vpd on C can be adjusted. With low pedestal
voltage across C, ramp charging of C to hVz takes longer time and firing angle delay is therefore
Power Switching Devices and Their Characteristics 63
more and output voltage is low. With high pedestal on C, voltage–ramp charging of C through R
reaches hVz faster, firing angle delay is smaller, and output voltage is high. This shows that output
voltage is proportional to the pedestal voltage.
R1
VB T1
+
T2
Pulse
transformer
G
(a) This pulse waveform is suitable for injecting a large charge in the gate circuit for reliable
turn on.
(b) The duration of this pulse is small, and therefore, no significant heating of the gate circuit
is observed.
(c) The fact stated (b) as mentioned permits VB to be raised to a suitable high value so that a
hard drive of SCR is obtained. A device with a hard drive can withstand high di/dt at the
anode circuit, which is desirable.
64 Power Electronics: Devices and Circuits
2.13.1 TRIAC
In the thyristor family, TRIAC is one of the widely used devices in power control applications next
only to SCR in importance. The TRIAC is a bilateral device with three terminals MT1, MT2 and Gate
G. A TRIAC can be considered as an integration of two SCRs in anti-parallel, that is, its operation
is equivalent to two SCRs connected in anti-parallel. A cross-sectional view of the TRIAC structure
showing the various layers and junctions is shown in Fig. 2.43(a). The circuit symbol and volt–
ampere characteristics of a TRIAC are present in Figs. 2.43(b) and (c).
MT2
Ia
MT1 MT2 Positive
G
Ia Ig2>Ig1>Ig0
n2 Ig2 Ig1 Ig0=0
n3 p2 -VBO2
Va -V
a Va
VBO1
n1 G
-Ig0 -Ig1 -Ig2
p1 MT2 Negative
n4 -Ia
MT1
Ohmic MT2 Metallic
contact lead
(a) (b) (c)
Fig. 2.43 (a) Structure, (b) symbol and (c) characteristics of TRIAC.
The two main terminals of the TRIAC are designated as MT1 and MT2. MT refers to main
terminal and it plays the role of anode and cathode alternately. The gate is near the terminal MT1.
With the gate open, the TRIAC blocks both polarities of voltage applied across MT1 and MT2 if the
magnitude of the voltage is less than the breakover voltage of the device. The characteristics of a
TRIAC can be seen as the sum of the forward characteristics of the two SCRs in anti-parallel. With
terminal MT2 being positive with respect to terminal MT1, the device is turned on by a positive gate
current. On the other hand, when terminal MT1 is positive with respect to terminal MT2 a negative
gate current can turn the device on. That means, a TRIAC can be turned on both by positive and
negative gate signals whereas an SCR can be turned on only by the positive signal.
This gives rise to four modes of triggering:
Mode 1: MT2 positive with respect to MT1 Gate current positive.
Mode 2: MT2 positive with respect to MT1 Gate current negative.
Mode 3: MT2 negative with respect to MT1 Gate current negative.
Mode 4: MT2 negative with respect to MT1 Gate current positive.
Mode 1 and Mode 3 are the recommended modes of operation for TRIAC since the gate
sensitivity of the device is high for these modes. Mode 2 and Mode 4 are not recommended since
it is low for these two modes.
A TRIAC is frequently used in many low-power applications such as juice makers, blenders,
Power Switching Devices and Their Characteristics 65
and vacuum cleaners for temperature control, illumination control, and so on. It is economical and
easy to use a single TRIAC when compared to two SCRs connected anti-parallel. However, a TRIAC
has a lower dv/dt capability and a longer turn-off time. It is not available in high voltage and current
ratings.
One of the main problems with TRIAC control is that a reverse voltage is suddenly applied
across the device immediately after it stops conduction. This produces a dv/dt effect on the device,
which is called “reapplied” dv/dt and it can turn-on the device again. This problem is serious with
highly inductive loads. Prevention of this maloperation is possible by using RC snubber circuits. The
TRIAC possesses voltage and current ratings much lower than those compared to conventional
thyristors. At present, TRIACs with voltage and current ratings of 1200 V and 300 A are available.
2.13.2 DIAC
A DIAC is a five-layer, four-junction device as is shown in Fig. 2.44. The acronym DIAC can be
split in to DI and AC. DI stands for two electrodes namely MT1 and MT2. AC indicates its ability
to conduct in both the directions. From this structure, the equivalent circuit can be drawn with two
pnpn devices connected back to back. When T2 is made positive with respect to T1, the device1
(pnpn¢) is forward biased. When the voltage is increased beyond the breakover voltage, the pnpn¢
diode goes from high impedance state to low impedance state. The characteristics of DIAC are
similar to that of SCR forward characteristics without gate facility.
T1 T1
i Conduction region
(positive half cycle)
i
p n’
p
VBO2
n n V -V V
VBO1
p
p
n Blocking
Conduction region region
(negative half cycle)
-i
T2 T2
(a) (b) (c)
Fig. 2.44 (a) Structure, (b) symbol and (c) characteristics of a DIAC.
66 Power Electronics: Devices and Circuits
When T1 is made positive with respect to T2, the device2 (pnpn) gets forward biased. When the
voltage is increased beyond breakover voltage, the current flows from T1 to T2. The characteristic
in the third quadrant is similar to that of first quadrant. The DIAC is used in the triggering circuit
of TRIAC.
The device exhibits the negative resistance characteristics in both directions when it begins to
conduct. This negative resistance region extends over a large range of current values. For this reason,
the device operates in the relaxation mode over a wide range of frequency. It is often used as a
trigger device for TRIACs which require either positive or negative gate pulses to turn on. It also
permits an efficient control of the firing angle in each half cycle of the applied ac voltage (phase
controlled) because of the large time interval permissible between consecutive output pulses from the
relaxation oscillator.
Figure 2.45 shows a simple phase controlled circuit using a TRIAC and a DIAC. During the
positive half cycle (When A is positive), the TRIAC requires a positive gate signal for turning it ON.
This is provided by the capacitor when its voltage is above the breakdown voltage of the DIAC. The
capacitor discharges through the TRIAC gate. When the TRIAC fires, the voltage drop across AB
will be zero and the capacitor voltage will be reset to zero. A similar operation takes place in the
negative half cycle, and a negative gate pulse is applied when the DIAC breaks down in the reverse
direction. By varying the resistance R, the charging rate of capacitor C can be changed and thus, the
firing angle can be controlled.
Load A
R
230 V
50Hz
50 Hz
a.c. supply
C
B
Fig. 2.45 A phase controlled circuit using a TRIAC and a DIAC.
2.13.3 LASCR
It has been already seen that the most convenient method of turning on a forward biased SCR is to
apply a positive gate pulse between gate and cathode. In some special purpose SCRs such as SCRs
used in HVDC transmission, the gate drive is provided by photon-bombardment. The gate is so
designed that it has sufficient gate sensitivity for triggering from practical light sources such as LED.
As far as internal mechanism for turning on is concerned, the process is the same as that of applying
a gate pulse, which increases the minority carrier density in the inner p-layer thereby facilitating the
reverse breakdown of the junction.
Whenever the SCR has to be turned on, the control circuit generates a pulse, which makes the
LED conduct. The light output is coupled to the gate and SCR gets turned on. An LASCR offers
complete electrical isolation between the light triggering source and the SCR and for this reason, it
is preferably used in HVDC transmission systems. The voltage rating of a LASCR could be as high
as 4 kV at 1500 A with light triggering power of less than 100 mW.
Power Switching Devices and Their Characteristics 67
A A
p
G
n
p G
n
K K
(a) (b)
Fig. 2.46 (a) Structure and (b) symbol of a PUT.
A
IA Gate
triggered
G
VAK
K
(a) (b)
Fig. 2.47 (a) Symbol and (b) characteristics of an SUS.
T1
G
B
Fig. 2.48 Reverse conducting thyristor (RCT).
A A A
G G G
K K K
(i) (ii) (iii)
(a)
Fig. 2.49 (a) Symbol of GTO.
Power Switching Devices and Their Characteristics 69
The internal structure of the GTO is shown in Fig. 2.50. Of the four layers, the width of the p2
layer near the cathode is made smaller than the corresponding layer in a conventional thyristor. The
gate and cathode structures are so formed as to maximize the periphery of the cathode and minimize
the separation between their centres. In large GTOs, an inter-digitated gate-cathode structure is
adopted in which cathode emitter consists of many parallel connected ‘n+’ type fingers diffused
into the P-type gate region. This configuration ensures simultaneous turn-on and turn-off of the
whole active area of the chip.
K G
n+ n+ n+ n2
J3
p2
P
J2
n– n1
J1
P+ n+ P+ n+ P+ p1
A
Fig. 2.50 Structure of GTO.
In a particular GTO configuration, p-type layer of the anode region is interrupted at regular
intervals by highly doped n spots (n+) that make contact with both the n base and anode. This
arrangement is referred to as anode shorting or shorted anode structure. This shorted anode structure
reduces the turn-off and forward recovery times compared with conventional thyristors, but at the
expense of reverse voltage blocking ability. A GTO without anode shorting retains the inherent
symmetrical voltage blocking ability of the conventional thyristor.
A A
P1 R P1
n1 n1
P2 P2
n1 n1
G G
P2 P2
n2 n2
K K
(a) (b)
Fig. 2.51 Two-transistor models: (a) without anode shorting and (b) with anode shorting.
In a regular thyristor the current gains of NPN and PNP transistors are large in order to
maximize the gate sensitivity at turn on and to minimize on-state voltage drop. But this pronounced
regenerative latching effect, associated with large values of current gains (alphas) may not be helpful
in a GTO where gate turn-off is required. Internal regeneration has to be progressively reduced for
successful gate turn-off. It is achieved in the GTO by a reduction in the current gain of the PNP
transistor and turn-off is achieved by drawing sufficient current away from the gate. The sequence
of events pertaining to the turn-off process is as follows: when a negative bias is applied at the gate,
excess carriers are drawn from the base region of NPN transistor. Simultaneously, the collector
current of the PNP transistor is diverted into the external gate circuit. Thus, the base drive of the NPN
transistor is reduced and this in turn decreases the base drive of the PNP transistor. This process
continues until the conduction ceases.
I–V characteristics
Typical I–V characteristics of a forward-biased GTO shown in Fig. 2.52 bears close resemblance
with those of the conventional thyristor. However, the latching currents for high powered GTOs are
large, several amperes compared to only hundreds of milliamperes of conventional thyristors of the
same rating. These increased values of latching currents are attributed to the modification introduced
in the internal structure of the GTO to achieve self-commutation. The characteristics show that for
gate current less than the latching current, GTO behaves like a low gain, high voltage thyristor with
considerable anode current. In the reverse biased condition the GTO can block only small voltages
of the order of around 20–30 volts because of (i) anode shorts and (ii) large doping densities on both
sides of base-emitter junction of the NPN transistor.
Power Switching Devices and Their Characteristics 71
Ia
8A I 200 mA
6A SCR operation
4A
2A
Ig < 200 mA
Tr. operation
Anode voltage
Fig. 2.52 Static I–V characteristics of a forward biased GTO.
t
Ig Igr
On
Off
Storage
VAK IA time VAK
Fall
current Tail
Vp current
t
On Off
Fall Tail
time time
Fig. 2.53 Switching characteristics of a GTO.
Note that during turn-off, both voltage and current are high. Therefore, switching losses are
somewhat higher in GTO thyristors. Consequently, GTOs are restricted to operate at or below a
1 kHz switching frequency. If the spike voltage V is large, the device may be destroyed. The power
losses in the gate drive circuit are also somewhat higher than those of thyristor. However, since no
commutation circuits are required, the overall efficiency of the converter is improved. Elimination
of commutation circuits also results in a smaller and less expensive converter.
GTOs may have no reverse voltage blocking capability, or else little 20% of the forward break-
over voltage. New devices are being developed having higher reverse voltage blocking capability.
Therefore, an inverse diode must be used, as shown in Fig. 2.54, if there is a possibility that
appreciable reverse voltage may appear across the device. A polarized snubber consisting of a diode,
capacitor and resistor as shown in Fig. 2.54 is used for the following purposes:
(a) During the fall time of the turn-off process, the device current is diverted (known as
current snubbing) to the snubber capacitor (charging it up).
(b) The snubber limits the dv/dt across the device during turn-off.
Snubber
Although GTOs and thyristor became available at almost the same time, the development of
GTOs did not receive as much attention as that of thyristor. However recently, these devices have
been developed with large voltage and current ratings, and improved performance (4000 V, 3000 A,
5–10 ms GTOs are being used). They are becoming increasingly popular in power control equipments
and it is predicted that GTOs will replace thyristors when force commutation is necessary, as in
choppers and inverters.
C
RL
B
VCE
VCC
RB
E
VBB
of alternating p-type and n-type doping is shown in Fig. 2.56. The thickness and doping level of
each of these four layers are also indicated in Fig. 2.56.
74 Power Electronics: Devices and Circuits
B E
+ –3
10 Pm
19
n 10 cm
14 –3
5–20 Pm p 10 cm
Base
thickness
50–200 Pm n 10
14
cm
–3
250 Pm + 19 –3
n 10 cm
The BJT is a current controlled device and the base current IB controls the collector current IC.
The typical collector current (IC) versus output voltage (VCE) characteristics with the base current (IB)
as parameter are shown in Fig. 2.57. If the base current IB is zero, the transistor is in the OFF state
and behaves as an open switch. On the other hand, if the base is driven hard, that is, if the base
current IB is sufficiently large to drive the transistor into saturation, then the transistor behaves as a
closed switch. This type of operation is illustrated in Fig. 2.57. The operating point moves from the
cut-off region to saturation and back to cut-off from saturation as the transistor switches on and off
alternately. To ensure that the transistor actually operates in the saturation region the base drive
circuit is designed in such a way that
IB
Saturation region
Load line
0 VCC VCE
Cut-off region
Fig. 2.57 Collector characteristics.
Power Switching Devices and Their Characteristics 75
IC max
Cmin (2.35)
IB
where IB and IC are base and collector currents, respectively. Also bmin is the minimum current gain
of the transistor.
The input and output waveforms shown in Fig. 2.58 illustrate the switching operations.
vB
t
iB
t
VBE
t
iCS
ic
t
vCE s
vCC vCC
vCE
t
The current gain, b varies between 5 and 10 while VCE at saturation is about 1–2 V. To
turn-off the transistor, the first step is to force it to come out of saturation state. This is achieved by
removing the accumulated charges from the base region by negative base current. Transistors with
higher voltage and current ratings are known as power BJTs. The current gain beta of a power
transistor can be as low as 10, although it is higher than that of a GTO. For example, a base current
of 10 A is required to keep a 100 A transistor in saturation. Higher current gains can be obtained
using a power Darlington transistor shown in Fig. 2.59. The pair can be fabricated on a single chip
or two discrete transistors can be physically connected to form a Darlington. Current gains in
hundreds can be obtained through this arrangement.
During turn-off transition, the time taken by the transistor to move out of saturation region and
reach the active or linear region is called saturation time. This time is measured from the instant
the base current for switching becomes zero. Longer saturation times result in higher turn-off times
for the transistor. It is possible to keep the transistor under quasi saturation while ON instead of in
deep saturation state by reducing the value of IB. This reduces the switching turn-off time but at the
cost of increased on-state losses.
76 Power Electronics: Devices and Circuits
E
Fig. 2.59 Darlington transistor.
The circumstances that lead the transistors to undergo two phenomena, first, primary breakdown
and next, secondary breakdown are explained using the VCE – IC characteristics shown in
Fig. 2.60. At the forward-blocking condition, the reverse-biased collector junction supports the
applied voltage and a wide depletion layer or space charge layer (SCL) develops across it. If the
supply voltage (VCC) is increased, collector-base SCL becomes wide and it penetrates deep into base
layer to overlap with emitter-base SCL (forward biased). The overlapping of SCL is called punch-
through. At this condition, the collector junction voltage breakdown occurs due to avalanche
multiplication of carriers (like VBO of SCR), created by a high electric field at the collector junction.
This is called first or primary breakdown. The first breakdown is the limit of VCE voltage, the BJT
can sustain when it carries a high collector current. If the junction temperature is within the safe limit,
this breakdown is not destructive. However, if a hot-spot develops because of a non-uniform current-
density distribution, second breakdown occurs. There appears a large drop in VCE for the high
collector current during second breakdown. It results in high power loss in the device leading to
irreparable damage to the device. In general, the phenomenon of the second breakdown is related
to BJT only. Various details of the device are shown in Fig. 2.60.
IC
Second breakdown
First breakdown
IB
Hard saturation
Quasi saturation
VCE
0
Fig. 2.60 VCE – IC characteristics; primary and secondary breakdowns.
The second breakdown can be avoided by control of power dissipation, control of rapid change
in base current at turn-off, use of snubber circuit and keeping switching trajectory (instantaneous
Power Switching Devices and Their Characteristics 77
voltage and current) within the safe operating area (SOA) of the device. Two SOAs namely, forward-
bias SOA (FBSOA) and reverse-bias SOA (RBSOA), are used for this purpose. For reliable
operation of the device, VCE and ICE points must lie within this area.
The SOA shown Fig. 2.61(a) is partitioned into four regions, defined by the limits namely, peak
current limit (ab), power dissipation limit (bc), secondary breakdown limit (cd), and peak voltage
limit (de).
log IC IC
IB = 0
b b
a
c
c
d IB decreasing
0 log V CE e 0 VCE
(a) (b)
Fig. 2.61 FBSOA and (b) RBSOA.
A SOA is confined by second breakdown limit, rated or maximum ICE (ICM) and maximum
thermal dissipation. Moreover, inductive loads cause more power dissipation of the device than in
case of a resistive load. Also, in case of pulsed IC the limit of SOA increases, as there exists a cooling
or idle period in between each on-condition. RBSOA is related with the negative IB as well as VEB.
Below the VCEO level, RBSOA is limited by the maximum IC (rated value) only. However, above
the VCEO level, IC must be under control, which depends upon VEB.
Transistor protection
The BJT must be prevented from experiencing simultaneously high voltage and high current
conditions. If, during turn-off such a condition occurs a hot spot is formed and the device fails due
to thermal run away, a phenomenon known as secondary breakdown. The BJT is protected against
this eventuality by means of polarized snubbers. The effects of this snubber on the turn-off
characteristics is shown in Fig. 2.62(a).
A chopper circuit with an inductive load is considered to explain the effects of snubber circuit
on turn-off characteristics of a power transistor. When the base current is removed to turn-off a
transistor without protective snubber, the voltage across the device, VCE first rises, and when it
reaches the dc supply voltage Vd, the collector current ICE falls. The power dissipation P during the
turn-off interval is also shown in the Fig. 2.62(b) by the dashed line. Note that in these idealized
waveforms, the peaks of VCE and ICE occur simultaneously and this may lead to second breakdown
and failure of the transistor.
78 Power Electronics: Devices and Circuits
IB
IC P VCE
+
Load VCE IC No snubber
VCE VCE
IC
IC IC Small C
R
IC VCE
IC
VCE Snubber
Normal C
IB C IC VCE
– IC
Large C
(a) (b)
Fig. 2.62 (a) A transistor with turn-off snubber and (b) turn-off characteristics.
With the snubber circuit in use, if base current is removed to turn-off the transistor, the collector
current is diverted to the capacitor. The collector current, therefore decreases as the collector-emitter
voltage increases, avoiding the simultaneous occurrence of peak voltage and peak current.
Figure 2.62(b) also shows the effect of the size of the snubber capacitor on the turn-off characteristics.
Transistors do not have reverse blocking capability, and they are shunted by anti-parallel diodes
if they are used in ac circuits. Because base current is required to keep the power transistor in the
ON condition, the power loss in the base drive circuit may be appreciable.
Power transistor of ratings as high as 1000 V, 500 A are available. Power transistor are
becoming increasingly popular in low to medium power applications where they compete
successfully with thyristors and GTOs. However, in the low power region its position is challenged
by the power MOSFET devices. That a power transistor has a low current gain and requires
continuous base drive to maintain the device in the ON state, is a distinct disadvantage when
compared to a thyristor which requires only a narrow trigger pulse to turn it ON. However, power
transistors do not require a commutation circuit that adds to the size and cost of systems such as
inverters and choppers. Power transistors can be operated at high switching frequencies allowing a
reduction in size of the electromagnetic components. The fact that the power transistor cannot
withstand reverse voltage limits its application to voltage fed inverter circuits and choppers.
A power MOSFET is a device derived from FET for use as a fast acting switch, suitable for high
frequency (up to 1 MHz) applications at relatively low power level. Unlike a bipolar junction
transistor, which is current operated, power MOSFET is a voltage controlled, unipolar, majority
carrier device. A power MOSFET has three terminals, namely drain (D), source (S) and gate (G),
corresponding to collector, emitter and base respectively of bipolar transistor. The circuit symbol of
power MOSFET is shown in Fig. 2.63.
Drain and source are its output terminals. The current from the drain to the source is controlled
by a voltage applied to the gate with respect to the source. Being a voltage-controlled device, the
gate input impedance is very high, and essentially no input power is required to maintain the device
in the fully ON state. However, during fast turn-on and turn-off, low power gate current pulses are
Power Switching Devices and Their Characteristics 79
Drain, D +
ID
Integral VDS
reverse
rectifier
Gate, G
IS
–
Source, S
Fig. 2.63 Symbol of power MOSFET.
needed to charge and discharge input gate capacitances. The large impedance permits the power
MOSFET to be directly driven by CMOS or TTL circuits. It is easy to operate power MOSFETs in
parallel because of their positive temperature coefficient of resistance. BJT suffers from second
breakdown. But, power MOSFET is free from this problem. Power MOSFET is of two types:
N-channel enhancement type and P-channel depletion type. Out of these two, N-channel
enhancement type is popular because of higher mobility associated with electrons. In N-channel,
current is due to electrons whereas in P it is due to holes. Obviously electrons have higher mobility
compared to holes inside the silicon crystal. Therefore, it is possible to make devices with higher
ratings in the pellet of same size in the N-channel format. It is OFF with zero gate voltage.
Figure 2.64 shows the commercially most successful structure of Power MOSFET. It is a vertically
oriented four layer structure (n+ p n– n+). An n-type drift layer is grown on a highly conductive n+
substrate. The thickness of n layer determines voltage blocking ability of the device. The p-body
VGS
S S
G
+ + + +
n n n n
p p
Load – –
n n Drift region
+ +
n n Substrate
VDD
Drain Metal layer
Current path
Fig. 2.64 Basic structure of a n-channel power MOSFET.
region is next diffused within the ‘n’ regions and n+ source regions are then diffused within p-body
regions. The gate structure is made with polysilicon or other conducting materials and embedded in
the silicon dioxide insulating layer. The source contact metal spreads over p base and n+ source
regions. A power MOSFET contains innumerable numbers of basic MOSFET cells connected in
parallel on the same single chip of silicon. If the gate voltage is made positive with respect to the
80 Power Electronics: Devices and Circuits
source, and more than the threshold value, a sufficient amount of positive charge is created on the
metal gate, which in turn induces negative charge on the silicon surface beneath the gate oxide. This
forms an induced ‘n’ layer in the p region, thus providing a conductive path in an n-type channel
between n+ source region and the drain region. Current can flow from drain to source through this
n channel. As the gate voltage increases the conductivity of this induced ‘n’ channel is enhanced
and the drain to source current increases. Length of n channel can be controlled and therefore ON
resistance of device can be controlled.
A careful study of the basic structure of the power MOSFET shown in Fig. 2.65 reveals the
existence of a parasitic npn bipolar junction transistor as shown in Fig. 2.65. The p-body acts as the
base, n+ layer as the emitter and n– layer as the collector of this npn transistor. Since source is
connected to both base and emitter, this parasitic BJT is forced to be in cut-off state as the base-
emitter voltage is zero. Also a parasitic diode is observable as shown in the figure. As the source
contact metal short circuits the p-base region to the n+ source, a parasitic diode is formed in the
direction from the source to drain as shown in Fig. 2.65. This internal diode is advantageous as it
can be used for freewheeling purposes in inverters supplying inductive loads. The current flow path
from drain to source via n+, n–, p, n+ is indicated in Fig. 2.65. The conduction of current is due to
the movement of electrons only. Therefore, Power MOSFET is a unipolar majority carrier device.
S S
G
n+ n+ n+ n+
p p
Load npn
n–
BJT
n+
VDD
Output characteristics
Output characteristics of power MOSFET is shown in Fig. 2.66. It depicts the variation drain current
ID as a function of drain source voltage VDS with gate source voltage VGS as a variable parameter.
For low values of VDS the graph is linear indicating constant drain to source resistance. For large
values of VDS the drain current becomes almost constant exhibiting independence from VDS. The
device stays in the cut-off region if VGS is less then VGS (th) i.e. threshold VGS. PMOSFET acts a
switch transiting between ohmic and cut-off regions through the active region.
Power Switching Devices and Their Characteristics 81
ID
Ohmic region Active region
VGS
0 VDS BVDS
Fig. 2.66 Output characteristics.
Switching characteristics
The switching characteristics of the MOSFET are similar to those of the BJT. However, MOSFETs
switch ON and OFF very fast, in less than 50 ns. Their switching losses are almost negligible.
However, conduction (that is, ON state) voltage drop is high and therefore, conduction loss is high.
For example, the conduction voltage drop of a 400 V device is 2.5 V at 10 A, and this drop increases
with temperature and current. Because MOSFETs can switch under high voltage and current
conditions (that is, practically no second breakdown), no current snubbing is required during turn-
off. However, these devices are very sensitive to voltage spikes appearing across them, and snubber
circuits may be required to suppress them.
The MOSFET has a positive temperature coefficient of resistance and the possibility of second
breakdown is almost nonexistent. If local heating occurs, the effect of the positive temperature co-
efficient of resistance forces the local concentrations of current to be distributed over the area,
thereby avoiding the creation of local hot spots.
The safe operating area of a MOSFET is shown in Fig. 2.67. It is bounded by three limits,
namely current limit (ab), the power dissipation limit (bc), and the voltage limit (cd). The SOA can
be increased for pulse operation of the device as shown with a broken line in Fig. 2.67.
ID
a b
10 ms
pulse
DC
operation
d
0 VDS
Fig. 2.67 Safe operating area of power MOSFET.
82 Power Electronics: Devices and Circuits
MOSFETs are still not available in high power ratings while the available ones are those with
ratings of 600 V, 50 A, 50 ns. These devices can be used in parallel to obtain higher current ratings.
PMOSFETs find applications in switching circuits of power ranging from few watts to few
kilowatts. The device is very popular in SMPS and inverters.
(1) Power MOSFET has lower switching losses but its ON-state resistance and conduction
losses are more. A BJT has higher switching losses but lower conduction loss. As a
result, for high frequency applications, power MOSFET is the obvious choice. But at
lower operating frequencies (less than about 10–30 kHz), BJT is a better option.
(2) MOSFET is voltage-controlled device whereas BJT is current-controlled device.
(3) MOSFET has positive temperature coefficient of resistance which makes parallel
operation of MOSFETs easy. If a MOSFET shares increased current initially, it heats up
faster, its resistance rises and this increased resistance causes the current to shift to other
devices connected in parallel. But, the BJT has negative temperature coefficient, so
current sharing resistors are necessary during parallel operation of BJTs.
(4) In MOSFETs, secondary breakdown does not occur because it has positive temperature
coefficient. On the other hand, since BJT has negative temperature coefficient, secondary
breakdown occurs. In BJT, with the decrease in resistance, the current increases. This
increased current over the same area results in hot spots and breakdown of the BJT.
(5) Power MOSFETs, in higher voltage ratings have more conduction losses.
(6) The state-of-the-art MOSFETs are available with ratings up to 500 V, 140 A whereas BJTs
are available with ratings up to 1200 V, 800 A.
The Insulated gate bipolar transistor (IGBT) has been developed as a hybrid power switching device
by combining the attractive features of power MOSFET (high input impedance, voltage control, high
switching speed) and advantages of BJT ( low on state losses, ability to withstand high voltages). The
collector-emitter characteristics of this device is similar to those of BJT, while the control features
are those of power MOSFET. It is a three-terminal device, collector lead C (analogous to collector
of transistor), Emitter lead E (analogous to the emitter of transistor) and a gate lead G (analogous
of gate of the MOSFET). Owing to the introduction of BJT operation, the load-side drain and source
terminals are labelled as collector and emitter, respectively.
The circuit symbol is shown in Fig. 2.68. It is a voltage-controlled device since flow of current
from collector to emitter is controlled by the voltage applied between gate-emitter terminals. It has
a voltage driven MOSFET type gate and therefore has high input impedance. Terminals are labelled
as collector and emitter respectively. Also it has low on-state voltage drop similar to BJT. During
turn on, the IGBT behaviour is more like that of Power MOSFET. During turn-off, the device
behaves more like a BJT. The switching speed of IGBT is significantly lower than that of power
MOSFET but higher when compared to BJT.
Power Switching Devices and Their Characteristics 83
C +
IC
VCE
G
VGE
E –
The IGBTs are manufactured with voltage and current ratings well above what are normally
available in power MOSFETs. With voltage ratings of 1500 V, and current ratings of 1000 A, IGBTs
have replaced BJTs in applications such as ac and dc motor drives, UPS, SMPS and other power
electronics circuits requiring high-switch repetition rates.
SiO2 SiO2
+ +
n n
+ J3
p
J2
–
n
+
n
+
J1
p
C
Fig. 2.69 Basic structure of an N-channel IGBT.
84 Power Electronics: Devices and Circuits
IC
JFET
pnp
MOSFET
npn
RB
E
Fig. 2.70 Equivalent circuit of IGBT.
IGBTs which have equal forward and reverse breakdown voltage are suitable for ac applications.
The PT IGBTs, which have less reverse breakdown voltage than the forward breakdown voltage,
are applicable for dc circuits where devices are not required to support voltage in the reverse
direction.
Power Switching Devices and Their Characteristics 85
Reverse-blocking mode
When a negative voltage is applied across the collector-emitter terminal shown in Fig. 2.69, the
junction J1 becomes reverse-biased and its depletion layer extends into the N–-drift region. The
breakdown voltage during the reverse-blocking is determined by an open-base BJT formed by the
P+ collector/N–-drift/P-base regions. The device is prone to punch-through if the N–-drift region is
very lightly-doped. The desired reverse voltage capability can be obtained by optimizing the
resistivity and thickness of the N–-drift region.
VGE
Reverse
breakdown
0 VCE Forward breakdown
A distinguishing feature of the characteristics is the 0.7 V offset from the origin. The entire
family of curves is translated from the origin by this voltage magnitude. It may be recalled that with
a P+ collector, an extra P–N junction has been incorporated in the IGBT structure. This P–N junction
makes its function fundamentally different from the power MOSFET.
Despite physical similarities, the operation of an IGBT is closer to that of a power BJT than a
power MOSFET. It is due to the P+ drain layer (injecting layer) which is responsible for the minority
carrier injection into the N-drift region and the resulting conductivity modulation.
T°C
IC
0 VGE
Fig. 2.72 Transfer characteristics.
90% VGE
10%
t
IC
90% VCE
VCE , IC
Tail current
td tf t
td
ton toff
The turn-off speed of an IGBT is limited by the lifetime of the stored charge or minority
carriers in the N–-drift region which is the base of the parasitic PNP transistor. The base is not
accessible physically thus the external means cannot be applied to sweep out the stored charge
from the N–-drift region to improve the switching time. The only way the stored charge can
be removed is by recombination within the IGBT. Traditional lifetime killing techniques or an
N+ buffer layer to collect the minority charges at turn-off are commonly used to speed-up
recombination time.
2.17.7 Latch-up
During on-state, the holes injected into the n– drift region from the P+ collector form two paths. Part
of the holes disappear by recombination with electrons from MOSFET channel. Other part of holes
are attracted to the vicinity of the inversion layer by the negative charge of electrons, travel laterally
through the P-body layer and develops a voltage drop in the ohmic resistance of the body. This
voltage tends to forward bias the N+P junction and if it is large enough, substantial injection of
electrons from the emitter into body region will occur and the parasitic NPN transistor will be turned-
on. If this happens, both NPN and PNP parasitic transistors will be turned-on and hence the thyristor
composed of these two transistors will latch on and the latch up condition of IGBT will
have occurred. Once in latch up, the gate has no control on the collector current and the only way
to turn-off the IGBT is by forced commutation of the current, exactly the same as for a conventional
thyristor.
If latch up is not terminated quickly, the IGBT will be destroyed by the excessive power
dissipation. IGBT has a maximum allowable peak drain current (ICM) that can flow without latch up.
Device manufacturers specify this current level in the datasheet. Beyond this current level, a large
lateral voltage drop will activate the thyristor and the latch up of IGBT.
2.17.9 Applications
The IGBT is suitable for many applications in power electronics, especially in pulse width modulated
(PWM) servo and three-phase drives requiring high dynamic range control and low noise. It can also
be used in uninterruptible power supplies (UPS), switch-mode power supplies (SMPS), and other
power circuits requiring high switch repetition rates. IGBT improves dynamic performance and
efficiency and reduces the level of audible noise. It is equally suitable in resonant-mode converter
circuits. Optimized IGBT is available for both low conduction loss and low switching loss.
The main advantage of IGBT over a power MOSFET and BJT are:
1. It has a very low on-state voltage drop due to conductivity modulation and has superior
on-state current density. So smaller chip size is possible and the cost can be reduced.
88 Power Electronics: Devices and Circuits
2. Low driving power and a simple drive circuit due to the input MOS gate structure. It can
be easily controlled as compared to current controlled devices (thyristor, BJT) in high
voltage and high current applications.
3. Wide SOA. It has superior current conduction capability compared with the bipolar
transistor. It also has excellent forward and reverse blocking capabilities.
The main drawbacks are:
1. Switching speed is inferior to that of a power MOSFET though superior to that of a BJT.
The collector current tailing due to the minority carrier causes the turn-off speed to
be slow.
2. There is a possibility of latch up due to the internal PNPN thyristor structure.
The Metal Oxide Semiconductor (MOS) controlled thyristor (MCT) is another hybrid power
semiconductor device which combines the attributes of the MOSFET and the thyristor. It has
recently been introduced in the market. The symbol of the device is shown in Fig. 2.74.
A A
G
G
K K
(a) (b)
Fig. 2.74 (a) Equivalent circuit and (b) symbol of MCT.
The MCT is basically a thyristor which can be turned on and off by a built-in MOSFET type
gate. It has high di/dt (1000 A per microsecond), dv/dt (5000 V per microsecond) ratings, and low
ON state voltage drop (1V) and turn-off time (1.5 microsecond). These superior characteristics
make it an ideal power-switching device and thus, it has a tremendous potential for use in medium
and high power motor drives and power electronic applications. The first generation of MCTs, of
rating 600 V, 75 A are presently available.
The typical ratings of high power devices are shown in Table 2.3.
Power Switching Devices and Their Characteristics 89
In this section, a few gate drive circuits for power MOSFET, IGBT, power BJT and GTO thyristor
devices are discussed. The classification of power semiconductor devices given in Section 1.6 and
Table 1.2 shows that there are differences in the input characteristics of the above devices, the
consideration of which will certainly lead to different driver circuit design for the devices. For
example, the devices belonging to the transistor family need continuous gating signals while those
of thyristor family requires either a single pulse or train of pulses to get turned on. From Section 1.6,
we also understand that some devices are voltage controlled and some are current controlled, an
important consideration in the design of gating circuits.
A GTO behaves as SCR while turning ON but while turning OFF it is totally different from
SCR. The GTO requires a large negative gate current and high power sink for successful
commutation. If we consider a power BJT, the current gain of the transistor is low (5–10) and
therefore the power rating of the driver circuit will be around 20% of the main power circuit.
However, driving a power MOSFET is similar to driving a high impedance capacitive network. A
carefully designed low power driver circuit is suitable to the gate voltage-controlled power
semiconductor devices such as power MOSFET. Therefore, the design of suitable driver circuits for
the above devices takes into consideration the nature of their input characteristics. In general, a
driver circuit has to be electrically isolated from the main power circuit. Unipolar drive signals are
sufficient for normal turn ON and turn OFF of the devices. But for fast turn ON and turn OFF,
bipolar signals are preferred.
+ VDD
LOAD
D
CDS
+ 12 V CGD VDS
0 G
RG
VGG S
CGS
Fig. 2.75 N-channel enhancement type MOSFET with voltage-dependent device capacitances.
The three parasitic device capacitances are: drain to source capacitance (CDS), Gate to source
capacitance (CGS), and gate to drain capacitance (CGD). They are shown in Fig. 2.75. To turn the
device OFF the gate voltage (VGG) is reduced to Zero. Then the drain to source voltage (VDS) rises
to the supply voltage VDD. Therefore, the potential at D swings from 0 to VDD. The capacitance CGD
gets charged through a low-gate source resistance, RG upto VDD. Now if gate drive signal is applied
the device will be turned ON. Ideally the voltage across D and S must reduced to 0 and the terminal
D will drop to ground potential. The decreasing of VDS produces a feedback current, i.e. i = CGD.
dVDS/dt to gate circuit through CGD. This phenomenon is known as Miller effect. Due to charging
and discharging of CGS and due to large swing in gate to drain voltage the gate drive circuit requires
high source and sink capabilities. Both turn-ON time and turn-OFF time are affected by series gate
resistance RG because RG is in series with CGS and CGD.
+ VDD + VDD
LOAD LOAD
+5V + 12 V
D (Pull-up D
+ 12 V TTL IC resistor)
CGD G RG
(a) (b)
Fig. 2.76 (a) CMOS-based driver circuit and (b) connection of open collector TTL-based driver
circuit.
Power Switching Devices and Their Characteristics 91
A configuration for a fast turn on with reduced power dissipation using a TTL IC is shown in
Fig. 2.77. There are pulse transformer-based driver circuits where the pulse transformer provides the
isolation needed to drive different MOSFETs and different voltage levels. The size of the transformer
significantly reduces when the operating frequency is high. An opto-coupler-based electrical
isolation circuit is shown in Fig. 2.78. This circuit is similar to opto-coupler-based electrical driver
circuits for SCR.
+ VDD
LOAD
+ VCC = +5V + 12 V
TTL IC (Pull-up D
resistor)
R G
Q2
Q1 Q2 S
Fig. 2.77 Circuit for fast turn on with reduced power dissipation in TTL.
+ VDD
LOAD
Input gate
control signal
+ 12 V
D
Q2
G
S
di
reverse gate and achieve shorter turn OFF time. Therefore, the commutation circuit is normally
dt
fabricated as close as possible to the gate terminal of GTO.
Load
Driver circuit IA
A
On signal IG(on)
GTO
(1200V,20A)
However, with a shorter turn-off time, the turn-off gain reduces (up to unity). Therefore, the
reverse commutating gate-current must be almost of the same magnitude as the anode current. A
high turn-off gain (over 20) can be achieved at the cost of turn-off switching losses with a slow
di
reverse commutating gate-current (slow ).
dt
SOLVED EXAMPLES
EXAMPLE 2.1 The voltage across the SCR is 1 V when it is conducting (refer Fig. E2.1). It has
a holding current of 2 mA when IG = 0. If the SCR is triggered on by momentary pulse of gate
current, to what value must VA be reduced in order to turn the SCR off?
VA 50Ω
VAK
Fig. E2.1
Solution
Applying Kirchhoff’s voltage law the circuit of Fig. E2.1.
VA ( I AK 50) 1 0
(VA 1)
I AK
50
94 Power Electronics: Devices and Circuits
(VA 1)
2 10 3
50
VA 10 1 1
= 1.1 V
EXAMPLE 2.2 In a thyristor circuit, the initial rate of rise of current is 1000 A/s. Calculate the
minimum duration of the gating pulse if the latching current of the thyristor is 10 mA.
Solution
È 'i Ø
ÉÊ ÙÚ t p 10 mA,
't
È 'i Ø
where É Ù 1000 A/s is the initial rate of rise of current.
Ê 't Ú
È 10 10 3 Ø
tp = É Ù
Ê 1000 Ú
= 10 ms.
Therefore, gating pulse should have a width greater than 10 ms.
EXAMPLE 2.3 For an SCR, the gate–cathode characteristics are given by a straight line passing
through the origin with a gradient of 16 V/A. The turn-on time is 4 ms and the gate current required
is 500 mA. For the gate–source voltage of 15 V, calculate
(a) gate power dissipation.
(b) the resistance to be connected in series with the SCR gate.
Solution
Equation of the load line,
VG = VS – IGRS (a)
Given IG = 500 mA and VG = 15 – 0.5 RS
VG
Load Line
(15,0)
15V
1A 16
Fig. E2.3
Power Switching Devices and Their Characteristics 95
VG = 16 IG (b)
= 8 V for IG = 500 mA
Solving equations (a) and (b),
RS = 14 W
Gate power dissipation = 16 IG2 = 16 ´ 0.5 ´ 0.5.
=4W
EXAMPLE 2.4 The gate cathode characteristics of an SCR are defined by VG = 0.5 + 8IG. For a
triggering frequency of 400 Hz and duty cycle of 0.1, compute the value of resistance to be
connected in series with the gate circuit. The rectangular pulse applied to the gate circuit has
amplitude of 12 V. The thyristor has average gate power loss of 0.5 W.
Solution
Tp
E
T
where d is the duty cycle, Tp is the pulse width, and T is the pulse repetition period.
Given d = 0.1 and 1/T = f = 400 Hz,
Tp = 250 ms
As Tp is more than 100 ms, the dc data can be applied.
VG IG = 0.5 W.
But VG = 0.5 + 8 IG
(0.5 + 8 IG) ´ IG = 0.5
8 IG2 + 0.5 IG – 0.5 = 0
This further gives,
IG = 0.22 A or –0.283 A
Taking IG = 0.22 A
0.5
VG =
0.22
= 2.272 V.
Therefore, VS = VG + IG RS
VS VG
RS =
IG
12 2.272
=
0.22
= 44.22 W.
EXAMPLE 2.5 The gate to cathode characteristics for an SCR are given by VG = 10 IG. Gate–
source voltage is a rectangular pulse of 12 V with 20 ms duration. For an average gate power
dissipation of 0.5 W and a peak gate drive power 5 W calculate,
96 Power Electronics: Devices and Circuits
12 = 10 IG + (IG ´ RS)
(12 10 IG )
RS =
IG
= 7.14 W
To calculate frequency, f
PGav
PGmax =
fTp
PGav
f =
(PG max Tp )
0.5
=
(5 20 10 6 )
= 5 kHz.
Duty cycle, d = f × Tp
= (5 × 103) × (20 × 10–6)
= 0.1
Formulae used:
PGav
(a)
PGm
fTp
1
(b) f
T
Tp
(c) E
T
Power Switching Devices and Their Characteristics 97
PGav
(d)
PGm
E
Here, T = pulse repetition period. For pulse width of more than 100 ms, dc data is applicable.
That is, VGIG = 10 IG2 = 0.5 W
EXAMPLE 2.6 A series thyristor string with ratings 3 kV and 750 A uses thyristors with 800 V
and 175 A rating. Find the number of SCRs to be connected in series and in parallel. Use a de-
rating factor of 30%. Determine the values of R and C of static and dynamic equalizing circuits.
Take the maximum forward blocking current and maximum difference in recovery charge as 8 mA
and 30 m Coulombs respectively.
Solution
750
0.3 1
nP 175
where
nP = number of parallel strings
nP = 6.12 or 6 as nP is close to 6
3000
and 0.3 1
nS 800
(nVD VS )
R
(n 1) I B
(5 800 3000)
(5 1) 8 10 3
= 31.25 kW
(n 1) 'Q
C
nVD VS
(5 1) (30 10 6 )
5 800 3000
0.12 10 6 farad
EXAMPLE 2.7 In a particular application, SCR with voltage and current ratings of 4 kV and
800 A is required. However, SCR with voltage rating of 800 V and current rating of 200 A are only
available. Assuming a de-rating factor of 20%, estimate the number of SCRs to be connected in
series and parallel.
98 Power Electronics: Devices and Circuits
Solution
DRF = 1 – String efficiency
Considering series connection of thyristors
4 103
0.2 = 1 –
nS 800
5
=1–
nS
That is,
5
0.8
nS
5
nS = 6.25 # 7
0.8
Considering parallel connection of thyristors,
800
0.2 1
nP 200
4
1
nP
4
0.8
nP
nP = 5
EXAMPLE 2.8 A 100 A SCR is to be used in parallel with SCR of 150 A rating. The ON state
voltage drops of the two SCRs are 2.1 V and 1.75 V respectively. Calculate the series resistance that
should be connected with each SCR if the two SCRs have to share the total current 250 A in
proportion to their ratings.
Solution
2.1
Forward resistance of 100 A SCR = = 0.021
100
1.75
Forward resistance of 150 A SCR = = 0.00857
150
Equating the voltage drops,
2.1 + 100 re = 1.75 + 150 re
Solving the above equation,
re = 0.007 W
EXAMPLE 2.9 A thyristor has a forward drop of 1 V at negligible ON-state current rising linearly
to 1.9 V for a current of 60 A. Estimate the average power loss in thyristor for a half sine wave
Power Switching Devices and Their Characteristics 99
60 A
VT = 1 + 0.015 IT
0,0 1V 1.9 V 2 V VT
Fig. E2.9
Power loss in the thyristor,
T
1
PAV
T Ô
(VT IT ) dt
0
1Ë Û
T T
dt
TÌ Ô Ô
Ì IT dt 0.015 IT2 dt Ü
Ü
Í0 0 Ý
ITAV 0.015 ITrms
2
È 20Q Ø È 20Q Ø
2
ÉÊ ÙÚ 0.015 ÉÊ Ù
Q 2 Ú
20 1.5 Q 2
= 34.8 W
EXAMPLE 2.10 The latching current of an SCR used in a phase control circuit comprising of an
inductive load of R = 10 W and L = 0.1 H is 20 mA. The input voltage is 230 V at 50 Hz. Obtain
the minimum gate pulse width required for reliable triggering of the SCR if it is gated at an angle
of 45° at every positive half cycle.
Solution
The gate pulse must be applied when the forward current of the SCR reaches 20 mA. Also,
TP > TON.
For small values of currents, obtained immediately after turn on, di/dt can be assumed constant
and equal to di/dt at t = 0.
100 Power Electronics: Devices and Circuits
Therefore,
di 2VS Q
sin at t 0
dt L 4
L 'I 0.1 20 10 3
't # 8 .6 ms
VS 230
The gate pulse width has to be both greater than TON and 8.6 ms.
Solution
PG = VG IG = 0.012 W (a)
VG
= 3 × 103 (b)
IG
Solving (a) and (b),
VG = 6 V
IG = 2 × 10–3 A = 2 mA
The gate source resistance RS is obtained as
Vs VG 10 6
RS 2 k:
IG 2 10 3
EXAMPLE 2.12 The latching current of a thyristor used to switch on a dc supply of 300 V, to
an RL load is 50 mA. R = 60 W and L = 2 H. Can this thyristor be turned on by a 40 ms gate pulse?
If not, find the value of the resistance with which the RL load should be shunted if the thyristor has
to be turned on with this pulse.
Solution
40μs pulse
40 ms pulse
60Ω
300V 60 W R
300 V
2H
2H
Fig. E2.12
The anode current at the end of 40 ms pulse,
VS 300
TP 40 10 6 6 mA
L 2
Power Switching Devices and Their Characteristics 101
This is very much less than the latching current of 50 mA. Therefore, SCR cannot be turned on
with this pulse. For turning on, RL load is to be shunted with R.
È 300 Ø
R=6+ É
Ê R ÙÚ
Anode current with = 50 mA
300
Therefore, R= = 6.82 kW
44
EXAMPLE 2.13 The specification sheet for an SCR gives maximum rms ON state current
as 50 A. If this SCR is used in a resistive circuit, compute its average ON state current rating for
conduction angles of 180°, 90°, and 30° for half sinusoidal and rectangular waves.
Solution
(a) For half sine wave current,
Im
I av 1 cos R1
2Q
^ `
1/2
Ë I m2 Q R1 1 Û
Irms Ì sin 2R1 Ü
Í 2Q 2 4 Ý
(i) For 180° conduction angle, q1 = 0
Im
I av
Q
Im
Irms
2
I rms I m /2 Q
Form factor =
I av I m /Q 2
I rms 50 2
I Tav 31.83 A
FF Q
(ii) For 90° conduction angle, q1= 90°
Substituting for q1 as 90°
Im
I av
2Q
Im
I rms
2 2
I rms I m /2 2 Q
Form factor =
I av I m /2Q 2
I rms 50 2
ITav 22.50 A
FF Q
102 Power Electronics: Devices and Circuits
^ `
1/2
Ë I m2 Q (5Q /6) 1 Û
Irms Ì ( 0.866) Ü 0.0849I m
Í 2Q 2 4 Ý
0.08491 I m
Form factor = 0.0213 I = 3.98
m
50
ITav 12.56 A
3.98
(b) For rectangular wavefrom of current,
(i) For 180° conduction angle,
Im Q Im
I av
2Q 2
I m2 Q Im
I rms
Q 2
Im / 2
Form factor = 2
I m /2
50
ITav 35.35 A
2
(ii) For 90° conduction angle,
I m (Q /2) Im
I av
2Q 4
I m2 Q (2) Im
Irms
2Q 2
Im / 2
Form factor = 2
Im / 4
50
ITav 25 A
2
(iii) For 30° conduction angle,
I m (Q /6) Im
I av
2Q 12
I m2 Q /6 Im
Irms
2Q 2 3
Power Switching Devices and Their Characteristics 103
I m /2 3
Form factor = 2 3
I m /12
50
ITav 14.434 A
2 3
EXAMPLE 2.14 Following are the specifications of a thyristor operating from a supply of peak
voltage 500 V. Repetitive peak current rating of the SCR, IP = 250 A. Also,
È di Ø 60 A È dva Ø 200 V
ÉÊ ÙÚ ; ÉÊ Ù
dt max Ps dt Ú max Ps
Take a suitable factor of safety for these specifications mentioned above. Design a suitable
snubber circuit if the minimum load resistance is 20 W. Take r = 0.65.
Solution
Taking a factor of safety equal to 2, the permitted values are:
IP = 125 A
È di Ø È dva Ø
ÉÊ ÙÚ 30 A/Ps ; ÉÊ Ù 100 V/Ps
dt max dt Ú max
Vs 500 10 6
L 16.667 mH; Take L = 16 mH
[di/dt ]max 30
L 16 10 6
R [ dv/dt ]max 100 10 6 3.2 :
Vs 500
Peak current through the SCR when it is turned on is
= Load current + capacitor discharge current
= 500/20 + 500/3.2 = 181.25 A
As this peak current is more than the permissible peak current of 125 A, the magnitude of Rs
is to be increased. Taking Rs = 6 W,
500 500
Peak SCR current = = 108.3 A
20 6
This current is less than the permissible discharge current of 125 A.
2 2
È 2F Ø È 1.3 Ø
Also, Cs = É Ù L ÉÊ ÙÚ 16 10
6
0.75 PF where damping ratio, e = 0.65
Ê Rs Ú 6
The value of Cs is reduced so that the energy shared in Cs comes down and as a result, its
discharge current is also lowered so that it does not harm the SCR. Cs may be taken as 0.4 mF.
Also, when the switch is closed, 500 V is applied to thyristor, load combination current
through Cs:
104 Power Electronics: Devices and Circuits
dv Vs 500 500
Cs
dt Rs RL 20 6 26
dv 500 1
dt 18 0.4 10 6
= 69.4 V/ms
This is less than the specified maximum value of 100 V/ms. Hence, the choice is correct.
EXAMPLE 2.15 An SCR has half cycle surge current rating of 3000 A for 50 Hz supply.
Calculate its one-cycle surge current rating and I2t rating.
Solution
Let I and Isb be the one-cycle and sub-cycle surge current ratings of the SCR respectively. Then,
equating the energies involved in them, we get
I2 t 2
I sb t
1 1
I2 (3000)2
100 200
I 2121.32 A
I
I 2 t rating I2
2f
1
(2121.32)2
100
45000 A 2 s
REVIEW QUESTIONS
2.1 List the power electronic circuits that use source voltage for thyristor commutation.
2.2 Compare the characteristics of SCR with that of power transistor.
2.3 Define holding current of a thyristor. How does this compare with latching current in
magnitude?
2.4 Draw V–I characteristics of SCR for two different gate currents.
2.5 Define string efficiency of a series/parallel connected SCRs.
2.6 For an SCR, list the various methods of turn-on other than the gate turn-on.
2.7 Compare power MOSFET and power transistor.
2.8 What is the advantage of power Darlington?
2.9 Draw the V-I characteristics of (a) DIAC (b) TRIAC.
Power Switching Devices and Their Characteristics 105
2.36 How does a GTO differ from the conventional SCR? Give its circuit symbol and static
V–I characteristics. Under what conditions does it work as low gain SCR?
2.37 Draw the dynamic characteristics of a SCR during its turn-on and turn-off. Show the
variation if voltage across the thyristor and currents through it varies during these conditions.
2.38 Draw the two-transistor analogy of a SCR and explain its latching operation.
2.39 What are the various methods of turn-on of SCRs, explain?
2.40 Using two transistor analogy, explain how an SCR gets turned-on
((i) when applied anode voltage exceeds the forward breakover voltage and
(ii) when a gate pulse is applied to an already forward biased SCR.
2.41 How is the gate circuit of an SCR protected against spurious triggering?
2.42 Explain clearly the series and parallel operations of SCRs.
2.43 Discuss the need and details of parallel operation of SCRs in ac and dc circuits.
2.44 Draw the V–I characteristics of an SCR and explain its shape. How do these characteristics
change with gate current variation?
2.45 Explain the need for static equalizing circuits and dynamic equalizing circuits for series
connected SCRs.
2.46 Discuss the turn-on and turn-off characteristics of GTO and how it can be turned on and off?
2.47 Discuss the switching characteristics of IGBTs.
2.48 Explain how a power MOSFET can be turned-on and turned-off.
2.49 Discuss the switching characteristics of a power transistor.
2.50 Explain how a power semiconductor can be protected against di/dt and dv/dt.
2.51 Discuss the switching characteristics of power MOSFETs.
2.52 Explain the working of a power diode and their operating characteristics.
2.53 Why is pulse triggering preferred for firing SCRs?
2.54 What are the precautions needed to prevent false turn-on of the SCRs?
2.55 Discuss steady state switching of power transistors.
2.56 Compare power transistors with thyristors.
2.57 Sketch the characteristics of fast-recovery and slow-recovery diodes.
2.58 Explain how a power MOSFET can be turned-on and turned-off.
2.59 Bring out the advantages and limitations of power MOSFETs when compared to other power
semiconductor devices.
2.60 Compare switching characteristics of power MOSFETs and power transistors bringing out the
advantages of one over the other.
Power Switching Devices and Their Characteristics 107
PROBLEMS
2.1 An SCR whose latching current is 50 mA is connected in series with a resistance of 20 ohms
and inductor of 0.5 H. The combination is put across 100 V dc supply. SCR is fired by a pulse
of width 50 ms. What value of a resistance R must be connected in parallel to resistance-
inductance combination to ensure turn-on of the SCR. [Ans. 2.5 kW]
2.2 The latching current of an SCR is 8 mA. It is used in a phase control circuit, comprising an
inductive load of R = 12 W and L = 120 mH. The supply voltage is 230 V, 50 Hz, ac. Obtain
the minimum gate pulse width required for reliable triggering of the SCR if it is gated at an
angle of p/4 in every positive half-cycle. [Ans. 4.2 ms]
2.3 In a thyristor circuit, the initial rate of rise of current is 2000 A/s. Calculate the minimum
duration of the gating pulse if the latching current of the thyristor is 10 mA. [Ans. 5 ms].
2.4 Two SCRs connected in parallel have V–I characteristics (during conduction) as
V1 = 1.0 + 1.1 ´ 10–3 ´ I1
V2 = 0.9 + 0.9 ´ 10–3 ´ I2
Calculate the current they can conduct together without individually exceeding 500 A. How
much equalizing resistance is to be connected in series to ensure that they can conduct
together 975 A? [Ans. 818 A, 0.0069 W]
2.5 The dv/dt rating of an SCR is 200 V/ms. The SCR is to be used in a 400 V maximum power
circuit. An inductor of 20 mH is connected in series with the SCR. Design the elements of
a snubber circuit of the SCR. [Ans. 10 W, 0.1 mF, 20 mH]
2.6 Calculate the number of SCRs, each with a rating 500 V and 75 A required in each branch
of a series parallel combination for a circuit with a total voltage and current rating 7.5 kV
and 1 kA. Assume a de-rating factor of 14%. What would be the string efficiency?
[Ans. Ns = 18, Np = 16, 86%]
2.7 The latching current of a thyristor is 100 mA. Determine the minimum width of the gating
pulse required to properly turn-on the thyristor when it is connected in series with a 64 V DC
supply and 0.05 H inductor. [Ans. 78 ms]
3
AC to DC Converters
3.1 PRELIMINARIES
AC to DC converters take ac supply as input and deliver controllable dc voltage and power to dc
loads as output. They find wide-ranging applications in industries, transportation, power
transmission, and so on. A few important applications of these converters are as follows:
(a) Steel rolling mills, paper mills, printing presses, and textile mills employing dc motor drives
(b) Traction systems working on dc
(c) Electrochemical and electro-metallurgical processes
(d) High voltage dc transmission
The ac to dc converters are primarily phase controlled converters. The important features of
these converters are:
(1) They employ the principle of phase control or Phase Angle Control (PAC) to vary the
output voltage.
(2) They are available in various circuit configurations.
(3) They operate from single-phase ac supply (single phase ac to dc converter) and three-phase
ac supply (three-phase ac to dc converter).
(4) They mainly rectify and can also invert. That is, as inverters they convert dc input to a
constant voltage and constant frequency ac output.
(5) They employ line commutation. Therefore, there is no need for separate commutation
circuits as the line voltage itself is employed for commutating the conducting thyristors.
This means simple converter circuit configurations.
(6) They use diodes and converter grade thyristors, which are relatively cheap.
(7) Trigger circuits provide the trigger pulses at appropriate instants and control the operation
of the converters.
In this chapter, various single-phase and three-phase, phase controlled ac to dc converters are
described. Also, this chapter examines the effect of load and source inductances on their
performance. The performance of the converter circuits with RLE loads is also studied. In addition,
109
110 Power Electronics: Devices and Circuits
basic operating features of dual converters are also presented employing only power circuits. Trigger
circuits are not shown for convenience.
+ v –
vD T
+ –
io io
+ + T +
R +
vs=Vmsinωt vo vs R vo
– – –
io –
(b)
(a)
Vm sinw t
Vmsinωt
vs
0 π 2π wtt
ω
ig
Firing pulses
0
α wtt
ω
vo sina
VVmmsin α
Vm
0
π 2π (2π+α) (4π+α) ωwtt
io Vm/R
π/2
sinαa
VVmmsin
wtt
ω
vT
π 2π 3π 4π wtt
ω
α -Vm
(c)
Fig. 3.1 Single-phase half wave rectifier: (a) diode rectifier, (b) SCR rectifier and (c) waveforms
for SCR rectifier.
It is a well known fact that the diode of Fig. 3.1(a) starts conducting as soon as its anode to
cathode voltage exceeds the cut-in voltage, which is as small as 0.7 V for silicon diodes. That is,
the diode starts conduction at zero voltage crossing of the voltage wave. However, if this diode is
replaced by a thyristor as shown in the Fig. 3.1(b), its conduction can be delayed by delaying the
application of trigger pulse. For a thyristor to start conduction, not only its anode to cathode voltage
must be positive but also a trigger pulse must be supplied to the thyristor gate. The application of
AC to DC Converters 111
trigger voltage at any desired instant during the period when the thyristor is forward biased to
control the magnitude of the dc output voltage is called phase control. In the case of the thyristor
shown in Fig. 3.1(b), the phase control ranges from w t = 0 to w t = p. The phase angle delay
(a) is measured from zero voltage crossing which is the instant when the device would start
conducting if it were a diode.
A firing angle may be defined as that measured from the instant of triggering that gives the
largest average output voltage, or the highest load voltage. If thyristor in Fig. 3.1(b) is fired at
w t = 0, 2p, 4p and so on, the average load voltage is the highest. The firing angle should thus, be
measured from these instants. A firing angle may, thus, be defined as the angle corresponding to
the duration between the instant of triggering that gives the largest average output voltage to the
instant of triggering that gives any desired voltage.
The thyristor T is triggered during every positive half cycle of the wave at an angle a measured
from zero voltage crossing point. That is, the trigger pulse to the thyristor is applied at the gate in
intervals of 2p: a, 2p + a, 4p + a, 6p + a, and so on. The moment the thyristor is switched on, which
is equivalent to the closing of the mechanical switch, the current starts flowing into the load. Until
then, the load voltage and load current are zero and the thyristor is in the blocking state that
corresponds to an open switch. With the thyristor on, load voltage is equal to supply voltage and
load current is equal to the supply current and the thyristor voltage is zero. The instantaneous value
of the load current is given by
vo
io (3.1)
R
and
is = io (3.2)
where is is the supply current.
The thyristor that is turned on at a is turned off at p, when the current becomes zero. This is
because the supply voltage becomes zero at that instant. This commutation or turn-off takes place
because of the supply voltage becoming zero as it crosses into the negative half. Thus, the line
voltage commutates the thyristor. For this resistive load, the thyristor turned on at every positive
half cycle at a, 2p + a, 4p + a, 6p + a, … is turned off at p, 3p, 5p and so on, as the thyristor current
becomes zero at these instants. The thyristor is reverse biased for p radians and forward biased for
aÿ radians between the conduction intervals.
A single-phase half wave circuit using thyristor can also be called single-phase half-wave
controlled rectifier. This produces only one output voltage pulse per cycle in the same way as its
counterpart, that is single-phase half wave rectifier. Therefore, this circuit is sometimes referred to
as single-pulse converter.
Figure 3.1(c) depicts in addition to the supply voltage wave, firing pulses, output voltage,
output current, and voltage across the thyristor as function of time. It is noted that the load current
as well as the supply current is discontinuous since the load is connected to the supply only during
the period a to pÿ in every half cycle.
The dc voltage Vo, which is the average value of the output voltage vo across load R is given
as a function of aÿ as:
1 Ë Q 2Q Û
Vo ÔB V sin X td (Xt ) ÔQ (0)d (X t ) Ü
2Q ÌÍ
m
Ý
Vm
(1 cos B ) (3.3)
2Q
112 Power Electronics: Devices and Circuits
Vo
Io (3.4)
R
Here, Vo and Io are the voltage and current of the dc load. The maximum value of Vo occurs at
a = 0o.
Vm
Vom (3.5)
Q
The output voltage may be given by
Vom
Vo (1 cos B ) (3.6)
2
In some types of loads, one may be interested in rms value of load voltage, Vor. Examples of
such loads are electric heating and lighting using incandescent lamps. The rms voltage Vor in such
cases is given by
Q 0.5
Ë 1 Û
Vor ÌÍ 2Q ÔB Vm2 sin2 X td (X t )Ü
Ý
0.5 (3.7)
Vs Ë 1 Û
ÌÍ(Q a) 2 sin 2B ÜÝ
2Q
Vm
where the supply voltage Vs
2
The value of rms current Ior is
Vor
I or (3.8)
R
The ac power delivered to the resistive load = (rms load voltage)(rms load current)
Vor2
= Vor Ior = = Ior2 R
R
Power delivered to load
Input power factor =
Input volt ampere
Vor
Vs
0.5
1 Ë 1 Û
ÌÍ (Q B ) 2 sin 2B ÜÝ (3.9)
2Q
Since the supply source, thyristor, and the load are in series, the supply current is equal to the
load current. Therefore, the supply current is unidirectional introducing a dc component into the
supply. This is undesirable, as it leads to the magnetic saturation of the transformers in the supply
lines.
AC to DC Converters 113
A a
+ T1
One-phase supply
b' c'
Three-phase
supply
– B
Load b
– +
+ c
C
a'
– T2
– Load +
(b)
(a)
Three-phase input
Load
Load
One-phase
supply
(c) (d)
Fig. 3.2 Converters: (a) Single-phase two-pulse midpoint converter, (b) three-phase six-pulse
midpoint converter, (c) single-phase two-pulse bridge converter and (d) three-phase
six-pulse bridge converter.
Vo sina
VmVmsin α
α
b sinβ b
Vmsin ωwtt
VT
+ – Is,Io
Is Io α γ
T R wωt
VT β
Vs Vo
sinαa
Vmmsin
L
sinbβ
VmVmsin wωtt
-Vm
(a) (b)
Fig. 3.4 Single phase half wave circuit with RL load: (a) circuit and (b) waveforms.
maximum value and then begins to decrease. Though the load voltage is sinusoidal the load current
is non- sinusoidal. At w t = p, Io is not zero even though Vo becomes zero. This is because of the
load inductance L. At some angle b, Io reduces to zero and SCR is turned off and henceforth, it is
reverse biased by the supply voltage. During the period between w t = pÿ and w t = b, the magnetic
energy stored in the inductor is delivered back to the supply. After w t = b, Vo = 0 and Io = 0. At
w t = 2p + a, when SCR is triggered again, Vo is applied to the load causing the load current flow
as explained before. Angle b is called the extinction angle and the conduction angle gÿ is given by
gÿ = (b – a) (3.10)
From Fig. 3.4(b), it is seen that the load current is zero at w t = a, the firing angle and w t = b,
the extinction angle. The instantaneous value of the load current is given by
Ë È R ØÛ
Io
Vm
Ì sin(X t G ) sin(B G ) exp ÉÊ X L (X t B )ÙÚ Ü for aÿ < w t < b (3.11)
Z Í Ý
È XL Ø
where R2 (X L )2 and G tan 1 É
Ê R ÙÚ
Z
The instantaneous value of the load current Io is obtained by solving the equation governing the
conduction period of the thyristor. It is
dI o
L RI o Vm sin X t for aÿ < wt < b
dt
The b value can be found using equation (3.11). At wt = b, Io = 0. Therefore,
Ë R Û
sin(C G ) sin (B G ) exp Ì (C B ) Ü (3.12)
ÍXL Ý
116 Power Electronics: Devices and Circuits
Solving the transcendental Eq. (3.12), b is found. Average value of the output voltage is obtained
from
1 C
Vo ÔB V sin X t d (X t )
2Q
m
Vm
(cos B cos C )
Vo (3.13)
2Q
Since the average voltage drop across the inductor is zero,
Vo
Io
R
Therefore,
Vm
(cos B cos C )
Io (3.14)
2Q R
The load current will have a tendency to flow continuously if the load inductance is very large.
If not, the load current will be discontinuous as shown in the Fig. 3.4.
0 2π 4π wt
ωt
Vo
α
π 2π
wt
ωt
(2π+α)
Io
T Io1 T T wt
ωt
FD T FD
iT,is
ωwt t
Io
vT Io
+ – ifd
iT Io Io1 3π
π 2π
Io
wt
+ (2π+α) (4π+α) ωt
Is T vT
+
R wtc
Vs FD Vo wt
ωt
–
ifd L
Mode I
– Mode II
(a) (b)
Fig. 3.5 Single-phase half wave circuit with RL load and free-wheeling diode: (a) circuit and
(b) waveforms.
AC to DC Converters 117
At w t = p, source voltage Vs is zero and just after that instant it tends to reverse, forward biasing
the free-wheeling diode. Thus, the diode begins to conduct at w t = p and permits the application
of a reverse voltage across the conducting thyristor. Simultaneously, current carried by the thyristor
is transferred to the diode thus, reducing the SCR current to zero. This ensures the turn-off of the
thyristor. The diode connected across the load is referred to as free-wheeling diode (FD). The same
diode is referred to by other names such as flyback diode, commutating diode, bypass diode, and
so on. The load current decays during free-wheeling period but it is assumed that the current does
not become zero at 2p + a, the instant of next triggering, as shown in Fig. 3.5(b). The voltage across
the load is the supply voltage when thyristor is conducting and it is almost zero when the free-
wheeling diode is ON. This means that the load voltage does not reverse at any instant of time
during the operation. The output voltage wave shown in Fig. 3.5(b) resembles the output voltage
wave of Fig. 3.1(c) shown for purely resistive load. Therefore, the average value of the load voltage
is same as given by the Eq. (3.3), which is
Vm
Vo (1 cos B )
2Q
In this circuit, two modes of operation are identified. One mode, which is the conduction
mode, exists when the thyristor is ON and the power flow is from supply to the load. There is another
mode called free-wheeling mode in which energy stored in the inductor is delivered to the load
resistance through the circulating free-wheeling diode current. This is in contrast to the stored
energy in the inductor returning to the source as observed in single-phase half wave circuit feeding
simple RL load. Therefore, it may be concluded that the power delivered to the RL load with a free-
wheeling diode is more for a given firing angle. The use of free-wheeling diode has the following
advantages:
(a) The load current waveform is improved,
(b) The input power factor is increased as the energy stored in the inductor is delivered to the
load instead of going back to the supply, and
(c) The gate is permitted to have control over the thyristor.
where E is the battery voltage and Vm is the maximum value of the supply voltage.
From the Fig. 3.6, it is observed that the load current becomes pulsating due to the presence
of emf E. The load voltage is equal to the supply voltage when the thyristor is in conducting state
and it is equal to E when the thyristor is OFF. Figure 3.6(b) also gives the trigger pulse, load voltage,
load current, and thyristor voltage waveforms.
118 Power Electronics: Devices and Circuits
Vm sin ωt
Vs
E
αc1παc ωw
tt
π 2π 3π 4π
ig
Firing pulses
α
ωw
tt
Vo
Vm E
ωwt t
0
π (2π+α)
VT Is,Io α γ
+ – β
Is Io
T
+ ωwtt
+
R
VT
VV w–E
m msinα -E
ωt c
Vs ωt wt
VVmmsinsin L Vo
– E Bc E ωwt t
Vm+E
E
– [E [E+V sin (βb–πp
+ V mmsin )])]
(a) (b)
Fig. 3.6 Single-phase half wave circuit with RLE load: (a) circuit and (b) waveforms.
The disadvantages of single-phase half wave or single-phase one-pulse converters are overcome by
the use of single-phase full wave or single-phase two-pulse converters. For example, a two-pulse
converter results in lower current ripple factor. By adapting symmetrical triggering, the dc
component that would be otherwise present in the supply lines of single-phase half-wave rectifier
is eliminated. As in single-phase half-wave controlled converters, adjustment of firing angle delay
of the thyristors in single-phase full wave converters can control the output voltage. Single-phase
full wave controlled converters are two-pulse converters. This section discusses the following
converter circuits, namely
(1) Single-phase full wave midpoint thyristor converter
(2) Single-phase full wave thyristor bridge converter
ωwtt
T1 T2 T1 T2
V
vo Van Vbn Van Vbn
3π 4π
vT1 0 π ωwt t
+ – T2 (π+α) (2π+α) (3π+α)
Iioo
a T1 T2 T1 T2
+ T1
vT1 ωwt t
2Vmsinα
– Iio
Load 0
n –
vVoo
+ -2Vm ωwt t
+
vT2
– T2 wtc
0
b -2Vm ωwt t
vT2
+ – 2Vmsinα
(a) (b)
Fig. 3.7 Single-phase full wave midpoint thyristor converter: (a) circuit and (b) waveforms.
and it is turned on at a1 to take the instantaneous output voltage to a positive value. The output
voltage continues to be positive between a1 and pÿ since positive half-cycle of the supply voltage
is connected to the load through T1. Similarly, the output voltage is positive between a2 and 2p.
The average value of the output voltage is given by the expression
2 B Q
Vo Ô Vm sin X t d (X t )
2Q B
2Vm
cos B (3.16)
Q
= Vomax cos a (3.17)
where Vomax is the output voltage corresponding to a = 0.
An observation of the voltage waveforms across the thyristors T1 and T2 reveals that T1 and
T2 block a maximum forward voltage of 2Vm and a reverse voltage of –2Vm. At a1, the thyristor T1
is supplied with trigger pulse; T1 starts conducting since it is forward biased. Turn-on of T1 reverse
biases the already conducting thyristor T2 with a voltage equal to –2Vm sin a and turns-off T2. The
load current flowing in thyristor T2 now is transferred to thyristor T1 making current in T2 zero. As
seen from the graph, the thyristor T2 experiences a reverse bias during the period a to p ensuring
turn-off of thyristor T2. Thus, thyristor T1 commutates T2 during positive half-cycle. In the same
manner, T1 is turned-off during negative half-cycle by turning-on T2. Thus, current commutates
between T1 and T2. Thus the SCRs T1 and T2 are turned-off by the application of ac supply voltage
in the reverse direction, that is, when the anode to cathode voltage is negative. This method of
turning off of the SCRs does not require a separate commutation circuit. As the line or source voltage
is used for commutation, this type of commutation is called source, line or natural commutation.
120 Power Electronics: Devices and Circuits
Being a full wave rectifier, the output voltage of this rectifier feeding resistance load is twice
that of the output voltage of single-phase half wave rectifier feeding resistance load. Therefore, for
resistance load, the output voltage
Vm
Vo (1 cos B ) (3.18)
Q
For the same reason, the output voltage of this rectifier feeding a RL load with free-wheeling diode
is given by
Vm
Vo (1 cos B ) (3.19)
Q
Single-phase full wave bridge converter is equivalent to single-phase full wave midpoint converter.
For both the converters, the output voltage and current waves are same given the same supply
voltage, firing angle, and load parameters. However, bridge type converter (B-2 connection) does
not require an input transformer that is essential for midpoint converter (M-2 connection).
For a given output voltage, the voltage rating of thyristors in the midpoint connection is twice
that of the bridge circuit. The volt–ampere rating of the transformer in the midpoint configuration
is twice that of the load. Therefore, the bridge circuit is preferable unless one of the terminals on
the dc side has to be grounded.
Vs Vo
Vs,V
Io
T1 T3 0
+ π 2π 3π ωt
R Edc α α
– Io
T4 T2
T1, T2 T3, T4 ωt
conduct conduct
(a) (b)
Fig. 3.8 Single-phase bridge rectifier with R load: (a) circuit and (b) waveforms.
T1 and T2 are fired simultaneously at an angle a in the positive half cycle and T3 and T4 are
fired at an angle p + a during negative half cycle. Since the load is purely resistive, the currents
goes to zero at p, 2p, ... The voltage and current waveforms are shown in Fig. 3.8(b). The average
output voltage is represented by Vo in Fig. 3.8(a). The current flow is discontinuous. The average
value of the output voltage is simply twice the output voltage of the half wave rectifier. Therefore,
making use of the output voltage expression for a single-phase half wave rectifier with resistance
AC to DC Converters 121
load, the average load voltage for full wave rectifier is given by
Vm
Vo (1 cos B ) (3.20)
Q
Vo
The average load current = (3.21)
R
T3,T4
T1,T2 T3,T4
On
Vs
0 π π+α
α 2π ωwtt
Vo
2π
0 α π πα wtt
ω
Io
is Io
T1 T3 L Io
0
Vs Vo
+
Is
π 2π ωwtt
Vo
–
T4 T2 R πα Io
w tωt
0 α π 2π
–Is
(a) (b)
Fig. 3.9 Single-phase bridge rectifier with RL load: (a) circuit diagram and (b) waveforms.
2 B Q
Vo Ô Vm sin X t d (X t )
2Q B
2Vm
cos B (3.22)
Q
122 Power Electronics: Devices and Circuits
T4 T2
wωt
– α β Vs
FD
(a) conduction (b)
Fig. 3.10 Single-phase bridge rectifier RL load with free-wheeling diode: (a) circuit, and
(b) waveforms.
The average value of the output voltage for this rectifier is obtained as
Vm
Vo (1 cos B ) (3.23)
Q
As there is no feedback of energy from the load to the supply, the reactive power received from
the supply is reduced by 50% compared to that received for the case of the full-wave rectifier circuit
without free-wheeling diode.
A single-phase full wave bridge converter supplying RLE load is shown in Fig. 3.11(a). Voltage E
corresponds to the battery emf of the load circuit. Thyristor pair (T1, T2) is simultaneously triggered
at a while the pair (T3, T4) is gated together after p radians in each cycle. Load circuit is assumed
to be inductive so as to make the load current Io continuous. When (T1, T2) pair is ON, the output
voltage is same as the supply voltage vab. When (T3, T4) pair is ON, the output voltage is the supply
voltage vba (= –vab). Figure 3.11(b) shows the supply voltage, load voltage, load current, supply
current, and voltage across thyristors T1, T2, T3, T4. The average value of the output voltage Vo is
given by
2Vm
Vo cos B (3.24)
Q
The variation of the output voltage Vo with respect to firing angle a is plotted in Fig. 3.12.
As seen from the plot, the output voltage is positive for values of a less than p /2. The output voltage
becomes negative for values of a greater than p /2. Figure 3.13 depicts the voltage and current
waveforms of the same converter for a value of a greater than p /2. It is noted from Fig. 3.12, the
average value of the output voltage is negative but the current continues to be positive (flows from
top to bottom).
AC to DC Converters 123
Vab Vba
Vs
E
ωwt t
T1 T3 T1 T3
Vo T2 T T
Vab 4 Vba 2
T4
Output voltage
α
Vo
0 ωwt t
Io Current
Outputoutput
current
α π 2π 3π ωwt t
T 3T 4 (π+α) (2π+α) (3π+α)
T1T2 T 3T 4 T1T2 T 3T 4
Is Source current
ωwt t
T1 Io
+ vT1
or vT2 Vmsinα Voltage across T1T2
+ Is T1 T3 R – 0
a -Vm ωwtt
Vs + Vo vT3
b ωtc
– L + or vT4
–
T4 T2 E 0 ωwtt
α -Vm
–
Vmsinα
(a) (b)
Fig. 3.11 Single-phase full wave bridge rectifier feeding RLE load: (a) circuits, and (b) waveforms.
Vo
2Vm
π Semi-converter
Vm
π
Full converter
The operation of the converter takes two different forms depending on whether the firing angle
is less than or greater than p /2. For values of a less than p /2, the converter operates as a rectifier.
During this operation, power flows from the supply to the load. But, by taking a beyond p /2 and
reversing the load circuit emf E, it is possible to transfer the dc power from the battery to the ac
supply as ac power. This is nothing but inversion. Thus, the same converter can operate as a rectifier
as well as an inverter depending on the value of a and the polarity of the dc source, which happens
to be the battery here (refer Fig. 3.13). The converter operating as an inverter makes use of the line
voltage for commutation. Therefore, it is called line-commutated inverter.
124 Power Electronics: Devices and Circuits
Vab Vba
Vs
0
E E ωtw t
T1 T3 T1 T3
Vo T2 T4 T2 T4
α (π+α) (2π+α) (3π+α) Output voltage
ωw
0 Vo tt
A
Io Output current
IT1 IT3
Io
Is T1 T3 L
α
π 2π 3π ωwt t
Vs
R Is Source current
T4 T2 – 0
ωw
Io + E t t
IT4 IT2
T3T4 T 1T 2 T3T4 T 1T 2 T3T4
B
(a) (b)
Fig. 3.13 Single-phase full wave bridge converter as inverter: (a) circuit, and (b) waveforms.
In converter operation, the average value of output voltage Vo must be greater than load circuit
emf E while during inverter operation, load circuit emf must be greater than the average value of
the output voltage.
T1 T2 T1 T2
Vo Vab Vba
α
Vm Vo
0 ω
wtt
Io iT1 iT2 iT1 iT2
+ + ifd
T1 T2 ifd R ωwtt
+ Is
a Vo I ss
Ii (π+α) (3π+α)
Vs b FD
– L 2π 4π
D2 D1 – α π 3π wt
ω
E
– + – (2π+α)
(a) (b)
Fig. 3.14 Single-phase bridge type semi-converter: (a) circuit diagram, and (b) waveforms.
2 Q
Vo ÔB V sin X t (X t )
2Q
m
Vm
(1 cos B ) (3.25)
Q
The variation of average value of semi-converter output voltage as a function of aÿ is shown
in Fig. 3.12. It is seen from the figure that the output voltage reduces from maximum value of
2Vm/p to zero as aÿ varies from zero to p. For a = p /2, the output voltage is zero for full converter
whereas it is 50% of the maximum value for a semi-converter.
Figures 3.15(a) and (b) depict the supply voltage and supply current waveforms of single-phase full
converter and semi-converter respectively. Here, it is assumed that the load inductance L is very
large so that the output current Io is constant and ripple free.
Is Vs Is Vs
Io Io
α Io ωt ωt
Without FD With FD
(a) (b)
Fig. 3.15 Supply voltage and supply current waveforms: (a) full converter, and (b) semi-converter.
126 Power Electronics: Devices and Circuits
The power supplied to the load is given by VoIo, which will be equal to active power input
(neglecting the rectification losses). Therefore, the active power input
Pi = VoIo (3.26)
The input current waveform is rectangular with amplitude equal to Io as shown in Fig. 3.15(a).
The supply current IS can be expressed using Fourier series (for the case without FD) as:
4 1
IS(t) = Io [sin (wt – a) +
sin 3(wt – a) + 1/5 sin 5(wt – a) + …]
Q 3
The fundamental power factor angle is equal to a since the fundamental component of the input
current lags the supply voltage by angle a (refer Fig. 3.15).
Full converter
The average output voltage,
2Vm
Vo cos B
Q
The average output current,
Io = Io
Active power input,
Pi Vo I o
2
( I oVm cos B ) (3.27)
Q
2 2
Fundamental component of the input current (rms) = Io (3.28)
Q
Fundamental power factor angle = firing angle a
2Vm
Reactive power input, Qi I o sin B (3.29)
Q
Pi
Input power factor =
Vs I o
where VS is the supply voltage.
Semi-converter
The average output voltage,
Vm
Vo (1 cos B )
Q
Io = The average output current
Power input,
Pi = VoIo
2 2 ÈB Ø
Fundamental component of the input current (rms) = I o cos É Ù (3.30)
Q Ê 2Ú
AC to DC Converters 127
Fundamental power factor angle = a/2, where aÿ is the firing angle of the semi-converter.
Vm
The reactive power input, Qi I o sin B (3.31)
Q
2(1 cos B )
Input power factor = (3.32)
[Q (Q B )]0.5
Note that the reactive power input to the semiconverter, is only 50% of that of the full converter.
It is to be noted that the flow of load current depends on the load circuit parameters (resistance
and inductance) and the firing angle. It may be stated that the load current will be continuous for
large values of w L/R where L and R are load circuit inductance and resistance respectively. Also,
higher load voltages corresponding to smaller firing angles result in continuous flow of load
currents.
Three-phase ac to dc converters are preferred for high power dc loads. These converters are also
phase controlled as are single-phase ac to dc converters. The various types of three-phase converters
that are studied in this section are:
(1) Three-phase half wave converter,
(2) Three-phase fully controlled rectifier or three-phase full converter,
(3) Three-phase half controlled rectifier, and
(4) Three-phase dual converter.
Three-phase half wave converters are rarely used in industries because they introduce dc
components in the supply current. Semi-converters and full converters find wide industrial
applications as dc motor drives and dc power sources. Further, three-phase dual converters are used
when reversible dc drives with high power ratings are required. The advantages of three-phase
converters over single-phase converters are as under:
(1) In three-phase converters, the ripple frequency may be three or six times that of single-phase
converter. Consequently, the filtering requirement for smoothing out the load current is
reduced.
(2) As the load current is mostly continuous in three-phase converters, the dc motor
performance when three-phase converters are used, is superior compared to single-phase
converter fed dc motors.
(3) Three-phase converters are more suited for high power dc drives from the power system
point of view as they provide uniform loading of all the three phases.
128 Power Electronics: Devices and Circuits
3π
0 π
2π π
2π wtt
ω
6 π 3
3
(a) Three-phase supply voltage
O
Vo va vb vc va vb
α=0
120º
π wωt
6
Load voltage for 0 ≤ α ≤ π
Vo 6
A a
T1 120º
Three-phase
wtt
a.c. supply
R Io ω
α
n p Load voltage for α > π
B Vo 6
c bT
2
C T3
wωt
α
(a) (b)
Fig. 3.16 Three-phase half wave rectifier: (a) power circuit diagram and (b) input and output
voltage waveforms.
Figure 3.16(b) depicts the output voltage waveforms for various firing angles. It may be noted
that thyristor T1 experiences the highest positive anode voltage in the interval p/6 to 5p/6. In that
interval, it can be made to conduct by giving a firing pulse to its gate. T1 continues to conduct
until the next thyristor T2 is turned ON at any angle in the interval 5p /6 < w t < 3p/2. When T2
starts conducting, the load current transfers from T1 to T2. Similarly, T2 is turned off when T3 starts
conducting. When one SCR is conducting, the other two cannot conduct. The firing angle is
measured with respect to point O as shown in Fig. 3.16(b). The range of control is from a = 0 to
a = 5p/6. The load voltage waveforms are shown in the Fig. 3.16(b) for a = 0, a < p/6 and a > p/6.
It may be noted that the load voltage becomes maximum for a = 0. The load voltage waveform
corresponds to that of three-phase half wave converter using three diodes instead of thyristors. The
output voltage and current becomes discontinuous for a > p/6 for resistance loads.
The output dc voltage Vo for 0 £ aÿ £ p/6ÿ is given by
5Q /6 B
3Vph, m
Vo Ô sin X t d (X t )
2Q Q/6 B
3 3 Vph,m
cos B (3.33)
2Q
AC to DC Converters 129
where Vph,m is the maximum input phase voltage. Here, the voltage and current are continuous.
For the range p /6 < a < 5p /6,
Q
3Vph, m 3Vm Ë È QØÛ
Vo
2Q Ô
B Q /6
sin X t d (Xt ) Vo
2Q ÌÍ
1 cos É B Ù Ü
Ê 6ÚÝ
(3.34)
Series RL load
If the load circuit inductance is large, the load current can be assumed to be continuous as shown
in Fig. 3.17(b). The expression for the output voltage for this continuous conduction is:
B 5Q /6
3 3 3VPh, m cos B
Vo Vph, m Ô sin Xt d (X t ) Vo
2Q
(3.35)
B Q /6
2Q
a Vo α
ia = iT1
T1
0 π
π 2π wωt
ib b Io Io 6 +α Load current
6
n Io + Io
T2 0
iT1
π 2π wωtt
Load
ic c vo Ia Current in T1
T3 0
– π
+α
5π
+ α 2π 3π wωtt
6 6
(a)
(b)
Fig. 3.17 Three-phase
Fig. 3.17half
Threewave
phaserectifier
half wavesupplying RL load:RL(a)
rectifier supplying circuit and (b) waveforms.
load
iA T1 T3 T5 R
A
B Vvoo
C
L
T4 T6 T2
E
–
voltage is maximum negative conducts. T1, T3 and T5 form the positive group while T2, T4, and T6
form the negative group. The type of commutation employed in these converters is line or source
commutation. That is, when a thyristor is turned on, this incoming thyristor turns off the conducting
thyristor of its own group. The firing frequency is six times the line frequency, that is, thyristors
are triggered at 60° intervals. As a result, corresponding to one cycle, there are six output pulses
each of 60° duration. Therefore, it is also called a six-pulse converter. The firing angle of a particular
thyristor in the top half is measured from the instant when its anode voltage becomes maximum
positive. Similarly, the firing angle of a thyristor in the bottom half is measured from the instant
when its cathode voltage attains maximum negative value. This is illustrated by means of pointing
arrows in the waveforms of Fig. 3.19 corresponding to a = 0 condition. Figure 3.19 shows input
and output voltage waveforms along with their conduction periods for aÿ = 0 and aÿ = 60. The input
Vs 120º
vc
va vb vc va
T1 T3 T5 T1 T3
Vmp
0 E
ωwt t
α = 0º
T2 T4 T6 T2 T4
120º
T55
T TT11 T
T33 T
T55 T
T11 +VE Group
TT66 TT22 TT44 T
T66 TT2 2 –VE Group
T1 Vab T3 Vbc T5 T1
Vs
1.5Vmp 1.5Vmp 1.5Vmp 1.5Vmp
0
1.5Vmp 1.5Vmp 1.5Vmp 1.5Vmp 1.5Vmp
wtt
ω
VVcbab Vac
T6 T2 T4 T6 T2
α = 60º
TT55 TT11 TT33 TT55 T
T11 Top half
T
T22 TT66 TT22 T
T44 TT66 Bottom half
Vo
Vca Vcb Vab Vac Vbc Vca Vcb Vab Vac Vbc
0
1.5Vmp ωwtt
Fig. 3.19 Waveforms and thyristor conduction periods (phase voltages).
AC to DC Converters 131
waveforms represent phase voltages. The conduction pattern of SCRs is expressed through six modes
each mode lasting for 60°. The six modes along with the firing sequence are given in Table 3.1.
RL load
Here, it is assumed that the inductance L is so large that the load current is continuous. The
conduction of SCRs follows the pattern given in Table 3.1. Thyristors are triggered at an angle of
aÿ measured from the reference point and are, as usual, line commutated. Phase voltage waveforms
132 Power Electronics: Devices and Circuits
and the conduction patterns for a = 0 and aÿ= 60° are shown in Fig. 3.19. Output voltage waveforms
as derived from the line voltages are shown in Fig. 3.20 for different firing angles a.
α1 = 0º α2 = 0º
Vs
T1 T2 T3 T4 T5 T6 T1 T2
Vcb Vab Vac Vbc Vba Vca Vcb Vab Vac
α = 0º Vm E
0 π 2π 3π ωwtt
The expression for the output voltage of the converter in continuous conduction can be written
as:
3Vlm
Vo cos B (3.38)
Q
The expression for the output voltage given in Eq. (3.38) is derived as follows:
Let the phase voltages be written as
Van = Vm sin wt
Vbn = Vm sin (w t – 2p /3)
Vcn = Vm sin (w t – 4p /3)
AC to DC Converters 133
Vo
Therefore,
2Q
3 B
Vlm sin X t d (X t )
Q ÔQ3 B
3
Vo
3Vlm Ë È 2Q Ø ÈQ ØÛ 3Vlm
Ì cos É B Ù cos É B Ù Ü cos B (3.39)
Q Í Ê 3 Ú Ê 3 Ú Ý Q
The source current for phase A flows for 120° for every 180°. Therefore, in case output current is
assumed constant at Io, the rms value of source current is
2Q 1 2
Io Io2 ¹ Io (3.40)
3 Q 3
Each SCR conducts for 120° for every 360°. Therefore, the rms value of thyristor current is
2Q 1 1
ITh I o2 ¹ Io (3.41)
3 2Q 3
Io
The average value of the output current =
3
converter is taken beyond p /2, the average value of the output voltage becomes negative and it is
possible for the dc power from the battery be delivered into the ac supply. It should be noted that
the direction of current for both converter and inverter operations remains fixed but the polarity of
the output voltage reverses. In other words, it is necessary that the positive terminal of the battery
is connected to the positive converter terminal and negative terminal of the battery to the negative
terminal of the converter. The voltage and current waveforms for a three-phase full converter for
a = 90°, 150° are shown in Fig. 3.20. The average value of the output voltage and output current
for a = 90° are zero whereas the output voltage is negative for a = 150° while the output current
remains positive. The variation of output voltage with firing angle a is as indicated in Fig. 3.12.
0
α 120º α wωt
α = 15º T3 T1 T2 T3 T1 Top half
D2 D3 D1 D2 D3 Bottom half
120º
iIoo
0
T1 T2 T3 T1
wωtt
α α α α vac
vcb vac vba vcb
α = 60º
0
120º wωt
T3 T1 T2 T3 Top half
D2 D3 D1 D2 Bottom half
T3 α=90º T1 α=90º T2 α=90º T3 α=90º T1
+
0
α = 120º α = 120º α = 120º α = 120º
wωtt
Vvoo
T1 T2 R α = 120º
iA T3 E
vcb vac vba vcb
A 0
wωtt
90º
B FD
C L vVoo F T3 F T1 F T2 F T3 F
D D2 D D3 D D1 D D2 D
D1 D2 D3 Iio
o
E
–
0
(a)
π 2π 3π wωtt
(b)
Fig. 3.22 Three-phase semi-converter: (a) circuit, and (b) waveforms.
AC to DC Converters 135
three or bottom three SCRs of the full converter by diodes. SCRs are gated at an interval of 120°
in a proper sequence. A three-phase semi-converter is also referred to as three-phase half controlled
bridge rectifier. The voltage and current waveforms for various firing angles are shown in Fig. 3.23.
A three-phase semi-converter has a unique feature of working as a six-pulse converter for
a < 60° and as a three-pulse converter for a ³ 60°.
Vo O' Vo O’ A’ π
π – α +α
π/2 2
Vac 2
Vab
Vcb α Vac Vbc Vcb α
Vab Vbc
b
c c
b e
d d
a f
π – α π/2 ωwt t a α wtt
ω
O
2 2π π/6
3 O A
(a) 2π/3
(a) (b)
Fig. 3.23 An output voltage waveform for: (a) a > p/3 and (b) aÿ < p/3.
The output voltage Vo for values of a < p/3 is
3Vlm
Vo (1 cos B ) (3.42)
2Q
The output voltage Vo for values of aÿ > p/3 is given by
3Vlm
Vo (1 cos B ) (3.43)
2Q
The three-phase semi-converter cannot operate as a line commutated inverter because the output
voltage cannot become negative. Another important thing to be noticed is that in the semi-converter
only if the firing angle a is greater than p/3, free wheeling taken place.
During the commutation period (when both incoming and outgoing SCRs are conducting
together), the output voltage is equal to the average value of the conducting phase voltages. For
a single-phase converter, the load voltage will be zero and for a three-phase converter, the load
voltage is (va + vb)/2 (average value of the conducting phases a and b). The commutation period
in seconds is also known as the overlap angle in degrees or radians. The effect of source inductance
is investigated in this section for both single-phase and three-phase full converters.
(b)
(b) (c)
Fig. 3.24 Single-phase full converter with Ls: (a) circuit, (b) equivalent circuit and (c) waveforms.
From Fig. 3.24(c), it is observed that during commutation all the four thyristors conduct
simultaneously for a period called overlap period, the corresponding angle being referred to as
overlap angle or commutation angle. Regarding overlap period shown in Fig. 3.24(c) following
observations can be made,
(a) The output voltage is zero during this period.
(b) Commutation overlap occurs twice per cycle, once T3 and T4 are turned on to commutate
T1 and T2 and again when T1 and T2 are turned on to commutate T3, and T4. These
commutation overlaps cause reduction in the output voltage.
Current through the outgoing pair of SCRs gradually falls to zero, forcing the current in
the incoming pair to rise gradually to Io from zero value. During the commutation of (T1, T2)
and (T3, T4), that is, during the overlap angle m, Kirchhoff’s voltage law for the loop abcda of
Fig. 3.23(b) gives
AC to DC Converters 137
di1 di2
v1 Ls v2 Ls (a)
dt dt
or
È di di Ø
v1 v2
Ls É 1 2 Ù (b)
Ê dt dt Ú
It is seen from Fig. 3.24(c) that if v1 = Vm sin w t, then v2 = –Vm sin wt. Therefore,
È di di Ø
Ls É 1 2 Ù 2Vm sin Xt (3.44)
Ê dt dt Ú
As the load current is assumed constant throughout, i1 + i2 = Io
di1 di2
Differentiating, 0. (3.45)
dt dt
di1 di2 2Vm
From Eq. (3.44), sin X t (3.46)
dt dt Ls
Addition of Eqs. (3.45) and (3.46) gives
di1 Vm
sin X t (3.47)
dt Ls
Load current i1 through thyristor pair (T1 and T2) builds up from zero to Io during the overlap
angle m, that is, at w t = a, i1 = 0 and
at w t = (a + m), we obtain i1 = Io
From Eq. (3.47),
Io Vm (B N )/X
Ô di1 Ô sin X t dt
0 Ls B /X
or
Vm
Io [cos B cos (B N )] (3.48)
X Ls
It is seen from Fig. 3.24(c) that output voltage Vo is zero from a to (a + m). Thus, the average
output voltage Vo is given by
Vm B Q Vm
Vo
Q ÔB N sin Xt d(Xt ) Q
[cos(B N) cos (B Q )]
Vm
[cos B cos(B N )]
Q (3.49)
Vo
2Vm
cos B
X Ls Io (3.50)
Q Q
138 Power Electronics: Devices and Circuits
cos B
X Ls I cos (B N )
o
Vm
Vo
2Vm
cos (B N)
X Ls I
Q Q o (3.51)
2Vm ω Ls
Slope = – π
π cos α Vo
Vo = 0, μ = π
2V
Vm
Iioo = ωL cos α
s
0 Io
(a) (b)
Fig. 3.25 (a) Equivalent circuit, and (b) Vo versus Io.
Io
+
Io
T1 T3 T5
Ls
A L
Ls o
B Vo a
C d
Ls
T4 T6 T2
–
(a)
AC to DC Converters 139
Va Vb Vc
Vo T1 T3 T5 T1
m wt
T2 T4 T6 T2
T5,T1 T1,T3 T3,T5 T5,T1
T5 T1 T3 T5 T1
T6 T2 T4 T6
T6,T2 T2,T4 T4,T6 T6,T2
Io Io Io Io Io
wt
m
Io Io Io Io Io
wt
2,3,4
1,2,3
3,4,5
5,6,1
5,6,1
5,6
6,1,2
2,3
3,4
6,1,2
6,1
6,1
4,5,6
5,6
1,2
4,5
Fig. 3.26 Three-phase full converter with source inductance: (a) circuit, and (b) waveforms.
It is observed from the figure that during commutation the output voltage is the mean of the
outgoing voltage and the incoming voltage. The currents in the thyristors rise and decay in an
exponential manner due to source inductance. The conduction of thyristor groups including overlap
is 5–6, 5–6–1, 6–1, 6–1–2, 1–2, 1–2–3, 2–3, 2–3–4, 3–4, 3–4–5, 4–5, 4–5–6, 5–6, and so on.
Following observations are made regarding this phenomenon:
(a) The number of thyristors involved in overlap is three, so long as the overlap angle is less
than 60°.
(b) There are six shaded areas indicating six commutations per cycle of source voltage.
(c) The overlap reduces dc output voltage.
The average value of the fall in output voltage can be found from the areas of six triangles such
3X Ls
as jkl and so forth over a period of 2p as: Io
Q
The output voltage with overlap can be shown equal to
3Vlm 3X Ls
Vo cos B Io
Q Q (3.52)
application of dual converter is the speed control of dc motor drives. It provides reversible dc
voltages for speed reversal. A schematic arrangement of a dual converter and its characteristics are
shown in Fig. 3.27. It is clear from the characteristics that the voltage across the load as well as the
current through the load is reversible. That is, a dual converter can operate in all the four quadrants
and therefore, it is rightly called as four-quadrant converter. Single-phase and three-phase dual
converter circuits are shown in Fig. 3.27.
Converter 1 Load Converter 2
+
Vo T11 T13 T22 T24
A L A
–Io Io o
B a Vo B
d
T23 T21
T14 T12
–Vo –
(a) (b)
Load
Converter 1 Converter 2
+
T11 T13 T15 T22 T26 T24
A L A
vo o
B a B
C d C
T25 T23 T21
T14 T16 T12
–
(c)
Fig. 3.27 (a) Four-quadrant diagram, (b) single-phase non-circulating type dual converter, and
(c) three-phase dual converter.
The firing angles of both the converters are controlled in such a manner that their average
output voltages are equal in magnitude and have the same polarity. This can happen only if one
converter is operating as a rectifier and the other as an inverter. This is achieved by adjusting the
firing angles of the two converters such that their sum is 180°. That is,
a1 + a2 = 180° (3.54)
where
a1 = Firing angle of the positive converter and
a2 = Firing angle of the negative converter
For example, if a1 = 45° the converter 1 operates in the rectifier mode and acts as the positive
converter. Then a2 = 135° converter 2 operates in the inverter mode and acts as the negative
converter.
There are two modes of operation of a dual converter, namely the
(1) Non-circulating current mode and
(2) Circulating current mode
AC to DC Converters 141
+ –
Vr
Reacter
Reactance
+ L/2 L/2 + +
+ T22 T24 T11 T13 T15 T22 T26 T24
T11 T13
A L A A L A
Vo1 o Vo2 B Vo o B
a V a
B o B C C
d d
T23 T21 T25 T23 T21
T14 T12 T14 T16 T12 –
– – –
144424443 144424443
14243 14243
1 (a) 2 1 (b) 2
converter operates in the rectifier mode and the other in the inverter mode. Their average output
voltages are equal. However, there is a difference in the instantaneous values of these output
voltages causing a circulating current through the converters. To reduce the circulating current, it
is necessary to include a coil of inductance Lc (Fig. 3.29) in the circulating current path. The load
is connected to the centre tap of the coil.
If the reversal of the output voltage polarity is required, the firing angles of the two bridges
are changed simultaneously such that converter 2 operates as a rectifier and converter 1 as an
inverter. The polarity of the output voltage will be the same as that of the rectifier. The internal
voltage of the inverter must be close to but smaller than the dc output voltage. This is to ensure
that the circulating currents between the two converters are minimized. The main advantage of the
circulating current scheme is the rapidity with which the phase reversal of the output current can
be obtained. However, this produces a continuous flow of circulating current between the two
converters, resulting in increased power losses. Also, the input power factor obtained is poor. A
similar scheme is also used for cycloconverters for ac to dc conversion.
142 Power Electronics: Devices and Circuits
a = 60°
V s Vcb Vab Vac Vbc Vba Vca Vcb Vab Vac
wt
a = 120°
V 01 Vca Vcb Vab Vac Vbc Vba Vca Vcb Vab
wt
V 02 Vab Vac Vbc Vba Vca Vcb Vab Vac
wt
V0
wt
Vr Reactor voltage
wt
ic
wt
io
Io wt
i1
wt
i2
wt
Fig. 3.29 Voltage and current waveforms for a circulating current type dual converter.
In this section series operation of two single phase semiconverters and single phase full converters
are studied.
+ +
NP :2NS T1 T3
io
i1
i+ +
NS VS
– Dm V01
T4 T2
NP
–
VP LOAD Vo
+
T4
T3
i2
+
NS VS
– Dm V02
–
T4
T2
–
–
Fig. 3.30 Single phase series semiconverters.
In two-converter system, one converter is operated to obtain output voltage from 0 to Vom/2 while
the other converter is bypassed through its freewheeling diode. To vary the output voltage from
Vom/2 to Vom, one converter is fully turned on (a1 = 0) and the delay angle of other converter, a2
is varied. Figure 3.31 shows the output voltage, input current to converters, and input current from
the supply when both the converters are operating with a highly inductive load.
The average output voltages of two semiconverters are:
Vm
For converter 1 Vo1 = (1 + cos a1)
Q
Vm
For converter 2 Vo2 = (1 + cos a2)
Q
where Vm is the maximum value of the input voltage.
The resultant output voltage of converters is
Vm
Vo = Vo1 + Vo2 = (2 + cos a1 + cos a2) (3.55)
Q
The maximum average output voltage for a1 = a2 = 0 is Vo = 4 Vm . If converter 1 is operating:
0 £ a1 £ p and a2 = p, then Q
Vm
Vo = Vo1 + Vo2 = (1 + cos a1) (3.56)
Q
144 Power Electronics: Devices and Circuits
Vo
Vn = = 0.25(1 + cos a1) (3.57)
Vm
Vo
Vn = = 0.25(3 + cos a2) (3.59)
Vm
V
0 B2 Q QB2
Vo1
0 B2 Q
Vo2 Vdc
0 B2 Q Q
B2
Vo V0
i B2
0 Q QB2
Ia 1
I0
0 0 Idc
Q
Ia i2 ia
QB2
B2 Q
–ia i ia
Ia/2
0
–Ia/2 B2 Q QB2
–Ia
Ia
io
0
Fig. 3.31 (a) Waveforms of single phase series semiconverters and (b) quadrant.
NP :2 NS + +
iS T1 T3
++ i1 io = ia
+
Ns V s Vo1
–
T4 T2
Np –
Vo Load
Vp +
T1 a
T3 a
i2
+
Ns V s Vo2
–– –
T4
a
T2 a
– –
voltage, output voltage, input current to the converters, and input supply current. We can notice
that the input supply current is similar to that of semiconverter. As a result the pf of this converter
is improved. However, it is less than that of series semi converter.
In the inversion mode, one converter is fully retarded, a2 = p, and the delay angle of the other
converter, a1, is varied from 0 to p to control the average output voltage.
The average output voltages of two full converters are:
2Vm
For converter 1 Vo1 cos B1
Q
2Vm
For converter 2 Vo 2 cos B 2
Q
The resultant average output voltage is
2Vm
Vo = V01 + V02 = (cos B1 cos B 2 ) (3.60)
Q
The maximum average output voltage for a1 = a2 = 0 is Vom = 4 Vm . In the rectification mode,
Q
a1 = 0 and 0 £ÿa2 £ p, then
2Vm
Vo = V01 + V02 = (1 cos B 2 ) (3.61)
Q
146 Power Electronics: Devices and Circuits
vs
v = Vm sin Xt
0 B2
vo1
vo1
0
vo2
0
vo2
vo
vo Vo
Vdc
0
i1
Ia
io
0 0 idc
i1
–Ia
i2 –Vdc
Ia
i2 (c)
0
–Ia 0
Ia
Ia
is is Ia
0
0
io –Ia
Ia –Ia
0
(a) (b)
Fig. 3.33 (a) and (b) waveforms for single-phase series converters and (c) quadrant.
Vo
Vn = = 0.5(1 + cos a2) (3.62)
Von
In the inversion mode, 0 £ a1 £ p and a2 = p; then
2Vm
Vo = Vo1 + Vo2 = (cos B1 1) (3.63)
Q
And the normalized average output voltage is
Vo
Vn = = 0.5(cos a1 – 1) (3.64)
Von
series to produce an effective 12-pulse output by introducing a phase shift of 30° between their input
transformer secondary windings. A 30° phase shift between secondary windings can be
accomplished by connecting one secondary in star and the other in delta. The configuration shown
in Fig. 3.34 represents two, three phase bridge converters connected in series to produce 12-pulse
output.
a Ia
n
c
Load
aa
ca ba
The generation of gating signals for thyristors of ac to dc converters involves the following steps.
(1) Zero crossing detection of the input voltage.
(2) Phase shifting of the signals to the required value.
(3) Pulse shaping to generate pulses of short duration.
(4) Pulse isolation through pulse transformers or preferably opto-couplers.
The block diagram incorporating the various stages of the firing circuits for a single-phase fully
controlled rectifier in the above sequence is shown in Fig. 3.35.
The synchronizing transformer steps down the supply voltage to an appropriate level. The input to
this transformer is taken from the same source from which the converter circuit is energized. The
output sine voltage v1 of the synchronizing transformer is integrated to get the cosine wave v2. The
dc control voltage Ec varies from maximum positive Ecm to minimum – Ecm so that firing angle may
be varied from 0°–180°. The cosine wave v2 is then compared in comparators 1 and 2 with Ec and
148 Power Electronics: Devices and Circuits
L
T1 T3 o
a
d
Vvss
T4 T2
+
C Vcc
–
+Vcc Pulse
transformers
Vg1
–Vcc
Fig. 3.35 Block diagram for a thyristor gating circuit.
–Ec. When Ec is high as compared to v2, output voltage v3 is available from the comparator 1.
Same is true for comparator 2. So the comparator 1 and 2 give the output pulses v3 and v4
respectively. It is seen from this figure that the firing angle is governed by the intersection of v2
and Ec. When Ec is maximum, firing angle is zero. Thus, the firing angle a in terms of V2m and Ec
can be expressed as:
V2m cosa = Ec (3.65)
Þÿa = cos–1(Ec/V2m) (3.66)
where V2m = maximum value of cosine signal v2.
The signals v3 and v4 obtained from the comparators are fed to the clock pulse generators
1, and 2 to get clock pulses v5 and v6. These signals v5 and v6 energize a JK flip-flop to generate
output pulses vp and vq. The signal vp is amplified using the circuit shown and is employed to turn-
on the SCRs in the positive half cycles. Signal Vq is used to trigger SCRs in the negative half cycle.
For a single-phase full converter, average output voltage is given by
2Vm
Vo cos B
Q
AC to DC Converters 149
Vo = kEc (3.68)
This shows that the cosine-firing scheme provides linear transfer characteristics between the
average output voltage Vo and the control voltage Ec. This scheme, on account of its linear transfer
characteristics, improves the closed loop response of the converter system. This feature has made
the cosine-firing scheme quite popular. Figures 3.36 and 3.37 depict the diagrammatic
representation and waveforms, respectively, of the cosine wave firing scheme.
Synchronising
Transformer v2
Compara- v3 Clock pulse
Integrator tor 1 generator 1
v1 V5
JK vp
Ec FLIP
V6
-Ec FLOP vq
Compara- v4 v6
Clock pulse
Inverter tor 2 generator 2
+Ecm
Ec
-Ecm
Fig. 3.31 Cosine wave firing scheme
Fig. 3.36 Cosine wave firing scheme.
SOLVED EXAMPLES
EXAMPLE 3.1 A thyristor is connected in series with a resistance of 100 W and an ac supply
of 230 V at 50 Hz. Compute the average current and power delivered if the thyristor is triggered
at 45° in every positive half-cycle.
Solution
Average voltage,
Vm
Vo (1 cos B )
2Q
230 2
(1 cos 45)
2Q
88.35 V
150 Power Electronics: Devices and Circuits
v1 Vm sin wt
p 2 p 3 p 4 p wt
v2
V2m
–E c
+Ec wt
0
v3
a a
0 wt
v4
a a
0 wt
v5
a
0 wt
v6 2 p+a
0 wt
p +a 3p +a
vp
a
0 wt
vq 2 p+a
0 3 p+a
wt
p+ a
Fig. 3.37 Cosine wave firing scheme—waveforms.
Average current,
Io = Vo/R
= 88.35/100
= 0.8835 A
rms voltage,
sin 2B ÞÛ
1/2
Vs Ë 1 Î
Vor = Ì Q Ï(Q B ) 2 ßÜ
2 Í Ð àÝ
1/ 2
230 Ë 1 Î sin 2(45) Þ Û
= Ì ÏQ 45 ßÜ
2 ÍQÐ 2 àÝ
= 155.0557 V
rms current,
Vor
Ior =
R
= 155.05/100
= 1.55 A
Power delivered to the load = I2or R
= (1.55)2 ´ 100
= 240.47 W
AC to DC Converters 151
EXAMPLE 3.2 If the SCR in Fig. 3.38 is continuously fired by a dc signal, what will be the
average value of the current i(t)?
10 W
10Ω
i(t)
i(t)
330 sin 314 t 165 V
Fig. 3.38
Solution It is seen from the Fig. 3.38 that the SCR is turned on when Vm sin a1 = E and is turned
off when Vm sin a2 = E, where a2 = p – a1. The average value of the charging current is given as
1 Ë Q B
Io
2Q R ÌÍ ÔB Vm sin Xt E d (Xt ) ÛÜ
Ý
a1 = sin–1(165/330)
= p /6
B 2 Q B1
5Q / 6
1
Io Ë 2Vm cos B1 E B 2 B1 ÛÝ
2Q R Í
1 Ë ÈQØ È 4Q Ø Û
Ì 2 330 cos É Ù 165 É Ù Ü
(2Q )10 Í Ê 6Ú Ê 6 ÚÝ
1
(2Q )10
>571.56 345.57@
3.6 A
Power supplied to the battery
EIo = 165 ´ 3.6
= 594 W
EXAMPLE 3.3 A single-phase half wave controlled rectifier circuit is fed by a transformer whose
secondary voltage is 325 sin wt. It supplies a resistance load of 20 W for the firing angle of 45°,
calculate
(a) dc voltage Vo and current Io
(b) rms voltage Vor and current Ior
(c) the dc power Pdc, the ac power Pac and rectification efficiency (Pdc /Pac)
(d) form factor and ripple factor
(e) VA rating of the transformer and transformer utilization factor (TUF)
(f) PIV of the thyristor
152 Power Electronics: Devices and Circuits
Solution
325
(a) Vo 1 cos 45 = 88.3 V
2Q
Therefore,
88.3
Io 4.415 A
20
1/2
Vs Ë 1 Û
(b) Vor ÌQ B 2 sin 2B Ü from Eq. (3.7)
2Q Í Ý
1/ 2
325 Ë È QØ 1Û
Ì ÉÊ Q 4 ÙÚ 2 Ü
2 Q Í Ý
= 154.938 V
Ior = 7.746 A
(c) The dc power = VoIo = 88.3 × 4.415 = 389.84 W
The ac power = VorIor = 154.94 × 7.75 = 1200.785 W
Rectification efficiency = Pdc/Pac = 0.3246
154.938
(d) Form factor = 1.754
88.3
389.84
=
1781.6
= 0.2188
(f) Peak inverse voltage = Vm = 325 V
EXAMPLE 3.4 If the SCR shown in Fig. 3.38 is continuously fired by a dc signal as shown in
Fig. 3.39, calculate
(a) the average value of the current i(t).
(b) power supplied to the battery.
(c) power dissipated in the resistor.
(d) power factor of the supply.
AC to DC Converters 153
10 W
10Ω
Fig. 3.39
Solution
(Q R1 )
1 Ë Vm sin (X t ) Eb Û
(a) Average value of i(t), Io =
2Q Ô Ì Ü d (X t )
R1
Í R Ý
1
2Q R
>2Vm cos R1 E (Q 2R1 )@
=
Q R1
1
Ô >V sin(X t ) Eb @ d (X t )
2
2Q R 2 m
R1
1
Ë Q 2R1 Vs2 Eb2 Vm2 sin 2R1 4Vm Eb cos R1 Û
2Q R Í 2 Ý
ËÈ 2Q Ø Q QÛ
1
2Q 10 Í 2
2 2
Ì ÉÊ Q 6 ÙÚ 233 165 330 sin 3 4 330 165cos 6 Ü
2
Ý
= 121.618
154 Power Electronics: Devices and Circuits
EXAMPLE 3.5 A single-phase full wave bridge converter is connected to a 20 W resistance load.
Estimate the average load voltage, average load current, and rms load current for a triggering angle
of 30° if the supply voltage is 230 V at 50 Hz. Also find average and rms values of thyristor currents.
Solution
Vm
Average output voltage, Vo (1 cos B )
Q
230 2
(1 cos 30)
Q
193.2 V
Vo 193.2
Average load current, Io = 9.66 A
R 20
sin 2B Û
12
Vs Ë
rms load voltage, Vor Ì Q B 2 Ü 226.6 V
QÍ Ý
rms load current, Ior = Vor/R = 11.33 A
9.66
Average value of thyristor current = 4.83 A
2
11.33
rms value of thyristor current 8.012 A
2
EXAMPLE 3.6 A single-phase bridge rectifier using four SCRs feeds power to RLE load with
R = 10 W, L = 100 mH, and E = 100 V. The ac source voltage is 230 V at 50 Hz. Assuming
continuous conduction, calculate the average value of load current, given the firing angle delay is
equal to 45°.
Solution
The average value of the output voltage Vo is given by the expression,
2Vm
Vo cos B
Q
2 230 2
Vo cos 45
Q
= 146.38 V
AC to DC Converters 155
Io = (Vo – E)/R
= (146.38 – 100)/10
= 4.638 A
Solution
2Vm
Average load voltage, Vo = cos B
Q
2 230 2
cos30
Q
= 179.3 V
Vo 179.3
Average load current, Io = 89.65
R 2
rms value of the input current, IS = Io
Fundamental component of the input current,
IS1 = (4Io /p)/ 2
= (2 2 /p) Io
= (2 2 /p) ´ 89.65
= 80.71 A
Active Power
PF =
Apparent Power
Vo I o
=
Vs I s
V
= o
Vs
= 0.7795
Solution
Vm
Average load voltage, Vo (1 cos B )
Q
230 2
(1 cos 45)
Q
176.6 V
Vo E
Average load current, Io =
R
176.6 10
=
5
= 33.32 A
Active power
Input power factor =
Apparent power
2
I or R Eb I o
=
Vs I s
5884.3
= 0.7678
7663.6
EXAMPLE 3.9 Input voltage to a fully controlled SCR bridge rectifier is 230 V (rms) at 50 Hz.
A resistance of 50 W with a large inductance forms the load. If the triggering angle is 30°, calculate
(i) average voltage across 50 W resistor.
(ii) rms value of current through each SCR.
Solution
2 Q B
(i) Average voltage, Vo Ô Vm sin X t d (X t )
2Q B
2Vm
cos B
Q
2 230 2 cos30
179.29 V
Q
Average voltage across 50 W resistor = Vo = 179.29 V
Vo 179.29
Average current, Io 3.58 A
R 50
For a highly inductive load, the load current wave can be assumed constant and ripple free.
AC to DC Converters 157
230 V,
50 Hz
Fig. 3.40
EXAMPLE 3.11 The input voltage to a single-phase thyristor bridge is 230 V. An average load
current of 5 A flows through the load for the firing angle of 45°. Assuming constant ripple free load
current, calculate
(i) dc output voltage, the active and reactive power inputs.
(ii) the values in (i) when a free-wheeling diode is connected across the output for the same
load resistance and firing angle.
(iii) If a thyristor T3 is damaged and gets open circuited, the average load voltage and the
current. Assume same load resistance, firing angle and free-wheeling diode across the load.
Solution
2Vm 2 230 ÈQ Ø
(i) Vo cos cos É Ù 146.5 V
Q Q Ê 4Ú
Active power (Pi) = VoIo = 146.5 ´ 5 = 732.5 W
2Vm ÈQØ
Reactive power (Qi ) sin É Ù I o
Q Ê 4Ú
2 230 1
5 = 732.5 VAR
Q 2
158 Power Electronics: Devices and Circuits
146.5
(ii) The load resistance 29.3 :
5
Vm 230 2
Vo 1 cos B (1 0.707) = 177 V
Q Q
177
Io 6.04 A
29.3
Pi = 177 × 6.04 = 1069 W
Vm 230 2
Qi I o sin B 6.04 0.707 442 VAR
Q Q
(iii) If thyristor T3 is open, the circuit behaves as a half wave controlled circuit.
Vm 230 2
Vo (1 cos B ) 1 0.707 = 88 V
2Q 2Q
88
Io 3.02 A
29.3
EXAMPLE 3.12 A three-phase fully controlled thyristor bridge converter is connected to a highly
inductive load with a resistance of 20 W. The supply voltage is 400 V, 50 Hz. Determine the average
load voltage and average load current for a trigger angle of 30°.
Solution
Being a highly inductive load, the load current is continuous.
3Vlm
Therefore, Vo cos B
Q
Substituting for, Vlm = 400 2
EXAMPLE 3.13 A three-phase full converter is fed by a 400 V, 3 phase, 50 Hz supply. The
average load current is 100 A. Assuming a highly inductive load, find for a firing angle of 60°,
Solution
3Vlm
(i) The output voltage, Vo = cos B
Q
where Vlm 400 2 V
a = 60°
Thus,
3 400 2 cos 60
Vo 270 V
Q
Output power = 270 ´ 100 = 27000 W
2Q
I
3 I
(ii) Average thyristor current = 33.33 A
2Q 3
2Q
100 2
rms thyristor current = 3 100
57.735 A
2Q 3
Peak current through the thyristor = Average load current = 100 A
(iii) Peak inverse voltage = 2 400 V
= 565.6 V
EXAMPLE 3.14 A three-phase fully controlled thyristor bridge is connected to a highly inductive
load with a resistance of 60 W. Determine the average load voltage, average load current, and input
power factor for a trigger angle of 30°. The input supply voltage is 400 V, 3 phase. Assume the load
current is ripple free.
Solution
The average value of output voltage,
3Vlm
Vo cos B
Q
3 400 2
= cos 30
Q
= 467.734 V
Vo 467.734
Io 7.8 A
R 60
Power delivered to the load = 7.82 ´ 60 = 3650 W
EXAMPLE 3.15 A three-phase half controlled bridge converter is feeding a resistive load of
50 W. The supply voltage is 400 V at 50 Hz. For a trigger angle of 45°, estimate the average load
voltage and average load current. Also draw the converter circuit and load voltage waveforms.
Solution
3Vm
Vo (1 cos B )
2Q
Vo 460.98
Io 9.22 A
R 50
Solution
The dc source may be a battery which is getting charged.
Output voltage of the converter, Vo = the dc source voltage + drop in the 1 W internal resistance
= 400 + (20 × 1)
= 420 V
3Vlm 3X Ls
Vo cos B Io
Q Q
3 400 2 3 2Q 50 5
420 cos B
Q 1000
ÀB 33.58
3 400 2 3 2Q 50 5
420 cos (B N) 20
Q 1000
(a + m) = 42.78°
m = 42.78° – 33.58° = 9.2°
Thus,
a = 33.58° and m = 9.2°
AC to DC Converters 161
Solution
3 400 2 1 3X Ls
360 Io
Q 2 Q
Ls = 7.3 mH
360
Load resistance = 36 :
10
3 400 2 3X Ls
300 cos (B N ) 10
Q 100
cos(a + m) = 0.63
m = 6°
REVIEW QUESTIONS
3.1 Write the expression for the average output voltage of a single-phase full converter.
3.2 Compare half controlled and fully controlled converter circuits.
3.3 What are the advantages of using a free-wheeling diode in the converter circuit?
3.4 What is the minimum firing angle at which free-wheeling diode starts conduction in a three-
phase half controlled converter circuit?
3.5 What is the input power factor value of single-phase semi-converter?
3.6 How is continuous current flow maintained through converter loads at large firing angles?
3.7 A single-phase 200 V, full converter, is triggered at a firing angle of 120° and the load
current is maintained at 10 A. Neglecting the losses, find the power fed back to the supply.
3.8 What are the two modes of operation of a dual converter?
3.9 What is the relationship between the firing angles of two converters forming the dual
converter?
3.10 What is the output voltage for a triggering angle a = 90°, in a single-phase 230 V, half
controlled converter?
3.11 What are the effects of overlap in a fully controlled rectifier?
3.12 List the factors on which commutation overlap angle depends in fully controlled converters.
3.13 Why is the power factor of a semi-converter better than that of full converter?
162 Power Electronics: Devices and Circuits
3.14 What is the ripple frequency of the output voltage of (a) single-phase full wave rectifier,
(b) three-phase half wave rectifier, and (c) three-phase bridge rectifier.
3.15 What is the effect of source inductance on the output voltage of the converter?
3.16 Explain how a single-phase full wave bridge converter can be constructed using (i) a single
SCR, (ii) two SCRs, and (iii) four SCRs. Compare their characteristics.
3.17 Draw the power circuitry for a single-phase half controlled converter and explain its
operation with relevant waveforms. Derive the expression for average load voltage assuming
continuous current operation.
3.18 Derive the expression for mean voltage output and active and reactive power inputs of a
single-phase full converter.
3.19 Explain how a dual converter fed dc motor drive is both reversible and regenerative.
3.20 Derive expression for output voltage of a single-phase fully controlled converter
i(i) without free-wheeling diode and
(ii) with free-wheeling diode.
3.21 With a neat circuit diagram and waveforms, explain the operation of a full wave single-phase,
SCR rectifier using centre tap transformer secondary and feeding a highly inductive load.
3.22 Compare single-quadrant and two-quadrant thyristor converters in terms of circuit
differences, device costs, and operating characteristics.
3.23 Discuss the principle of phase control for thyristors with respect to a single-phase half wave
circuit with RL load.
3.24 What is the use of free-wheeling diode in the RL load? Explain the change in voltage
waveform due to free-wheeling diode.
3.25 Explain briefly phase control of SCRs. Plot the variation of the output voltage of a single-
phase, semi-converter as a function of firing-angle a. Assume ripple free load current.
3.26 Draw the circuitry for a fully controlled thyristor bridge converter and explain its operation
with suitable waveforms. Derive an expression for average output voltage.
3.27 Explain the effects of source inductance on the operation of thyristor converters.
3.28 (a) Explain the operation of a thyristorised single-phase fully controlled bridge with
constant load current (neglecting the source impedance) with waveforms of supply
voltage, output voltage, and thyristor current.
(b) Explain a scheme to generate triggering signals for this bridge.
3.29 Explain the operation of a fully controlled thyristor bridge converter as a rectifier as well
as a line commutated inverter. Draw the necessary waveforms. Also derive the expression
for the average load voltage of such a converter.
3.30 Discuss any two methods for improving the input power factor of thyristor converters.
3.31 Explain with necessary waveforms, the operation of a single-phase half controlled thyristor
converter. Also derive an expression for the input power factor.
AC to DC Converters 163
3.32 Explain with necessary waveforms, the operation of a single-phase midpoint converter with
RL load. Also derive an expression for the average output voltage.
3.33 Explain the effects of source impedance on the performance of a single-phase full converter.
3.34 Derive an expression for the average output current of a single-phase half wave controlled
converter circuit feeding an RL load.
3.35 (a) Explain the operation of a half controlled thyristor bridge converter with RLE load with
circuit diagram and waveforms.
(b) Draw and explain a microprocessor based triggering circuit for single-phase fully
controlled thyristor converter.
3.36 A single-phase fully controlled bridge converter is feeding a highly inductive load.
A free-wheeling diode is present across the output. Derive an expression for the output dc
voltage.
3.37 Explain the operation of a single-phase half controlled thyristor converter with inductive
load. Also derive an expression for the average load voltage.
3.38 (a) Explain the operation of a line commutated converter, which can function as a rectifier
and also as an inverter.
(b) Discuss the design considerations for converter equipments.
3.39 (a) Explain the operation of a half controlled thyristor bridge converter with necessary
waveforms. Also derive an expression for the average load voltage.
(b) Discuss a trigger circuitry for generating control pulses for the above converter, bringing
out the necessity of synchronization and isolation circuits.
3.40 Explain with neat diagrams and waveforms how a half controlled rectifier differs from a fully
controlled rectifier. Describe a trigger circuit using the UJT for a single phase half controlled
thyristor converter.
3.41 (a) Derive an expression for the input power factor of a single phase fully controlled
thyristor converter assuming a constant load current.
(b) Draw the power circuit diagram of a dual converter and explain its operation.
3.42 Discuss the effects of source inductance and load inductance on the operation of thyristor
converters.
3.43 With the help of waveforms, explain the working of a fully controlled SCR bridge rectifier
as a converter.
3.44 Explain the operation of half-controlled thyristor bridge converter with necessary waveforms.
Also derive an expression for the average output voltage and input power factor.
3.45 Draw the power circuitry of a half-controlled thyristor bridge converter and explain its
operation with suitable waveforms.
3.46 Obtain an expression for the average output voltage of a 3-phase fully controlled bridge
converter in terms of a line to neutral voltage and firing angle.
164 Power Electronics: Devices and Circuits
3.47 What is a free-wheeling diode? How does it work? What are its functions in converter circuit?
Also show that free-wheeling action is inherent in a single-phase half controlled bridge
feeding an inductive load.
3.48 What are advantages and disadvantages of series connected converters? Explain a single
phase series connected semiconverter.
3.49 Explain the operation of single phase series connected full converter.
3.50 Explain using the diagram how a 12-pulse converter is obtained using two six pulse
converters in series. Mention the applications of 12-pulse converter.
PROBLEMS
3.15 A three-phase half controlled bridge converter is feeding a resistive load of 50 W. The supply
voltage is 400 V at 50 Hz. For a trigger angle of 45°, estimate the average load voltage and
average load current. Also draw the converter circuit and the load voltage waveforms.
[Ans. 461 V, 9.2 A]
3.16 A three-phase fully controlled bridge converter is supplied from 400 V, 50 Hz, three-phase
mains and operates at a firing angle 45°. If the current on load side is constant at 8 A and
the load voltage is 320 V, calculate the source inductance and overlap angle. Derive the
relevant formula. [Ans. 25.75 mH, 16.41°]
3.17 A full-wave bridge type circuit is designed with the transformer having a turns’ ratio of 10:1,
the primary voltage being 220 V. Analyze the circuit assuming load resistance to be 100 W.
Determine
i(i) the ripple factor and
(ii) dc power at load side.
3.18 A three-phase, half controlled thyristor converter is connected to a load consisting of a
resistance of 5 W, inductance of 1 H and emf of 100 V. Estimate the average load voltage,
average load current, and average thyristor current for a trigger angle of 60° assuming
continuous current operation. The supply voltage is 400 V, 50 Hz.
[Ans. 405 V, 61.01 A, 20.33 A]
3.19 A three-phase fully controlled thyristor bridge converter is connected to a highly inductive
load with a resistance of 20 W. The supply voltage is 400 V, 50 Hz. Determine the average
load voltage and average load current for a trigger angle of 30°.
[Ans. 467.73 V, 23.38 A]
3.20 A single-phase fully controlled thyristor bridge converter is connected to a load consisting
of 5 W resistance, 0.1 H inductance and 60 V emf. The supply voltage is 230 V at 50 Hz.
For a trigger angle of 30°, estimate the average load voltage, average load current and
average thyristor current assuming continuous current operation.
[Ans. 179.33 V, 23.866 A, 11.933 A]
3.21 A single-phase fully controlled thyristor converter feeds a highly inductive load with a
resistance of 15 W. The input ac supply is 230 V at 50 Hz. Determine the average load
voltage, average load current, and input power factor for a trigger angle of 30°.
[Ans. 179.33 V, 11.95 A, 0.78]
3.22 A three-phase half controlled bridge converter is feeding a resistive load of 50 W. The supply
voltage is 400 V at 50 Hz. For a trigger angle of 45°, estimate the average load voltage and
average load current. Also draw the converter circuit and the load voltage waveform.
[Ans. 461 V, 9.22 A]
3.23 A three-phase fully controlled converter is fed from a 3-phase, 400 V, 50 Hz mains for a firing
angle of 60°, output current is levelled at 25 A and output voltage is 250 V. Calculate the
load resistance, source inductance and angle of overlap.
[Ans. 10 W, 2.667 mH, 4.8°]
4
AC to AC Converters
4.1 PRELIMINARIES
The ac to ac converters convert fixed ac input voltage into variable ac output voltage. There are
two types of ac to ac converters:
the ac voltage controllers (ac voltage regulators) and
cycloconverters.
AC voltage controllers convert fixed ac voltage directly to a variable ac voltage at the same
frequency whereas cycloconverters convert input power at one frequency directly into output power
at a different frequency. But both are single stage converters using line commutation. However, there
are forced commutated ac choppers and load commutated cycloconverters also. This chapter
provides a brief description of the operation of a few important ac voltage controller circuits and
cycloconverter circuits.
AC voltages applied across electrical loads can be continuously varied by means of ac voltage
controllers. They are thyristor-based circuits introduced between constant voltage ac mains and ac
loads, requiring variable ac voltage. A block schematic of a basic ac voltage controller is depicted
in Fig. 4.1.
AC voltage
controller
~ o
a
d
+ + +
D1 + T2
Vm sin wt Vo R Vm sin wt Vo R
– – – –
(a) (c)
V1 V1
0 Input p Input
p 2p wt voltage 0 2p 3p 4p w t voltage
V1 V1
0 2p Output 0
p Output
a p a wt voltage 2p 3p 4p w t voltage
(b) (d)
Fig. 4.2 AC voltage controllers: (a) unidirectional, (b) its input and output waveforms,
(c) bidirectional and (d) its input and output waveforms.
in Fig. 4.3(a) employs four diodes and one thyristor. For this circuit, isolation between control and
power circuits is not necessary. The scheme shown in Fig. 4.3(b) uses two diodes in addition to the
two thyristors. In this scheme, the two thyristor gates can be tied together and so also two cathodes,
so that there is only one pair of terminals for the gate drive of both thyristors. This may be
convenient from the point of view of control circuit design. The circuit depicted in Fig. 4.3(c) uses
one TRIAC, which is equivalent to two thyristors connected in anti-parallel. This configuration is
suitable for low power applications. Here also, the triggering circuit need not be isolated from the
power circuit.
D1 D3
D1 D2
I MT2 MT1
T1 T2 G
D2 D4 K
G
(a) Fig.(b)
4.2 (f) (c)
Fig. 4.3 Other single-phase ac voltage controllers.
170 Power Electronics: Devices and Circuits
p 2p 3p
wt
ig1
a
wt
ig2
wt
Vo p+a 3p + a
+ vT1 – a wt
T1 2p + a
T1 T2 T1
Is Io Io,Is
wt
+ T2 +
Vs – vT2 + Vo RR vT1
wt
– –
Voltage drop
across T1
vT2
wt
p 2p 3p
(a) (b)
Fig. 4.4 (a) Single-phase ac voltage controller with R load and (b) voltage and current waveforms.
Thyristors T1 and T2 are forward biased during positive and negative half cycles respectively.
During positive half cycle, T1 is triggered at a firing angle a and during negative half cycle T2 is
triggered at a firing angle (p + a). T1 starts conducting at a and the source voltage is applied to
the load from a to p. At p both Vo and Io fall to zero. Immediately after p, T1 is subjected to reverse
bias and, therefore, it is turned off. During negative half cycle, T2 is triggered at (p + a). T2 starts
conducting from (p + a) and source voltage is applied to the load from (p + a) to 2p. At 2p, both
AC to AC Converters 171
Vo, and Io fall to zero. Immediately after 2p, T2 is subjected to a reverse bias, and therefore, it is
turned off. This cycle repeats with T1 getting triggered at (2p + a) again. Load and source currents
have the same waveform as the load and source are series connected.
T1 is forward biased between 0 and a making vT1 = Vs as shown in Fig. 4.4(b). From a, T1
conducts, reducing vT1 to a conduction voltage drop of about 1 V. After p, T1 is reverse biased by
source voltage, therefore vT1 = Vs from p to (p + a). From (p + a) to 2p, T2 conducts. T1 is therefore
reverse biased by the conduction voltage drop across T2 which is also about 1 V. The voltage
variation vT1 across T1 is shown in Fig. 4.4(b). Similarly, the variation of voltage vT2 across T2 can
also be drawn. In Fig. 4.4(b), voltage drops across the thyristors during conduction are purposely
shown magnified to highlight the mutual application of reverse bias by T1 and T2.
For this resistive load case, the firing angle a can be varied from 0 to p resulting in the variation
of the output voltage from Vs to 0.
The waveforms of supply and load currents of Fig. 4.4(b) shown for the resistance load exhibit
non-sinusoidal nature. The presence of harmonics in the supply and load currents is harmful for the
source as well as the loads if the loads happen to be ac motors, such as single-phase induction
motors. The harmonics merely increase the heating of the winding without producing useful torque.
For heating and lighting loads, however, both fundamental and harmonics are useful in producing
the ac controlled power. In such applications, knowledge of rms value of the output voltage, Vor
is necessary to calculate the ac power delivered to the load. The expression for rms value of the
load voltage, Vor is obtained as follows:
1 Q
V 2 sin2 X t d (X t )
Q ÔB m
Vor2
Therefore,
1/ 2
Ë1 Î 1 ÞÛ
Vor Vs Ì Ï(Q B ) sin 2B ß Ü (4.1)
ÍQ Ð 2 àÝ
Vor
The rms value of the load current = (4.2)
R
This is also equal to the source current, that is,
Is = Ior (4.3)
Vor2
The power delivered to the R load =
R
Vs2 Ë 1 Û
(Q B ) sin 2B Ü
Q R ÌÍ
(4.4)
2 Ý
Real power
Power factor =
Apparent power
Therefore,
Vor2 / R
Power factor =
Vs I s
1/ 2
Vor Ë1 Î 1 ÞÛ
Ì Q Ï(Q B ) 2 sin 2B ßÜ (4.5)
Vs Í Ð àÝ
172 Power Electronics: Devices and Circuits
Vs
0
wt
Vo
T 0
wt
Io
Vs 2V sin X t R Vo Vo
Load
0
wt
(a) (b)
Fig. 4.5 TRIAC based ac voltage controller: (a) circuit, and (b) waveforms.
Vs2 n
P (4.6)
RN
where n is the number of cycles during ON period,
N is the total number of cycles covering ON and OFF periods,
Vs is the supply voltage, and
R is the load resistance.
The ratio n/N can also be called as duty ratio, k.
Vor2
But power, P
R
AC to AC Converters 173
Vs2
Input volt–amperes, (VA) k (4.7)
R
Vor Ior
Input power factor k (4.8)
VA
kI m
Average value of thyristor current = (4.9)
Q
A phase controlled single-phase voltage controller feeding an RL load is presented in Fig. 4.6(a).
+ vT1 –
T1
Vs Vm sin wt
Is Io 3p wt
+ p 2p
+ R ig1
T2
Vs – vT2 + Vo wt
– L ig2 a 2p + a
– wt
iT1 p +a iT1
(a)
Io,Is wt
a g b
Vo,Vs T1 T2 T1
p
Vm π
pπ/2 3p
π/2 p ωwt t
2π
Vo
p 2p
wt
b = aÿ+ g g
Io,Is vT1 wt
2pπ+φ
p
π ωwt t vT2 wt
φ
(c) (b)
Fig. 4.6 Single-phase voltage controller feeding RL load: (a) circuit, (b) waveforms for a > f, and
(c) waveforms for a £ f.
174 Power Electronics: Devices and Circuits
In Fig. 4.6(b), waveforms for source voltage Vs, gate currents ig1 and ig2, load and source currents
io and is, load voltage Vo, voltage vT1 and voltage vT2 across thyristors T1 and T2 respectively, are
shown. At wt = a, T1 is triggered. It conducts up to b which is the angle of extinction for thyristor
T1. Like a, b is also measured from zero voltage crossover. Current through T1 increases from zero
as shown in the Fig. 4.6(b) and then decays to become zero again at b. Unlike the resistance load
case, the load current is not zero at p even though the load voltage as well as the source voltage
are zero at p. This is due to the presence of inductance in the load circuit. Hence, current through
T1 becomes zero at b which is greater than p. Thus T1 is turned off at b and a voltage of magnitude
Vm sinb appears across T1, reverse biasing T1. However, the same voltage forward biases T2
permitting it to conduct when triggered refer, Fig. 4.6(c). The thyristor T1 conducts for a period g,
which is equal to (b – a). From bÿ to pÿ + a, no current flows in the load circuit. Thyristor T2 is turned
on at (p + a) to keep the thyristor firings symmetrical. The current iT2 starts building up in the reverse
direction through the load. At (p + a + g ), iT2 = 0 and T2 is turned off. At (p + a + g ), Vm sin
(p + aÿ + g ) appears as a forward bias across T1 and reverse bias across T2, Fig. 4.6(b). From
(p + aÿ + g ) to (2p + a), no current exists in the load circuit. At (2p + a), T1 is turned on and current
starts building up as in the previous cycle. It should be noted the positive half and the negative
half of the load as well as the supply currents are symmetrical thus, ensuring absence of the dc
component.
When T1 conducts, voltage drop across it appears as a reverse bias across T2. Similarly, when
T2 conducts, vT2 appears as a reverse bias across T1. It is seen from Fig. 4.6(b) that waveform of vT2
is obtained by inverting waveform of vT1. The conduction period for each thyristor is g which is less
than p. This means that load current as well as the supply current is discontinuous. The expression
for load current Io can be obtained as follows. The Kirchhoff’s voltage law for the circuit of
Fig. 4.6(a) gives
dIo
Vs Vm sin X t for a < wt < b
RIo L (4.11)
dt
The solution for this equation can be obtained using the initial condition according to which
Io = 0 at wt = a.
Vm Ë ÎR ÈB Ø ÞÛ
Io Ìsin(X t G ) (B G ) exp Ï ÉÊ t ÙÚ ßÜ (4.12)
Z Í ÐL X àÝ
The extinction angle b can be determined as the solution of this transcendental equation
(Eq. (4.13)). Once b is known, the conduction angle g can be found as:
BH C
For a given value of load phase angle f, angle b is determined for various values of a from
Eq. (4.13) and thus, a relationship between g and a can be obtained from Eq. (4.13) as a function
of f. For various values of g and a, curves are shown in Fig. 4.7 for different values of f. The phase
angle f cannot exceed 90°.
AC to AC Converters 175
180º
φ=0º φ=30º φ=60º φ=90º
γ
90º
Single pulse gating is, however, not suitable for RL loads. The reason for this is not difficult
to understand. Referring to Fig. 4.8 at a, T1 is fired and the current flows as shown. At p + a, T2
is fired. As T1 is still conducting, voltage drop across T1 reverse biases T2 at p + a, T2 is therefore
not turned on at p + a. However at (a + g), iT1 decays to zero and T1 stops conducting. Now T2
gets forward biased but the gate pulse ig2 is not available to T2 as it is a single pulse applied at
p + a and therefore, T2 does not get turned on. At 2p + a, gate pulse is applied to T1 and it gets
turned on because it is already forward biased by the source voltage. At 3p + a, when T2 is pulse
gated, it does not turn on as already explained. Thus, the ac voltage controller gives asymmetrical
output voltage waveform due to the conduction of T1 alone. This half wave rectifier operation of
the ac voltage controller is undesirable. This difficulty can be overcome by applying a continuous
gate signal to the SCRs T1 and T2 so that when iT1 becomes zero at (a + g ), T2 gets turned on due
to the presence of continuous signal. A continuous gate signal is shown in Fig. 4.8(b). The duration
of a continuous gate signal should last for a period of (p – a)/w seconds.
Vs
0 p 2p
wt ig1
0 a p 2p 2p +a
wt
ig1
wt ig2
wt
ig2 a 2p +a 0
a p 2p 2p +a
iT1 p +a iT2
wt ig1
Vo 0
a p 2p
wt
2p +a
g wt
(b)
(a)
Fig. 4.8 (a) RL load with pulse gating and (b) gating signals.
In practice, continuous gating is undesirable as it leads to more heating of the SCR gate and
at the same time, increases the size of the pulse transformer. The technique that mitigates the above
disadvantages of continuous gate signal and ensures thyristor turn on uses a train of firing pulses
from a to p as shown in Fig. 4.8(b). This type of signal is also termed as high-frequency carrier gating
signal.
(a) (b)
Fig. 4.9 Three-phase ac full wave controller (a) circuit, (b) output voltage waves for four firing
angles for phase a.
different phase delay angles, a. Three distinctive conduction periods exist that can be grouped as
follows:
(1) 0 £ a £ p/3
Full output occurs when a = 0. For a £ p/3, three devices conduct and one is turned off by
natural commutation.
(2) p/3 £ a £ p/2
The turning on of one device naturally commutates another conducting device and only two
phases can be conducting at a time. Line-to-neutral load voltage waveforms for a = p/3 and p/2 are
shown in Fig. 4.9(b).
(3) p/2 £ÿaÿ £ 5p/6
Two devices must be triggered in order to establish load current. Line-to-neutral zero voltage
periods occur and each device must be triggered at p /3 after the initial trigger pulse. These zero
output periods which develop for aÿ £ p/2 can be seen in Fig. 4.9(b). Except for voltage controller
start up, the second firing pulse is not necessary if aÿ £ p/2. The interphase voltage falls to zero at
aÿ = 5p/6, and hence, for a = 5p/6, the output becomes zero.
For delta-connected loads, where each phase end is accessible, the controller shown in Fig. 4.10
can be employed in order to reduce thyristor current ratings. For star-connected loads where access
ia
a
T1 ZL
va
vb T2 T5
ib b
N T4
TT56
ZL ZL
vc
ic T3
c
exists to a neutral that can be opened, the controller in Fig. 4.11(a) can be used. This circuit produces
identical load waveforms to those for the controller in Fig. 4.9, except that the device current ratings
are halved. Only one thyristor needs to be conducting for load current, compared with the circuit
of Fig. 4.9 where two devices must be triggered.
The number of devices and control requirements for the controller of Fig. 4.11(a) can be
simplified by employing the regulator in Fig. 4.11(b).
a ia
va ZL
T1 T4 ia
va a ZL
N b ib
T2 T5 T4
ZL N ib
vb T2
vb b ZL
T3 T6
T6
vc vc
c ic ic
ZL c ZL
(a) (b)
Fig. 4.11 Open star three-phase voltage controllers (a) circuit with six thyristors, and (b) with three
thyristors.
Figure 4.12(a) shows a single-phase transformer tap changer where the tapped voltage supply can
be provided by a tapped transformer or autotransformer while Fig. 4.12(b) depicts the output voltage
waveforms. Figure 4.13 depicts output voltage and current waveforms for such a tap changer with
RL load. Thyristor T3 is triggered at zero voltage crossover, then under phase control T1 is turned
on at any desired instant using phase control. This produces the positive half of the output voltage
shown in Fig. 4.12(b). To produce negative half, T4 is triggered at zero voltage crossover and T2
T1
Is Vo V1
T2 Io Vo
T3 V2
~ Vs 0
ωt
ZL Vo
V1 V2 T4
Load
(a) (b)
Fig. 4.12 Single-phase transformer tap changer (a) circuit, and (b) waveforms for R load.
AC to AC Converters 179
Vo
V1
V2
(π+α)
2π
0 π
α ωt
Io
(π+α)
(2π+α)
2π
0
α π ωt
β
(π+β)
is turned under phase control. Then the output voltage for a resistive load is defined by
Vo 2V2 sin X t (V ) for 0 X t
B (4.14)
2V1
Io sin(X t G ) (4.16)
Z
where,
Z R 2 (X L )2 and G tan 1
XL
R
It is important that T3 and T4 are not fired until aÿ ³ f, when the load current has reached zero.
Otherwise a transformer secondary short circuit occurs through T1, T4 and T2, T3.
An extension of the basic operating principle is to use phase control on thyristors T3 and T4
as well as T1 and T2. It is also possible to use tap changing in the primary circuit. The principle
can also be extended from a single-tap to a multi-tap transformer.
To summarize three possible ranges of output voltage variations can be obtained as.
(a) 0 £ Vo £ V2, (T1, T2)—OFF; (T3, T4) —phase control
(b) 0 £ Vo £ V2, (T1, T2)—phase control; (T3, T4)—OFF
(c) V2 £ Vo £ V1, (T3, T4)—turned on at zero crossover; (T1, T2)—phase control
180 Power Electronics: Devices and Circuits
4.7 CYCLOCONVERTERS
Features of cycloconverter
(i) A step down cycloconverter is essentially a wave synthesizer since it fabricates low
frequency output sine wave by piecing together various segments of high frequency input
sine waves of the source voltage.
(ii) In addition to frequency, cycloconverter output voltage can be varied by the application
of phase control principle.
(iii) Cycloconverter can be used to provide either variable frequency output from fixed
frequency input or fixed frequency output from variable frequency input.
(iv) A cycloconverter can also handle loads of lagging as well as leading power factor in
addition to unity power factor loads. This has become possible as the cycloconverter
permits power flow in either direction
(v) The output voltage wave is a distorted sine wave. The associated harmonic components
can be filtered out if necessary. The distortion is low for low frequency outputs but
increases with output frequencies. This factor imposes restriction on the useful frequency
AC to AC Converters 181
P1
P
Vs
+ N1
VPo Io 0
R ωt
Vs – A.C.Load
+ α
VQo – Vo + Vo
–
P2 0
α ωt
Q
N2
(b)
(a)
Is T1
+ T2 Positive
+ converter
Vs ip
– Io
vp Load LR Intergroup
+ reactor
Vs ip
– Negative
T2'
– Is converter
T1'
(c)
Fig. 4.14 Single-phase to single-phase cycloconverter (mid point type) (a) circuit, (b) waveforms,
and (c) circuit with IGR.
The mid point type cycloconverter consists of a single-phase transformer with centre tapped
secondary, four thyristors P1, P2, N1, and N2 and a resistive load R as shown in Fig. 4.14(a).
Thyristors P1 and P2 when turned on alternately, produce the positive half of the output voltage.
Hence P1 and P2 are called positive group thyristors. N1 and N2 supply the negative half of the
output voltage when turned on in a similar manner and constitute the negative group of thyristors.
182 Power Electronics: Devices and Circuits
P1 P2 I0 N1 N2
+ L
ac supply Vo o ac supply
a
– d
P3 P4 N3 N4
Bridge 1 Bridge 2
Fig. 4.15 Single-phase to single-phase cycloconverter (bridge type).
When positive group works, the load current Io flows through the ac load as shown in the Fig. 4.14(a).
The load current reverses when negative group of thyristors operate. The output voltage vo wave
whose frequency is one-third of the supply frequency is depicted in Fig. 4.14(b). It is obtained by
turning on the positive and negative group of thyristors in the following order:
(P1P2P1), (N2N1N2), (P1P2P1), L
The output wave form shown in Fig. 4.13(b) is obtained by turning on the thyristors with delay
angle a with respect to the input voltage. The conducting thyristors are turned off naturally when
the device current falls to zero at p along with load current. For resistive loads, the conduction
period of each thyristor is equal to (p – a), where the firing angle is a.
The output frequency is found to be 1/n times the supply frequency where n is the number
fi
of output pulses in either half of the wave, that is fo . If the output frequency is not a sub-
n
multiple of an input frequency, the firing of the thyristors in a particular group starts even before
the completion of conduction in the other group, that is, N2 will be turned on even while P1 is
conducting causing a short circuit on the input and reducing the load voltage to zero. The duration
of the short is less than one-half period of the input and takes place in every half cycle of the output
wave. Current limiting reactors, called inter group reactors (IGR) are introduced in the input lines
to reduce the short circuit current. Refer (Fig. 4.14(c)).
The bridge configuration shown in Fig. 4.15 does not require an input transformer. Here, the
two single-phase fully controlled converters, converter 1 and converter 2 are connected in anti-
parallel as in a dual converter. When converter 1, conducts, it produces positive load current Io. On
the other hand, when converter 2 conducts the load current Io reverses. The two converters should
not conduct simultaneously as this will lead to the short circuit of the input supply. Therefore, at
any given time interval, only one converter is gated and the firing pulses to the other converter is
inhibited.
The positive and negative converters are thus, alternately gated to produce an output wave of
desirable frequency. The firing angles of the thyristors are kept equal so that the alternating
output wave is symmetrical. The input and the output voltage waveforms are as shown in
Fig. 4.14(b). The conduction sequence for the thyristors to obtain an output at one-third of the
supply frequency is [P1P4, P2P3, P1P4] for positive half cycle followed by [N1N4, N2N3, N1N4], for
negative half cycle.
The rms value of the output voltage will be maximum for firing angle a = 0 and it can be
reduced to any desired value by increasing a. In one mode of control, a remains the same for all
AC to AC Converters 183
the SCR pairs. But in another mode, a is continuously varied. For example, in the case of three-
pulse half wave output, a can be p /3, 0, and p/3 radians for the pairs, P1P2, P3P4, and P1P2
respectively. This modulation of a results in an improved sine wave output.
A.C. supply
Inter group
Positive converter reactor 1 Negative converter
XL Io
T1 T2 T5 T6
Vo
T3 T4 T7 T8
(a)
Io Vo
V o, Io
a b c d e f wωt
φ
(b)
Fig. 4.16 Single-phase cycloconverter (bridge type) supplying RL load (a) circuit, and (b) waveforms.
184 Power Electronics: Devices and Circuits
Figure 4.16 shows the load voltage and load current waveforms of the cycloconverter feeding
highly inductive load. Since the gating pulses are controlled by the load current, converter 1 can
conduct only during interval bd and converter 2 during interval df. From b to c, both load voltage
and load current are positive and therefore, converter 1 operates as a rectifier with, say, a firing angle
a. At c, the load voltage reverses. Since the load current is still positive, converter 2 will not be
gated. Therefore, to generate negative load voltage with positive current, converter 1 must operate
in the inverting mode with a firing angle of (p – a) so that negative load voltage is equal in
magnitude to the positive load voltage. At d, the load current reverses because of the negative
voltage applied to the load and converter 2 receives the gating pulses. Between d and e, converter
2 operates as a rectifier with a firing angle a. At e, the voltage reverses and the current will be
negative. So, converter 1 is not gated and converter 2 operates in the inverting mode with a firing
angle (p – a). Table 4.1 indicates the firing logic for converter 1 and converter 2.
Converter 1 Converter 2
Load voltage positive, load current positive or zero Firing angle a No firing
Load voltage negative, load current positive Firing angle (p – a) No firing
Load voltage negative, load current negative or zero No firing Firing angle a
Load voltage positive, load current negative No firing Firing angle (p –ÿa)
This type of control is known as non-circulating current scheme because only one converter
conducts at a time and there is no circulating current between the converters. The only disadvantage
of this scheme is dead time during the change over of current, when the second converter does not
conduct immediately, and the load gets open circuited for the maximum duration of one-half the
input cycle.
Positive Negative
group group Positive Reactor Negative
Single- group group
phase load Single-
phase load
Neutral Neutral
(b)
(a)
Fig. 4.16 Three phase cycloconverter
Fig. 4.17 Three-phase cycloconverter.
where a is the firing angle or delay angle and Vdo is the maximum output voltage with zero firing
delay. This only means that the variation of a will produce a sine wave output whose instantaneous
values change with the firing angle in proportion to average direct voltage.
Assume that the rectifier firing angle is slowly varied as shown in Fig. 4.18. In Fig. 4.18, the
firing angle at A is 90° and the mean output voltage is zero. At B, the firing angle is somewhat
less than 90°, at C the firing angle is still further reduced than it is at B, and so on. In this manner,
a continuously decreasing delay in firing angle is introduced at C, D, E, F, and at G. The firing angle
is zero where the mean output voltage, given by Vo = Vdo cos a, is maximum. After point G, firing
angle is progressively increased at points H, I, J, K, L, and M. At M, the firing angle is again 90°
and the value of mean output voltage is zero. The firing circuit is suitably designed to introduce
progressive firing angle delay as discussed here. In Fig. 4.18, the single-phase output voltage
fabricated from three-phase input voltage is shown by thick curve. Mean output voltage wave is
obtained by joining points pertaining to average voltage values. It is seen from Fig. 4.18 that
fabricated output voltage given by thick curve can be resolved into fundamental frequency output
voltage plus several other harmonic components. The load inductance can, however, filter out the
high-frequency unwanted harmonics. Figure 4.18 reveals that for one half-cycle of fundamental
frequency output voltage (marked mean output voltage in this figure), there are eight half cycles
È 1Ø
of supply frequency voltage. This shows that output frequency fo É Ù fs where fs is the supply
Ê 8Ú
186 Power Electronics: Devices and Circuits
frequency. The output frequency can be varied by varying the number of input waves chosen for
synthesizing the output voltage which in fact means the rate of variation of the firing angle.
To summarize, to obtain positive half cycle of low frequency output voltage, the firing angle
is varied from 90° to 0°. The corresponding negative half cycle is obtained when the firing angle
varies from 90° to 180° and back to 90°. This is illustrated in Fig. 4.19.
The cycloconverter shown in Fig. 4.16 can be made to deliver in addition to unity power factor
loads lagging power factor loads also as depicted in Fig. 4.19. Examination of Fig. 4.19 reveals that
Inversion Inversion
a = 180° Inversion
Io Rectification Rectification
0
wt
Current in positive group
Current in negative group
Load of angle
Fig. 4.19 Voltage and current waveforms of a three-phase half wave cycloconverter.
when output is positive (above the reference line w t), positive converter conducts. Under this
condition, positive converter acts as a rectifier when output voltage is positive and as an inverter
when output voltage is negative. When output current is negative, the negative converter conducts.
Under this condition, negative converter acts as a rectifier when output voltage is negative and as
an inverter when output voltage is positive. It can thus be inferred, in general, that one of two
component converters in Fig. 4.17 would operate as rectifier if the output voltage and current have
the same polarity and as an inverter if these are of opposite polarity.
Figure 4.17 is almost similar to Fig. 3.28 for a dual converter where two-phase controlled
converters are connected in anti-parallel. As in a dual converter; in Fig. 4.17 also, both the
component converters belonging to one phase can be phase-controlled simultaneously to fabricate
the output voltage. Though the output voltages of the two converters in the same phase have the
same average value, their output voltage waveforms as a function of time are, however, different.
As a result, there is a net potential difference across the two converters of Fig. 4.17. This net voltage
causes a circulating current in the two converters. This is similar to a dual converter. This circulating
current can be avoided by removing the gating signals from idle converter or can be limited to a
low value by inserting an inter group reactor (IGR) between the positive and negative group
converters as shown in Fig. 4.17. In order that the average value of the two converters are equal
in magnitude and opposite in sign, the sum of their firing angles must be 180°. In other words, if
ap and an are the firing angles for positive and negative group converters respectively, then these
firing angles should be so controlled as to satisfy the relation ap + an = 180°.
AC to AC Converters 187
P N P N P N
fo
Three-phase
load
(a)
Three-phase A
supply fs B
C
P N P N P N
fo
0
Three-phase
load
(b)
Fig. 4.20 Three-phase to three-phase cycloconverter (mid point type) (a) schematic diagram, and
(b) basic circuit connections.
Three-phase
Input
Three-phase
Load
Fig. 4.21 Three-phase bridge type cycloconverter using thirty six thyristors.
current ratings of the thyristors of these two circuits are identical. The three-phase bridge circuit
gives a smooth variation of output voltage and is suitable for the control of large industrial drives
though the control and the firing circuits are complex and expensive.
È mØ È Q Ø È mØ È Q Ø
Vdo Vm É Ù sin É Ù 2V É Ù sin É Ù (4.18)
Ê Q Ú Ê mÚ Ê Q Ú Ê mÚ
where V is the rms phase voltage. This result assumes instantaneous commutation and negligible
thyristor forward voltage drop.
Vo
ÈQ Ø
(–p /m + a) ÉÊ m B ÙÚ
a
A¢
Vm
–p /m A p/m wt
2p /m
Fig. 4.22 Output voltage waveform.
AC to AC Converters 189
If the cycloconverter delay angle is slowly varied, the output voltage per phase at any point
of the low frequency cycle may be calculated as the average output voltage for the appropriate delay
angle. This ignores the rapid fluctuations superimposed on the average low frequency waveform.
Assuming continuous current conduction, the average output voltage is, therefore, given by the
equation
ËÈ m Ø È Q Ø Û
Vd Vdo cos B 2V ÌÉ Ù sin É Ù Ü cos B (4.19)
ÍÊ Q Ú Ê m Ú Ý
If Vor is the fundamental rms output voltage per phase of the cycloconverter, the peak output
voltage corresponding to zero delay is
È mØ È Q Ø
2Vor Vdo 2V É Ù sin É Ù
Ê Q Ú Ê mÚ
This gives
È mØ ÈQ Ø
Vor V É Ù sin É Ù (4.20)
ÊQ Ú Ê mÚ
However, the firing angle of the positive group cannot be reduced to zero since this corresponds
to a firing angle of p in the negative group, as ap = (180º – aN). In practice, inverter firing cannot
be delayed by 180°, since sufficient margin must be allowed for commutation overlap and thyristor
recovery time. Consequently, the delay angle of the positive group cannot be reduced below a
certain finite value, amin. The maximum output voltage per phase is therefore,
Since amin is necessarily greater than zero, the voltage reduction factor r is always less than
unity. Equation (4.22) gives the rms value of the per phase output voltage for three phase to single
phase or three phase to three phase cycloconventers depicted in Figs. 4.17 and 4.20, respectively.
In practice, the output voltage is less than the theoretical value due to commutation overlap and
the circulating currents between positive and negative groups.
Source inductance causes commutation delay. It delays the transfer of current from one thyristor to
the other. The amount of delay depends not only on the source inductance but also on the converter
firing angles as well as on the current to be commutated. There may be simultaneous commutations
in which the overlap restricts the range of firing angles. The commutation overlap and hence, source
inductance modifies the output voltage waveform and its distortion and amplitude of harmonics.
190 Power Electronics: Devices and Circuits
The average value of voltage and displacement factor decreases and the commutation notches are
produced in the output voltages. However, the rounding of the edges of input current waveform
improves the harmonic currents of the input current.
SOLVED EXAMPLES
EXAMPLE 4.1 A single-phase full wave ac voltage controller has a resistive load of 5 W. The
input ac voltage is 230 V at 50 Hz. For a delay angle of 120° determine the rms load voltage, rms
load current, rms thyristor current, and input power factor.
Solution
rms load voltage is given by
sin 2B Þ Û
12
Ë1 Î
Vor Vs Ì ÏQ B ß
ÍQ Ð 2 à ÜÝ
ËÈ 1 Ø Î Q 0.866 Þ Û
12
230 ÌÉ Ù Ï ß
ÍÊ Q Ú Ð 3 2 à ÜÝ
101.69 V
1/ 2
Ë1 Î 1 ÞÛ
pf Ì Q ÏQ B 2 sin 2B ßÜ
Í Ð àÝ
1/ 2
Ë 1 Î Q 0.866 Þ Û
Ì Q Ï 3 2 ßÜ
Í Ð àÝ
0.442
EXAMPLE 4.2 An ac voltage regulator operating from 230 V, 50 Hz supply uses integral cycle
control to control the flow of power to 10 W load. The thyristors conduct for 18 cycles and remain
off for 32 cycles. Find
(a) rms value of output voltage, Vor
(b) power output to the load
(c) power input to the regulator
(d) input power factor
(e) average and rms values of SCR current (neglect losses).
AC to AC Converters 191
Solution
Duty ratio,
18
k= 0.36
18 32
(a) rms value of the output voltage,
Vor 230 0.36 138 V
(b) Power output to the load,
Vor2 1382
1904.4 W
RL 10
(c) Power input to the regulator
= 1904.4 W as losses are neglected.
(d) Input power factor,
Real power 1904.4
Apparent power 230 Ior
Vor 138
But Ior 13.8 A
RL 10
Substituting for Ior, the input power factor = 0.6
230 2
(e) Im 32.522 A
10
Im k 32.522 0.6
rms value of thyristor current = 9.756 A
2 2
kI m
Average value of thyristor current = 3.727 A
Q
Solution
rms load voltage,
sin 2B Þ Û
1/ 2
Ë1 Î
Vor Vs Ì Ï(Q B ) ß
ÍQ Ð 2 à ÜÝ
1/ 2
Ë 1 ÎÈ Q Ø 1 2Q Þ Û
230 Ì ÏÉ Q Ù sin ß Ü
Q
Í Ð Ê 2Ú 2 2 àÝ
230
162.66 V
2
192 Power Electronics: Devices and Circuits
sin 2B Þ Û
1/ 2
Ë1 Î
Vor Vs Ì Ï(Q B ) ß
ÍQ Ð 2 à ÜÝ
Ë 1 Î 3Q 1 ÞÛ
1/ 2
230 Ì Ï ßÜ
ÍQ Ð 4 2 àÝ
219.3 V
219.3
Ior 7.31 A , [Refer 4.3.10 for derivation]
30
EXAMPLE 4.5 A single-phase ac voltage controller is connected to an inductive load with a
resistance of 10 W and load impedance angle of 45°. The input ac voltage is 230 V at 50 Hz. Determine
the maximum load voltage, maximum load current, and range of delay angle for which the load voltage
does not change.
Solution
Load impedance angle or load phase angle, G 45
Maximum rms load voltage, can only be the supply voltage, Hence it is 230 V.
XL
tan G 1
R
\ R = XL = 10 W
Z 10 2 :
230
Maximum rms load current, I max 23 0.707 16.261 A (rms)
10 2
Range of delay angle = 0 to 45°.
EXAMPLE 4.6 A resistance heating load is controlled from a single-phase supply using a TRIAC
in the phase angle control mode. Determine the firing angle delay when the load power is 50%
of its maximum value.
AC to AC Converters 193
Solution
Ë1Î sin 2B ÞÛ 50 1
Ì Q Ï(Q B ) 2 ßÜ
Í Ð àÝ 100 2
B sin 2B 1
1
Q 2Q 2
By inspection, a = p/2
EXAMPLE 4.7 A single-phase voltage controller controls the power input to a load circuit
consisting of R = 3 W and wL = 4 W. If the supply voltage is 230 V at 50 Hz, calculate
(i) control range of firing angle,
(ii) maximum value of rms load current,
(iii) maximum power input to the load,
(iv) maximum power factor, and
(v) maximum value of average and rms thyristor current.
Solution
(i) Control range of firing angle: fÿ to p
230 230
46 A
R X L
2 2 2
32 42
6348
(iv) Maximum power factor = 0.6 = cos f
230 46
Io 46
Ithrms 32.527 A
2 1.414
Ithrms
Average value of SCR current, Ith av 20.707 A
1.57
194 Power Electronics: Devices and Circuits
REVIEW QUESTIONS
4.24 Prove that the form-factor of SCR current of an ac chopper feeding resistance load is
Q sin 2B Û
1/ 2
Ë
(Q B ) a
(1 cos B ) ÌÍ 2 ÜÝ
where is the firing angle.
4.25 Investigate the operation of a single-phase voltage controller supplying RL load when the
firing angle a is
(i) less than the load angle f
(ii) equal to load angle f
(iii) greater than the load angle f.
4.26 Describe the principle of working of a single-phase to single-phase bridge type step down
cycloconverter feeding an RL load.
4.27 Explain the principle of working of a three-phase to single-phase cycloconverter.
4.28 Show that the fundamental rms value of per phase output voltage of a low frequency in pulse
È mØ È Q Ø
cycloconverter is given by Vor Vph É Ù sin É Ù . Hence, express Vor in terms of voltage
Ê Q Ú Ê mÚ
reduction factor, g.
PROBLEMS
4.1 A single-phase ac regulator with two SCRs connected back to back has a resistive load of
10 W and source voltage of 230 V, 50 Hz; a can be varied from 0° to 180°. Calculate
(a) greatest rms value and average value of SCR current, (b) minimum circuit turn-off time,
and (c) maximum value of di/dt occurring in the SCR.
[Ans. (a) 16.26 A, 10.35 A, (b) 10 m sec, (c) ]
4.2 A single-phase ac voltage controller is connected to a resistive load of 10 W where the supply
voltage is 230 V at 50 Hz. Determine (a) rms load voltage, (b) rms load current, (c) rms
thyristor current, (d) average thyristor current, (e) form factor of thyristor current wave,
(f) input power factor for a trigger angle of 60o.
[Ans. (a) 206.31 V, (b) 20.63A, (c) 14.59 A, (d) 7.76, (e) 1.88, (f) 0.894 log]
4.3 A single-phase ac voltage controller is connected to a resistance load of 5 W. The supply
voltage is 230 V. Estimate the load voltage, rms load current, and rms thyristor current for
a delay angle of 120o. Also draw the load voltage waveforms and derive an expression for
the rms load voltage. [Ans. 101.69 V, 20.34 A, 14.38 A]
4.4 A single-phase ac voltage controller is connected to an inductive load with an impedance
angle of 40o. The supply voltage is 230 V, 50 Hz. Estimate the rms load voltage for
trigger angles of 30o and 90 o. Assume the conduction angle to be 120o for the trigger angle
of 90 o. [Ans. 230 V, 206.15 V]
4.5 A resistance-heating load is controlled from a single-phase supply using a TRIAC in the phase
angle control mode. Determine the firing delay when the power is at 70% of its maximum.
[Ans. a = 70°]
196 Power Electronics: Devices and Circuits
5.1 PRELIMINARIES
A dc chopper converts a fixed voltage dc supply into a variable voltage dc supply employing the
principle of ON–OFF control. A chopper connected between the supply and a dc motor can control
its voltage and therefore, its speed in addition to the power fed to it. This dc to dc converter can
be considered as a dc equivalent to an ac transformer with a continuously variable turns ratio.
Further, like a transformer, a chopper can be used to step down or step up the input dc voltage. A
step down chopper provides an output voltage, which is variable and less than the input voltage.
A step up chopper, on the other hand, provides an output voltage, which is also variable but higher
than the input voltage. DC choppers are single stage power converters and therefore, they are highly
efficient. They are preferred over other variable dc voltage sources such as motor-generator sets,
phase controlled converters, ac link choppers, and so on which are less efficient, two-stage power
converters.
Applications of chopper circuits have improved with the advent of modern power
semiconductor devices such as, power BJT, power MOSFET, GTO thyristors, and the like. In the case
of many industrial applications that require dc power, variable dc voltage source such as a chopper
is preferred. Examples of such dc systems are subway cars, trolley buses, battery-operated vehicles,
battery-charging, and so forth. If SCRs are employed as power switches in chopper circuits, it is
necessary to include separate commutation circuits for the SCRs. However, with modern power
semiconductor devices, this problem does not exist.
This chapter explains the underlying principle of chopper operation. It is followed by a
description of some well-known chopper circuits including multiphase chopper.
A chopper could be compared to a high-speed switch that repeatedly connects and disconnects the
dc supply and the load at some frequency. This action produces a chopped dc voltage across the
load. A basic chopper circuit and its waveforms are shown in Fig. 5.1.
197
198 Power Electronics: Devices and Circuits
vo Vs Toff
Ton Vo
Chopper
Filter t
T
+ SW + io
io
Vs vo Load
FD
Io
– –
t
Fig. 5.1 (a) Basic chopper circuit and (b) its voltage and current waveforms.
Ton
Vs
T
= kVs (5.2)
where
Ton = ON time,
Toff = OFF time,
T = chopping period, and
k = duty cycle = Ton/T
Also Vo = f TonVs where chopping frequency f = 1/T.
Equation (5.1) shows that the load voltage is independent of load current. The load voltage is
found to vary linearly with k and it can be controlled by varying the duty cycle k. The range of
variation in output voltage is 0 < Vo < Vs for 0 < k < 1.
The rms value of the chopper output voltage,
Vor = kVs (5.3)
If the switch SW is a GTO thyristor, a positive gate pulse turns it on and negative gate pulse
turns it off. If the switch is a transistor, the base current controls the ON and OFF period of the switch.
If the switch is an SCR, a commutation circuit is required to turn-off the conducting thyristor in
addition to a firing circuit for turn-on.
DC to DC Converters (Choppers) 199
vo Load voltage
Ton
Vs
Toff k = 0.25
t
T
vo Load voltage
Toff
Vs
Ton
k = 0.75
t
T
Fig. 5.2 Principle of pulse width modulation (Constant T).
vo Load voltage
Vs
Ton Toff k = 0.25
0 t
T
vo Load voltage
Toff
Vs
Ton k = 0.75
0 t
T
vo Load voltage
Vs Ton
Toff k = 0.25
0 t
T
vo Load voltage
Vs
Toff Ton k = 0.75
0 t
T
Fig. 5.3 Output voltage waveforms for variable frequency system.
(b) For the control of k, the range of frequency variation is bound to be large. As such, there
is a possibility of interference with signalling and telephone lines.
(c) Large OFF times in FM scheme make the load current discontinuous. This is undesirable
for dc motors.
Therefore, it can be concluded that constant frequency or PWM scheme is better than variable
frequency scheme. A PWM technique has, however, a limitation. In this technique, Ton cannot be
reduced to near zero for most of the commutation circuits used in choppers. As such, low range of
k control is not possible in PWM. This can, however, be achieved by increasing the chopping period
(or decreasing the chopping frequency) of the chopper.
The chopper configuration shown in Fig. 5.1 produces output voltages less than the input voltage
(that is, Vo < Vs). However, a modification in the chopper configuration, as shown in Fig. 5.5,
provides higher output voltages.
DC to DC Converters (Choppers) 201
io
Io, max
Io, min
t
Toff Ton
0 t
Fig. 5.4 Current limit control (CLC).
vo
Vo
iL L D t
0 I2
+ vL – + + iL I1
is IL
+ 0 Ton t
V C Vo T
Vs S vL V
Toff
– 0 t
– Ton T
– –
V –Vo
(a) (b)
Vo
0 0.5 1.0 k
(c)
Fig. 5.5 Step up chopper: (a) circuit, (b) waveforms and (c) Vo versus k curve.
When the chopper is ON, the inductor L is connected to the supply V, (vL = V). The inductor
current iL increases linearly. When the chopper is OFF, the inductor current iL is forced to flow
through the diode and the load. The inductor current decreases linearly. The waveforms of Vo, iL,
and vL are shown in Fig. 5.5(b).
During Ton
L ( I 2 I1 ) 'I
vL V L (5.4)
Ton Ton
202 Power Electronics: Devices and Circuits
Ton
where DI = V (5.4a)
L
During Toff = T – Ton
L(I1 I2 ) L 'I
vL V V0 (5.5)
Toff Toff
(V Vo )Toff
where DI = (5.5a)
L
During steady state conditions, Eq. (5.4a) and Eq. (5.5a) are equal. Therefore, from Eqs. (5.4a)
and (5.5a)
VTon (V Vo )Toff
L L
Hence,
VTon = (Vo V )Toff
V (Ton Toff ) VT
Vo
Toff Toff
VT
Vo
(T Ton )
Ë 1 Û (5.6)
VÌ Ü
Í (1 k ) Ý
Thus, for a variation of k in the range 0 < k < 1, the output voltage Vo varies in the range
V < Vo < ¥. This variation of Vo with k is shown in Fig. 5.5(c). This principle of operation is utilized
in the regenerative braking of a dc motor. In Fig. 5.5, if V represents the armature of the dc machine
and Vo represents the dc supply, power can be fed back from the decreasing motor voltage V to the
fixed supply voltage Vo by proper adjustment of the duty cycle, k.
The basic chopper circuit shown in Fig. 5.1 can be called a step down chopper since its output
voltage is always less than VS. In this chopper, power can flow only in one direction, that is, from
supply to load. Also, the polarities of voltage and current can only be as marked in the figure. They
cannot be reversed. The operation is confined only to first quadrant as voltage and current are only
positive values. This chopper is called a single quadrant, type A chopper. However, there are more
versatile choppers with different circuit configurations, capable of operating in one, two or four
quadrants depending on the circuit arrangements of thyristors and diodes. On the basis of operating
quadrants, choppers can be classified as: Type A chopper, Type B chopper, Type C chopper, Type
D chopper, Type E chopper.
In the chopper circuit configurations discussed in this section, the current directions and voltage
DC to DC Converters (Choppers) 203
polarities marked in the diagrams are positive. In case current and voltage polarities are found to
reverse during the course of their operation, these quantities are treated to be negative.
Vs FD Vo Load Io
0
– –
(a) (b)
Fig. 5.6 First quadrant or type A chopper.
power flow is always from supply to the load. This chopper is also referred to stepdown chopper
as average output voltage Vo is always less than the input dc voltage Vs.
–Io Io
Vs Vo L 0
CH2
E
– –
–Vo
(a) (b)
Fig. 5.7 Second quadrant or type B chopper.
204 Power Electronics: Devices and Circuits
Vo
D2
CH1 CH2, D2 CH1, FD
L
Vs –Io Io
+
Io
CH2 FD Vo E
– –
–Vo
(a) (b)
Fig. 5.8 Two quadrant type A chopper or type C chopper.
D1 + Vo –
CH2
– –Vo
(a) (b)
vo vo
Vs Vs
Ton Toff
Vo Ton
0 t 0 –Vo t
Toff
–Vs T –Vs T
(c) (d)
Fig. 5.9 Two quadrant type B chopper or type D chopper: (a) circuit, (b) operating quadrants,
(c) Vo positive, Ton > Toff and (d) Vo negative Ton < Toff.
Vo
D1 CH3 D3 CH3 D3
CH1
Io L L
E Io
Vs
+ –
Vo –Io io
CH2 D2 CH4 D4 CH4 D4
Vo
(a) (b) (c)
Fig. 5.10 Four quadrant or type E chopper: (a) configuration, (b) operating quadrants and
(c) chopper operating in third and fourth quadrants.
With CH4 always ON, if CH3 is turned on, source voltage Vs would be short-circuited. Therefore,
in order to obviate this, when CH4 is ON, CH3 must always be kept OFF. This means that with CH4
ON and CH3 OFF, the remainder of the circuit of Fig. 5.10 is only a type C chopper of Fig. 5.8 and
therefore, it operates in first and second quadrants of Vo –Io plane as shown in Fig. 5.10.
If CH2 is turned on continuously and CH1 is kept off, reminder of the circuit appears as shown in
Fig. 5.10(c). In this figure, when CH3 is ON or D4 conducts, both load voltage Vo and load current Io
206 Power Electronics: Devices and Circuits
are negative; this defines third quadrant operation. When CH4 is ON or D3 conducts, Vo is negative
but Io is positive; this dictates operation of the chopper in fourth quadrant.
This shows that chopper configuration of Fig. 5.10 can be made to operate in all the four
quadrants of Vo – Io plane by suitably choosing the combination of SCRs and diodes.
A step down chopper supplying RLE load is shown in Fig. 5.11(a). The E component of the load
may be the back emf of dc motor or the battery voltage. The operation of the chopper takes place
in two modes. In mode 1, the chopper is on and the current flows from the supply to the load. Mode
2 starts at the end of mode 1 when the chopper is switched off. In mode 2, load current continues
to flow through the free-wheeling diode. The equivalent circuits depicting these two modes are
shown in Fig. 5.11(b). The waveforms corresponding to mode 1 and mode 2 operations are given
in Fig. 5.11(c).
Chopper
io
+ + SW +
L
Vs vo FD
R
– – – E
(a) vo
Vs
t1 t2
i1 i2 0
T t
+
io
L L i2
I2 i Continuous
Vs R FD 1
R current
+ I1 (1 – k)T I3
E – E kT
–
Mode 1 Mode 2 0 kT T t
(b) (c)
Fig. 5.11 (a) Type A chopper feeding RLE load, (b) equivalent circuits for modes 1 and 2 and
(c) waveforms.
The differential equation governing the performance of the chopper during mode 1 is obtained
from equivalent circuit as:
di1
Vs Ri1 L E (5.7)
dt
This is valid during the Ton period, that is, 0 < t < Ton.
For mode 2 which can be called the free-wheeling mode, the corresponding equation is:
di2
0 Ri2 L E (5.8)
dt
DC to DC Converters (Choppers) 207
t
R
Vs E È t Ø
R
i1(t) = I1e L É 1 e L
Ù
R Ê Ú
t È t Ø
Vs E
= I1e r É 1 e r
Ù (5.9)
R Ê Ú
L
where U
R
This mode is valid for the ON period, that is, 0 < t < t1 (= kT)
At the end of mode 1, t = kT and load current, i1 (kT) = I2
k
T
Vs E È k Ø
T
I2 I1e U É 1 e U
Ù (5.10)
R ÉÊ ÙÚ
t
R
EÈ tØ
R
i2 (t ) I2e L É1 e L Ù (5.11)
RÊ Ú
This mode is valid for 0 £ t £ t2 (= (1 – k) T).
At the end of mode 2, load current becomes,
i2 (t = t2) = I3
and
EÈ Ø
T T
(1 k ) (1 k )
I3 I2 e U É1 e U
Ù (5.12)
R ÉÊ ÙÚ
At the end of mode 2, chopper is turned on again and the next cycle begins. Thus, T = t1 + t2.
Under steady state condition, the initial value of the load current for each cycle must be the
EÈ Ø
T T
(1 k ) (1 k )
same. Therefore, I1 = I3 = I 2 e U É1 e U
Ù (5.13)
R ÉÊ ÙÚ
I1 and I2 can be easily identified as the minimum and maximum values of continuous load
current, i0. Thus, Imin = I1 and Imax = I2
Solving Eqs. (5.10) and (5.13)
Ë kT Û
Vs Ì e U 1 Ü E
I1 I min Ì Ü
RÌ T Ü R
Í e 1 Ý
U
Ë k
T Û
Vs Ì 1 e U Ü E
I2 I max Ì Ü
RÌ
T
Ü R
Í 1 e U
Ý
208 Power Electronics: Devices and Circuits
d ( 'I )
The condition for maximum ripple is given by = 0 (5.14)
dk
Solving Eq. (5.14), the maximum ripple is found to occur at k = 0.5,
Vs R
Therefore, (DI)max = tanh at k = 0.5
R 4 fL
R R R
if 4f L >> R, tanh # , since is very small
4 fL 4 fL 4 fL
Vs R Vs
Then, ( 'I )max # .
R 4 fL 4 fL
In the above analysis, continuous flow in the load circuit is assumed. The load current would be
L
continuous if >> T.
R
Forced commutation
In forced commutation, energy storage elements, L and C are used to turn-off a conducting thyristor.
DC to DC Converters (Choppers) 209
They form a separate commutation circuit along with thyristors and diodes and they normally do
not carry the load current. Forced commutation can be achieved in the following two ways:
(i) Voltage commutation: In this scheme, a conducting thyristor is commutated by a pulse of
large reverse voltage applied between its anode and cathode. This reverse voltage is usually derived
from a previously charged capacitor. The sudden application of reverse voltage across the
conducting thyristor reduces the anode current to zero rapidly. Then, a small amount of reverse
voltage or negative voltage is maintained across the SCR to aid (that is, aids in regaining the forward
blocking capability of SCR) the completion of the turn-off process.
(ii) Current commutation: In this scheme, an external pulse of current greater than the load
current is passed in the reverse direction through the conducting SCR. When the current pulse
attains a value equal to the load current, net pulse current through thyristor becomes zero and the
device is turned off. The current pulse is usually generated by an initially charged capacitor.
An additional feature of current commutation is the connection of a diode in anti-parallel with
the main thyristor so that voltage drop across the diode reverse biases the main SCR. This voltage
drop is of the order of 1 volt, and aids the device to gain forward blocking ability. However, the
commutation time in this method is more compared to voltage commutation.
In many of the voltage and current commutation schemes, commutation process starts when the
auxiliary SCR is gated.
Load commutation
In load commutation, a conducting thyristor is turned off when load current flowing through the
thyristor reduces to zero because of the load circuit parameters or it is diverted to another device
from the conducting thyristor.
In this section, three chopper circuits based on the three principles of commutation enunciated
above, are described.
Chopper
VT1
+ T1
io
+ + ic iT1 +
Vc C R
– TA
+ vT –
A
Vs vo L
FD
D L
S
E
ifd
Rc
– –
commutation of main thyristor T1 is affected by impressing a reverse voltage across it. Hence, the
name voltage commutated chopper. The reverse voltage is obtained from the charge stored in the
capacitor C and it is impressed across the main thyristor T1 by firing the auxiliary thyristor TA.
Capacitor C, diode D, and inductor L along with auxiliary thyristor constitute the commutation
circuitry of the thyristor T1. FD is the freewheeling diode shunting the RLE load. Chopper operation
begins with pre-charging of the capacitor C with polarities as shown in the Fig. 5.12. This is
achieved in two ways:
(a) One way is to make use of a separate charging circuit comprising source voltage Vs,
capacitor C, switch S, and resistor Rc (Fig. 5.12). The switch S is kept closed until the capacitor
charges to the level of supply voltage Vs with the top plate of the capacitor positive. The switch
S is then opened.
(b) Another way is to trigger thyristor TA so that C gets charged through source voltage Vs,
C, TA, and the load. The charging current through the capacitor C decays and as it reaches zero,
TA is turned off and Vc = Vs. The load current Io is assumed constant. The thyristors and diodes are
treated as ideal elements.
The chopper operation can be divided into four different modes and each mode is explained
in the remaining of the subsection; the modal circuits are depicted in Fig. 5.13.
Io T1
+ + + Io + – + Io
C– TA Vs C
+
ic L L
Vs Vo o
a Vs Vo o
a
d d
D L L
Io Io
– – – –
Mode I, 0 < t < t1 Mode II, t1 £ t £ t2
Io Io
T1 T1
+ – Io + +
Io + TA Io +
C C–
+ L L
Vs Vo o
a
Vs FD
o
a Vo
D L
d D L
d
– Io – –
–
Mode III, t2 £ t £ t3 Mode IV, t3 £ t < T
Fig. 5.13 Modes of operation.
Mode I: Mode I starts at t = 0 and lasts for a period t1 seconds (0 < t < t1). During this mode, the
main thyristor switch, T1 is closed permitting the flow of load current. The capacitor C reverses its
charge so as to change its voltage Vs from –Vs. These two operations take place simultaneously
during Mode I.
Thyristor T1 is triggered at t = 0 and the load is connected to the source, so that load voltage,
Vo = Vs. During this mode, load current Io flows through source Vs, main thyristor T1 and the load,
while the capacitor current ic chooses the oscillatory circuit formed by C, T1, L, and D. The main
thyristor T1, thus, carries both the load current Io and capacitor current ic. The capacitor voltage Vc
changes from +Vs at t = 0 to –Vs at t = t1 as it discharges and charges in the opposite direction during
DC to DC Converters (Choppers) 211
this period. The capacitor (or commutation) current increases sinusoidally from zero at t = 0, to a
maximum value, icp at = t1/2 and then decreases to zero, at t = t1. (refer Fig. 5.14). The capacitor
voltage falls from Vc = Vs at t = to to zero at t = t1/2 to Vc = –Vs at t = t1. The capacitor voltage
follows a cosine function during this period. This voltage is held constant at (–Vs) by diode D which
is reverse biased and prevents further oscillations. Voltage across TA is (–Vs) at t = 0, zero at
t = t1/2 and Vs at t = t1. The thyristor T1 carries a peak current of iT1 = ic + Io at t = t1/2. At the
end of mode I, that is at t1 which is equal to p/wo where wo = 1/ LC .
ic = 0, iT1 = Io, Vc = –Vs, VTA = Vs, Vo = Vs as shown in Fig. 5.14.
Mode II: During mode II that exists between t = t1 and t = t2, the load current io continues to flow
through T1 from the source. The variables existing at t1 remain constant during mode II. In other
words, for t1 < t < t2,
ic = 0, iT1 = Io, Vo = –Vs, VTA = Vs, Vo = Vs, iD = 0 as shown in Fig. 5.14.
ig1
t
igA
t
io
lo t
ic lcp
–lo t
iT1
lo t
ifd
Ton lo t
vc
–Vs t
tc Vs
vT1
–Vs t
vTA t 2Vs tc1
c1
t
2Vs
vo
Vs t
iTA
lo t
iD
t
0 t1 t2 t3 T
Mode I II III IV
Fig. 5.14 Current and voltage waveforms.
Mode III: During this mode which lasts between t2 and t3, commutation of T1 takes place with
the help of the auxiliary thyristor that switches the capacitor across T1 to reverse bias it. When main
thyristor T1 is to be turned off at t = t2 = Ton, auxiliary thyristor TA is triggered at t = t2. With the
turning on of TA, capacitor voltage (–Vs) appears across T1 as a reverse voltage, and turns off the
thyristor T1. As the capacitor voltage does the required job of commutating the main thyristor T1,
it is called voltage-commutated chopper. Current iT1 becomes zero at t2. After T1 is turned off,
capacitor C and auxiliary SCR TA provide the path for load current Io through Vs, C, TA, and the
load as shown in Fig. 5.13. The load voltage is the sum of source voltage and the voltage across
212 Power Electronics: Devices and Circuits
the capacitor. Therefore, at instant t2, load voltage is Vo = Vs + Vs = 2Vs and it decreases linearly
as the voltage across capacitor decreases.
During this mode, Vc = vT1, because capacitor is directly connected across T1 through TA. As
the capacitor discharges through the load, Vc and vT1 change from (–Vs) to zero at (t2 + tc) as shown
in Fig. 5.14. Load voltage Vo changes from 2Vs at t2 to Vs at (t2 + tc). After (t2 + tc), Vc and VT1 start
rising simultaneously from zero towards Vs whereas Vo starts reducing from Vs towards zero. For
mode III, t2 < t < t3. Note that Vc and VT1 change linearly from (–Vs) at t2 to Vs at t3, because load
current Io is assumed constant. Similarly, Vo falls linearly from 2Vs at t2 to zero at t3.
Mode IV: During this mode existing between t3 < t < T, the free-wheeling diode, FD takes
over conduction and auxiliary thyristor goes off. At t = t3, Vc = VT1 = Vs, Vo = 0. The current through
TA becomes zero and TA is therefore, turned off. As capacitor is slightly overcharged at t3, free-
wheeling diode FD gets forward biased. The load current after t3 freewheels through the load and
FD (see Fig. 5.14). Note that during free-wheeling period from t3 to T, vTA is slightly negative
as C is somewhat overcharged. During this mode, ic = 0, iT1 = 0, ifd = Io, vT1 = Vs, Vc = Vs + DV,
vTA = –DV, Vo = 0, iTA = 0.
At t = T, the main thyristor T1 is triggered again and the cycle as described from t = 0 to
t = T repeats.
Though voltage commutated chopper is simple and is used extensively it suffers from the
following disadvantages:
(i) A starting circuit is required.
(ii) Load voltage jumps to 2Vs at the instant when commutation of main SCR is initiated. Free-
wheeling diode is then subjected to twice the supply voltage.
(iii) It cannot work on no load. It is because on no load, capacitor would not get charged from
–Vs to Vs when auxiliary SCR is triggered for commutating the main SCR.
(iv) The turn-off time is load dependent at very low load currents. The capacitor takes longer
time to discharge, thus, limiting the frequency of the chopper.
and diminishes to zero at t2. At t2 as ic tends to reverse in the auxiliary thyristor TA and commutates
it. At t2, the reversal of the capacitor voltage is complete making Vc = –Vs as shown in Fig. 5.17.
During this mode T1 remains unaffected, therefore, load current and load voltage remain at Io and
Vs respectively.
Mode II: During this mode, main thyristor is turned off with the help of oscillatory current. Once
TA is turned off at t2, oscillatory current ic begins to flow through C, L, D2, and T1 as shown in
Fig. 5.17. This is due to the discharging of capacitor C. The current ic flows through T1 and not
through D1. It is because D1 is reverse biased by a small conduction voltage drop of thyristor T1.
The current in thyristor T1 is now the resultant of two currents which are ic and load current
Io. Therefore, iT1 = Io – ic. At t3, ic rises to Io so that iT1 = 0. As a result, main SCR, T1 is turned
off at t3. Since the oscillatory current through T1 turns it off, it is called current commutated chopper.
During this mode that exists between t2 and t3, load voltage remains at Vs as T1 is on.
Mode III: As T1 is turned off at t3, ic becomes more than Io. After t3, ic supplies load current Io
and the excess current iD1 = ic – Io is conducted through diode D1 as shown in Fig. 5.16 and
Fig. 5.17. The voltage drop in D1 due to ic – Io keeps T1 reverse biased for (t4 – t3) = tc; this is shown
in the wave form for vT1. At t4, in case vc exceeds Vs, FD is forward biased and it comes into
conduction, otherwise mode IV follows.
Mode IV: At t4, ic reduces to Io, as a result iD1 = 0 and diode D1 is therefore turned off. After t4,
a constant current equal to Io flows through source Vs, C, L, D2, and load and therefore, capacitor
C is charged linearly to source voltage Vs at t5, Fig. 5.17. So, during the time (t5 – t4), ic = Io.
As D1 is OFF, voltage across T1 equals the capacitor voltage vc. The load voltage is now the
difference between the supply voltage and voltage across T1 which is increasing as C gets charged
with the polarity as shown in Fig. Thus the load voltage decreases as the capacitor voltage increases.
214 Power Electronics: Devices and Circuits
Mode V: Mode V starts when the capacitor is overcharged to a voltage that is to some extent, more
than the source voltage making the free-wheeling diode conduct. With this, the current ic diminishes
to zero turning off the diode D2. Free-wheeling continues until t = T when the cycle restarts. The
merits of this chopper can be enumerated as:
(i) Commutation is reliable so long as the load current is less than the peak commutating
current icp.
(ii) Capacitor is always charged with the correct polarity.
(iii) Auxiliary thyristor TA is naturally commutated as its commutating current passes through
zero value in the ringing circuit formed by L and C.
Io
Io t
Vc
Vs Vs t
Vo
2V s
T1 T3 t
ic T
C Vc ic
+ ic + Io Io
t
T4 T2
Vs FD Vo Load ifd
Io
ifd t
iT1,iT2
– –
Io
t
iT3,iT4
(a)
Io t
vT1,vT2
tc Vs
t
vT3,vT4
0 Vs t
–Vs t3 t4
t1 t2
Modes I II III
(b)
Fig. 5.16 Load commutated chopper: (a) circuit, and (b) waveforms.
Initially, the capacitor C is charged to a voltage Vs with upper plate negative and lower plate
positive as shown in Fig. 5.16. The load current is assumed to be constant and ripple free. The
working of this chopper can be explained through its various modes as follows shortly.
DC to DC Converters (Choppers) 215
Mode I: With the capacitor C initially charged to Vs with lower plate positive, the load
commutated chopper is ready for operation. When thyristor pair (T1, T2) is triggered at t = 0, load
voltage rises to Vo = Vs + Vc = 2Vs, as evident from the circuit consisting of Vs, T1, C, T2, and load.
Load current now flows from source to load as shown in Fig. 5.16(b).
(a) The capacitor C is charged linearly by the constant load current Io from Vs at t = 0 to
(–Vs) at t1 which means the upper plate of the capacitor is positive. When the capacitor voltage
becomes (–Vs), the load voltage falls from 2Vs to Vo = Vs – Vs = 0 at t1. At t = 0, when (T1, T2) are
turned on, (T3, T4) are reverse biased by capacitor voltage, that is, at t = 0, vT3 = vT4 = –Vs. At t1,
vT3 = vT4 = Vs, that is, T3, T4 are forward biased at t1.
Mode II: At t1, capacitor C is slightly overcharged and as a result, free-wheeling diode gets
forward biased and load current is transferred from (T1, T2) to D. From t1 onwards, load current
freewheels through D, Fig. 5.16, during (t2 – t1), Vc = –Vs; Vo = 0; ic = 0; ifd = Io; iT1 = iT2 = 0;
vT3 = vT4 = Vs; and vT1 = vT2 = –DVs as capacitor is overcharged by a small voltage DVs.
Mode III: At t2, thyristor pair (T3, T4) is triggered and load voltage at once becomes Vo = Vs
+ Vc = 2Vs. Thyristor pair (T1, T2) is reverse biased by vc, this pair is therefore, turned off at t2. The
load current, now flowing through Vs, T4, C, T3, and load, charges capacitor linearly from (–Vs) at
t2 to Vs at t3, Fig. 5.16. Load voltage accordingly falls from 2 Vs at t2 to zero at t3. During (t3 – t2);
ic = –Io; iT3 = iT4 = Io but vT1 = vT2 = –Vs at t2 and Vs at t3, that is, thyristor pair (T1, T2) gets forward
biased at t3.
At t3, capacitor C is somewhat overcharged and D gets forward biased, and therefore, after t3,
load current freewheels through D and the load. This is not shown in Fig. 5.16, when T1, T2 are
turned on at t4, mode I repeats. The merits and demerits of this chopper can be stated as follows:
Merits
(i) It is capable of commutating any amount of load current.
(ii) No commutating inductor is required that is normally costly, bulky, and noisy.
(iii) As it can work at high frequencies in the order of kHz, filtering requirements are minimal.
Demerits
(i) Peak load voltage is equal to twice the supply voltage. This peak can however be reduced
by filtering.
(ii) For high power applications, efficiency may become low because of higher switching losses
at high operating frequencies.
(iii) Free-wheeling diode is subjected to twice the supply voltage.
(iv) The commutating capacitor has to carry full load current at a frequency that is half the
chopping frequency.
A multiphase chopper consists of two or more choppers connected and operating in parallel. A two-
phase chopper shown in Fig. 5.17 is the connection of two individual choppers in parallel. Similarly,
three choppers connected in this manner constitute a three-phase chopper.
If two or more choppers are operated in parallel and phase shifted from each other, the ripple
amplitude decreases and ripple frequency increases.
A multiphase chopper may be operated in either of the two modes, namely
216 Power Electronics: Devices and Circuits
i1
CH1 Io
t
i i1 i2
CH2 Io Io
+ i2
t
i
Vs D2 Load 2Io
D1
Ton
– t
T
(a) (b)
i1 i1
Io Io
t t
T
i2 Io i2 Io
t t
i i
Ton Io
t t
T/2
(c) (d)
Fig. 5.17 Multiphase (two-phase) chopper: (a) circuit, (b) waveforms, k = 0.3 in phase mode,
(c) waveforms, k = 0.3 phase shifted mode, and (d) waveforms, k = 0.5 phase shifted mode.
operation of multiphase chopper for k = 0.5, the input supply current is continuous and without any
ripple (Fig. 5.17(d)).
A multiphase chopper can be used where large load current is required. The advantages of this
chopper over a single chopper lies in reduced ripple amplitude and increased ripple frequency of
its input current. As a result, size of the filter for a multiphase chopper is reduced. There are also
disadvantages of multiphase choppers that can be listed as:
(i) extra commutation circuits,
(ii) additional external inductors, and
(iii) complexity in the control logic.
C1 C2
AC Load
0 0 0
Fig. 5.18 The circuit layout of SMPS and waveforms at different stages of operation.
218 Power Electronics: Devices and Circuits
The converter configurations that would be discussed in this section are those in which the load
directly comes into contact with the input dc voltage source or through a circuit element. That is,
the load is not electrically isolated from the input dc source. This class of converters is referred to
as dc to dc converters without electrical isolation.
There are several dc to dc converter configurations that are adopted in switch mode power
supplies. The most important among them are:
1. The buck (step down) converter — also known as forward converter.
2. Boost (step up) converter — also known as fly back converter.
3. Buck–boost converter and
4. Cük converter.
The input to the converter may be the dc output derived from a single phase or three-phase
diode bridge rectifier or the output from a photovoltaic cell. This unregulated dc input voltage is
applied to the load at a high frequency by means of power semiconductor switches such as MOSFET,
IGBT or GTO thyristor. These switches are gate controlled devices that can operate at high to very
high frequencies (40 – 200 kHz). The supply is connected to the load intermittently by the switches.
That is, there is an ON period followed by an OFF period. The inductor L, of the converter stores
energy during the ON period of the switch, as the current flows through the inductor when the supply
is connected to the load. This stored energy is transferred to the capacitor C through the
freewheeling diode (FWD) during the following OFF-period, when the switch is opened. Depending
on the switch frequency, filter inductance and capacitance, the inductor current can be continuous
or discontinuous. The voltage and current waveforms depicting continuous mode of operation are
shown in Fig. 5.20.
DC to DC Converters (Choppers) 219
Fig. 5.20 Buck converter waveforms for continuous mode: (a) Output voltage waveform,
(b) inductor current, (c) source current, (d) freewheeling diode current and (e) load
current.
Mathematical analysis
The following assumptions are made to simplify the analysis:
(1) The switching device is ideal.
(2) The output voltage (Vo) is constant because of the large value of C, and
(3) The rise and fall of the inductor current is linear because of high switching frequency. This
results in constant voltage across L.
Vs Vo
'I L Ton (5.15)
L
L 'I L
Therefore Ton
Vs Vo
220 Power Electronics: Devices and Circuits
DIL values will be equal in magnitude when the output current attains steady-state. Equating
(5.15) and (5.16),
Vo = KVs and K < 1, as Vo is always less than Vs.
Also, the switching frequency is given by
1 1 1
f
T Ton Toff L 'I L L 'I L
(Vs Vo ) Vo
1 Vo (Vs Vo )
(5.17)
L 'I L Vs
Vo (Vs Vo )
'I L
LVs f
Vs K (1 K )
(5.18)
fL
It shows that the current ripples get reduced for increasing values of f and L. The maximum
and minimum inductor current are given by
'I L
I max Io
2
and
'I L
I min Io
2
where Io is the average value of load current io.
The buck regulator is simple, requires only one transistor, and has high efficiency greater than
90%. The di/dt of the load current is limited by inductor L. However, the input current is
discontinuous and a smoothing input filter is necessary. It provides one polarity of output voltage
and unidirectional output current. It requires a protection circuit in case of possible short circuit
across the diode path.
The steady state waveforms corresponding to is, iL, VL and load current i0 are shown in Fig. 5.22.
Fig. 5.22 Boost converter waveforms: (a) inductor/source current, (b) inductor voltage and
(c) load current.
Mathematical analysis
The following assumptions are made to simplify the analysis:
(1) The rising and falling current in the inductor L is linear.
(2) The capacitance ‘C’ is very large. Therefore, the output voltage Vo and also the load current
are constant.
ON period
The voltage impressed across the inductor during ON period is Vs. During this period, the inductor
current rises linearly from the minimum level, I1 to a maximum level, I2.
222 Power Electronics: Devices and Circuits
Therefore, DIL = I2 – I1
'I L
VL L (5.19)
Ton
or
VL
'I L Ton (5.20)
L
Since the drop across the switch is zero, VL = Vs
L 'I L
Therefore, Ton (5.21)
Vs
OFF period
The voltage applied to the inductor during OFF period of the switch is the difference between the
output voltage, Vo and the source voltage Vs. As the output voltage is greater than the source
voltage, the current IL falls linearly from I2 to I1. This fall in current should be equal to DIL when
the switching operation attains steady state.
Therefore,
L ( I 2 I1 )
VL Vo Vs (5.22)
Toff
L 'I L
And Toff (5.23)
Vo Vs
Toff (Vo Vs )
And 'I L (5.24)
L
values will be equal in magnitude when the output current attains steady-state.
Equating (5.20) and (5.24),
Vs
Vo
1k
Vo
where k=
Vs
As the switching device is ideal, power input to the converter is equal to power output from the
converter. i.e.
VsIs = VoIo
Io
Therefore, Is
1 k
1 1 Vs (Vo Vs )
f
T Ton Toff Vo 'I L L
Vs k
'I L (5.25)
fL
The effect of high frequency, f and inductance, L of the inductor is to reduce the ripple values.
DC to DC Converters (Choppers) 223
When the switch is ON, the current through the inductor increases, allowing the inductor to store
energy from the supply. When the switch is turned off at the end of the on-period, the fall in inductor
current generates a negative voltage across the inductor (upper side negative), which makes the
cathode of the diode negative and provides another path of current through the capacitor and the
load. During the off period, the stored inductor energy is transferred to the capacitor and the load.
Both the input and diode currents are discontinuous. However, the inductor current could be
continuous or discontinuous. But Vo remains constant due to large value of C. The load current Io
will remain constant because Vo is constant. Current and voltage waveforms for continuous inductor
current are shown in Fig. 5.24.
Fig. 5.24 Buck boost waveforms: (a) inductor current, (b) source current and (c) diode current.
224 Power Electronics: Devices and Circuits
Mathematical analysis
The assumptions are same as it was made in the previous cases. They are
ii(i) The switching device is ideal.
i(ii) The output voltage (Vo) is constant because of the large value of C, and
(iii) The rise and fall of the inductor current is linear. This results in constant voltage across L.
I 2 I1 'I L
VL L L Vs (5.26)
Ton Ton
L 'I L
Hence, Ton
Vs
During the off-period, the voltage across the inductor is negative and the current falls from
I2 to I1 the inductor voltage is given by
I 2 I1 'I L
VL L L Vo (5.27)
Toff Toff
L 'I L
Hence, Toff
Vo
DIL values will be equal in magnitude when the output current attains steady-state.
Equating (5.26 and (5.27)), for LDIL
Vs Ton Vo Toff
'I L
L L
or
Ton k
Vo Vs Vs
Toff 1k
It is evident from the above equation, that the converter operates in buck mode for k less
than 0.5 and operates in boost mode when k is greater than 0.5.
If a lossless converter system is assumed, input power = output power.
Vo k
Is Io Io
Vs 1 k
1 1 VsVo
f
T Ton Toff L 'I L (Vo Vs )
DC to DC Converters (Choppers) 225
VsVo Vs k
'I L (5.28)
fL (Vo Vs ) fL
The effect of high frequency f and inductance L of the inductor is to reduce the ripple values.
production of SMPS. At such high frequency, ferrite core is used in isolation transformers. In normal
silicon steel transformers the hysteresis loop is quite wide leading to higher switching losses when
operating at higher frequencies. But ferrite core because of narrow B–H loop offers very low
hysteresis loss even at high frequencies.
The following dc–dc converter configurations are now discussed briefly.
(1) Fly back converter
(2) Push pull converter
(3) Half bridge converter
(4) Full bridge converter
When power MOSFET is turned on, supply voltage Vs appears across the transformer primary with
dotted terminal positive.
Hence the primary voltage of the transformer is V1 = Vs. The corresponding induced voltage
in the secondary is V2, with the dotted terminal of the secondary becoming positive.
That is, V2 = (Vs/N1) N2. The voltage, v2 reverse biases diode D. Filter capacitance C is assumed
large enough so that the capacitor voltage vc (t) (= load or output voltage Vo) is taken as almost
constant. When the MOSFET switch is turned off a voltage of opposite polarity is induced in the
primary and secondary windings. Voltage across the transformer secondary now, is,
v2 = –Vo = –(Vs/N1) N2. Diode D is now forward biased and starts conducting a current iD. As
a result, magnetic energy in stored the transformer core is transferred partly to load and partly to
the capacitor as additional charge.
Wave forms for v1, v2, transformer magnetizing current im and diode current iD shown Fig. 5.27
represent the steady state condition of the converter for a given value of duty cycle k.
DC to DC Converters (Choppers) 227
Fig. 5.27 Waveforms: (a) primary voltage, (b) secondary voltage, (c) magnetizing current, and
(d) diode current.
k 1
It can be shown that the load voltage, Vo Vs (5.30)
1k a
N1
where a = , transformation ratio and k = duty cycle.
N2
From the inspection of Eq. (5.30) it is found that the voltage ratio is same as that of buck boost
converter without transformer isolation. Also the negative polarity of output voltage associated with
the buck boost converter is removed in this converter configuration. Another parameter is the
voltage across the switch on open circuit given by,
Vo Vs
Voc Vs (5.31)
a 1k
This converter is useful for applications below 500 watts.
in both the secondary windings. As voltage v2 in the lower half of the secondary winding is negative
D2 gets forward biased and Vo = aVs as before.
This shows that voltage on the primary swings from +Vs to –Vs. The switches operate with duty cycle
of 0.5. The switches experience a voltage, Voc = 2Vs. This factor limits the application of this
configuration for low voltages only.
Two capacitors C1 and C2 have equal capacitance, therefore voltage across each of the two is
Vs . When M is turned on, voltage of C appears across transformer primary, i.e. V = Vs and
1 1 1
2 2
Vs
voltage induced in secondary is V2 = . N2 and diode D1 gets forward biased. When M2 is turned
2 N1
V
on, a reverse voltage of appears across transformer primary from C2, i.e. V1 = – s and voltage
2
Vs
induced in secondary winding is V2 = – . N2, therefore diode D2 gets forward biased. This means
2 N1
V V
that transformer primary voltage swings from – s to + s . Average output voltage, however, is
2 2
Vs 0.5Vs
Vo = . N2 = .
2 N1 a
When M1 is off, open circuit voltage across M1 terminals is Voc = Vs. When M2 is off, as before
Voc = Vs. For HVDC applications, half-bridge converter is preferred over push–pull converters.
When power MOSFETs M1 and M2 are turned on simultaneously, voltage Vs appears across
V
transformer primary, i.e. v1 = Vs and secondary voltage v2 = s N 2 = aVs. Diode D1 gets forward
N1
230 Power Electronics: Devices and Circuits
biased and when M3 and M4 are turned on together, the primary voltage is reversed, i.e. v1 = –Vs
Vs
the secondary voltage and v2 = – N 2 = –a Vs. Therefore, diode D2 now begins to conduct and
N1
the output voltage is again Vo = a Vs.
The open circuit voltage across each MOSFET is Voc = Vs. Among the four converter
configurations the full-bridge converter operates with minimum voltage and current stress on the
power MOSFET. It is therefore very popular for high power applications above 750W.
The overall size of SMPS is dependent on it operating frequency of the converter.
The main advantages of SMPS over linear power supplies are:
(1) For the same power rating, SMPS is of smaller size, lighter in weight and possesses higher
efficiency.
(2) A SMPS is less sensitive to input voltage variations.
The disadvantages of SMPS are:
(1) SMPS is a source of both electromagnetic and radio frequency interferance due to high
frequency switching.
(2) Control of radio frequency noise requires the use of filters on both input and output of
SMPS, and this adds to the cost and size of SMPS.
Since the advantages possessed by SMPSs far outweigh their shortcomings, they are most
widely used as power supply units.
PWM inverters and switch mode power supplies employ PWM methods with advantage for the
control of their outputs. Here, the power semiconductor switches are subjected to ‘hard’ switching,
i.e. they have to turn on and turn off the entire load current at high voltages. The switch experiences
high switching stress as the result of this. Switching power losses are also high as seen from
Section 1.6. The steep rise and snapping of high current increases the EMI due to accompanying
di dv
large and . With the advent of fast switching devices, like PMOSFET and IGBT, etc. the trend
dt dt
is to use these devices in converters operating at high frequencies. There are distinct advantages
in high frequency operation. In PWM inverters, lower order harmonics are minimized in the output
voltage so the size of filter components gets substantially reduced. In SMPS, the unit becomes much
smaller and more compact. However, with increased operating frequency, there is a proportional rise
in switching power loss, switching stress, and EMI. The switching stresses and the losses can be
considerably reduced by arranging the switching devices in the converter circuit to operate into a
resonant circuit (series or parallel) such that either the current or voltage oscillates to a natural zero
at the instant of switching. The converter circuits that employ zero current switching (ZCS) or zero
voltage switching (ZVS) are called resonant converters. There are large numbers of circuit
topologies available with resonant converters.
Circuits for resonant turn-off of SCRs are described in Section 2.6.2 under commutation
methods and in Section 6.4 under series inverters. In these circuits, the switches feed into the
resonant circuit square pulses or square wave. If the pulse/wave frequency is close to the natural
DC to DC Converters (Choppers) 231
frequency of the LC network, an output that is almost sinusoidal is obtained. In this section,
principles of operation of two important resonant converter configurations are dealt with.
They are:
i(i) Zero current switching resonant converters.
(ii) Zero voltage switching resonant converters.
The switching device S in the figure can be either GTO, thyristor, BJT, power MOSFET or IGBT.
For low frequency range, GTO, thyristor, transistor or IGBT can be used while power MOSFET is
preferred for megahertz range. Inductor L and capacitor C constitute a resonant circuit whereas
di
L1 and C1 serve as a filter circuit. Inductor L limits of the switch current. Direction of current
dt
and voltage polarities as marked in figure are treated as positive.
Assumption made in the analysis of ZCS converter:
(1) Load current I0 is constant
(2) Filter inductance is relatively large so that the current through its almost constant
(3) The device S is off i.e., iL = 0 to start with. Capacitor voltage Vc = 0, as the freewheeling
diode is conducting.
(4) iL1 = iD = I0, the load current.
The circuit operation is studied for its five modes, modes 1–5. These modes repeat in the same
order, in the steady state.
Mode I, ID = I0 – IL
Fig. 5.32(a) Equivalent circuit for mode I.
diL
Therefore, Vs L
dt
Therefore integrating
Vs
iL t
L
i.e. the inductor or switch current IL rises linearly from zero value. The diode current iD is given by
Vs
ID Io I L Io t (5.32)
L
Vs
At t = t1, I L t1 Io
L
Io L
Therefore, t1
Vs
Also, at t = t1, iD becomes = 0 as iL takes over the conduction of the entire load current. The
diode D gets turned off. As a result of this, the capacitor is now ready to get charged by the source
voltage, VsT thus mode I ends giving way to mode II.
Mode II (0 £ t £ t2): Switch S remains on. As D turns off at t = 0, current Io flows through Vs,
L, L1 and R. In Fig. 5.32(b), constant current through L1 and R is represented by current source Io.
Also, a current ic begins to build up through resonant circuit consisting of, L and C in series. The
inductor current is, therefore, given by
iL = Io + Ic = Io + Im sinw0t (5.33)
C Vs L
where I m Vs and X 1
. Here Z o is the characteristic impedance of the
L Zo LC C
resonant circuit.
The capacitor current is ic = Im sin w0t and capacitor voltage Vc, is given by
Vc(t) = Vs(1 – cosw0t)
DC to DC Converters (Choppers) 233
Mode II, iL = I0 + IC
Fig. 5.32(b) Equivalent circuit for mode II.
Q Q
The peak value of iL current, Ip = I0 + Im and it occurs at t = = LC . At this instant,
2X 2
Ë QÛ
Vc Vs Ì1 cos Ü Vs and I c im
Í 2Ý
Q
= p LC , capacitor voltage reaches peak value
When t = t2 =
X
Vcp = Vs(1 – cosp) = 2Vs and ic = 0.
Also, at t = t2, iL = Io, i.e. switch current drops from peak value (Io + Im) to Io.
Mode III (0 £ t £ t3): Switch S remains on. At t = 0, capacitor voltage is 2Vs. As ic tends to reverse
c
at t = 0, capacitor begins to discharge and force a current ic = Vs sin XP t opposite to iL, Fig.
L
5.32(c), so that inductor or device current iL is given by
Mode III, iL = Io – Ic
Fig. 5.32(c) Equivalent circuit for mode III.
234 Power Electronics: Devices and Circuits
iL = Io – Ic = Io – Im sinw0t
And capacitor voltage
Vc = 2Vs cos w 0t
Current iL falls to zero when t = t3, i.e. iL = 0 = Io – Im sin w0t3
ÈI Ø
or t3 = LC sin 1 É o Ù
Ê Im Ú
Ë I2 I2 Û
2Vs cos XP t3 2Vs Ì
m o Ü
At t = t3, vc Vc 3
Ì Im Ü
Í Ý
During this mode, ic = im sinw0t and as iL falls to zero at t3, switching device S gets turned off. Note
that current ic in this mode flows opposite to its positive direction, it is therefore shown negative
in Fig. 5.32(c) and in Fig. 5.33. At t = t3, the value of iC = –To.
Mode IV (0 £ t £ t4): As switch S is turned off at t = 0, capacitor begins to supply the load current
Io as shown in Fig. 5.32(d). Capacitor voltage at any time t is given by
CVcs
and t4
Io
Mode V (0 £ t £ t5): At the end of mode IV or in the beginning of mode V, capacitor voltage
vc is shown in Fig. 5.33. As vc tends to reverse at t = 0, diode D gets forward biased and starts
conducting, Fig. 5.32(e). The load current Io flows through the diode D so that iD = Io during this
mode.
Mode V, iD = Io
Fig. 5.32(e) Equivalent circuit for mode V.
This mode comes to an end when switch S is again turned on at t = t5. The cycle is now repeated
as before. Here t5 = T – (t1 + t2 + t3 + t4).
The waveforms for switch or inductor current iL, capacitor voltage vc, diode current iD, capacitor
current iC and voltage across switch S, vT are shown in Fig. 5.33. It is seen that during turn-on at
t = 0 (0 £ t £ t1), switch current iL = 0, therefore switching loss vTiL = 0. Similarly, at turn-off at
t = t3 (0 £ t £ t3), switch current iL = 0 and therefore vTiL = 0. It shows that the switching loss during
Vs
turn-on and turn-off processes is zero. The peak resonant current Im = must be more than the load
Zo
current, Io otherwise switch current iL will not fall to zero and switch S will not get turned off.
The load voltage can be regulated by varying the period t5. t5 obviously longer the period,
lower will be the load voltage.
236 Power Electronics: Devices and Circuits
converter has L, C as the resonant elements and L1, C1 constitute the filter circuit. The function of
resonant capacitor C is to produce zero voltage across the switch S. Diode D2 freewheels load current
Io. As the name suggests, the switch S in ZVS resonant converter is turned on and off at zero-voltage
across it.
The operation of this converter can be studied considering its five modes each represented by
the equivalent circuits shown in Fig. 5.35a–e. As before, the time origin t = 0 is redefined at the
beginning of each mode. Load current Io is assumed constant. The filter inductor current io is also
taken to remain constant at Io. It is because filter inductor, L1 is relatively large. Initially, switch
S is on and conducting current, Io. Therefore, inductor current iL1 = Io and initial voltage across
capacitor, C,Vco = 0. It is because the switch S across the capacitor is closed.
Mode I (0 £ t £ t1): At t = 0, switch S is turned off. From the equivalent circuit of mode I,
Fig. 5.35(a) it is seen that constant current Io flows through Vs, C and L. As a result, voltage across
Mode I, iL = Io
Fig. 5.35(a) Equivalent circuit for mode I.
C builds up linearly from zero to Vs (at time t = t1). Diode D2 is off. As the capacitor is charged
from zero to Vs, capacitor voltage vC is given by
Io
Vc t
C
dv
Since Io = C
dt
Io
At time t = t1, VC t1 Vs
c
CVs
or t1 =
Io
Mode II (0 £ t £ t2): At t = 0, the capacitor C is somewhat overcharged, i.e. vc > VS; therefore
diode D2 becomes forward biased and start conducting. Now a resonant current iL is set up in the
series circuit consisting Vs, C, L and D2 [Fig. 5.35(b)], where iL is given by iL = Io cos w0t.
Zo is the characteristic impedance of the circuit in ohms. The peak switch or capacitor voltage
Vpk occurs when
w0t = p/2
or
Q
t= LC and its value is
2
Vpk = VS + Vm = Vs + Io Zo
Q
At t = 0 iD2 = 0, at t = LC , iD2 = Io, and at t = t2, iD2 = 2Io.
2
It may be observed from the waveforms that a ZVS resonant converter is the dual of ZCS
resonant converter.
DC to DC Converters (Choppers) 239
Mode III (0 £ t £ t3): Initially, i.e. at t = 0 Vc = Vs and iL = –Io. Taking t = 0 at the commencement
of the mode [Fig. 5.35(c)], capacitor voltage is given by
Mode III vc = vs at t = 0
Fig. 5.35(c) Equivalent circuit for mode III.
VC = VS – Vm sinw 0t
iL = –Io cosw 0t
so that iD2 = Io – Io cosw 0t
At time t= t3, Vc = 0, iL = IL3 and iD2 = Io – IL3.
This gives
0 = VS – Vm sinw0t3
ÈV Ø C
or t3 LC sin 1 É s Ù
Ê Io Ú L
At the end of this mode, i.e. at t = t3, Vc = 0; as a result reverse bias across D1 vanishes and iL begins
to flow through D1.
Mode IV (0 £ t £ t4): During this mode, capacitor voltage is clamped to zero by diode D1
conducting negative current iL. As soon as antiparallel diode D1 begins to conduct at t = 0, gate
drive is applied to switch S. The inductor current iL rises linearly from –IL3 to zero. At this instant,
reverse bias of D1 vanishes and already gated switch S turns on. This shows that switch S turns on
at zero voltage and zero current. After this, current rises linearly to Io in the circuit formed by Vs,
S, L and D2 [Fig. 5.35(d)]. The linear variation of current from IL3 is given by
Vs
Mode IV iL I L3 t
L
Fig. 5.35(d) Equivalent circuit for mode IV.
240 Power Electronics: Devices and Circuits
Vs
iL I L3 t
L
Vs
At t = t4, iL Io IL3 t 4 . This gives,
L
ÈLØ
t4 Io I L3 É
Ê Vs ÙÚ
Diode current iD2 = Io + IL. At t = 0, iD2 = Io + IL3 and time t = t4, iD2 = 0. During modes II, III
and IV, diode D2 is in conduction, therefore VD2 = 0, as shown in the waveforms of Fig. 5.36.
Mode V, IT = iL = Io
Fig. 5.35(e) Equivalent circuit for mode V.
Mode V (0 £ t £ t5): At the end of mode IV, or in the beginning of mode V at t = 0, iL reaches
Io and therefore diode D2 turns off. Switch S continues conducting Io as shown in Fig. 5.35(e). Note
that voltage VD2 = VS during this mode. Mode V ends at t = t5 when switch S is turned off again
at zero voltage. The cycle now repeats as before.
The various waveforms for these five modes are now sketched in Fig. 5.36. It is seen from these
waveforms that for a ZVS resonant converter:
i(i) switch, or inductor current is limited to Io
(ii) average value of output voltage Vo can be controlled by controlling the interval t5.
This shows that average power delivered to load can be controlled by regulating the output
voltage Vo for given load current Io.
Vs V
In ZCS the switch is required to handle a peak current of I o . For natural turn-off, s must
Zo Zo
DC to DC Converters (Choppers) 241
be more than Io. This implies that there is an upper limit to the value of load current in ZCS
converters.
In ZVS, the switch is required to withstand a peak voltage of Vs + IoZo. This shows that peak
switch voltage is dependent on the load current Io. A wide variation of load current requires a large
voltage variation across the switch. As peak voltage across the switch is a dominating factor, ZVS
Converters are used only for constant load applications.
In general, ZVS is preferred over ZCS at high switching frequencies, primarily due to internal
capacitances associated with the switch.
SOLVED EXAMPLES
EXAMPLE 5.1 A single-quadrant dc chopper has a resistive load of 10 W and an input voltage
of 230 V. The chopping frequency is 1 kHz and on time is 0.4 ms. Determine the average load
current Io,av and power delivered to the load.
242 Power Electronics: Devices and Circuits
Solution
Given
E = 230 V
f = 1 kHz
Ton = 0.4 ms
The duty cycle, k = (0.4/1) ms = 0.4
Therefore, the average load voltage, Vo = Vs k
= 230 (0.4)
= 92 V
Average load current, Io,av = Vo/R
= 92/10
= 9.2 A
Solution
Data given
E = 300 V
Ton = 20 ms
Toff = 10 ms
RL = 5W
20
Duty ratio, k = 0.667
20 10
1 1 1
Frequency, f = = 33.33 Hz
T Ton Toff 30 ms
Vo,av = Ea = 300 ´ 0.667 = 200.1 V
200.1
Io,av = 40.02 A
5
EXAMPLE 5.3 A 400 V dc source supplies RLE load through a chopper. For the duty cycle of
chopper, a = 0.25, find the chopping frequency to limit the amplitude of load current excursions
to 10 A. Take load L = 0.5 H and R = 0.
Solution
Vo = aVs = 0.25 × 400 = 100 V
DC to DC Converters (Choppers) 243
But
Vo = E = 100 V
di
L 100 400
dt
di 'i
L # L 300
dt 't
10
L 300
Ton
0.5 10
Ton 16.67 ms
300
Ton
But, B
T
16.67
T =
0.25
= 66.68 ms
Chopping frequency, f = 1/T
= 1/66.68
= 15 Hz
EXAMPLE 5.4 For a type A chopper, express the following variables in terms of Vs, R, Io, and
duty cycle k in case the load current is constant at a value Io = Vo/R and Vs is the source voltage.
(a) Average output voltage and current
(b) Output current at the instant of commutation
(c) Average and rms values of free-wheeling diode currents
(d) rms value of the output voltage
(e) Average and rms values of the thyristor current.
Solution
(a) Vo = kVs where k is the duty cycle
Io = Vo/R
(b) Output current at the instant of commutation = Vo/R
(c) Average value of free-wheeling diode current = (1 – k) Io
rms value of free-wheeling diode current = (1 k )1/ 2 Io
(d) rms value of the output voltage = Vs k
(e) Average value of thyristor current = k Io
rms value of thyristor current = k1/ 2 I o
EXAMPLE 5.5 A step up chopper has input voltage of 220 V and output voltage of 660 V. If
the off time of the chopper is 100 ms, compute the pulse width of the output voltage. In case the
pulse width is reduced by 50%, find the new output voltage.
244 Power Electronics: Devices and Circuits
Solution
1
(i) From Eq. (5.6) 660 220 ,
1B
Therefore,
2
B
3
Ton Ton
Ton Toff Ton 100 Ps
Solving for Ton, Ton = 200 ms and T = 300 ms
(ii) If Ton = (1/2) × 200 = 100 ms
Toff = 200 ms, since T = 300 ms
1
The new output voltage = 220 330 V
1
1
3
EXAMPLE 5.6 For an ideal chopper, the input and output voltages are 100 V and 60 V, respectively.
If the output current is 10 A, determine the following: (a) the duty cycle, (b) input current (c) average
and RMS value of the switch currents (d) average and RMS value of freewheeling diode current,
(e) the repetitive peak forward and reverse voltages of the switch and the freewheeling diode.
Solution
Vo 60
(a) The duty cycle, K = 0.6
Vs 100
Vo I o
(b) The input current of the ideal chopper, I s
Vs
60 10
= = 6A
100
(c) The average value of the switch current = 10 ´ 0.6 = 6 A
RMS value of the switch current = 10 0.6 = 7.7 A
d) Average value of freewheeling diode current = (1 – 0.6)10 = 4 A
RMS value of freewheeling diode current = 0.4 10 = 6.3 A
(e) Repetitive peak forward voltage of the switch = 100 V
Repetitive peak reverse voltage of the switch = 0 V
(f) Repetitive peak forward voltage of the diode = 0 V
Repetitive reverse voltage of the freewheeling diode = 100 V
EXAMPLE 5.7 A step down dc chopper is connected to an R = 5 W and L = 10 mH. The dc supply
voltage is 100 V. The chopper is switching at a frequency of 1 kHz with a duty cycle of 50%.
Determine the load current, Io and the peak to peak ripple current as an absolute value and as
percentage of dc value.
DC to DC Converters (Choppers) 245
Solution
(a) The dc component of the output voltage, Vo = kVs = 0.5 ´ 100 = 50.
50
The dc load current, Io = 10 A.
5
1
(b) The chopper period, T= = 1 ms.
1000
For k = 0.5, Ton = 0.5 ms
L
Load time constant, t= = 2 ms.
R
Ë k
T Û
Vs Ì 1 e U Ü
I max Ì T Ü
RÌ Ü
Í e U
Ý
Ë kT Û
Vs Ì e U 1 Ü
I min Ì Ü
RÌ T Ü
Í e U
Ý
Substituting the values Vs, k, T, t, and R
Imax = 11.24 A
Imin = 8.75 A
The peak to peak ripple current = 11.24 – 8.75 = 2.49 A
'I
%Ripple current = = 2.49 100 = 24.9%
Io 10
EXAMPLE 5.8 In Problem 5.7 if the chopper frequency is increased four times to 4 kHz, other
data remaining the same:
(a) Calculate the new value of the current ripple
(b) If only the smoothing inductor value is increased to 40 mH, retaining all the other values
as in Problem 5.7, what is the percentage ripple current?
Compare the results of problem 5.8a and b.
Solution
The period T = 0.25 ms, Ton = 0.125 ms, Toff = 0.125 ms, t = 2 ms. and T/t = 0.125
Using the equations for calculating Imax and Imin,
Imax = 10.31 A
Imin = 9.69 A
246 Power Electronics: Devices and Circuits
REVIEW QUESTIONS
5.1 Draw the circuit diagram of a dc chopper with RL load and explain its operation with
waveforms. Derive an expression for the output voltage.
5.2 Explain the operation of a two quadrant dc chopper with a neat diagram.
5.3 (a) Explain the operation of step down thyristorised chopper with RL load.
(b) State the advantages of using IGBT instead of SCR in a dc chopper.
5.4 What is a regenerative chopper? Discuss its operation with circuit and waveforms.
5.5 Explain the operation of a step up dc chopper.
5.6 Give the complete time domain analysis of a type A chopper feeding RLE load. Draw
necessary waveforms and derive relevant expressions.
5.7 Draw the power circuit of a step down chopper and explain its operation with RL load.
5.8 Draw the power circuit for a step down dc chopper and explain its operation for an inductive
load. What is the role of the free-wheeling diode in such choppers?
5.9 Draw a scheme for the speed control of a dc drive using a dc chopper and explain its
operation.
5.10 What is a multiphase chopper? Explain it in phase-shifted operation. Enumerate the merits
and demerits of multiphase chopper.
5.11 What is time ratio control (TRC)?
5.12 Explain current limit control of dc chopper.
5.13 Draw the circuit of a two-quadrant chopper and explain its working.
5.14 With the help of voltage and current waveforms, explain the working of a first-quadrant
chopper. Give the complete time domain analysis of type A chopper.
5.15 Derive the expression for the Io(max) and Io(min) for type A chopper, supplying RLE load.
Also, derive the expression for per unit ripple current.
5.16 Describe the voltage commutated chopper with associated voltage and current waveforms as
a function of time.
5.17 Discuss the working of a load commutated chopper with associated voltage and current
waveforms. Show voltage variation across each pair of SCRs as a function of time.
5.18 Explain the operation of a buck converter.
5.19 What are the merits and demerits of buck-boost converter?
DC to DC Converters (Choppers) 247
5.20 What are the demerits of a linear power supply when compared to SMPS?
5.21 What are the advantages of resonant converters?
5.22 What are the limitations of ZCS resonant converter?
5.23 Explain the operation of a ZVS resonant converter considering all the five modes.
PROBLEMS
5.1 A step down dc chopper is connected to an RL load with sufficient inductance to make the
load current ripple free. The dc supply voltage is 250 V and R = 15 W. Estimate the average
load voltage and average load current for a duty ratio of 0.8. Also draw the load voltage and
load current waveform for a chopping frequency of 400 Hz. [Ans. 200 V, 13.34 A]
5.2 A dc chopper is connected to an inductive load with a resistance of 5 W. The ON time and
OFF time of the chopper are 20 ms and 10 ms, respectively. The dc supply voltage is 300 V.
Estimate the duty ratio, chopping frequency, average load voltage and average load current.
[Ans. 0.666, 33.33 Hz, 199.8 V, 39.96 A]
5.3 A step down dc chopper is connected to a resistive load of 2 W. The supply voltage is 48 V
dc. The ON time and OFF time of the chopper are 400 ms and 100 ms respectively. Determine
the chopping frequency, duty ratio, and average and rms values of output voltage and
current. Also calculate the power consumed by the load.
[Ans. 2 kHz, 0.8, 38.4 V, 19.2 A]
5.4 A dc chopper with a free-wheeling diode feeds a dc motor with an armature inductance of
15 mH and resistance of 1 W. The dc source voltage is 200 V. The ON time and OFF time
are 2 ms and 0.5 ms respectively. Determine the armature current when the back emf of the
motor is 155 V. Assume the chopper to be ideal and current to be continuous.
[Ans. 5 A]
5.5 A step down dc chopper has a resistive load of 10 W and the input voltage is 220 V. The
chopping frequency is 1 kHz. For a duty cycle of 60%, estimate the average load voltage,
average load current, and the on time of the chopper. Also draw the load voltage waveforms.
[Ans. 132 V, 13.2 A, 6 ms]
5.6 A single quadrant dc chopper is connected to an inductive load with a resistance of 5 W. The
input dc voltage is 60 V. The ON time and OFF time of the chopper are 500 ms and 300 ms
respectively. Estimate the average load voltage, average load current, and frequency of
chopping. Also draw the power circuitry and load waveform.
[Ans. 37.5 V, 7.5 A, 1.25 kHz]
5.7 A step down dc chopper is connected to an RL load with R = 10 W and L = 1.5 H. The dc
supply voltage is 200 V. The frequency of chopping and the duty ratio are 1 kHz and 0.6
respectively. Determine the average load voltage, average load current, and the ON time of
the chopper. [Ans. 1.20 V, 12 A, 0.6 ms]
5.8 A dc chopper is connected to an inductive load with a resistance of 5 W. The ON time and
OFF time of the chopper are 20 ms and 10 ms respectively. The dc supply is 300 V. Estimate
the duty ratio, chopping frequency, average load voltage, and average load current.
[Ans. 0.67, 33.3 Hz, 201 V, 40.2 A]
248 Power Electronics: Devices and Circuits
5.9 A single quadrant chopper has a resistive load of 10 W and an input voltage of 230 V. The
chopping frequency is 1 kHz and ON time is 0.4 ms. Determine the average load voltage and
average load current. [Ans. 92 V, 9.2 A]
5.10 A step down chopper is connected to a resistive load of 15 W. The ON time and OFF time
of the chopper are 4 ms and 1 ms respectively. The input supply is 120 V dc. Estimate the
duty ratio, chopping frequency, average load voltage, and average load current.
[Ans. 0.8, 200 Hz, 96 V, 6.4 A]
5.11 A dc chopper has a resistive load of 10 W and the input dc voltage is 220 V. The chopping
frequency is 1 kHz and the duty cycle is 50%. Determine the average output voltage, rms
output voltage, and the average output current. [Ans. 110 V, 155.56 V, 11 A]
5.12 A dc chopper has an input voltage of 230 V and an output voltage of 150 V. It is operating
at a frequency of 1 kHz. Find the ON time and OFF time of the chopper.
[Ans. 0.65 ms, 0.35 ms]
5.13 An RLE load is fed by a chopper from 500 V dc source R = 0, L = 0.08 H and a = 0.2. Find
chopper frequency to limit to amplitude of the current excursion to 10 A.
5.14 A single quadrant dc chopper is connected to a load consisting of a resistance of 10 W and
an inductance of 50 mH. The ON time and OFF time of the chopper are 8 ms and 12 ms
respectively. The dc supply voltage is 200 V. Determine the duty ratio, the chopping
frequency, average load voltage, and average load current. [Ans. 0.4, 50 Hz, 80 V, 8A]
5.15 A step down dc chopper is connected to a resistive load of 5 W. The dc supply voltage is
100 V. The ON time and OFF time of the chopper are 6 ms and 4 ms respectively. Determine
the duty ratio, chopping frequency, average load voltage, and average load current. Also
draw the load voltage waveform. [Ans. 0.4, 100 Hz, 60 V, 12 A]
5.16 A step down dc chopper is connected to a resistive load of 30 W. The dc supply voltage is
200 V. The duty ratio of the chopper is 0.8 with a chopping frequency of 400 Hz. Determine
the average load voltage, average load current, and ON time of the chopper.
[Ans. 160 V, 5.33 A, 2 ms]
5.17 A dc chopper supplies power to RLE load with R = 2 W, L = 10 mH, and E = 6 V. If this
chopper is operating at a chopping frequency of 1 kHz and with a duty cycle of 0.1 from
a 220 V dc supply, compute the minimum and maximum currents taken by the load.
[Ans. 9 A, 7 A]
5.18 A dc chopper is used to control the speed of a separately excited dc motor. The dc supply
voltage is 220 V, armature resistance Ra = 0.2 W, the motor constant Kaf = 0.8 V/rpm, and
the motor drives a constant torque load requiring an average armature current of 25 A.
Determine
i(i) the range of speed control and
(ii) the range of duty cycle.
Assume the motor current to be continuous.
1
[Ans. (i) 0 < N < 268 T r.p.m., (ii) < a < 1]
44
6
Inverters
6.1 PRELIMINARIES
A static power converter that converts dc input power into ac output power at any specified voltage
and frequency is called an inverter. The necessary dc input power may be drawn, for example, from
a battery being charged by a photovoltaic array. Some important applications of inverters are found
in adjustable-speed ac drives, induction heating, stand by aircraft power supplies, UPS
(Uninterruptible Power Supplies) for computers, and so forth.
This chapter describes the operation of single-phase, series and parallel type inverters, single-
phase and three-phase bridge type inverters.
6.2 CLASSIFICATION
The inverter circuits can be classified into many groups on the basis of different criteria as given
below:
(1) Based on the number of output phases
(a) Single-phase
(b) Three-phase
(2) Based on the methods of commutation
(a) Line-commutated
(b) Forced-commutated
A line-commutated inverter is connected to the ac supply to which it feeds the converted ac
power. The commutation of inverter SCRs is obtained by means of the line voltages and hence, the
name. Obviously, the output voltage and frequency of this type of inverter can only be the supply
voltage and the supply frequency. On the contrast, forced-commutated inverter is a stand-alone
inverter that can provide a variable voltage and variable frequency ac supply. In this type of inverter,
thyristors have to be forced-commutated by separate commutation circuits. Line-commutated
inverters cannot function as isolated voltage sources operating from dc sources or as variable
249
250 Introduction to Power Electronics
V +I
vo I io
+ V C
–V –I
V S S
I I
–
(a) (b)
Fig. 6.1 (a) Voltage source inverter, and (b) current source inverter.
The inverters can be fabricated using BJTs, thyristors, GTOs, IGBTs, and so on. This chapter
details the operating principles of parallel inverters, series inverters, and bridge type inverters.
Parallel inverters are a class of inverters where a capacitor connected in parallel with the load is used
to commutate a conducting thyristor by applying reverse voltage across the thyristor.
Complementary or class D commutation is employed to force commutate the SCRs.
primary is connected to the negative of the dc source via thyristors T1 and T2. A dc inductor L
is connected between the center-tap of the transformer primary and the positive terminal of the dc
source to prevent excessive capacitor current during switching operations. By alternately turning
on T1 and T2, the dc source is connected in alternative sense to the two halves of the transformer
primary, thereby inducing a square wave voltage across the secondary of the transformer. The
capacitor C is effectively in parallel with the load and hence, the name parallel capacitor
commutated inverter.
During the period when thyristor T1 is conducting, current flows through dc inductor, the left
half of the transformer winding OR, and T1 and back to the dc source. The source voltage Vdc is
applied to left half of the primary winding OR, induces 2Vdc across RS by autotransformer action.
Hence, the capacitor is charged to this voltage, 2Vdc with the polarity as shown in Fig. 6.2(a) with
the right side plate positive. The primary dc input voltage produces one half of ac output voltage
across the load. This is a square wave if the load is resistive.
If thyristor T2 is turned on, the source voltage Vdc is applied to the right half of the primary,
OS and in the secondary (load) side the other half of the output voltage is produced. Also, the
commutating capacitor C applies a reverse voltage equal to 2Vdc across the conducting thyristor T1
and turns it off. The capacitor discharges through T2, source, and the transformer primary OS and
charges in the opposite direction, with left side plate positive. The next cycle starts with the turning
on of T1, that leads to the commutation of conducting thyristor T2. In this manner, the current is
alternately conducted through each half of the transformer primary creating an alternating flux and
an ac voltage in the secondary.
The output voltage wave and voltage across T1 are shown in Fig. 6.2(b). It is observed that the
shape of the load voltage wave depends on the magnitude of the load. For heavy loads, it is
rectangular whereas for light loads, it is closer to the triangular form. The trigger pulses are
alternately applied to T1 and T2 to produce an ac voltage at the output. The frequency of the output
is dependent on the triggering frequency of the devices. The operation of the inverter is relatively
simple with pure resistance loads. However, for inductive loads, size of the capacitor has to be
increased since the capacitor in addition to commutation has to supply the lagging reactive power
to maintain the lagging load currents. If not, commutation failure may occur.
252 Introduction to Power Electronics
A O M B
L + E F
O C D
C
T1 D1 D2 T2 Vdc
– T2 retriggered
L
(a) (b)
Fig. 6.3 Modified parallel inverter (a) schematic circuit, and (b) load voltage and load current
waveforms.
The addition of feedback diodes D1 and D2 permits this circuit to operate reliably with widely
varying reactive loads without the need for increasing the size of commutating capacitor. Likewise,
the voltage applied to the SCRs is held to a value slightly greater than 2Vdc not only over wide
load power factor changes but also from no load to full load. Figure 6.3(b) shows the output voltage
and current waveforms under conditions when load power factor lags. Thyristor T1 conducts during
period CD when both the load voltage and the load current are positive. At D, thyristor T2 is turned
on to commutate thyristor T1. After the commutation transient, the load voltage gets reversed though
the current continues to flow through D2 in the same direction. Because of the reverse bias applied
by D2, T2 is turned off. At E, the load current becomes zero. Then the thyristor T2 will be triggered
Inverters 253
again. During the period EF, both load voltage and load current are negative. At F,
T2 is turned off by triggering T1. This means that the thyristors T1 and T2 have to be triggered twice
in their half cycles. This is accomplished in practice by gating the SCRs by a pulse train with
minimum duration of a quarter cycle. It is to be noted that interval OC and DE are load dependent.
The load voltage rises above Vdc during the periods OC and DE when feedback diodes D1 and D2
conduct.
The load voltage waveform is nearly rectangular and is not affected much by the magnitude
of the load current as well as by the nature of the load as it happens with the basic parallel inverter.
The output frequency depends on triggering frequency of SCRs. When variable frequency output
voltage is required, the output transformer should be designed such that it can operate at rated
voltage at the lowest possible frequency without going into saturation. Otherwise transformer
saturation takes place and the output voltage becomes zero. This leads to decrease in the voltage
across the commutating capacitor and hence commutation failure. Another important consideration
requires certain precautions to be adopted while the inverter is switching ON or OFF. While
switching OFF, the dc input must be switched OFF prior to the disconnecting of the gate supply
to the inverter. If the gate supply is removed first, the conducting SCR will continue to conduct
until dc input is removed. This results in transformer saturation accompanied by large line current.
Similarly, at the time of switching ON the inverter if dc supply is connected after the gating pulses
have been applied, there may not be sufficient time for the capacitor to be fully charged before the
first commutation occurs and there may be commutation failure. To avoid this mishap, the dc supply
is ensured before the gate circuit is energized. Thyristors must also be protected from large dv/dt
transients by means of snubber circuits.
As the operating frequency of parallel inverter is increased above 1 kHz, its efficiency begins to
fall sharply as the switching and the commutation losses increase. For efficient operation at
frequencies in the ultrasonic range, the series inverter possesses several advantages over its parallel
counterpart. The size of the commutating elements can be reduced as the operating frequency
increases.
In a series inverter, the commutating components (inductor and capacitor) are connected in
series with the load. The load resistor in series with the LC elements forms an underdamped circuit.
This circuit is excited by a dc supply on firing the SCR switch. The current in the circuit increases
from its zero initial value, reaches its maximum, and then decreases to zero. When the forward
current of the SCR reduces to zero, the device goes into the blocking state. This method of turn-
off is known as resonant turn-off or self-commutation. For self-commutation, a resonant circuit is
essential and the capacitor required for underdamping can be connected in series or parallel with
the load as shown in Figs. 6.4(a) and (b).
C
L R L
i C i
R
Load
Load
i i
a a
t t
(a) (b)
Fig. 6.4 Resonant commutation with (a) series capacitor, and (b) parallel capacitor.
T1 i
L
– C+ i
+ vc vL a b c t
vc
Vdc + VC
Vdc T2 R Vdc
Load
VC t
– vL
(a)
t
(b)
Fig. 6.5 Basic series inverter (a) schematic diagram, and (b) voltage and current waveforms.
The necessary condition to obtain this wave is that the series circuit consisting of commutating
components C, L, and load resistor R must be underdamped. Therefore,
4L
R2 (6.1)
C
The corresponding time period of oscillation is given by
T Q
2 1 R2
2 (6.2)
LC 4 L
At point ‘a’ of Fig. 6.5(b) the load current is zero and T1 is OFF. Now the capacitor is charged
to a voltage (VC + Vdc) in the reverse direction with the left side plate positive. The capacitor retains
this voltage during ab, which is the OFF period, Toff. This OFF period ensures proper turn-off for
T1. At b, T2 is fired and the capacitor C discharges through T2 and the series LCR circuit in the
reverse direction. This discharge current increases from zero to a maximum value and then decreases
to zero at c, where T2 also experiences resonant turn-off in the same manner as T1. Thyristor T1 will
be triggered again after the OFF period Toff becomes equal to ab and the next cycle begins.
Inverters 255
i2
i1
C1 T1
i1
T1
+ + L1
Vdc Vdc Load
– L1 –
Load C
R L2
R –
L2 C2
+ T2
i1
T2
(a) (b)
Fig. 6.6 Improved series inverter circuits.
256 Introduction to Power Electronics
and so are the capacitors C1 and C2. Since inductors are closely coupled the output frequency can
be higher than the ringing frequency.
Bridge inverters can produce single-phase or three-phase outputs. The input to a voltage source
inverter is a stiff dc voltage supply, which may be a battery or the output of a phase controlled
rectifier. Both single-phase and three-phase voltage source inverters are widely used in the industry.
Conventional thyristors, GTOs, power transistors, or power MOSFETs can be used as the switching
devices. To start with, the principle of operation of this class of inverters is explained using a single-
phase half bridge configuration.
+
+
ig1
V S1 D1 t Vo V/2
2 ig2
Vo ig1 Io S D Io Io
– t 0 D 1 2 S2 T t
V +
Load
Io V/2 1 t1
T/2
Vo S1 S1 –V/2
V S2 D2 t
2 0 T/2 S2 T
ig2 V/2
–
(a) (b) (c)
Fig. 6.7 Single-phase half bridge inverter (a) circuit, and (b), and (c) waveforms.
The positive cycle of the output voltage appears across the load when S1 is turned on. The
output voltage Vo is +V/2 between 0 < t < T/2. During negative half cycle the switch S2 is turned
on. This reverses the direction of the output voltage making Vo = –V/2 between T/2 < t < T. For
a resistive load, the load current is in phase with the load voltage. Therefore, the load voltage
waveform can be treated as the load current waveform on a different scale. Only S1 and S2 conduct
the in-phase currents. The waveforms of gate pulses (ig1 and ig2) and output voltage Vo are shown
in Fig. 6.7(b). It is important that prior to turning on one switch, the other conducting switch must
be turned off. That is, prior to turn-on of S2, the switch S1, if conducting, must be turned off. If not,
both switches will conduct causing short circuit in the dc supply.
For inductive loads, the output current lags behind the output voltage. The diodes conduct the
load current when the switches are turned off. In doing so, the load reactive energy is fed back to
the supply. For this reason, the diodes are called feedback diodes.
Inverters 257
Figure 6.7(c) represents the output voltage and output current waveforms for an inductive load.
The current Io lags the output voltage. During the period 0 < t < t1, the current Io is negative and
the voltage Vo is positive. This is possible only when diode D1 is conducting. The load current Io
is positive between t1 < t < T/2 and therefore, S1 must be conducting during this interval. At
t = T/2, switch S1 is turned off and switch S2 is turned on. But the positive load current is carried
by the diode D2 while the output voltage becomes negative. The negative load current flows when
S2 is ON.
During the operation of the inverter, it is also observed that
(i) A positive output voltage appears across the load when either S1 or D1 is conducting. The
in-phase current flows through the main switch and out-of-phase current flows through the
diode.
(ii) A negative output voltage appears when either S2 or D2 is ON. The in-phase current is
carried by S2 and the out-of-phase current by D2. That is, main switches conduct when
voltage and current are of the same polarity and the feedback diodes conduct when the load
voltage and load current are of opposite polarities.
Mathematical analysis
For a single-phase half bridge inverter,
V
Vo 0
t
T/2
2
V
T/2
t
T
2
The rms value of the output voltage is given by
1/2
ÑÎ 2 T/2 È V Ø ÑÞ
2
Vor Ï Ô0 É Ù dt ß
Ê 2Ú
ÐÑ T Ñà (6.4)
V
2
Peak inverse voltage (experienced by OFF switch, for example,) across S2 when S1 is ON,
PRV V
The output voltage can be expressed by Fourier series as:
2V sin nX t
vo (t ) Ç
Q n 1,3,5,! n
(6.5)
0, n 2, 4, 6, !
where
n = harmonic number
w = angular frequency = 2p f
The output current for resistive load
2V
i (t ) = Ç sin nX t
n 1,3,5,! nQ R (6.6)
where R is the load resistance.
258 Introduction to Power Electronics
For RL load:
2V sin nX t
v0 (t ) =
Q Ç (6.11)
n 1,3,5,! n
2V sin (nXt Gn )
Ç
i(t ) =
Q n 1,3,5, !n R 2 (nX L )2 (6.12)
nX L
where Gn tan 1
R
2
Vo,1 V 0.45 V
Q
V
I o,1 0.45
R 2 (X L )2
Similarly,
V
I o,3 0.45
3 R 2 (3X L )2
V
I o, n 0.45
n R 2 (nX L )2
Fundamental output power,
Vo,1 I o,1 cos G1 I o2,1 R
If Vo,n is the rms value of the nth harmonic component of load voltage Vor, the ratio Vo,n/Vo,1
is defined as the harmonic factor (hf)n of the nth harmonic component.
Inverters 259
That is,
(hf)n = Vo,n/Vo,1 (6.13)
The total harmonic distortion (THD) is a measure determining the closeness between the actual
load voltage waveform and its fundamental component. It is given by
È
1/2
Ø
É Ç o, n Ù
2
V
Ê n 3,5,! Ú Harmonic voltage
THD
Vo,1 Fundamental voltage
V
1/2
o
2
Vo2,1
(6.14)
Vo,1
ig1, ig2
+ is
t
S1 S3 ig3, ig4
D1 D3
ig1 Vo ig3
+ – t
V Load Vo
io
D4 S4 S2 D2 V
S1,S2 S1,S2 3T/2
ig4 ig2 T/2
– t
T 2T
S3,S4 S3,S4
(a) –V
(b)
Fig. 6.8 Full bridge inverter (a) circuit, and (b) waveforms.
260 Introduction to Power Electronics
time period T. During inverter operation, it should be ensured that two switches in the same branch,
such as S1 and S2 do not conduct simultaneously as this would lead to a direct short circuit of the
source. For resistive loads, two SCRs in Fig. 6.7 and four SCRs in Fig. 6.8 would be sufficient
making the feedback diodes unnecessary because load current Io and load voltage Vo would always
be in phase with each other. This, however, is not the case for RL and RLC loads. For such loads,
current Io will not be in phase with voltage Vo and the diodes connected in anti-parallel with
thyristors allow the load current to flow when the main thyristors are turned off.
Mathematical analysis
For a single-phase full bridge inverter,
1/ 2
È 2 T/2 Ø
Vor =É
ÉÊ T Ô
V 2 dt Ù
ÙÚ
=V (6.15)
0
Ç
4V
vo (t ) sin nX t (6.16)
n 1,3,5,
nQ
4V
Vo,1 0.90V (6.17)
2Q
Ç
4V
io (t ) sin (nX t Gn ) (6.18)
n 1,3,5, nQ R (nX L )2
2
tc
Icp
IL
+
t
T1 T3 D3 T¢3 t0 t1 t2 t3 t4
T¢1 D1
L EC VL +Ec
A IL+ – B C2 L Ec
Vs Load
– + + – + Vs
Ic C1 EL IC
T¢4 D4 T4 T2 D2 T¢2
Ec t
– t0 t1 t2 t3 t4
–Ec
Mode Mode Mode
Mode 1 2 3 4
(a) (b)
Fig. 6.10 Single phase McMurray full bridge inverter (a) power circuit (b) wave forms.
It is important to note that the period (t2 – t1) is the circuit imposed turn-off time for the
thyristors which must be greater than the device turn-off time.
Mode 3: This mode starts at t = t2 when iC = iL with diodes D1 and D2 not in conduction. The
capacitors recharge through the load. At t = t3, the capacitor voltage becomes equal to Vc and tends
to overcharge due to energy stored in inductances.
Mode 4: Initiated at t = t3, in this mode the capacitor voltage becomes equal to battery voltage
Vs and tends to increase further. Diodes D4 and D3 become forward biased and capacitors are charged
to voltage EC with the polarity opposite to that shown in Fig. 6.10. The capacitor current becomes
zero. At t = t4 this mode is complete and the circuit is ready for the next half cycle of operation.
In the next half cycle, the operation is similar to that in the first half cycle except that now the
thyristors T3, T4, T¢3 and T¢4 are active.
The variations in capacitor voltage and capacitor current are also plotted in Fig. 6.10.
C L L C2 R2
R1 IL
Vs
Load
– + –
+ VL
D¢4 T¢4 D4 T4 T2 D2 T¢2 D¢2
a b
r o
T1
D1
V/2 1 C1 c
VL
– + L1
Load
IL d
L2
V/2 D2 C2 e
2
T2
f
g
Fig. 6.12 Single-phase McMurray–Bedford half bridge inverter.
The operation of the circuit can be described for its five modes discussed here.
Mode 1: This mode starts when T1 is turned on (prior to t = 0). The equivalent circuit for this mode
is shown in Fig. 6.13(a). T2 is off and the load is fed by battery 1 through T1. Since IL is constant,
voltage drop across L1 is zero because dIL/dt = 0. Therefore, junction d is at a potential +V/2. Since
lower plate of C2 is at a potential –V/2, the voltage across C2 is V. Nodes b, c, d and e are all at
the same potential +V/2.
Mode 2: This mode begins at t = 0– when the thyristor T2 is triggered to turn off T1. Nodes e and
f get connected. However, the voltage across C1 and C2 cannot change instantly. Therefore, a voltage
+V appears across L2. Since L1 and L2 are magnetically coupled, a voltage V is induced across L1
with node c being positive. The voltage drop across T1 is VT1. The application of Kirchoff’s voltage
law around the loop ‘bagfec’ gives
V V
VT1 Vbc V V V
2 2
Inverters 265
a b a b
c c VT1
V/2 1 V/2 1 C1
L1 V L1
d d
Load Load
+ +
V/2 2 C2 V L2 V/2 2 C2 V L2
– e – e
g f g f
(a) Mode 1, t < 0 (b) Mode 2, t = 0 –
a b a Im/2 b
IL/2 Im+I L
V/2 1 C1 + V V/2 1 2
–I
c1
Load d IL
Load
d Im
IL I
+VL L L2
V/2 2 C2
– 2 V/2 2
Ic2 e I C2 e
g f g f
(c) Mode 2, t = 0+ (d) Mode 2, t < t1
a b a b
+
C1 V
V/2 1 D1 – V/2 1 D1
d IL d
Load Load
Im IL
V/2 2 L2 V/2 2
I L D2 D2
Im e e
g f g f
(e) Mode 3, t = t 1 (f) Mode 4
Fig. 6.13 Modes of operation.
Thus, node c is at a potential +V with respect to the node b and hence the thyristor T1 is
subjected to a reverse bias of –V and is turned off at t = 0+. The load current I2 which was flowing
through T1 and L1 is transferred to T2 and L2 to maintain a constant current through inductance.
Applying KVL to mesh formed by C1, C2 and the batteries, we get
1 1
C1 ÔI C1 dt
C2 ÔI C 2 dt V V 0
IC1 + IC2 = IL + IL
IC1 = IC2 = IL
Thus, both the capacitors carry a current IL at t = 0+. Half of IC1 goes to the load and the
remaining half to the inductor L2. Similarly half of IC2 goes to the load and the remaining half to
the inductor L2. Thus, IL current flows through the load and the inductor L2 each. During this process,
C1 gets charged and C2 gets discharged. An oscillatory current is set up through the loop of L2 and
C2. After one fourth of cycle, this oscillatory current rises to the maximum value Im. At the same
time, voltage of capacitor C2 decreases to zero. Thus, after one fourth of a cycle has passed following
the turning on of T2, application of KCL at node d gives
IC1 + IC2 = IL + Im
or
I L Im
IC1 = IC2 =
2
266 Introduction to Power Electronics
This is shown in Fig. 6.14. As T2 is turned on, the potential of node d falls to zero while that
of the node c increases to 2V with respect to node g. This happens during the interval t = 0 to
v toff
2v Voltages of nodes
V c, d, and e
0 t
iL t1 t2 t3
IL
0 t
t1 t2 t3
ic1
t
ic2 Im
IL
0 t1 t
t2
id2 IL + Im
0 t
ic1 + ic2
IL IL+Im
2
0 t
t1 t2 t3
vc1, vc2
Vc2 Vc1
0 t
Fig. 6.14 Voltage and current waveforms.
t = t1 and this duration accounts for one quarter of a cycle. For the inductance L and capacitance
C, the natural frequency wn is given as
1
Xn (6.19)
LC
and the time period,
2Q
T 2Q LC
Xn (6.20)
Also,
T
0.5Q LC
t1 (6.21)
4
The thyristor turn-off time should be less than t1.
Mode 3: This mode starts at t = t1. The capacitor C1 is charged to voltage V and therefore
IC1 = 0. Diode D1 is reverse biased and is hence off. The current through C2 tends to charge it with
lower plate being positive. Therefore, diode D2 is forward biased. The total current (IL + IM) flows
through D2 and IC1 = IC2 = 0. The energy stored in L2 is dissipated in the closed circuit formed by
L2, T2 and D2. At t = t2, this total energy of L2 has been dissipated and therefore, the current through
T2 becomes zero. Therefore, thyristor T2 is turned off at t = t2.
Inverters 267
Mode 4: As T2 is turned off, the nodes e and f get open circuited and the current IL flows through
the diode D2.
Mode 5: The current IL, flowing through D2, falls to zero at t = t3 and is then reversed. As this
current tends to reverse, D2 gets blocked. The reverse bias across T2 (which was due to voltage drop
across D2) no longer exists and T2 gets turned on to carry I1 in the reverse direction (T2 has already
been supplied the gate pulse before t = t3). Further, capacitor C1 is charged to the battery voltage
V and is then ready to commutate the thyristor T2. Figure 6.14 depicts the waveform of various
currents and voltages.
From the considerations of minimum trapped energy, the values of L and C can be found from
the equation
Vtq
L 2.35 (6.22)
I Lm
I Lm tq
C = 2.35 (6.23)
V
where
t q = thyristor turn-off time and
ILm = maximum value of load current to be commutated.
N w t
vCA – V V –V
(a)
w t
vNO V/6 – V
w t
2/3V vAN
vAN V/3 iA
iA w t
(b)
Fig. 6.15 Three-phase bridge inverter (a) circuit, and (b) waveforms.
268 Introduction to Power Electronics
configuration. The inverter shown in Fig. 6.15(a) uses six solid-state switches, S1 through S6 and
six diodes, D1 through D6. It supplies a star connected load. The gate signals, G1 through G6 are
meant for six switches S1 to S6 as shown in Fig. 6.15(b). A three-phase output can be obtained from
the circuit shown in Fig. 6.15(a).
A basic three-phase inverter is a six-step bridge circuit. For one cycle of 360°, each step would
be of 60° duration. This means that the switches are gated at regular intervals of 60° in proper
sequence so that three-phase ac voltages can be synthesized at the output terminals.
In Fig. 6.15(a), the switches are numbered in the sequence in which they are provided with gate
signals to obtain voltages vAB, vBC, and vCA at the output terminals A, B and C of the inverter.
There are two possible conduction patterns based on the length of gating the switches. In the
180° conduction mode, each switch conducts for 180° and in 120° conduction mode, each switch
conducts for 120°. But in both these patterns or modes, gating signals are applied and removed at
60° intervals of the output voltage waveform.
2 1
vAN = vAO – vNO = vAO – (vBO + vCO) (6.32)
3 3
Inverters 269
2 1
vBN = vBO – vNO = vBO – (vAO + vCO) (6.33)
3 3
2 1
vCN = vCO – vNO = vCO – (vAO + vBO) (6.34)
3 3
The load phase voltages can be constructed as shown in Fig. 6.15(b). It has also a six-stepped
wave shape. The load phase voltages will have the same wave shape but displaced from each other
by 120°. A typical load current ia, for an inductive load is also shown along with vAN.
Alternatively, the load phase voltages can also be obtained by making use of the equivalent
circuits drawn for each of the six modes. Each step gives rise to one equivalent circuit. For example,
the equivalent circuit shown in Fig. 6.16 corresponds to the mode of 60° duration when the switches
5, 6, and 1 are closed.
+ 1 i1 A C
3 5
+
V A B C Z Z
6 2 V N
– 4
Z
N –
B
Z Z
Table 6.1
The three line output voltages can be expressed using the Fourier series as
4V nQ È QØ
vAB = Ç cos sin n É X t Ù (6.40)
n 1,3,5 nQ 6 Ê 6Ú
4V nQ È QØ
vBC = Ç cos sin n É X t Ù (6.41)
n 1,3,5 nQ 6 Ê 2Ú
4V nQ È 5Q Ø
vCA = Ç cos sin n É X t Ù (6.42)
n 1,3,5 nQ 6 Ê 6Ú
For n = 3, cos (3p/6) = 0. Therefore, all triple harmonics (3, 9, 15,…) are absent in all the line
voltages stated in Eqs. (6.40) – (6.42).
The line voltage waveforms shown in Fig. 6.15 represent the balance set of three-phase
alternating voltages. During the six intervals, these voltages are well defined. Therefore, these
voltages are independent of the nature of load circuit which may consist of any combination of
resistance, inductance, and capacitance and the load may be balanced or unbalanced, linear or non
linear.
Fourier series expansion of line to neutral voltage vAN in Fig. 6.15 is given by
2V
vAN = Ç sin nXt (6.43)
n 6 k 1 nQ
where k = 0,1,2,…
For a linear star-connected balanced load, phase or line currents can be obtained from the
Eq. (6.43). Expressions similar to Eq. (6.43) can be written for the other phases replacing w t by
(w t – 120°) and (w t – 240°) respectively.
In Fig. 6.15, load is assumed to be star-connected and three-phase and line voltages are
obtained. For delta-connected loads also, phase or line voltages waveforms vab, vbc, and vca as shown
in Fig. 6.15 would be obtained directly. Therefore, for a linear delta-connected load, phase and line
currents can be obtained from the phase or line voltages.
From Eq. (6.40), the rms value of nth harmonic component of line voltage is obtained as
4V nQ
VoL,n = cos (6.44)
2nQ 6
Inverters 271
The rms value of the fundamental line voltage VoL,1 is calculated to be 0.7797 V.
2
The rms value of the line voltage is given by VoL = V
3
Table 6.2
w t = 120°. But the series connected switch S4 is switched on only at w t = 180° to conduct for a
period of 120° (up to w t = 300°). Thus, there is an interval of 60° between the turning off of S1
and turning on of S4 facilitating S1 to recover completely. This is not so with 180° mode conduction
where S4 starts conduction as soon as S1 stops. Here, to avoid the possibility of short circuit, a certain
time tq is allowed for the switch S1 to recover before switch S4 is closed. This arrangement is also
followed in the case of switches S3, S6 and S5, S2.
Under 120° mode operation, only two switches—one from the upper group and one from the
lower group conduct during each step. But in 180° mode inverter, three switches conduct in each
step. The voltage waveforms for 120° mode conduction are shown in Fig. 6.17.
The load phase voltages can be obtained using Eqs. (6.24)–(6.26). It can be seen that the load
phase voltages are same as pole voltages. Alternatively, the load phase voltages and the line
voltages can be obtained making use of the equivalent circuits representing six modes of operation.
For example, the first mode lasting between w t = 0° – 60° can be represented by the equivalent
circuit shown in Fig. 6.18.
From the equivalent circuit for mode 1,
V
vAN =
2
V
vBN = –
2
and
vCN = 0
272 Introduction to Power Electronics
0° 60° 120° 180° 240° 300° 360° 60° 120° 180° 240° 300° 360°
Steps
Conducting I II III IV V VI I II III IV V VI I
thyristors
6,1 1,2 2,3 3,4 4,5 5,6 6,1 1,2 2,3 3,4 4,5 5,6 6,1
vAO
V s /2
vBO
wt
V s /2
wt
vCO
V s /2
wt
vAB
Vs V s /2
wt
vBC
– Vs V s /2 wt
vCA
Vs V s /2
p wt
V s /2 2p 3p 4p
vAN
– Vs
vBN
wt
–V s
wt
vCN 2
wt
Fig. 6.17 Voltage waveforms for 120° mode conduction.
Step I
+ 1
3 5
Vs + Vs
R
4 6 2 2
– Vs N
R Vs
A B
– 2
R R
N
R
(a) C (b)
Fig. 6.18 Equivalent circuit for 1, 6 switches closed.
Making use of the equivalent circuits, the load phase voltages can be obtained for the complete
cycle. From the load phase voltages, the line voltages vAB, vBC, and vCA can be obtained graphically.
It is observed from Fig. 6.17 that the phase voltages have one positive step and one negative
step (each of 120° duration) for one cycle of output alternating voltage. The line voltages, however,
have six steps per cycle of output alternating voltage.
The merits and demerits of 120° mode inverter over the 180° mode inverter can be listed as
follows:
Inverters 273
Advantages
(a) In the 180° mode inverter using SCRs T1–T6, when gate signal ig1 is cut off to turn-off T1
at w t = 180°, a gating signal ig4 is simultaneously applied to turn on T4 in the same leg.
In practice, a commutation interval must exist between the removal of ig1 and application
of ig4, since otherwise, dc source would experience a direct short circuit through SCRs T1
and T4 in the same leg.
This difficulty is overcome considerably in 120° mode inverter. In this inverter, a 60°
interval between the turning off of T1 and the turning on of T4 is maintained. During this
60° interval, T1 can be commutated safely. In general, this angular interval of 60° exists
between the turning off of one device and turning on of the complementary device in the
same leg. This 60° period provides sufficient time for the outgoing thyristor to regain
forward blocking capability.
(b) In the 120° mode inverter, the potentials of only two output terminals connected to the dc
source are defined at any time of the cycle. The potential of the third terminal, pertaining
to a particular leg in which neither device is conducting, is not well defined; its potential
therefore depends on the nature of the load circuit. Thus, the analysis of the performance
of this inverter becomes complex for a general load circuit. However, for a balanced
resistive load, the potentials of all the three terminals are well defined. For balanced delta-
connected resistive loads, the line voltages as obtained from Fig. 6.17 are applicable.
Disadvantage
Since a switch conducts only for 120° under 120° mode conduction, the switches are less utilized
when compared to 180° mode of conduction for the same load condition. This is a disadvantage.
The Fourier analysis of phase voltage waveform vAN of Fig. 6.17 gives
2V nQ È QØ
vAN = Ç cos sin n É Xt Ù (6.45)
n 1,3,5 nQ 6 Ê 6Ú
Similarly for vBN and vCN, we obtain
2V nQ È QØ
vBN = Ç cos sin n É X t Ù (6.46)
n 1,3,5 nQ 6 Ê 2Ú
2V nQ È 5Q Ø
vCN = Ç cos sin n É X t Ù (6.47)
n 1,3,5 nQ 6 Ê 6Ú
The line voltages are given by
3V È QØ
vAB = Ç sin n É Xt Ù
Ê 3Ú
(6.48)
n 6 k 1 nQ
3V È QØ
vBC = Ç sin n É Xt Ù
Ê 3Ú
(6.49)
n 6 k 1 nQ
3V
vCA = Ç sin n Xt Q (6.50)
n 6 k 1 nQ
where k = 0, 1, 2, 3,…
274 Introduction to Power Electronics
This section examines various methods of output voltage control by means of inverter gain control.
The inverter gain is defined as the ratio of output ac voltage to input dc voltage. Such gain control
is useful in many applications where the variations of ac output voltage cannot be tolerated due
to the variations in dc input voltage. It is also necessary when volts/Hertz control of induction motor
speeds has to be implemented. The control of motor voltage is required along with frequency in
order to avoid saturation of the motor magnetic circuit. Various techniques are available for varying
the inverter gain. The most efficient method of controlling the gain and therefore the output voltage
is to incorporate Pulse Width Modulation (PWM) control within the inverters. In addition to PWM
method, there are methods involving external control of ac output voltage and dc input voltage.
To distinguish these methods from the PWM method, PWM method is referred to as the internal
control method since the output voltage control is realized by means of modifications in the
conduction patterns of the inverter switches.
The various methods for the control of output voltage of inverters can be enumerated as follows:
(1) External control of the ac output voltage
(2) External control of the dc input voltage
(3) Internal control of the inverter output voltage
In the first two methods, extra circuits for the control of either dc input or ac output become
necessary. The third method, however, does not require such circuits. This can be clearly understood
in the remaining section that discusses these methods in considerable detail.
AC voltage control
In this method, an ac voltage controller is inserted between the output terminals of inverter and the
input terminals of the load. The load voltage is regulated through this voltage controller. This
method gives rise to higher harmonic content in the output voltage; particularly when the output
voltage from the ac voltage controller is at low level. This method is therefore rarely employed
except in the low power applications.
Inverters 275
Inverter I
vo1
Connect Vo vo2 Vo
dc voltage
Inverter II q
vo2 vo1
(b)
(a)
Fig. 6.19 Series inverter control.
It is essential that the frequency of output voltages vo1, vo2 from the two inverters is the same.
When q is zero, Vo = vo1 + vo2 and for q = p, Vo = 0 in case vo1 = vo2. The angle qÿ can be varied
by controlling the firing angle of the two inverters. The series connection of inverters, called
multiple converter control, does not augment the harmonic content even at low output voltage
levels.
+
Input Thyristorized Inverter
supply bridge converter –
dc link
Input
Rectifier dc chopper Inverter
supply
Output voltage waveform and its harmonic content are not affected appreciable as the inverter
output voltage is controlled through the adjustment of dc input voltage to the inverter.
This method of voltage control, however, suffers from the following disadvantages:
(i) The number of power converters used for controlling the inverter output voltage varies from
two to three (refer Fig. 6.19). More power handling stage result in more losses and reduced
efficiency of the entire scheme.
(ii) For reducing the ripple content of dc voltage input to the inverter, filter circuit is required
in all types of schemes shown in Fig. 6.20. Filter circuit increases the cost, weight, and size
and at the same time reduces efficiency and makes the transient response sluggish.
(iii) As the dc input is decreased, the commutating capacitor voltage also decreases.
This has the effect of reducing the circuit turn-off time (t = CV/I) for the SCR for low voltage
operations at a constant load current. Therefore, for a large variation of output voltage for a constant
load current, external control of the dc input voltage may not be conductive. This difficulty can,
however, be overcome by a separate fixed dc source for charging the commutating capacitor, but
this makes the scheme costly and complicated.
The main disadvantage of this method is that the inverter grade SCRs necessary for this type
of inverters are expensive. They are used here as they possess low turn-on and turn-off times. PWM
inverters are quite popular in industrial applications. These are therefore discussed in detail in the
next section.
Expanding,
4V Ë 1 1 Û
Vo Ìsin d sin X t sin 3d sin 3X t sin 5d sin 5X t !Ü
Q Í 3 5 Ý
When pulse width 2d is equal to its maximum value of p radians, the fundamental component
of output voltage, from Eq. (6.52) has a peak value of
4V
Voml =
Q
For pulse width other than 2d = p radians, the peak value of fundamental component is
(4V/p) sin d. If nd is made equal to p, or d = p/n, or if pulse width is made equal to 2d = 2p/n,
Eq. (6.52) shows that the nth harmonic is eliminated from the inverter output voltage. For example,
eliminating the third harmonic, a pulse width of 2d must equal 120°.
The peak value of nth harmonic, from Eq. (6.52) is
4V
Vomn = sin nd (6.53)
nQ
Therefore,
Vomn nd
sin (6.54)
Voml n
From Eqs. (6.53) and (6.54), note that Voml is the peak value of the fundamental component of
rectangular voltage waveform of width 2d = p. The ratio as given by Eq. (6.54) is plotted in
Fig. 6.21(b) for n = 1 (plot of sin d), n = 3 (plot of sin 3d/3), n = 5 and 7 for different pulse widths.
It is seen from these curves that when fundamental component is reduced to 0.5 for 2d = 60°, the
amplitude of the third harmonic is 1/3sin 90° = 0.33. When fundamental component is reduced to
about 0.143, all the three harmonics (3, 5, 7) become almost comparable to the fundamentals. This
shows that in this method of voltage control, a great deal of harmonic content is introduced in the
output voltage, particularly at low output voltage levels.
The rms value of output voltage, from Fig. 6.21 is obtained as
2d
Vor = V (6.55)
Q
The gating pulses can be generated to achieve this kind of modulation as depicted in
Fig. 6.21(c). The gating signals are generated by comparing a rectangular reference signal of
amplitude Ar with triangular carrier wave of amplitude Ac. The fundamental frequency of output
voltage is determined by the frequency of the reference signal. The pulse width 2d can be varied
from 0 to p by varying Ar from 0 to Ac. The ratio of Ar to Ac is taken as the control variable and
is defined called amplitude modulation index, M = Ar /Ac.
Inverters 279
e 1 Carrier signal
fc
Ac Reference signal
Ar
2p
0 w t
p
vo
V
2p
0 w t
d p
am
–V am +p
If d is the width of each pulse, the rms output voltage can be calculated as
d
1/ 2
Ë Q Û
Ì2 p p
Ü
Ô V d (Xt )ÜÜ
pd
Vo,r Ì 2
V
Ì 2Q Q (6.57)
ÌÍ d
p
p ÜÝ
The general form of a Fourier series for obtaining the instantaneous output voltage is given as
Vo (t ) Ç! B
n 1,3,5,
n sin nX t (6.58)
280 Introduction to Power Electronics
The coefficient Bn in Eq. (6.58) can be determined by considering a pair of pulses such that
the positive pulse of duration d starts at w t = a and the negative one of the same width starts at
wt = p + a. This is shown in Fig. 6.22. The effects of all pulses can be combined to obtain the
effective output voltage.
If the positive pulse of the mth pair starts at wt = am and ends at wt = am + p, the Fourier
coefficient for a pair of pulses is given by
ËB m d Q B m d Û
1Ì
bn Ô cos n X t (dXt ) Ô cos n Xtd (Xt ) Ü
QÌ B Q B m
Ü
Í m Ý
2Vs nd Ë È d Ø È dØÛ
sin Ì sin n É B m Ù sin n É Q B m Ù Ü
nQ 2 Í Ê 2Ú Ê 2ÚÝ
The coefficient Bn of Eq. (6.58) can be found by adding the effects of individual pulses as,
p
2V nd Ë È dØ È dØÛ
Bn Ç nQ sin Ìsin n É B m Ù sin n É Q B m Ù Ü (6.59)
m 1 2 Í Ê 2 Ú Ê 2ÚÝ
Since this type of modulation employs large number of pulses, p, involving larger number of
switch-ons and switch-offs, switching losses are more. Larger p reduces the amplitudes of lower order
harmonics but increases the amplitudes of some higher order harmonics at the same time. However,
such higher order harmonics produce negligible ripple and can easily be filtered out.
The implementation of SPWM involves the comparison of a high frequency triangular carrier
wave with a sinusoidal reference wave of the desired frequency as shown in Fig. 6.23. The
intersection of these two waves determines the switching instant and commutation of the modulated
pulse. In Fig. 6.23, Ac denotes the peak value of triangular carrier wave and Ar is that of the reference
or modulating signal.
The carrier and reference waves are mixed in a comparator. When the sinusoidal wave has a
magnitude higher than that of the triangular wave, the comparator output is high otherwise it is low.
The comparator output is processed in a trigger pulse generator in such a manner that the output
voltage wave of the inverter has a pulse width same as the pulse width of the comparator output.
When the peak of the triangular carrier wave coincides with zero of the reference sinusoid, there
are p = fc /2fr pulses per half cycle. Figure 6.23 has five pulses. In case zero of the triangular wave
coincides with zero of the reference sinusoid, there would be (p – 1) = (fc /2fr – 1) pulses per half
cycle. For example, in Fig. 6.23 the pulses per half cycle, p = 4.
The ratio of Ar /Ac is called the modulation index (M) and by varying M, the rms value of the
output voltage can be manipulated. If dn is the width of the nth pulse, the rms value of the output
voltage is given in terms of dm as
1/2
È p d Ø
Vor VÉÇ mÙ (6.60)
Êm 1 Q Ú
The harmonic analysis of the SPWM voltage wave exhibits the following features:
For a value of M < 1, the largest harmonic amplitudes in the output voltages are associated with
harmonics of order {( fc /fr) + 1} or {( fc /fr) – 1}; which is also same as 2p + 1 or 2p – 1 where p is
the number of pulses per half cycle. Therefore, by increasing p the order of the dominant harmonic
frequencies can be increased and they can be filtered out easily. In Fig. 6.23, N = 5 and as a
consequence, harmonics of order 9 and 11 become significant in the output voltage. It may be noted
that the highest order of the significant harmonic in a modulated voltage wave is centred around
the carrier frequency fc (in Fig. 6.23, fc = 10).
It can therefore, be said that as N is increased, the order of significant harmonic increases and
the filtering requirements are accordingly minimized. But a higher value of N also means higher
switching frequency for thyristors and other power switching devices. This invariably leads to higher
switching losses resulting in reduced inverter efficiency. A compromise between the filtering
requirements and inverter efficiency has to be made. The methods adopted to minimize the lower
order harmonics are discussed in the next section.
A three-phase inverter may be considered equivalent to three single-phase inverters, the output of
each shifted by 120°. The voltage control techniques discussed in the previous section are also
applicable for three-phase inverters.
Figure 6.24 shows the method of generating the triggering pulses to produce output voltage
waveforms for three-phase inverters using SPWM technique. Here, a carrier wave is compared with
the three reference sinusoids corresponding to each of the three-phase voltages.
282 Introduction to Power Electronics
Reference sinewave Reference sinewave
phase B Reference sinewave
phase A phase C
Trianguar wave
va
Fundamental
sinewave
vb
vc
Line voltage
v ab
There are several industrial applications which allow the prevalence of a harmonic content of 5%
of its fundamental component of input voltage when inverters are used. Actually, the inverter output
voltage may have a harmonic content to a reasonable limit of 5%, one method of ensuring this is
to insert filters between the load and the inverter. If the inverter output voltage contains high
frequency harmonics, these can be reduced by a low size filter. For the attenuation of low frequency
harmonics, however, the size of filter components increases. This makes the filter circuit costly,
bulky, and weighty and in addition, the transient response of the system becomes sluggish. This
shows that lower order harmonics from the inverter output voltage should be reduced by some means
other than the use of filter. Subsequently, high frequency component from this voltage can easily
be attenuated by low size, low cost filter. The objective of this section is to study these methods
of reducing low order harmonics from the output voltage of an inverter.
1:1 vo1
V
p 2p
Inverter I w t
vo1 –Vs
L vo2
DC o
a Vo Vs
Input d
p
w t
3
–Vs –Vs
Inverter II vo2
+2Vs
vo2 4p
1:1 3
w t
p p 2p 7p
(a) 3 –2Vs 3
(b)
Fig. 6.25 Harmonic reduction by transformer connections.
waveform. The resultant output voltage Vo is obtained by adding the vertical ordinates of vo1 and
vo2. It is seen that vo has an amplitude 2Vs over p/3–p, 4p/3–2p, and so on. It is also to be noted
that the shape of the output voltage wave Vo is a quasi-square wave.
The Fourier analysis of waveforms vo1 and vo2 gives
4Vs Ë 1 1 1 Û
vo1 sin X t sin 3X t sin 5X t sin 7X t !Ü
Q ÌÍ 3 5 7 Ý
4Vs Ë È QØ 1 È QØ 1 È QØ 1 È QØ Û
sin X t Ù sin 3 É X t Ù sin 5 É X t Ù sin 7 É X t Ù !Ü
Q ÌÍ ÉÊ
vo 2
3Ú 3 Ê 3Ú 5 Ê 3Ú 7 Ê 3Ú Ý
The resultant voltage Vo is obtained by adding vo1 and vo2 as
Vo = vo1 + vo2
Therefore,
4Vs Ë È QØ 1 È QØ 1 È QØ Û
Vo 3 Ìsin É X t Ù sin É 5X t Ù sin É 7X t Ù !Ü (6.61)
Q Í Ê 6Ú 5 Ê 6Ú 7 Ê 6Ú Ý
The expression for resultant voltage Vo as given in Eq. (6.61) can be obtained from vo1 and vo2
analytically or graphically. The graphical method of summation can be carried out as follows:
It is noted in Eq. (6.61) that the third and other triplet harmonics are eliminated from the net
output voltage wave. The amplitude of fundamental component of Vo is given by
4 3
vo1m Vs (6.62)
Q
In case output voltages vo1, and vo2 from inverters 1 and 2 have no phase shifts, the amplitude
of fundamental voltage is obtained as 8Vs /p. This shows that with phase shift, the amplitude of
4 3 È Q Ø
fundamental becomes Vs É 0.866 times the amplitude of fundamental voltage
Q Ê 8Vs ÙÚ
284 Introduction to Power Electronics
possessing no phase shift. With this method of harmonic reduction, we obtain a derating of
È 8Vs 4 Ø
I Vs 3I È
É Q Q Ù 3Ø
É Ù 100 É1 2 Ù 100 13.4%
É
8Vs
I Ù Ê Ú
Ê Q Ú
in the net output power so far as fundamental component of the waveform is concerned.
This method of harmonic reduction has the disadvantage that it requires more number of
inverters and transformers of similar ratings.
vo
Vs
0 w t
p /2 p
3p/2 2p
a1
–V
a2
Q ÌÍ n Ü
Ý
Inverters 285
If the third and the fifth harmonics are to be eliminated, then Eq. (6.63) gives
È 4V Ø
A7 = É s Ù [(1 – 2cos 7 ´ 23.62 + 2cos 7 ´ 33.304] = 0.31555 V
Ê 7Q Ú
È 4V Ø
A9 = É s Ù [(1 – 2cos 9 ´ 23.62 + 2cos 9 ´ 33.304] = 0.5202 V
Ê 9Q Ú
and
È 4V Ø
A1 = É s Ù [(1 – 2cos 23.62 + 2cos 33.304] = 1.0684 V
Ê Q Ú
The amplitude of the fundamental component of unmodulated output voltage wave is computed
by
4Vs
A1 = = 1.27324 V
Q
In terms of the fundamental component of unmodulated voltage wave, the amplitude of the
seventh, ninth, and eleventh harmonics are 24.78%, 40.86% and 30.37%, respectively. But both
third and fifth harmonics are eliminated from the inverter output voltage wave. The amplitude of
the fundamental voltage is 0.8391 times of fundamental component of unmodulated voltage wave.
Thus, with this method of harmonic reduction inverter rating is reduced by 16.09%. Another
disadvantage of this method is that there are additional commutations per cycle that leads to
increased switching losses in the thyristors.
286 Introduction to Power Electronics
In contrast to VSI, where the input voltage is maintained constant and adjustable amplitude of its
output voltage is independent of the load, in the current source inverters (CSI) the input current is
constant and adjustable and the output current is independent of the load.
In a current source inverter, the current from the dc source is maintained at an effectively
constant level irrespective of the load or inverter conditions. This is achieved by inserting a large
inductance in series to the dc supply to enable changes of inverter voltage to be adjusted with low
values of di/dt. The dc input to the current source inverter is obtained from a fixed ac source through
a controlled rectifier bridge, or through a diode bridge and a chopper. In order that current source
inverter is almost ripple free, an L filter is used before current source inverter.
A current source inverter converts the input dc current to an ac current at its output terminals.
The output frequency of ac current depends upon the rate of triggering the SCRs. The amplitude
of the ac output current can be adjusted by controlling the magnitude of dc input current.
A current source inverter does not require feedback diodes whereas these are necessary in a VSI.
Commutation circuit in CSI is simple as it uses only capacitors and diodes. As power semiconductor
devices in a current source inverter have to withstand a large reverse voltage, devices such as GTOs,
transistors, and power MOSFETs cannot be used in current source inverters.
The current source inverters find their use in the following applications:
(1) Speed control of ac motors
(2) Induction heating
(3) Lagging Var compensation
(4) Synchronous motor switch ON
Ioc
I
I
+ T/2 T
0 t
iC – C –I
T1 + T3
vc T1,T2 T3,T4 T1,T2 T3,T4
A B
I V Vo
Ioc vo, io
T4 Io R T2
Load
– t
T T
2
(a) (b)
Fig. 6.27 Single-phase current source (a) circuit, and (b) waveform.
Inverters 287
Before t = 0, the thyristors (T3,T4) conduct making the capacitor voltage VC = –V1, that is,
capacitor has its left plate negative and the right plate positive. When (T1, T2) are gated at t = 0,
the capacitor voltage VC reverse biases conducting thyristors (T3, T4) and therefore, they are turned
off. The source current I now flows through T1, parallel combination of R and C, and through T2.
In the interval 0–T/2, iT1 = iT2 = I, output current iac = I, capacitor voltage VC changes from –V1 to
+ V1 through the charging of C by iC. It is to be noted that the load voltage equals the capacitor
voltage, that is, Vo = VC. Thus, the waveform of Io = Vo/R = VC/R has the same nature as that of VC.
When (T3, T4) are gated at t = T/2, VC = V1 reverse biases (T1, T2); these are therefore, turned off
immediately. The source current now flows through T3, parallel combination of R and C, and T4.
In the interval T/2–T, iT3 = iT4 = + I but iac = –I. The variation of iac is shown in the Fig. 6.27(b).
In the beginning, that is, before t = 0, assume that (T3, T4) are conducting and a steady state
current flows through the path that comprises T3, D3, load, D4, and T4 as shown in the Fig. 6.28(a).
The commutating capacitors are assumed to be charged initially equally with the correct polarity
vc1 = vc2 = –vco. This means that both capacitors have the right hand plate positive and the left hand
plate negative.
Thyristors (T1, T2) are triggered at time t = 0, The thyristor pair (T3, T4) is turned off by the
application of reverse capacitor voltages. Now, the pair T1, T2 conducts current I. The path for this
current is through T1, C1, D3, load, D4, C2, and T2. Both the capacitors now begin to charge linearly
288 Introduction to Power Electronics
from –vco by the constant current I. The diodes D1 and D2 remain reverse biased by vco initially.
After certain time interval D3 and D4 stop conduction when D1 and D2 take over and conduct the
load current I through the path T1, D1, load, D2 and T2. This constant current continues to flow
till the next commutation process starts with the gating of T3 and T4.
A three-phase current source inverter using thyristors is shown in Fig. 6.29(a). The idealized
waveforms of the input and output currents are shown in Fig. 6.29(b). Each thyristor conducts for
an interval of 120°. The capacitors C1 through C6 and diodes D1 through D6 constitute the
commutating elements while S1 through S6 are the thyristors. When a thyristor is fired, it
immediately commutates the conducting thyristor in the same group. S1,S3,S5 form the top group
and S4,S6,S2 form the bottom group. Assume for example that S1 and S2 are conducting. The input
current I flows through S1, D1, phase A load, phase C load, D2, S2, and back to the input source.
Capacitor C1 now gets charged with the polarity shown in Fig. 6.29. If S3 is fired, C1 gets connected
across S1 reverse biases S1, and turns it off. The current from S1 is then transferred to S3. Eventually,
the input current flows through the path S3,D3, phase B, load, phase C, load, D2,S2, and back to the
source. The diodes cause the charge to be held on the commutating capacitors. Without these diodes,
the capacitors would discharge through the two-phase load.
1 I
S1 S3 S5
C1 C2 w t
0 p 2p
iA
C3
D1 D3 D5 S1 S1
S4 w t
iA A 0
iB B
iC C iB
D4 D6 D2 Three-
C4 C5 0 S6 w t
phase S3
load
C6 iC
S4 S6 S2
0 S2 S5 w t
Fig. 6.29 Three-phase current source inverter (a) circuit, (b) waveforms.
A typical application of a three-phase CSI involves feeding a three-phase induction motor and
control its operation. The changing load requirements are met by changing the source current level
over a number of cycles by varying the link inductor input voltage. An important advantage of CSI
is that the circuit ensures excellent fault protection. The current source controls the output short
circuit or a simultaneous conduction in an inverter leg. Current controlled inverters are thus, much
rugged and exceedingly reliable. Such inverters are simple because of simple commutation circuits.
Further, they can also make use of cheap non-inverter grade thyristors.
Inverters 289
SOLVED EXAMPLES
EXAMPLE 6.1 A single phase half-bridge inverter feeds a resistive load R = 10 W. If the source
voltage is 220 V, obtain:
(a) rms value of fundamental component of output voltage.
(b) the rms and average values of currents through semiconductor switches.
(c) the load power.
(d) the lowest order harmonic and the corresponding harmonic factor.
Solution
(a) From Eq. (6.8), Vo1 = 0.45 ´ 220 = 99 V
112 T
(b) RMS value of switch current = = 11 × 0.707 = 7.777V, since as the switch carries
T 2
V 220
a rectangular current of amplitude = 11 A
2R 2 10
T
11
2 5.5 A
Average value of switch current =
T
V2 220 2
(c) Load power = = 1210 W
4R 4 10
EXAMPLE 6.2 In a single phase bridge inverter, the load current io is given by io = 540
sin(wt – 45°). The dc supply voltage is V = 300 V,
(a) Determine the average value of the supply current and the power delivered by the dc
supply.
(b) Determine the power supplied to the load.
(c) Draw waveforms of output voltage (vo) and load current (io)
Indicate on the waveforms of vo and io the devices that are conducting over different periods
of time.
Solution
(a) Is = Average value of supply current
1 Q
540 sin(X t 45)d (X t )
QÔ
=
0
= 243.1 A
290 Introduction to Power Electronics
is
S1 S2 S3 S4
0
D1 D2 D3 D 4 t
E6.1(a) is waveform.
vo
vo, io
io
S1
S2 D3
D4
0
D1 D1 t
D2 D2
S3
S4
EXAMPLE 6.3 A full bridge inverter shown in Fig. 6.8 has a source voltage, V = 220 V. The
inverter supplies an RLC load with R = 5W, L = 10 mH and C = 26 mF. The inverter operates at
400 Hz. Calculate:
(a) the RMS value of its fundamental component,
(b) the RMS value of the load current,
(c) the THD in the load current,
(d) the power output, and
(e) the average supply current.
Solution
Ç
4V
(a) io(t) = n 1,3,5. 2
sin(nwt – fn)
È 1 Ø
nQ R É nX L
2
Ê nX C ÙÚ
È 1 Ø
ÉÊ nX L nX C ÙÚ
where fn = tan–1
R
R = 5 W, L = 10 mH, and C = 26 µF
XL = 2p ´ 400 ´ 10 ´ 10–3 = 25.13 W.
1
XC = 15.3 W.
2Q 400 26 10 6
1 4V
I1 1/ 2
2 È 2 È 1 Ø Ø
2
Q É R ÉX L
Ê Ê X C ÙÚ ÙÚ
4 220
= = 17.96 A
2Q (5 (25.13 15.3) 2 )1/2
2
1 4V
(b) I3
2 2
È 1 Ø
3Q R 2 É 3X L
Ê 3X C ÙÚ
1 4 220
= 1/2
= 0.937 A
2 È È 15.3 Ø Ø
2
3Q É 52 É 3 25.13 Ù Ù
Ê Ê 3 Ú Ú
similarly, I5 = 0.32 A
I7 = 0.16 A
I9 = 0.1 A
292 Introduction to Power Electronics
I 2 I12
(c) THD of the load current = = 0.0578
I1
% THD = 5.78%
(d) The power output = (17.99) ´ 5 = 1618 W
2
power input
(e) The average supply current =
source voltage
Assuming no loss in the inverter,
Power input = Power output
1618
\ The average supply current = = 7.35 A
220
EXAMPLE 6.4 A star connected load of 15 W/phase is fed from 420 V dc source through a three
phase bridge inverter. Determine
(a) RMS value of load current,
(b) RMS value and average value of thyristor currents,
(c) power delivered to the load.
Assume 120° mode of conduction.
Solution
For a resistive load, the waveform of (per phase) load current is similar to that of applied (per
phase load) voltage as shown in figure E6.2(a). The waveform is for 120° conduction. RMS
value of the load current per phase:
io
Vs
2R
0 Xt
Q 2Q Q 2Q
Vs 3 3
2R
E6.2(a)
Inverters 293
iT
Vs
2R
0
2Q Q 2Q Xt
3
E6.2(b)
2
È Vs Ø È 2Q Ø
ÉÊ 2 R ÙÚ ÉÊ 3 ÙÚ
(a) I ph
Q
0.408 Vs
= = 11.424 A
R
2
È Vs Ø È 2Q Ø
ÉÊ 2 R ÙÚ ÉÊ ÙÚ V 1
(b) I th(rms) = s
2Q R 3
Vs
= 0.2886 = 8.08A
R
Vs 2Q
I av 2R Vs
= 4.67A
2Q 6R
= 3 ´ (11.424)2 ´ 15
= 5872.8 W
EXAMPLE 6.5 Repeat the problem (6.4) for 180° mode of conduction. Compare the results of
Problem (6.4) and Problem (6.5).
Solution
For a resistive load, the waveform of load current is similar to that of load voltage. It is shown
in figure E6.3(a):
294 Introduction to Power Electronics
io
2Vs
3R
Vs
3R
0
Q 2Q Q 2Q Xt
3 3
E6.3(a)
iT
2Vs
3R
Vs
3R
0
Q 2Q Xt
E6.3(b)
1/ 2
Ë È V Ø 2 È 2Q Ø È 2V Ø 2 È Q Ø Û
ÌÉ s Ù É Ù É s Ù É Ù Ü
(a) I ph Ì Ê 2 R Ú Ê 3 Ú Ê 3R Ú Ê s Ú Ü = 0.47
Vs
= 13.16 A
Ì Q Ü R
Ì Ü
ÌÍ ÜÝ
Vs
(b) Ith(rms) = 0.33 = 9.24 A
R
Vs
Iav = 0.222 = 6.216 A
R
(c) P = 3 ´ I 2ph ´ R
= 3 ´ 13.162 ´ 15
= 7793.3 W
On the basis of the duration of conduction, it is observed that a thyristor in 120° mode
conduction is underutilised.
Inverters 295
EXAMPLE 6.6 In a self-commutated SCR circuit, the load consists of R = 10 W in series with
commutating components of L = 10 mH and C = 10 mF. Check whether the circuit will commutate
by itself when triggered from the zero voltage condition on the capacitor. Calculate the output
frequency of the inverter.
Solution
4L 4 10 10 3
Here, R2 = 100 W, = = 4000
C 10 10 6
4L
As R2 < , the circuit is underdamped and the series RLC circuit (with SCR) can commutate
C
the SCR.
The time period of osscilation is given by
Q Q
= = = 1.006 ms.
2 2
1 È RØ 1 È 10 Ø
É Ù É
LC Ê 2 L Ú 3 Ù
10 10 3 10 10 6 Ê 2 10 10 Ú
10 3
Output frequency = = 414.6 Hz
2 1.006 2 0.2
where Toff = 0.2 ms
EXAMPLE 6.7 Calculate the output frequency of the series inverter with the following
parameters:
Inductance L = 6 mH, Capacitance C = 1.2 mF and the load resistance R = 100 W. Take
Toff = 0.2 ms.
(a) Find the range of output frequency
1. if the load resistance R is varied from 40 W to 140 W.
2. if Toff is varied from 0.1 ms to 0.4 ms
(b) What is the maximum possible output frequency?
Solution
Q Q Q 10 3
(a) t 0.377 ms
1 È RØ
2
10 6 100 2 10 6 8.333
É Ù
LC Ê 2 L Ú 6 1.2 4 36
10 3
The output frequency(for R = 100 W) = = 866.55 Hz
0.377 2 2 0.2
(1) The output frequency when R value is changed to 40 W,
1
f = 1046.2 Hz
2Q 3
1/ 2
0.4 10
È 10 6 40 2 10 6 Ø
É 6 1.2 4 36 Ù
Ê Ú
296 Introduction to Power Electronics
1
f = 240 Hz
2Q
1/ 2
0.4 10 3
È 106 1402 106 Ø
É 6 1.2 4 36 Ù
Ê Ú
Range of output frequency for load resistance change from R = 40 W to 140 W, is 240 Hz
to 1046.4 Hz
(2) The output frequency when Toff = 0.1 ms
10 3
= = 1048.2 Hz
(0.377 2) (2 0.1)
The output frequency when Toff = 0.4 ms
10 3
= = 643.5 Hz
(0.377 2) (2 0.4)
10 3
(b) fmax = ringing frequency = = 1326.25 Hz
0.377 2
REVIEW QUESTIONS
6.1 Draw the power circuitry for IGBT based single-phase bridge inverter and explain its
operation with relevant waveforms.
6.2 What is a current source inverter? Draw the circuit arrangement for such an inverter and
explain its operation.
6.3 Explain the operation of a three-phase bridge inverter with necessary waveforms bringing out
the necessity of return current diodes in such inverters.
6.4 Discuss a scheme for the generation of control pulses for the inverter in Question 6.3.
6.5 Draw the power circuitry of a parallel inverter and discuss its operation. Also explain how
voltage control can be obtained with this inverter.
6.6 Compare the voltage source inverters with the current source inverters.
6.7 Discuss briefly the various methods used for the waveform improvement of the voltage
source inverters.
6.8 Draw the circuit of a current source inverter and its output waveforms for a star-connected
load.
6.9 Discuss any two methods for the improvement of waveforms in the case of an inverter.
Inverters 297
6.10 Draw the power circuitry of a parallel capacitor commutated inverter and explain its
operation.
6.11 Draw the circuitry for a single-phase bridge inverter and explain its operation, bringing out
the role played by the return current diodes in such inverters.
6.12 Discuss the various methods used for voltage control of inverters.
6.13 Explain the operation of a thyristorized parallel inverter with energy recovery diodes.
6.14 Discuss with circuit diagram and waveforms, a bridge type voltage source inverter.
6.15 Describe a technique that can be used for both voltage and waveform control in the inverters.
6.16 Explain a load commutated single-phase current source inverter.
6.17 Discuss the advantages and disadvantages of current source thyristorized inverters over
voltage source thyristorized inverters.
6.18 Mention the limitations of the series inverters.
6.19 Describe using a neat circuit and waveforms, the operation of a PWM inverter and also
explain how the output voltage can be controlled in this scheme.
6.20 Explain with circuit diagram and waveforms the operation of a current source thyristor
inverter.
6.21 (a) Discuss the operation of a series inverter.
(b) Draw the power circuitry of a transistorized single-phase bridge inverter and explain its
operation.
6.22 List the commonly used PWM techniques for voltage and waveform control of inverters and
explain any one method in detail.
6.23 Discuss the design of commutating components of parallel inverter with energy recovery
diodes.
6.24 Explain a scheme to generate triggering signals to a parallel inverter with energy recovery
diode and RL load.
6.25 Discuss the protection arrangements for thyristors against over voltage and over current.
6.26 What are the drawbacks of a basic series inverter? Explain how these drawbacks are
eliminated in modified series inverter circuits.
6.27 Define THD for an inverter. Calculate its value for a half bridge inverter supplying R load.
6.28 Describe the modified McMurray–Bedford half bridge inverter circuit with related voltage
and current waveforms.
298 Introduction to Power Electronics
PROBLEMS
6.1 A three-phase bridge inverter is fed from a dc source of 200 V. If the load is star-connected
with 20 W resistance per phase obtain the values of (i) rms load current, (ii) rms current rating
of thyristors, and (iii) load power for 120° conduction and 180° conduction.
[Ans. 4.08 A, 2.9 A, 960 W, 4.71 A, 3.33 A, 1331 W]
6.2 A single-phase bridge inverter is connected to a resistive load of 5 W. The dc input voltage
is 24 V and the frequency of the output voltage is 400 Hz. Draw the waveforms of the output
voltage and output current. Also estimate the rms value of the output voltage.
[Ans. 24 V]
6.3 A series inverter has R = 80 W, L = 8 mH and C = 1.2 µF. Check whether the circuit will
work as a series inverter and find the maximum output frequency.
[Ans. Max. output frequency = 1624.33 Hz]
6.4 Calculate the maximum possible frequency of the SCR controlled inverter shown in
Fig. 6.5(a) where R = 100 W, L = 0.1 H and C = 10 µF.
[Ans. 137 Hz]
6.5 A parallel inverter has a dc input voltage of 100 V and a maximum commutating current
5 A. Obtain the values of L and C. The minimum turnoff time of the SCRs is 20 µs.
6.6 In the three-phase bridge inverter shown in Fig. 6.15, the dc supply voltage is 600 volts.
Determine the rms value of the load line-to-line voltage and load phase voltage.
[Ans. line voltage = 489.9 V; phase voltage = 282.84 V]
6.7 The dc supply voltage of the single pulse width modulated inverter shown in Fig. 6.8 is
120 volts. Determine the width of the pulse required to produce rms output voltages of
50 volts and 100 volts respectively.
[Ans. 31.25°, 125°]
7
Power Controllers
Their Applications
7.1 PRELIMINARIES
Solid state power converters are increasingly employed in various industrial and commercial
applications involving precise control over their operation. Generally, converter controls possess the
advantages of higher accuracy, better reliability, and higher efficiency. The areas that utilise
majority of their applications include
· Variable speed electric drives
· Temperature, illumination controllers
· Power supplies
· HVDC transmission
Rapid developments in power semiconductor and microprocessor/microcontroller technologies
in recent years have revolutionized the art of power modulation and control, as a result of the
development of efficient static power converters. Solid state controls have become cheaper over the
years with the cost of semiconductor devices continuously reducing. These controls are highly
efficient (efficiencies exceeding 95%) and easy to implement in practice. These factors have over
the years contributed to the increasing adoption of power electronic circuits in different industrial
and commercial applications. This chapter briefly discusses some of the major applications of power
electronic converters.
DC motors play a significant role in modern industrial drives. They are extensively employed as
variable speed drives in rolling mills, cranes, hoists, elevators, machine tools, and transit systems,
etc. Speed control methods of this class of motors are simple and easy to adopt. The speeds are easily
varied above and below the rated speed by means of their field currents and armature voltages. Both
series and shunt (with separate excitation) motors are employed as variable speed drives. Initial
torque is quite high especially in dc series motors. Therefore, a series motor is the traditional choice
299
300 Power Electronics: Devices and Circuits
for traction applications. However, due to commutation problems, a dc motor cannot be used in
applications that require very high speeds. It also needs higher amount of maintenance. The choice
of a power electronic converter circuit for speed control depends on the available power supply. If
the power source is ac, either phase controlled ac to dc converter and/or a dc chopper can be
employed to control both separately excited and series motors. But with only dc supply available,
choppers become a better choice especially for dc series motor speed control.
V(a1)
a1 < a2 < a3
V(a 2)
N
V(a 3)
T
Fig. 7.1 Torque–speed characteristics of armature controlled dc motor.
Various single-phase converter configurations for the control of separately excited dc motors are
shown in Table 7.1. In all these cases, motor armature voltage is varied for speed control and the
field is separately excited. The choice of a particular converter for speed control depends on the
drive requirements and available supply, whether single-phase or three-phase. The factors
influencing this choice are
(1) The ac supply (single-phase or three-phase)
302 Power Electronics: Devices and Circuits
Ia Va
~ +
Half wave Below fs
Frequency D FW Va 500 W
fs Ia
Ia
Va
+ Up to 20 kW
Semi- (75 kW in
DFW Va 2 fs
converter traction
Ia systems)
Va
+ Full Up to 20 kW 2 fs
Va converter (75 kW in
Ia traction
system
Ia Va
+ Dual Up to 20 kW 2 fs
Va Ia converter
possible only with full converters while semi-converters are economical when regeneration is not
required. Motor currents, depending on the load torque may be continuous or discontinuous in
single-phase converters. There is a tendency for the current to become discontinuous at light loads
coupled with high speeds unlike in three-phase converters, where motor current is seldom
discontinuous. This is due to higher pulse frequency of the three-phase converters.
ia
RRaa
Single-phase
Single-phase
ac Single-phase
Single-phase
ac
converter voo
V LLaa
supply
supply converter
Ii1f
eebb
Field
Field
aa
VVc
c
Firing
Firing circuit
circuit
Control
Controlsignal
signal
to change
to changeVVoo
Fig. 7.2 Phase controlled converter fed separately excited dc motor drive.
be a single-phase or three-phase converter depending on the supply. It may be a full converter using
only controlled devices as switching elements. Alternately, it may be a semi converter using a free-
wheeling diode or a mixture of diodes and SCRs. The converter firing angle a determines its output
voltage, which is the same as the voltage applied to the armature of the motor. The control voltage
Vc changes the firing angle and hence, the output voltage.
The converter provides the motor armature with a variable dc input voltage. Motor input
voltage is always positive as shown in Fig. 7.2 when semi-converters are used but with full
converters, the motor voltage can be reversed though not the motor current. Power flow is always
from the supply to the load if semi-converters are used. On the other hand, with full converters, it
can also reverse, from load to supply, during regenerative braking of the motor.
304 Power Electronics: Devices and Circuits
2 2Vph
cos B Ra I a
N Q (7.11)
K1G
2 2Vph
cos B
Q
RaT
(7.12)
K1G K1 K 2G 2
Equations (7.11) and (7.12) relate the average motor speed to the firing angle of the converter
and the torque T. The plot of speed against torque is depicted in Fig. 7.1.
Power Controllers: Their Applications 305
vs
eLa
0
a p +a 2p + a 3p
wt
T1,T3 T2,T4 T1,T3
ia
0 p 2p 3p wt
a = 80°
(a) (b)
Fig. 7.3 Single-phase full converter controlled dc drive: (a) circuit and (b) waveforms.
Single-phase semi converter
Figures 7.4(a) and (b) give the circuit and waveforms for a single-phase semi-converter feeding a
separately excited dc motor. Thyristors T1 and T2 are triggered at a and (p + a) respectively. Due
to the action of the free-wheeling diode, T1 is tuned off at p and T2 at 2p. When the thyristors are
conducting, the load is connected to the supply. The energy delivered to the load during this period
is partially stored in the inductance, partially in the form of kinetic energy of the moving system,
and the remaining going to the mechanical load. During the free-wheeling period, the energy from
the inductance is converted into mechanical energy to supplement the kinetic energy in supplying
the mechanical load. The free-wheeling armature current continues to produce electromagnetic
torque in the motor. The semi-converter is a single quadrant converter that can supply the motor
load operating as a rectifier. The speed–current and speed–torque characteristics of this drive are
governed by the following expressions:
2Vph
Q
1 cos B Ra I a
N (7.13)
k1G
and
2Vph
1 cos B
N Q
RaT
(7.14)
k1G k1 k2 G 2
306 Power Electronics: Devices and Circuits
vs e La e b,n
0
a p +a 2p + a 3 p wt
T1 T2 T1
io
io
+
R(R a + R f )
Single-phase Semi-converter
ac or L(La + Lf)
vo
supply full-converter
+
eb M
–
or full converter controlled dc motor drive. Ra and Rf are armature and series field resistance
respectively. Similarly La and Lf are the armature and field inductances. With regard to series motor
drive, the following expressions are useful.
A1
X B1 (7.15)
T
where A1 and B1 are constants and the shape of the characteristic in this case, is hyperbolic.
The torque T is given by
T C1 I o2 (7.16)
Applied voltage,
V
E b I o Ra R f (7.17)
The output voltage and current waveforms for full converter drive are shown in Fig. 7.6 where
v, eb, io, and vo represent supply voltage, back emf, load current, and output voltage respectively
vs
eb
0
a p p+a 2p 3p wt
T1, T3 T2, T4 T1, T3
io
0
wt
vo V
0
a p 2p 3p wt
Fig. 7.6 Output voltage and current waveforms for full converter drive.
(all instantaneous values). Similar waveforms for semi-converter are shown in Fig. 7.7.
The torque–speed characteristics of the semi-converter drive are shown for different firing
angles in Fig. 7.8.
308 Power Electronics: Devices and Circuits
V eb
vs
0
a p p+a 2p 3p wt
T1 T2 T1
io
0
v
wt
vo
0
a p p+a 2 p 2p + a 3p wt
Fig. 7.7 Output voltage and current waveforms for semi-converter drive.
a = 0°
a = 30°
Speed
(rpm) a = 60°
a = 90°
a = 120°
Torque (N-m)
Fig. 7.8 Torque versus speed characteristics.
R Va
Y Ia
B + Half wave 40 kW 3fs
Va Ia
Supply frequency
N
Ia Va
+
R Semi- 10 –100 kW 3fs
Y Va converter
B Ia
Va
Ia
R +
Y Va Full 75–120 kW 6fs
B Ia converter
Va
Ia
R + B Dual Up to 150– 6fs
Y Va Y converter 1500 kW
B R Ia
Three-phase converters possess several advantages over their single-phase counterparts. These
include:
(a) Filtering requirements for smoothing out the motor current are less because of higher ripple
frequency.
(b) The motor performance is better when operating from three-phase drives since the motor
current is mostly continuous.
The three-phase half wave converters are not used for control purposes as the supply current
in this case contains dc component. Semi-converters and full converters are popular as single-
quadrant and two-quadrant drives. Dual converters are used in reversible drives having power ratings
as high as several megawatts.
The speed–current and speed–torque relationships for three-phase converter drives are governed
by the following expressions.
310 Power Electronics: Devices and Circuits
3 6Vph
2Q
1 cos B Ra I a
N (7.20)
K1G K1G
or
3 6Vph
2Q
1 cos B
Ra T
N (7.21)
K1G K1 K 2 G 2
If the drop IaRa is neglected, then V = Eb. Therefore,
N µ cos a for full converter
µ (1 + cos a) for semi-converter
The speed–torque characteristics of three-phase full converter and three-phase semi-converter
for two different firing angles are shown in Figs. 7.9(a) and (b).
a1 = 0°
1
N 0.5
a 2 = 60°
T
(a)
a1 = 0
1
N a 2 = 90°
0.5
T
(b)
Fig. 7.9 Speed-torque characteristics of three-phase: (a) full converter and (b) semi-converter.
Power Controllers: Their Applications 311
Choppers are preferred for the control of dc drives in electric vehicles and traction. A chopper
directly converts a fixed voltage dc supply into variable voltage dc supply. Therefore, a variable
dc voltage can be obtained by using a chopper to control the speed of the motor. It is possible to
operate the motor in all the four quadrants by using suitable chopper circuits. In this section, the
efficacy of the chopper control is brought out using a separately excited dc motor, controlled by
the chopper.
Here, three possible modes of operation are considered, namely
(1) Motoring mode
(2) Regenerative braking mode
(3) Rheostatic or dynamic braking mode
Motoring
A transistor chopper controlled separately excited motor drive is shown in Fig. 7.10(a).
ia
Ra
+ va
V Va La If
DFW
Va Va
+
M Rf Vf ia2 ia
Q ia
Eb – ia1
0
Ton Toff wt
(a) (b)
Fig. 7.10 Chopper controlled dc drive: (a) circuit and (b) waveforms.
This is one-quadrant drive, as the armature voltage and current polarity cannot be changed.
Waveform of motor terminal voltage Va and the armature current ia are shown in Fig. 7.10(b). When
the transistor chopper is ON for a period Ton, the motor current increases from ia1 to ia2. Since, during
this period, the motor is connected to the supply, the equation governing the armature current is:
dia
Raia + La+ Eb = V 0 £ t £ Ton (7.23)
dt
Here, V is the voltage applied to the motor. The current increases from ia1 to ia2 during this
period as shown in the Fig. 7.10(b). When the chopper is OFF, the armature current freewheels
through the free-wheeling diode and motor terminal voltage is zero. The equation governing this
free-wheeling mode is given by
dia
Raia + La + Eb = 0 Ton £ t £ T (7.24)
dt
Power Controllers: Their Applications 313
From the Fig. 7.10(b) showing the output voltage and output currents waveform,
Va = average value of the armature voltage = d V
where
d = Ton/T
The motor current Ia is then given by
E V Eb E V K1G N
Ia (7.25)
Ra Ra
The motor speed as a function of applied torque T can be expressed as
EV RaT
N (7.26)
K1G K1 K 2G 2
Braking
Chopper circuits for regenerative braking and dynamic braking operations are shown in Figs. 7.11
and 7.12 respectively along with associated voltage and current waveforms. The chopper for
regenerative braking can be easily identified as a step-up chopper dealt with in Chapter 5. By
D ia
Motor
La
+
V C Tr va
Ra
Eb
va
Va Va
ia ia
0
Ton T wt
Fig. 7.11 Regenerative braking.
controlling the ON time of the transistor Tr, it is possible to transfer the converted electrical energy
from the motor to the supply. In the dynamic braking circuit, the effective value of the braking
resistor RB can be changed steplessly from 0 to RB as d is controlled from 1 to 0. In this method
of braking, the electrical energy converted from the motor is dissipated in armature resistance,
control transistor Tr, and braking resistor RB. The speed–torque curves of chopper controlled
separately excited motor for both motoring and regenerative braking operation are shown in
Fig. 7.13.
314 Power Electronics: Devices and Circuits
ia
Motor
va
La ia2 --------------------
RB Tr va ia
ia1
Ra
+
Eb 0 Ton T wt
Regenerativ
e
braking Motoring
–T 0 T
Fig. 7.13 Torque versus speed characteristics for motoring and regenerative braking.
Chopper control can be applied to series motors also. In this case, the motor speed can be varied
by varying the duty ratio d. Higher speeds can be obtained by increasing the duty ratio which means
the armature applied voltage is increased when d is increased. Motoring characteristics of a chopper
controlled series motor are shown for different values of d in Fig. 7.14.
N
d1 d1 >ÿ d2 >ÿ d3
d2
Motoring
d3
0 T
7.5 AC DRIVES
In majority of industrial applications requiring variable speeds, dc motors have been widely used
in the recent past. The main reason for the use of dc motors during the past decades is simple, less
expensive, and wide ranging speed control methods in addition to its ability to provide high torque
at low speeds. However, the dc motors by themselves are expensive and require more maintenance
due to brushes and commutators.
Nevertheless, ac motors are preferred for fixed speed applications due to their low cost and
higher reliability. The most attractive feature is the absence of commutators and brushes and
therefore, the need for lesser maintenance. Conventional methods of speed control for ac motors were
either expensive or highly inefficient because of non-availability of cheap variable frequency
sources. However, availability of thyristors and other power semiconductor devices have allowed
the development of powerful and efficient variable speed ac motor drives over the recent years.
120 f
Ns (7.27)
P
The motor speed which is actually the speed of the rotor, is given by
Nr = Ns(1 – S) (7.28)
where, S represents the slip which gives the degree by which the rotor speed differs from the
synchronous speed.
Generally, the following methods are used for speed control of the Induction motors. A few
methods depend on the change of supply frequency and the number of poles. These methods include
(i) Pole changing
(ii) Stator voltage control
(iii) Supply frequency control
(iv) Eddy current coupling
(v) Rotor resistance control
(vi) Slip power recovery
316 Power Electronics: Devices and Circuits
Amongst these methods, only those that make use of static power converters in one form or
another are dealt with in this section. They can be enumerated as follows:
(a) AC voltage controllers or stator voltage control
(b) Variable voltage variable frequency control
(c) Slip power recovery control
(d) Rotor resistance control or chopper controller
The reader can refer to texts on ac machines for the description of other methods.
R
R
Three-phase
ac supply
Three-phase
ac supply
Y Y
Three-phase
induction
B motor
B
Thyristor voltage
controller
(a)
(b)
Fig. 7.15 Variable stator voltage controlled three-phase induction motor.
voltage in three-phase ac circuits can be varied by a thyristor controller consisting of a pair of anti-
parallel thyristors in a delta-connection as shown in Fig. 7.15(a) and in star-connection shown in
Fig. 7.15(b). Each pair of back-to-back thyristors controls the voltage delivered to one phase of the
stator, and the phase voltage waveform consists of a series of sine-wave segments. A phase
displacement of 120° is maintained between the sets of gating pulses delivered to each controller
in order to produce a symmetrical reduction of the three-phase voltages. In the full voltage
condition, each thyristor receives a gating signal at the start of the positive half cycle of its anode
to cathode voltage. The series thyristor pair is then virtually a short-circuit and the stator phase
receives a complete cycle of supply voltage. As the thyristor firing is delayed, the conduction period
of each thyristor is shortened and the effective stator voltage is reduced. When the firing delay is
180°, the thyristor controller is open-circuited and the motor voltage and current are both zero.
Speed control is obtained by varying conduction period of thyristors. For motors with low power
ratings, the anti-parallel thyristor pair can be replaced by a TRIAC. The ac voltage controllers are
also used for a soft starting of motors.
It is well known that the torque developed in an induction motor at a given slip varies
approximately with the square of the stator voltage. The steady state operation occurs when load
torque is balanced by the motor torque. Thus, the rotor speed can be varied smoothly by varying
the stator voltage without changing the supply frequency as has just been discussed.
Power Controllers: Their Applications 317
The direction of rotation of the three-phase induction motor can be reversed by changing the
phase sequence of the stator voltages by introducing two additional thyristor controllers. The merits
and demerits of this method of stator voltage control can be enumerated as follows:
Merits
(i) The control circuitry is simple, more compact and weighs less.
(ii) There is considerable saving in energy and thus, it is an economical method when
compared to other methods of speed control.
Demerits
(i) Maximum torque available from the motor decreases with reduction in stator voltage.
(ii) At low speeds, motor currents are excessive and special arrangements should be provided
to limit these excessive currents.
(iii) Performance is poor under running condition at low speeds.
(iv) Operating efficiency is low as resistance losses are high.
(v) Voltage and current waveforms are highly distorted due to harmonics, to eventually affect
the efficiency of the motor.
Filter
Rectifier Inverter
L
D1 D3 D5
T5
Three-phase
T1 T3
ac supply
+ Vd
Vo C
p Vd 2p wt
D4 D6 D2 Three-phase
T4 T6 T2 Induction
Motor
(a) (b)
Fig. 7.16 Frequency control of an Induction motor
contains six thyristors and six diodes. The firing circuits are not shown in the figure. The capacitor
C, as shown in Fig. 7.16 supplies stiff voltage supply to the inverter and the inverter output voltage
waves are therefore not affected by nature of load.
Increasing Rr
N
Ld
Ir
Id Id
Ir
R 0
Tr 120° p 2p wt
0
T
(a) (b) (c)
Fig. 7.17 Chopper control of rotor resistance.
is ON, the resistance is short-circuited and the current Id is bypassed by the chopper. Therefore, the
effective resistance R¢, is given by
R¢ = R(1 – d)
where d is the duty ratio.
When d varies from 1 to 0, the rotor resistance R¢, varies from 0 to R.
Figure 7.17(b) shows the chopper input current wave. The torque speed characteristics shown
in Fig. 7.17(c) illustrate the effect of rotor resistance on motor speed. That is, the rotor speed can
be varied by varying the effective rotor resistance.
Three-phase
as supply
Power Slip
input rings Transformer a1 <ÿ a2 <ÿ a3 <ÿ a4
Smoothing a1 Load
a3 a2
Wound rotor inductor Torque
Power torque
inductor + + feedback 90 < a < 180°
motor I0 a 4
Vdo Vd
0
Slip Speed
power
Rectifier Inverter
bridge bridge
(a) (b)
Fig. 7.18 Static Kramer drive with slip power recovery.
It is possible to vary the motor speed efficiently by taking out the power from the rotor and
supplying it back to the main ac source, thus, causing the rotor to slip. Various methods of speed
control using this principle are available and are referred to as slip power or slip energy recovery
methods. These are applicable only to wound-rotor induction motors.
Figure 7.18 shows schematically a speed control method of slip ring Induction motor below
synchronous speed. This sub-synchronous speed control method where the slip power is recovered
and fed back to the line through a converter cascade is known as a Static Kramer Drive. The voltage
at slip rings is at the frequency of the slip but the power to be fed back to the supply must be at
the stator frequency. Therefore, slip ring voltage is rectified by using a diode bridge rectifier and
then fed into dc link. The dc link power is transferred back into the main supply through line
commutated thyristor inverter. The rectifier and inverter are both phase commutated by alternating
emfs appearing at the slip rings and supply bus bars respectively.
The speed–torque characteristics of the induction motor are given in Fig. 7.18(b) for different
values of firing angle of the line commutated inverter. Therefore, the speed control can be obtained
by a simple variation of inverter firing angle in the range 90° < a < 180°. For a given torque, the
speed can be reduced by increasing the inverter firing angle above 90°.
320 Power Electronics: Devices and Circuits
The speed of a synchronous motor can be controlled by varying the frequency of its supply source.
The development of inverters and cycloconverters has led to their use in variable speed applications
of synchronous motors in high power and high-speed compressors, blowers, and many more. The
speed control can be achieved either by voltage fed inverters, or current fed inverters, or
cycloconverters. There are two different modes of operation defined for synchronous motor drives,
namely
(1) The open loop true synchronous mode
(2) The self-controlled mode
In true synchronous mode, the supply frequency is controlled from an independent oscillator.
This variable frequency control not only permits the speed control but also can be used for smooth
initialization and regenerative braking. In the self-controlled mode depicted in Fig. 7.19, the stator
supply frequency is controlled in such a manner that the synchronous speed is same as the rotor
Synchronous
motor
If
+
dc supply Three phase Field
inverter
f d
Rotor position
dref Phase delay and fref Rotor
and firing position
circuit sensor
speed. This ensures that the rotor runs at synchronous speed for all operating conditions. As a result,
the rotor cannot pull out of step and the hunting oscillations are eliminated.
A circuit breaker is used to disconnect a high power load from the supply. When the current in the
circuit is small, an ON–OFF switch is sufficient for this purpose. However, when the current drawn
by the source is high, the breaking of the circuit by a simple switch can cause severe arcing. A
thyristor can be used as a circuit breaker for both ac and dc circuits.
Power Controllers: Their Applications 321
R Load
+
Vdc
– Ta C Tm
Whenever the mains dc supply is to be switched on to the load, the main thyristor Tm, is gated
by a trigger pulse and the thyristor conducts since it is forward biased by the dc supply. Capacitor
C gets charged to supply voltage Vdc with the left side plate positive, through a resistor R. Since
voltage drop across the thyristor is very small, the load gets full supply voltage Vdc.
When it is required to switch off the load, auxiliary thyristor Ta is triggered by a gate pulse
and capacitor C starts getting discharged through Ta and Tm. This discharging current opposes the
load current. When the discharging current and load current are equal, thyristor Tm gets turned off.
Then the capacitor C gets charged to opposite polarity through load with the right side plate
positive. Once capacitor C is fully charged, thyristor Ta will be turned off because the current
through it will become negligible. Resistor R is so chosen that the current through it is less than
the holding current of Ta.
Load
R2
D2
ac S
T1 RS T2
mains
D1
R1
An ordinary switch S is introduced in the gate circuit. Since gate current is very small, an
ordinary switch S is sufficient. Thyristor T1 receives its gate pulse through R2, D2, and Rs while
T2 receives gate pulse through R1, D1, and Rs. The resistances R1, R2 and Rs are used for limiting
the gate current to an appropriate value.
During the positive half cycle, thyristor T1 is triggered by the gate pulse when the switch S
is closed. As the supply voltage reverses, T1 is turned off and T2 gets triggered. At the beginning
of the next positive half cycle, T2 gets turned off and T1 is triggered. When required to break the
circuit, switch S is opened. Since the gate circuit is open thyristors do not get triggered as the gate
currents cease to flow. The load circuit is now broken.
A practical circuit needs additional components other than those shown in the Fig. 7.21. For
example, thyristors need protection circuits and to vary the voltage applied to the load, additional
circuitry to delay the firing of thyristors can be used.
High Voltage Direct Current (HVDC) transmission requires converters of high voltage and current
ratings. These converters are formed by series and parallel strings of high voltage thyristors.
Generation and utilization of electric power at present, is undertaken through the ac systems
only. It is because in case of ac, the voltage levels can be altered by the transformers. Also generator
and motor considerations give the three-phase ac system an edge over others, both economically
and technically. However, in long overhead or underground transmissions HVDC scores over ac
systems. Its advantages over ac systems can be listed as follows:
Advantages
(1) The dc lines and cables are cheaper than ac lines and cables. However, in the dc lines, the
terminal equipment is considerably more expensive than the ac terminal equipment. This
is because of high cost converters used as terminal equipments in dc lines.
It is seen that for a distance above breakeven distance, refer, Fig. 7.22, the total cost
of dc transmission is less than the total cost of ac transmission. For overhead lines, the
C t
cos
Breakeven ne
a c li
distance
dc line cost
Cost
dc terminal
cost
ac terminal
cost
D
Fig. 7.22 Comparing the dc and ac transmission.
Power Controllers: Their Applications 323
breakeven distance is about 600–900 km. For submarine cables, it is 20–50 km and for
underground cables, it is 50–100 km. In some cases, it is necessary to use HVDC,
transmission even for a distance less than the breakeven distance because of problems
associated with ac transmission.
(2) A dc line and tower are cheaper than an ac line and tower because fewer conductors are
needed. Also, a smaller dc line can be used because there is no skin effect in this case.
(3) The dc line losses are lower than the ac line losses for same power capacity transmissions.
(4) An HVDC line can be built in stages. Initially the line can be built as a monopolar line
with ground return. Later it can be converted into a bipolar line.
(5) All ac lines have high short circuit currents. However, the contribution of the dc line to
the short circuit current of the system is only up to the rated current of the line.
(6) A dc line has lesser corona and radio interference.
(7) All ac systems interconnected by an ac line can be controlled independently as regards
frequency, short circuit rating, and so forth.
(8) An ac system must remain in synchronism. A dc transmission has no such stability problem.
Two ac power systems of different operating frequencies can be interconnected because of
the asynchronous nature of the dc line.
(9) The ac lines have many reactive power problems while dc lines have no such problems.
(10) It is ideal for cable transmission as there is no charging reactive power.
Disadvantages
(1) The additional cost of converting equipments needed at both the ends makes dc
transmission uneconomical for low power, short distance transmissions.
(2) Circuit interruption in the dc systems is more difficult than in ac systems as natural current
zero is not available in the dc systems. Also, dc circuit breakers with high interrupting
capacity are not available.
ac system ac system
ac system ac system
ac system ac system
HF
HF-Harmonic filter
RC
HF
RC-Reactive compensation
the amplitude of the harmonics), reactive power compensation (to meet the reactive power
requirements of the converters), dc reactor (to limit short circuit current and to prevent commutation
failure), and so forth.
There are some important electrical loads for which uninterrupted and quality power supply is
essential for reliable operation. Such critical loads are: (i) computers, (ii) communication
equipments, (iii) surgical and post-surgery medical equipments to name a few.
A quality power is that which is free from large voltage/current transients, over voltage and
under voltage conditions, large harmonic contents in the supply currents and fluctuations in the
supply frequency.
A good and reliable UPS can be expected to provide quality power to the critical loads during
the periods of power outages. It can also supply conditioned power when the utility source suffers
from one or many of the abnormal conditions mentioned above.
A solid state UPS consists of the following blocks:
(i) Energy storage device (a battery) that would act as a substitute power source when the
mains supply fails.
(ii) A rectifier/charger meant for replenishing energy to the storage device when utility power
source is available. In one UPS configuration (on-line UPS), the rectifier feeds dc power
to the inverter, which converts the dc input to the regulated ac output.
(iii) An inverter that converts dc voltage from the battery source or the rectifier to a regulated
ac output.
(iv) A transfer switch that connects the load either to the inverter or to the utility source
depending on which one can supply power.
Generally, two major topologies are in use, they are:
1. On-Line UPS where the inverter powers the load continuously.
2. Off-Line UPS where the utility is the primary power source to the load and the UPS takes
over only when the power supply fails.
dc current to the inverter and maintains a float condition or “trickle charge” on the battery. The
inverter is connected to a transfer switch whose output is coupled to the load. In the UPS shown
in Fig. 7.30, the utility power has gone off and the battery now supplies dc power to the inverter
which continues to feed the load via the transfer switch.
Thus, the load is not affected in any way by the loss of utility power. The inverter supply to
the load will continue till the battery has discharged to a predetermined level, when usually the
manufacturer will offer an alarm system to warn about the condition of the battery. One can start
an orderly shut down of the load if the utility power is still “OFF”.
If the utility power returns as shown in Fig. 7.31, the rectifier starts charging the battery and the
load is connected directly to the utility through the transfer switch till the battery recovers its charge.
This operating mode can also include to represent a condition when the inverter has failed.
Power Controllers: Their Applications 329
An inverter is usually designed to operate over a wide input voltage range so, it would turn
out to be cheaper if an unregulated rectifier could be used to supply the inverter and a much smaller
rectifier/charger with regulated output can be used to charge the battery. But now, battery has to
be decoupled from the inverter because at low input line the output of the unregulated rectifier may
be lower than the battery (rectifier/charger) voltage. So to prevent the rectifier/charger from
supplying the inverter, an SCR switch is used as shown in Fig 7.32.
When the utility power fails, the SCR is triggered by a sensing circuitry which now connects the
battery to the inverter input. When the utility power returns, the SCR gets reverse biased and turns
off to decouple the battery from the inverter.
When the utility power fails a sensing circuitry activates the transfer switch and the load is then
‘powered’ by the inverter as shown in Fig. 7.33(b). However, as the inverter will see a sudden rise
in its load, its output will decrease for several cycles. Off-line systems are generally used for non-
critical loads, where power quality requirements are not very stringent. On-line systems on the other
hand can meet very stringent power requirements. However, on-line systems are costly.
7.10.4 Inverters
The function of the inverter is to convert the dc power drawn from rectifier/charger or from the
battery to ac power. The inverter may be designed for a sine wave output or a quasi square wave
output. Generally, for quasi square wave inverters, operating from low battery voltages, push–pull
configurations are preferred. For higher powers, and higher battery voltages, bridge (either half-
bridge or full-bridge) type configurations are employed. Regardless of inverter topology, it should
have good voltage regulation, low output distortion and short circuit protection.
A transfer switch with SCRs and TRIACs are shown in Fig. 7.34 and 7.35, respectively. A
measurement and sensing circuitry will continuously monitor the voltages of the two-power sources
and suitably trigger either switch S1 and S2.
SOLVED EXAMPLES
EXAMPLE 7.1 A separately excited dc motor runs at 1000 rpm from a 200 V dc supply. What
will be the speed of the motor when power is supplied from a single-phase full converter working
at a = 60°. The supply voltage is 230 V (rms).
Solution
Neglecting the IaRa drop and assuming constant excitation. The ratio of speeds will be same
as the ratio of the applied voltages at the given conditions. Therefore,
Va1 N1
Va 2 N2
Va 2 N1
N2
Va1
EXAMPLE 7.2 A dc drive works at 1100 rpm when fed from a 220 V dc source. The same drive
is supplied from a chopper connected to 220 V dc mains. What will be the duty ratio to obtain 900
rpm. Neglect the IaRa drop.
Solution
The ratio of speeds can be equated to the ratio of applied voltages.
Va1 N1
Va 2 N2
N2
Va 2 Va1
N1
900
220 180 volts
1100
Power Controllers: Their Applications 333
EXAMPLE 7.3 A dc drive runs at 900 rpm on no load when fed at 198 V dc from a full converter.
What is the triggering angle of the converter thyristors if the motor has to run at 500 rpm on no
load? Input to the converter is 230 V ac. Neglect the IaRa drop.
Solution
Va1 N1
Va 2 N2
198 900
Va 2 500
500
Va 2 198 110 volts
900
Also,
2 × 2 × 230 × cosB
= 110
Q
Therefore,
a = 57.9°
EXAMPLE 7.4 A single quadrant dc chopper is used to control the speed of a separately excited
armature controlled dc motor. The chopper has a supply voltage of 230 V dc. The on time and off
time of the chopper are 10 ms and 25 ms respectively. Also, Ra = 2 W. Assuming continuous
conduction of the motor current, determine the average armature current and torque developed
by the motor when it is running at speed of 1400 rpm. The back emf constant of the motor is
0.5 V/rad/s.
Solution
0.5
Back emf, Eb 1400 2Q
60
73.30 volts
Ton 10
Va Vs 230 92 volts
T 25
(92 73.3)
Ia 9.35 A
2
T = Torque constant ´ Ia
Also,
Torque constant = 0.5 Nm A–1
Therefore,
Torque T = 9.35 ´ 0.5
= 4.675 Nm
334 Power Electronics: Devices and Circuits
REVIEW QUESTIONS
7.1 Draw the circuitry for a static circuit breaker and discuss its advantages and disadvantages.
7.2 Explain how the speed of the dc series motor can be controlled using a dc chopper.
7.3 Discuss a speed control scheme for a three-phase squirrel cage induction motor using a
rectifier–inverter combination.
7.4 What is the necessity for the UPS? Draw a block diagram for UPS and explain its operation.
7.5 Discuss the operation of the HVDC system and explain how the power flow can easily be
controlled in both the directions. Also, elaborate on its merits.
7.6 What is an SMPS? What are its advantages? Draw the circuit arrangement for an SMPS and
explain briefly its operation.
7.7 Give a short note on the monopolar HVDC system.
7.8 Discuss the speed control scheme for a three-phase induction motor using power
semiconductor device based circuitries.
7.9 Explain phase control of ac motor with a circuit diagram. Explain why this method is very
suitable with fan loads on the motor.
7.10 State the advantages of HVDC over conventional ac transmission system. Draw the schematic
diagram of dc bipolar transmission system and explain it in brief.
7.11 The temperature of a furnace is to be controlled by switching on/off of an electrical heater.
Explain how this can be accomplished using thyristors.
7.12 With a neat diagram, explain the method of controlling the speed of a dc series motor using
the SCR.
7.13 Explain briefly the circulating current free mode of operation of a dual converter for speed
control of a dc motor.
7.14 Draw the circuit diagram for speed control scheme for a three-phase induction motor and
explain its operation.
7.15 Write short notes on the following:
(a) UPS
(b) High frequency induction heating.
7.16 Draw the circuit diagram and explain a speed control scheme for a DC motor using a four-
quadrant converter.
7.17 Draw a scheme for the speed control of a dc motor using a dc chopper and explain its
operation.
8
Microcontroller Based Control
and Protection Circuits
8.1 PRELIMINARIES
The evolutionary growth in the field of integrated circuit fabrication technologies has opened doors
for miniaturization in the microprocessor industry. It has been possible to produce faster and more
powerful microprocessors of increased word length and memory (which can address gigabytes of
memory) though these technologies to meet the need for ever more powerful CPUs (Central
Processing Units). These processors are recognized as the backbone in the development of powerful
computers, workstations and electronic instruments, which requires sophisticated control capability.
Today, miniaturized microprocessors, which integrate the high performance core (CPU), the read
only memory (ROM), the read/write memory (RAM), and the input/output interface on a single
silicon chip are used in high numbers. These are called Microcontrollers. Microcontrollers focus on
the need of fast real time control applications. Microprocessors that are designed for a specific
application with high computational power and complete I/O capability are referred to as
Application Specific Microprocessors (ASMs). The overwhelming importance of digital control
techniques in the field of power electronics and electric drives using microcontrollers and ASMs
has prompted the discussion of the commonly used microcontroller 8051 from Intel and a few
applications as applied in power control in this chapter.
The distinguishing characteristics of a microcontroller chip and its integration on a single chip,
are the resources that facilitate its use as the controller in a power device or instrument. Some of
the common features exhibited by the family of microcontrollers can be listed as follows:
(1) CPU: The CPU may operate with a bit-size of 8, or 16, or 32 bits. The word length of
the CPU and the chip size decide the processing capability of the CPU. The commonly
available IC packages come in 8 pin, 18 pin, 28 pin and 40 pin configurations.
(2) On chip RAM: The RAM size is usually 64 to 256 bytes and it includes the Special
Function Registers (SFRs). These SFRs serve to program and control the I/O interface.
(3) On chip ROM: This kind of memory may be factory programmable or EPROM. These
usually have a capacity from 1 kb to 8 kb.
(4) Parallel I/O ports: One or more parallel ports are available in a microcontroller. The
availability of the ports depends on the chip size (number of pins in the chip) and many
of the parallel port pins have dual function attached to them.
335
336 Power Electronics: Devices and Circuits
(5) Timers/Counters: Usually, one or two 8/16-bit timers/counters are available in one
microcontroller.
(6) Interrupts: Two or more interrupts in a microcontroller are a usual feature.
(7) On chip clock generator: It is present in all microcontrollers. Only a crystal and few
capacitors are to be provided to facilitate this clock generator though it is also possible
to give a clock directly to the microcontroller.
(8) Watch dog timer: The WDT is intended as a recovery method in situations where the
CPU may be subjected to a software upset.
(9) Facilities for expanded mode: These are present in most micro controllers. The RAM,
ROM, and I/O facilities can be expanded by externally connecting the memories or I/O
peripheral devices to the address and data buses. In such cases, one or two of the I/O ports
need be sacrificed.
(10) Many of microcontrollers are available as ROMless version at a much cheaper price. These
contain all the resources of the microcontroller family except the EPROM. In order to use
these ICs, an external ROM has to be interfaced to them in the expanded mode.
Apart from these common features, other resources, such as digital to analog conversion, analog
to digital conversion, stepper motor control, micromotor control, power down mode (for applications
where power consumption is critical), and serial input facility are also available.
8 8
Latch
A B
Port 1
8 8
Latch
8 8
Latch
PC DPTR SP
To system control
VVCC
Port 3
8 8
Latch
The MCS-51 microcontroller family actually includes a series of devices ranging from 8031 to
8751. The 8051, 8-bit microcontroller is the original member and the core for all MCS-51 devices.
The features of the 8051 core are that it possesses
· 8-bit CPU optimization for control applications.
· extensive Boolean processing (single-bit logic) capabilities.
· 64 K program memory address space.
· 64 K data memory address space.
· 4 kb of on-chip program memory.
· 128 kb of on-chip data RAM.
· 32 bi-directional and individually addressable I/O lines.
· Two 16-bit timers/counters.
· Full duplex UART.
· Six-source/Five-vector interrupt structure with two priority levels.
· On-chip clock oscillator (12 MHz).
Of the 40 pins in the DIP, four I/O bi-directional ports for handling data transfer require 32 pins.
The functions of these 40 pins can be outlined as:
Port 0: is alternatively used to hold the lower multiplexed address and data bus (AD0–AD7)
while port 2 holds the higher 8-bit address, when 8051 is used in expanded mode to access external
memory.
Port 1: pins do not have any alternate functions.
Port 3: pins have alternate functions as enumerated in Table 8.1.
ALE: Address latch enable is used for demultiplexing the address/data buses. This pin is also
used during the programming of one on-board EPROM.
RESET: A high on this pin for two machine cycles resets the 8051 microcontroller.
PSEN: PSEN or Program store Enable is used as a strobe for the external program memory.
This signal is inactive when program fetches take place from an internal ROM.
PSW: The program status word (PSW) contains several status bits that reflect the current status
of the CPU. The PSW shown in Fig. 8.3 resides in the SFR space.
EA/Vpp: A high on this pin indicates that the program fetches are from external memory, else
for normal operation, the EA must be connected to VCC. This pin is also used in internal EPROM
programming for applying the programming pulse.
XTAL1 and XTAL2: are the crystal inputs for onboard clock circuit.
Microcontroller Based Control and Protection Circuits 339
(a) (b)
Fig. 8.4 (Cont.)
340 Power Electronics: Devices and Circuits
MSB LSB
Scratch Pad Area 80 bytes 7FH
30H
7F 7E 7D 7C 7B 7A 79 78
8.2.5 Timers/Counters
The 8051 microcontroller has two 16-bit timers/counters (TH0, TL0) and (TH1, TL1). Additionally,
it also has two control registers namely TMOD, the mode control register and TCON, the timer
control register. The TMOD register determines whether the timers/counters are to be used as timer
or a counter, selects one of the four modes of the timer/counter operations, and defines the gating
control. The TCON, on the other hand, contains four control bits to turn the two timer/counters on/
off as well as to specify whether the interrupts are falling edge triggered or low level triggered. There
are two flags to indicate the overflow of the two timers/counters. There are two other flags to indicate
the external interrupts at INT0 and INT1. The reader may refer to Intel manual for more details on
TMOD and TCON registers.
Each interrupt source can also be individually programmed to one of two priority levels
named IP (Interrupt Priority) by setting or clearing a bit in the SFR.
(f) Indexed addressing: This mode of addressing is valid only for the program memory. It
can only be used to read locations from the code and is basically used for table look-up.
The register DPTR and PC are the 16-bit registers used for indexing.
For example, MOVC A, @ A+DPTR.
(g) Bit addressing: This mode of addressing is used to access bits of the bit address space
having bit address 00H to 7FH and the bit-addressable SFRs. The bit 7 of the PSW can also
be addressed as PSW.7 or D0.7. This would correspond to the bit address D0H (byte address
of PSW) +7 (the bit-number) = D7H (the bit address).
Mnemonic Operation
ADD A, <byte> A = A + <byte>; Addition
ADDC A, <byte> A = A + <byte> + C; Addition with carry
SUBB A, <byte> A = A – <byte> – C; Subtraction with borrow
INC A A = A + 1; Increment accumulator
INC <byte> <byte> = <byte> + 1; Increment byte in memory/register
INC DPTR DPTR = DPTR + 1; Increment DPTR
DEC A A = A–1; decrement accumulator
DEC byte <byte> <byte> – 1; Decrement byte in memory/register
MUL AB B:A = B X A; Multiply B and A
DIV AB A = Int [A/B]; 8-bit quotient in A
B = Mod [A/B]; 8-bit remainder in B
DA A Decimal adjust accumulator
Mnemonic Operation
ANL A, <byte> A = A . AND. <byte>
ANL <byte>, A <byte> = <byte>. AND. A
ANL <byte>, # data <byte> = <byte> .AND. # data
ORL A, <byte> A = A.OR. <byte>
ORL <byte>, A <byte> = <byte>. OR.A
ORL <byte>, #data <byte> = <byte>.OR.# data
XRL A, <byte> A = A, XOR. <byte>
XRL <byte>, A <byte> = <byte> .XOR.A
XRL <byte>, #data <byte> = <byte> .XOR. # data
CRL A A = 00H
CPL A A = .NOT .A
RL A Rotate ACC left 1 bit
RLC A Rotate ACC Left through Carry
RR A Rotate ACC Right 1 bit
RRC A Rotate ACC right through carry
SWAP A Swap Nibbles in A
344 Power Electronics: Devices and Circuits
Mnemonic Operation
MOV A, <src> A = <src>
MOV <dest>, A <dest> = A
MOV <dest>, <src> <dest> = <src>
MOV DPTR, #data 16 DPTR = 16 bit immediate constant
PUSH <src> Increment SP: MOV “@SP”, <src>
POP <dest> MOV <dest>, “@SP”; decrement SP
XCHG A, <byte> ACC and <byte> exchange data
XCHD A, @Ri ACC and @ Ri exchange low nibbles
External RAM
Table 8.6 shows the list of the data transfer instructions that access external data memory. Here, only
indirect addressing can be used. The choice is whether to use a one-byte address, @ Ri can be either
R0 or R1 of the selected register bank, or a two-byte address @ DPTR. The accumulator is always
either the destination or source of the data.
Table 8.6 Data transfer instructions that access external data memory
Mnemonic Operation
MOVX A, @Ri Read External RAM @Ri
MOVX @Ri, A Write External RAM @Ri
MOVX A, @DPTR Read External RAM @DPTR
MOVX @DPTR, A Write External RAM @DPTR
The read and write strobes to external RAM are activated only during the execution of a MOVX
instruction.
Look-up tables
Table 8.7 shows the two instructions that are available for reading look-up tables in the program
memory. Since these instructions access only program memory, the look-up tables can only be read,
not updated. The mnemonic of this instruction is MOVC for move content. If the table access is
to the external program memory, the read strobe is PSEN.
Mnemonic Operation
MOVC A, @ A + DPTR Read program memory
@ (A + DPTR)
MOVC A, @ A + PC Read program memory
@ (A + DPTR)
Microcontroller Based Control and Protection Circuits 345
Mnemonic Operation
ANL C, bit C = C. AND. bit
ANL C, /bit C = C. AND .NOT. bit
ORL C, bit C = C. OR. bit
ORL C, /bit C = C. OR . NOT . bit
MOV C, bit C = bit
MOV bit, C Bit = C
CLR C C = 0
CLR bit Bit = 0
SETB C C = 1
SETB bit Bit = 1
CPL C C = .NOT. bit
CPL bit Bit = . NOT . bit
JC rel Jump if C = 1
JNC rel Jump if C = 0
JB bit, rel Jump if bit = 1
JNB bit, rel Jump if bit = 0
JBC bit rel Jump if bit = 1: CLR bit
Note: 1. CY, the carry bit in the PSW is used as the single-bit accumulator of the Boolean processor.
2. Bit = 0 or 1.
Mnemonic Operation
JMP addr Jump to addr
JMP @ A + DPTR Jump to A + DPTR
CALL addr Call subroutine @ addr
RET Return from subroutine
RET I Return from interrupt
NOP No operation
JZ rel Jump if A = 0
JNZ rel Jump if A # 0
DJNZ <byte>, rel Decrement and jump if not zero
CJNZ A, <byte> rel Compare and Jump if A ¹ <byte>
CJNZ <byte>, # data, rel Compare Jump if <byte) ¹ # data
346 Power Electronics: Devices and Circuits
P1 CS2 /CS
8 8 bit DATA
(8051) P0 D0-D7
/PGM
P3 D0-D7 Vpp
7 8 bit ADDR
A0-A7
/EA A0-A7
ALE EN latch
4 bit ADDR (4 K EPROM)
P2.0-P2.3 A8-A11
P2.4-P2.7 4 bits used for generating /CS
P3.7 Bus read
AND /OE
PSEN
Figure 8.7 shows the hardware configuration for accessing up to 4 K bytes of external RAM.
Port 0 serves as a multiplexed address/data bus to the RAM and four lines of port 2 are being used
to page the RAM. The CPU generate/RD and/WR signals as needed during external RAM access.
Microcontroller Based Control and Protection Circuits 347
+V
There can be up to 64 kb of external data memory. External data memory address can either be 1
or 2 byte wide. One-byte address is often used in conjunction with one or more other I/O lines to
page the RAM, as shown in Fig. 8.7. Two-byte address can also be used in which case the high
address byte is emitted at port 2.
GND VCC
P1 8 bit DATA GND VCC
8 Reset Reset
(8051) P0 D0-D7
P3 D0-D7 2 bit ADDR Port A 8 I/O lines
6 A0-A1 A0-A1
/EA ALE A2-A7 Port B 8 I/O lines
EN latch 5
8255 PPI
Reset P2 Decoder /CS
Reset (A8-A15) 8 Port C 8 I/O lines
/CS
(/RD)P3.7 /RD
Decoder
(/WR)P3.6 /WE
Port 0 lines P0.0 and P0.1 are used to select one of the ports A, B, and C of the 8255 PPI.
Remaining address lines are decoded to generate the /CS for 8255. The RESET pin for the micro-
controller also resets the 8255 PPI. The data bus of the PPI is connected to port 0 of 8051. READ
and WRITE control signals are derived from port 3.7 and port 3.6.
348 Power Electronics: Devices and Circuits
SOC pulse
EOC
Data Data
Read pulse
Fig. 8.9 Timing diagram.
The hardware required to interface an ADC with 8051 microcontroller is shown in Fig. 8.10.
IN0–IN7 are the eight analog inputs. The digitized digital output available at the DATA OUT of
the ADC is connected to Port 0. The channel selection is made through Port 0 lines P0.0, P0.1, and
P0.2. Port 0 is the address/data multiplexed bus. The /RD line is connected to the Output Enable
of the ADC to read the digital value. The /WR line of 8051 together with the ADC Chip Select
(which is generated when there is a valid address bus) gives the SOC signal to the ADC.
Vcc GND
8
P0 D0-D7
IN0
A0-A7 A0 ADDR A IN1 Analog
Latch A1 ADDR B IN2 inputs
ALE EN A2 ADDR C IN3
A3-A7 IN4
(8051) IN5
P2 Decoder /CS IN6
IN7 End of conversion
8 ADC chip select EOC
(/RD)P3.7 /OE Clock Clk
Ref + V+
(/WR)P3.6 NOR SOC
ALE Ref –
When conversion is complete, the ADC provides an End of Conversion (EOC) signal. On
receiving this signal, the digital value can be read through Port 0. The sequence of steps in writing
the software can be put as
Microcontroller Based Control and Protection Circuits 349
The interface circuit depends on the type of DAC used. When DACs of single slope and dual
slope type are used, a part of the conversion is implemented in software to minimize hardware. The
circuit in Fig. 8.11 uses DAC 0808 and is of successive approximate type. Generally, the DAC Chip
Select is decoded from the address lines. It is not necessary that all the sixteen address lines must
be decoded always. The 8051 Port 0 is connected to data-in lines of the DAC. The digital data is
sent through Port 0. Most of the DAC devices provide current output equivalent to the digital data.
Hence, a current to voltage converter circuitry is required at the output of DAC.
Load Load
Relay Relay
NC
100Ω 6
1
Vcc (5V)
From 5
microcontroller
2 opto- 4
coupler SL 100
NC 3 MCT 2E
IN4001
To relay/gate of SCR
1K 1K Output
GND
(b)
+10V
100Ω
P1.0
1 MCT2E 5 IN4001 47Ω 5V
2 4 SL100
NC NC 330Ω
3 Opto 6
isolator 1K LED
1K
+10V
100Ω
P1.1
1 MCT2E 5 IN4001 47Ω 5V
2 4 SL100
NC NC 330Ω
3 Opto 6
isolator 1K LED
1K
(c)
Fig. 8.12 (a) Electromagnetic relay, (b) optocoupler circuit, and (c) microcontroller controlled relay.
emitting diode that emits infrared rays and a phototransistor. The microcontroller sends a control
signal to the LED and the rays emitted by LED causes phototransistor to conduct. The transistor
SL 100 provides the external power to drive the power devices.
Assuming that there is no radiant excitation to the phototransistor in the optocoupler minority
carriers are generated thermally and electrons crossing from the base to the collector as well as holes
Microcontroller Based Control and Protection Circuits 351
crossing from the collector to base, constitute the reverse saturation collector current. If the inbuilt
LED is now turned on, by the signal from the microcontroller, the photosensitive base of transistor
will be activated, and this inturn may be used to drive the driving transistor. The output current
of this driving transistor may be used to energize relay coils or trigger thyristors. Thus, the
optocoupler isolates the high voltage power circuits from low voltage sophisticated triggering
circuits. Figure 8.12(c) shows the circuits to control a relay using a microcontroller.
RL RL
ac ac
Voltage ~ L Rg Voltage ~ L R1 = (N1/N2)2 Rg
source source
N1 : N2
Fig. 8.13 Pulse transformer equivalent circuit.
With reference to Fig. 8.14(b), a step rise of input pulse to the pulse transformer gives a positive
pulse and a step fall gives a negative pulse.
The hardware required to interface SCR with the microcontroller using a pulse transformer is
shown in Figs. 8.15(a). Figure 8.15(b) is a simple ac phase control circuit using a single SCR. A
logic ‘1’ from microcontroller will turn on the transistor and a logic ‘0’ will turn off the transistor.
The secondary of the pulse transforms signals the SCR gate.
352 Power Electronics: Devices and Circuits
Input
voltage
t
Vg
t
(a)
Vg
t
T
(b)
Fig. 8.14 Output waveforms of a pulse transformer, (a) (L/R0) > 10T, (b) (L/R0) < 10T.
5V Pulse
IN4001
transformer
To SCR gate
IN4001
To K1
5.6 K 1:1
From Microcontroller P1.0 SL100
(a)
SCR Gate
12 V
230 V
Load
ac
0V
(b)
Fig. 8.15 Interfacing a pulse transformer (a) interface circuit, and (b) ac phase control circuit
using single SCR.
8.5 APPLICATIONS
330 Ω
Port B, bit 0
R C
47 Ω Vcc
17V
SCR1 MCT2E
230V 0V
AC - 1φ Load
SCR2 MCT2E 47 Ω
17V
Vcc
R C
Port B, bit 1
330 Ω
(a)
330 : 330 :
A K A K
PB0 PB1
distinguishes the positive and negative going zero crossing of the supply, which is an essential
requirement. Bit 0 (PA0) of Port A goes high for 690 ms (depending on the RC time constant of the
monostable multivibrator and is given by 0.69RC) every time the supply voltage makes a positive
zero crossing. Similarly, Bit 1 (PA1) goes high for 690 ms every time the supply voltage makes a
negative zero crossing. On detecting the positive and negative zero pulses, a delay corresponding
to the firing angle is generated and then the triggering pulses are out to the respective SCRs.
354 Power Electronics: Devices and Circuits
Software algorithm
(1) The hardware provides the zero crossing pulses at port A bits 0 and 1. The trigger pulses
are to be sent through port A.
(2) Initialize port A and port B of 8255 (or ports of 8051) as input and output ports respectively.
(3) Clear port B.
(4) Wait for positive zero crossing pulse from PA0.
(5) Trigger SCR1 gate by sending a high level through PB0, after the delay (depending on the
firing angle). 180° = 10 ms; therefore, 1° = 10/180 = 0.55 ms.
(6) Wait for negative zero crossing pulse from PA1.
(7) Now trigger SCR 2 gate by sending a ‘1’ through PB1 after the same delay.
(8) Repeat steps from 4 onwards.
8.5.2 Cycloconverter
The hardware required to interface a microcontroller for controlling a single-phase cycloconverter
is shown in Fig. 8.17. It consists of two full wave phase controlled rectifiers, rectifier P and rectifier
N. Rectifier P (consisting of Q1 and Q2) is arranged to supply positive current to the load and rectifier
N (consisting of Q3 and Q4) to supply negative current. Thus, by alternatively engaging one rectifier
and then the other, an ac power may be produced at the load.
Rectifier P
QQ1 G
G11
1
G2
G2
Q
Q22
230 V
~ – V +
0
Load
G4 Q4
G4 Q4
G
G33
Q3
Q3
Rectifier N
(a)
Port 1.4 Vcc Port 1.5 Vcc
330 Ω 47 Ω 330 Ω 47 Ω
C C
Diode anode Diode anode
Optocoupler Optocoupler EE
Diode cathode Diode cathode G2
E
G1
Port 1.6 Vcc Port 1.7 Vcc
330 Ω 47 Ω 330 Ω 47 Ω
C C
Diode anode Diode anode
Optocoupler Optocoupler EE
Diode cathode Diode cathode G4
E
G3
C - output transistor collector E - output transistor emitter
(b)
Fig. 8.17 Single-phase cycloconverter (a) block diagram, and (b) interface hardware.
Microcontroller Based Control and Protection Circuits 355
Assuming the period of the required output voltage to be T0 seconds, thyristors Q1 and Q2 are
to be turned on alternatively and Q3 and Q4 are to be inhibited for T0/2 seconds. Until the current
had decayed to zero and thyristors Q1 and Q2 have gone OFF, the rectifier N must not be turned
on. Hence, a delay is required. For the next T0/2 seconds, assuring that the thyristors SCR1 and SCR2
are OFF, the thyristors Q3 and Q4 are gated and Q1 and Q2 inhibited. The required gating signals
and the output waveforms are shown in Figs. 8.18(a) and (b).
Vs
t
Trigger
pulse for Q1 t
Trigger T0/2 T0
pulse for Q2
t
Trigger
pulse for Q3
t
Trigger
pulse for Q4
t
Output
waveform Q1 Q2 Q1 Q2 Q1 Q2
Q4 Q3 Q4 Q3 t
T0/2 Firing angle (∝) = 0
T0
(a)
Fig. 8.18(a) Gating signals for even number of pulses in the period T0/2.
Vs
t
Trigger
pulse for Q1 t
Trigger T0/2 T0
pulse for Q2
t
Trigger
pulse for Q3
t
Trigger
pulse for Q4
t
Output
waveform Q1 Q2 Q1 Q1 Q2 Q1
Q3 Q4 Q3 t
T0/2 Firing angle (∝) = 0
T0
(b)
Fig. 8.18(b) Gating signals for odd number of pulses in the period T0/2.
356 Power Electronics: Devices and Circuits
This kind of hardware can be extended for use in three-phase converter circuits.
From Figs. 8.18(a) and (b), we infer that it is essential to distinguish between positive and
negative going zero crossings of the supply voltage, since the sequence in which the thyristors are
turned on is different. When we decide to have odd number of pulses for the period T0/2, at the
beginning of the second half of interval, T0, a positive transition of the signal is encountered. Hence,
thyristor Q4 is triggered first. For odd number of pulses, a negative transition of the signal is
encountered and hence, thyristor Q3 is triggered first.
The circuit to detect the zero crossings is shown in Fig. 8.19. Bit 0 of Port 1 of the
microcontroller 8051 is used to detect the positive zero crossing pulse and Bit 1 of Port 1 to detect
the negative zero crossing pulse. This circuit is same as the circuit shown in Fig. 8.16(c). The power
circuit can be isolated through pulse transformers or optocouplers.
+15 V
15 V AC Negative edge
Vs 2 Bit 1 of Port 1
~ – 7 6 triggered one shot
– + 741
3 Positive edge
+ 4
triggered one shot Bit 0 of Port 1
–15 V
Fig. 8.19 Zero crossing detector and interfacing circuit.
The software for this purpose can be developed using the following algorithm.
Software algorithm
(1) Configure ports of 8051 as per the requirement mentioned in the hardware description.
Port 1.0 — Positive transition zero crossing pulse
Port 1.1 — Negative transition zero crossing pulse
Port 1.4 — Trigger pulse for thyristor Q1
Port 1.5 — Trigger pulse for thyristor Q2
Port 1.6 — Trigger pulse for thyristor Q3
Port 1.7 — Trigger pulse for thyristor Q4
(2) Initialize the count for number of pulses in one half cycle (for the period T0/2).
(3) Wait for positive zero crossing pulse at P1.0.
(4) If true, trigger thyristor Q1 of rectifier P by sending a ‘1’ through P1.4, after a delay
corresponding to the firing angle.
(5) Decrement the pulse count.
(6) If zero, branch to step 11 otherwise continue.
(7) Wait for negative zero crossing, that is, check for a ‘1’ through P1.5 after the delay.
(8) If true, trigger thyristor Q2 of rectifier P by sending a ‘1’ through P1.5, after the delay.
(9) Decrement the pulse count.
(10) If not zero, jump to step 3 otherwise continue.
(11) Initialize pulse count again and check whether it is odd or even. If odd, jump to step
16 and if even, continue.
(12) Wait for positive zero crossing at P1.0.
(13) If true, trigger Q4 of rectifier N after the delay, that is, send a ‘1’ through P1.7.
(14) Decrement the pulse count.
Microcontroller Based Control and Protection Circuits 357
Shunt
Fuse
Of T1 T3 T5
R L
Y SCD o
B a
d
T4 T6 T2
Fuse
To On/Off
Mux and SCT Shunt
Fuse
Fig. 8.20 Various faults in thyristor converter.
failure (PF) fault occurs when one of the incoming phases is faulty; GPF may occur due to a fault
in the pulse amplifications or pulse isolation stages, which results in failure of corresponding
thyristor to conduct; TFT may occur due to a fault internal to the device or insufficient pulse
amplification; SCT occurs mainly due to the failure of the device or an occasional accidental short
between the anode and cathode terminals of the thyristor; and SCD may occur at two locations either
before or after the filter inductor SCD.
(i) SCD before the filter inductor: Due to this fault, the current shoots up instantaneously
and eventually blows the fuses in series with the conducting thyristors. If the gating
pulses to the incoming thyristors are not disabled, fuses of all the other thyristors also
blow out.
358 Power Electronics: Devices and Circuits
(ii) SCD after the filter inductor: A large value of filter inductance does not allow the current
to rise abruptly even in a short-circuited condition. If the converter is operated with a
current loop, a properly designed controller can phase back the converter to a safe firing
delay, thus, protecting the converters. All such faults cause a reduction in the converter
output voltage and power, and also lead to unbalanced load condition resulting in
increased input current harmonics.
Fault detection
Phase fail detection: The circuit diagram for detecting the phase failure is shown in
Fig. 8.21. When all the three phases are available, the output of the three optocouplers is in logical
‘one’ condition. These outputs can be tied to one of the ports of 8051 microcontroller, say Port 1,
bit 0 (Phase R), bit 1 (Phase Y), and bit 2 (Phase B) respectively. The outputs are also ANDed to
generate the interrupt to the microcontroller. Remember that the interrupt to the 8051
microcontroller is an active low signal. When any of the phases fails, the output of the corresponding
optocoupler attains logical ‘0’. This generates an interrupt to the controller and the Interrupt Service
Routine (ISR) displays the message that the PF had occurred and also in which phase the failure
is, by reading the logical condition of the corresponding bit.
R
Y
B
N
IN4001 220Ω 1MΩ
16 100Ω
230V 3V +5V
5
100μF
MCT2E
0 0 4 To P1.0
2 3.3K
IN4001 220Ω 1MΩ
16 +5V
230V 3V
5
100μF 100Ω
MCT2E
0 0 4
2 3.3K
To P1.1
IN4001 220Ω 1MΩ
16
230V 3V +5V
5
100μF 100Ω
MCT2E
0 0 4 INT
2 3.3K
To P1.2
Fig. 8.21 Phase failure detecting circuitry.
The software
The signboard for indicating failure in any of three phases may be of LED annunciators, or seven-
segment display boards, or any other display unit with buzzer sound so that the problem can be
attended to immediately. Under normal conditions, when all the three phases are available, the
signboard is made to indicate, “All the three phases are available”. When any of the phases fails,
an interrupt occurs and initiates the ISR.
Microcontroller Based Control and Protection Circuits 359
T1,T3,T5 +6V
1K 3.3K
2 8
– 1M
Shunt LM311
7 470Ω 1 B
A
+ C 5V
3 1 4 MCT2E 100Ω
2 K E ON/OFF signal
–6V 3.3K
1MΩ
1.8K 1 B
A
C 5V
MCT2E 100Ω
E SCT signal
K
2 3.3K
Fig. 8.22 Circuit diagram for detecting the thyristor ON/OFF status and short circuit condition.
adjusted to be in negative saturation by using offset adjustment. This gives a low state at the output
of optoisolator indicating that the thyristor is OFF. Similarly, the presence of current through the
thyristor as low as two percent to the rated current, gives a high state at the output optoisolator
indicating that the thyristor is ON. The circuit can also be used to detect the short circuit condition
in a three-phase converter, by including an additional optoisolator across the shunt. The output of
this optocoupler gives information regarding the SCT error by simply monitoring the current level
(which is the reverse current and normally very high) under short circuit conditions.
The software
For developing the software, assign Port pins of 8031 microcontroller, one for SCR ON/OFF
detection (say Port 1.0) and the other for short circuit detection (say Port 1.1). Under error conditions,
generate interrupts as described in error detection procedure for phase failure. Read Port 1 data and
from that infer which error had occurred by checking the logical condition of the corresponding bits.
Then signal the error conditions by having suitable annunciators.
360 Power Electronics: Devices and Circuits
This section describes a new single chip Digital Signal Processing microcontroller (DSP mC)
specially designed for ac variable speed drive applications. The DSP core has a powerful instruction
set which makes it ideal for implementing control laws for vector and matrix manipulations. In
addition, the device includes a set of microcontroller peripherals which are optimized for three-phase
motor applications. This additional mileage allows the addition of many more functions than would
be possible using traditional microcontrollers.
Result Bus
in a minimum number of clock cycles. The motor control peripheral registers are memory mapped
and as a consequence, the results of the control law algorithms can be written directly to a peripheral
in a single DSP cycle.
The most important feature which distinguishes a DSP from a microcontroller, is the single cycle
multiply and accumulate (MAC) function. This function combines a 16 ´ 16-bit multiplication and
a 32-bit accumulation in a single instruction, taking only 50 ns when using a 20 MHz clock. The
MAC operation can be combined with a program memory and a data memory read to form the core
of a digital filter algorithm, all implemented in a single 50 ns cycle. The other features of CPU
include a separate ALU which implements a standard 16-bit add and subtract instruction as well as
Boolean logic functions. The shifter unit has instructions for scaling, and has a block exponent
function which simplifies floating-point arithmetic emulation. The program controller can
implement DO loop instructions with zero overhead and can combine any of the mathematics
functions with an IF statement. An added advantage is that the instruction set is algebraic which
makes assembly language programming easy.
Digital signal processor were earlier designed for real time signal processing applications could
handle a number of interrupts from external signal sources. A very powerful addition to this DSP
core has been a set of shadow registers for all three arithmetic units. These are a set of completely
independent arithmetic registers, which can be selected in a single instruction cycle. This eliminates
the requirement to save register content when servicing an interrupt or when calling a subroutine,
which saves both program memory code space and execution time. All these features further reduce
the time and number of instructions required for an ac motor control implementation.
The full set of functions required for ac drive control systems include transfer functions, filter
algorithms, and some special ac motor control functions. A PID compensator takes only 0.75 ms,
while the matrix vector multiplication required for a state space control law takes just over 1 ms.
An essential function in all ac drives, the generation of the three sine reference curves, can be
implemented in less than 2 ms using only a 64-point sine–cosine table. When comparing this speed
of calculation with an 8 or even 16-bit microcontroller, it is obvious that the DSP core offers
significant performance advantages. However, to be truly cost effective, this DSP core must be
complemented with a full set of three-phase motor control peripherals.
conversion system. There are also other peripherals required for real time embedded control systems
such as a parallel digital I/O block, a serial communication interface, a watchdog timer, and event
timers. The DSP controller combines the very powerful DSP core with a generic set of peripherals,
designed specially for the ac motor control.
AH
Dead
AL time
TA
+V VA iA
VA
–V
PWM period (TPWM)
Fig. 8.25 Centre-based PWM.
Fig. 8.25 Centre based PWM (a) PWM signals, and (b) inverter voltages.
A sample set of PWM waveforms in Fig. 8.26 illustrates some of the features of the PWM
generator on the DSP controller. The PWM switching frequency, dead time, and gate drive
modulation options are selected by writing to the configuration registers. In this instance, the high
side gate drive circuit is transformer isolated so that the carrier frequency on the high side PWM
outputs is selected. Active high PWM output signals are selected in hardware by pulling the polarity
pin high. The PWM duty cycle for each inverter leg is determined by the value in the PWM channel
register. The software overhead required to generate these waveforms includes write operations for
four PWM configuration registers and three PWM duty cycle registers in every PWM period.
Microcontroller Based Control and Protection Circuits 363
AH
AL
BH
Output
BL
CH
CL
Fig. 8.26 PWM waveform sample set.
VC VC max
Volts
TPWM – TC TC t
System peripherals
Many variable speed drive systems have some user interface or are part of some embedded control
system such as in a washing machine or a photocopier. Therefore, the DSP microcontroller requires
some general purpose interface ports. This device includes two serial ports and an 8-bit parallel
digital I/O port for expansion and communication functions. There are two internal timers, a general
purpose system timer, and a watchdog timer. Also, two extra 8-bit PWM timers are available for
analog or digital reference signal generation.
364 Power Electronics: Devices and Circuits
System firmware
This integrates the full set of functions required to build a single chip motor system, including a
high-speed DSP core, peripherals and both random access (RAM) and read only (ROM) memories.
To minimize the device pin count, there are no external address and data lines and hence, all
interface to the DSP core is through the serial interface ports. On power up, the DSP core program
and data memory (RAM) is loaded through the serial port from an 8-pin serial ROM or a host
microprocessor.
For development purpose the chip firmware includes a communication protocol and a software
monitor. A PC based debugging tool communicates with the device through one of the serial ports
configured as a UART. This gives full access to all the registers and allows the device program and
data RAM to load directly from the PC. In addition, the firmware also includes a motion control
library with functions such as sine and cosine tables, 1/x, and square root functions.
REVIEW QUESTIONS
Bimbhra, P.S., Power Electronics, 2nd ed., Khanna Publishers, Delhi, 1998.
Dewan, S.B. and A. Straughan, Power Semiconductor Circuits, John Wiley & sons, Inc., New
York, 1984.
Gentry, F.E., F.W. Gutswiller, W. Holonyak, and Von E.E. Zatrov, Semiconductor Controlled
Rectifiers, Prentice Hall, Englewood Cliffs, New Jersey, 1964.
Lander, C.W., Power Electronics, McGraw-Hill, UK, 1981.
Mohan, M., T.M. Undeland, and W.P. Robbins, Power Electronics: Converters, Applications
and Design, John Wiley & Sons, Inc., New York, 1996.
Ramamoorthy, M., An Introduction to Thyristors and Their Applications, Affiliated East-West
Press New Delhi/Madras, 1997.
Rashid, Muhammed, H., Power Electronics: Circuits, Devices, and Applications, 3rd ed.,
Prentice-Hall of India, New Delhi, 2003.
SCR Manual, 5th ed., General Electric Company, New York, 1972.
Sen, P.C., Principles of Electric Machines and Power Electronics, 2nd ed., John Wiley & Sons,
New York, 1997.
365
Index
367
368 Index
UPS, 2, 327
ON-line, 327 Zero current switching resonant converters, 231
OFF-line, 329 Zero voltage switching resonant converters, 236