ECEN 4827/ 5827

Analog IC Design

• Instructor: Daniel Costinett

• Office: ECOT 356, fax: 303-492-2758, no direct phone
• E-mail: [email protected]
• Office hours: Wednesday 12-1pm, Thursday 10am-12pm (Mountain)
• Professor Regan Zane will coordinate on course structure, teaching methods,
exams
• Course web site:
• http://ecee.colorado.edu/~ecen4827
• Announcements, course materials (including lecture slides), assignments,
solutions (password protected)

ECEN4827/5827 Analog IC Design 1

 Assignments & Exams
• Weekly homeworks (12 total), 35% of the grade
• Midterm exam, 25% of the grade
• In-class, 50-minute, closed book/notes, single 8.5”x11” double-sided sheet
• Friday, October 21, 11:00am – 11:50am
• Final exam, 40% of the grade
• Comprehensive, 150-minute, closed-book/notes, one 8.5”x11” double-sided sheet
• Tue. Dec 13, 7:30 p.m. - 10:00 p.m
• All assignments, due dates, and solutions posted on the course web site
• Off-campus students:
• Received by 11:50am, one week after the posted deadline for on-campus
students
• E-mail (as single PDF file) to [email protected]
• or Mail to address posted on the course website
• or Fax to: 303-492-2758 (cover page, TO: Daniel Costinett, ECEN5827)
• Keep a copy of your work

ECEN4827/5827 Analog IC Design 2

 Course Policies*
• No late work accepted (except in cases of documented emergencies)
• Homeworks
o Collaboration with other students taking the course in this semester is
encouraged
o Course blog available for remote collaboration
o Copying someone else’s work or collaborating in any form with anyone not
taking the course in this semester is not allowed
• Exams
o No collaboration of any kind allowed
• 5827 versus 4827: additional problems in assignments and exams for ECEN 5827
students
• Grading
o HW and exam scores taken at face value, no curving
o Final grades based on total scores, 4827 and 5827 curved separately
o Extra credit assignments: optional, can only improve the final grade

*Details can be found on the course website

ECEN4827/5827 Analog IC Design 3

 Course materials
• Textbook: none required. Reference books (recommended)
• P. Gray, P. Hurst, S. Lewis, R. Meyer, "Analysis & Design of Analog Integrated
Circuits," 5th Edition, WILEY, 2009.
• P. Allen, D. Holberg, "CMOS Analog Circuit Design, Second Edition," Oxford, 2002.
• D. Johns, K. Martin, "Analog Integrated Circuit Design," Wiley, 1997.
• Sedra, Smith, "Microelectronics Circuits," 5th Edition, Oxford (from ECEN3250).
• Course notes and lecture slides posted on the course web site
• Software: schematic capture and Spice simulations
• LTspice/SwitcherCAD (free, unrestricted tool available from Linear
Technology)
http://www.linear.com/designtools/software/
• IC process example: a standard 0.35u CMOS process
Device symbols and models available from the course web site

ECEN4827/5827 Analog IC Design 4

 Analog microelectronics

The Real Signal Analog Signal

World Conditioning Conversion
to Digital
Temperature

Pressure

Position 0101010110100101010101010101010101010
0001011010010101011101101010110110101
1101010101010101010001010100101011010
Speed Power Digital
0110101010101010101000010101010111100
1010101010101010101010101010010010010
Flow Management Processor
1010101010101010101010101010010010101
0110101010101011110010110110101010101
0111110101010101010101010101011100100
1010101010101010010101010101010101010
Humidity

Sound

Light

RF transmission Signal Digital Signal

Conditioning Conversion
to Analog

ECEN4827/5827 Analog IC Design 5

 Exam ple: m obile phone

Battery example: single-cell Lithium-Ion Battery Charger

Power distribution: Vbat = 2.7-5.5 V

PS PS PS PS
3.6 V 2.5 V 1.5 V 0.5-
Antenna
Vbat
Display
mP/DSP D/A PA
core LO
PS Audio
A/D LNA
2.7-5.5 V I/O
Baseband digital Analog/RF
Interface
2.5 V 2.5 V 2.5 V

PS PS PS

PS Linear or switched-mode voltage regulators (power supplies)

ECEN4827/5827 Analog IC Design 6

 Analog IC application areas
• Signal conditioning (amplification and analog filtering)
• A/D and D/A conversion
• Power conversion and power management
• Wireless communication
• Up-conversion and down-conversion
• RF amplification, filtering and transmission

ECEN4827/5827 Analog IC Design 7

 Exam ple:
linear voltage regu lator as pow er su p p ly
Series pass transistor
Q Iload
+ Load

Vbat + C Vo
–

–
“Error amplifier” with
loop compensation
+
Bandgap
- Vref
reference

Relatively simple, low noise, small footprint area

Output voltage lower than the battery voltage
High efficiency only if Vo is close to input voltage Vbat = Vg

ECEN4827/5827 Analog IC Design 8

 Linear voltage regu lator pow er m od el
Ig Rs Io
+

Vg + Vo
–
Bias current
IQ
–

I g  Io  IQ
Vo I o Vo I o
Efficiency: η 
Vg I g Vg ( I o  I Q )
Vo
Linear regulator efficiency cannot be greater than η
the ratio of the output and the input voltage Vg
ECEN4827/5827 Analog IC Design 9
 Linear regu lator efficiency exam ple

100

90

80
Example:
70
Vg = 3.6 V
Efficiency [%]

60
Vo = 1.5 V
50
IQ = 50 mA
40
. 0 < Io < 300 mA
30

20

10

0
0.1 1 10 100 1000
Io [mA]

ECEN4827/5827 Analog IC Design 10

 Bu ck (step -d ow n) sw itching pow er converter*
Low-pass LC filter

Ig L Io
1
+ +
2
Vg + vs(t) C v(t)
– Load

– –

vs(t) fs = 1/Ts = switching

Vg
frequency
DTs D' Ts D = switch duty cycle
0
0 DTs Ts
Conversion ratio:
t
Vo
Switch
position: 1 2 1 M ( D)   D
Vg
*ECEN5797 Introduction to Power Electronics covers details of analysis,
modeling and design of switched-mode power converters
ECEN4827/5827 Analog IC Design 11
 Efficiency as a fu nction of load cu rrent
100

90

80
Buck regulator
70
Example:
Vg = 3.6 V
Efficiency [%]

60

50
Vo = 1.5 V
Linear regulator 0 < Io < 300 mA
40
.
30

20

10

0
0.1 1 10 100 1000
Io [mA]

ECEN4827/5827 Analog IC Design 12

PWM Sw itched -Mod e Pow er Su pply
Power
input iL(t) L Io Load
+ + vL(t) – +
iC(t)

vg(t) + vsw(t) C v(t)

–

– – Feedback
connection
Gate
drivers
p n
Dead-time Compensator
Pulse-width vc v
Gc(s)
modulator

p(t) vc(t) Voltage

reference Vref

dTs Ts t t
Controller chip

ECEN4827/5827 Analog IC Design 13

 Pu lse-Wid th Mod u lator

VM vsaw(t)
Saw-tooth
p (t ) waveform vsaw (t ) vc(t)

+
Q R _
vc 0
t
S control
input p(t)
clock

OSC

0 dTs Ts 2Ts

clock

ECEN4827/5827 Analog IC Design 14

LTspice behavioral m od el: 5827_PWM1.asc
Buck switched-mode DC-DC converter

.model SW SW(Ron=.05 Roff=1Meg Vt=0.5 Vh=0)

SW
S1
L1
g sw out

Vg 1µ
SW R1
C1 I1
1
PWL(0A 0 800u 0A 801u 1A)
3.3 100µ
S2

c inv

ECEN4827/5827 PWM controller behavioral model

c

R3 C2 R4 C3
A1

30k 0.1n 1k 0.5n

R2
U1
ctrl
100k
t

re f
Bpwm
.lib opamp.sub
V=if(v(ctrl,t)+0.5,1,0) Vref
Vsaw
PWL(0 0 500u 1)

PULSE({Vlow} {Vhigh} 0 {Tr} {Ts-Tr} 0 {Ts})

.param Fs=1meg Tr={0.9/Fs} Ts={1/Fs} Vlow=1 Vhigh=2
.tran 0 1000u 0 2n

ECEN4827/5827 Analog IC Design 15

 I(L1)
2.7A
2.4A
2.1A Inductor current
1.8A
1.5A
1.2A
0.9A
0.6A
0.3A
0.0A
-0.3A
V(out) V(ctrl)
1.5V
1.3V Control voltage
1.1V
0.9V
0.7V
0.5V
0.3V
Output voltage
0.1V
-0.1V
0µs 100µs 200µs 300µs 400µs 500µs 600µs 700µs 800µs 900µs 1000µs

ECEN4827/5827 Analog IC Design 16

Voltage regu lation d u ring step -load transient

Inductor current I(L1)

2.8A
2.6A
2.4A
2.2A
2.0A
1.8A
1.6A
1.4A
1.2A
1.0A
0.8A
0.6A
0.4A
V(out) V(ctrl)
1.020V
1.014V
1.008V Output voltage
1.002V
0.996V
0.990V
0.984V
0.978V
0.972V
0.966V
0.960V
0.954V
798µs 801µs 804µs 807µs 810µs 813µs 816µs 819µs 822µs 825µs 828µs 831µs 834µs

ECEN4827/5827 Analog IC Design 17

 ECEN 4827/ 5827 cou rse topics
Buck switched-mode DC-DC converter

.model SW SW(Ron=.05 Roff=1Meg Vt=0.5 Vh=0)

SW
S1
L1
g sw out

Vg 1µ
SW R1
C1 I1
1
PWL(0A 0 800u 0A 801u 1A)
3.3 100µ
S2

c inv

ECEN4827/5827 PWM controller behavioral model

c

R3 C2 R4 C3
A1

30k 0.1n 1k 0.5n

R2
U1
ctrl
100k
t

re f
Bpwm
.lib opamp.sub
V=if(v(ctrl,t)+0.5,1,0) Vref
Vsaw
PWL(0 0 500u 1)

PULSE({Vlow} {Vhigh} 0 {Tr} {Ts-Tr} 0 {Ts})

.param Fs=1meg Tr={0.9/Fs} Ts={1/Fs} Vlow=1 Vhigh=2
.tran 0 1000u 0 2n

Focus on transistor-level integrated circuit design techniques

ECEN4827/5827 Analog IC Design 18

 ECEN 4827/ 5827 cou rse topics
Buck switched-mode DC-DC converter

.model SW SW(Ron=.05 Roff=1Meg Vt=0.5 Vh=0)

SW
S1
L1
g sw out

Vg 1µ
SW R1
C1 I1
1
PWL(0A 0 800u 0A 801u 1A)
3.3 100µ
S2

c inv

ECEN4827/5827 PWM controller behavioral model

c

R3 C2 R4 C3
A1

30k 0.1n 1k 0.5n

R2
U1
ctrl
100k
t

re f
Bpwm
V=if(v(ctrl,t)+0.5,1,0)
.lib opamp.sub
Vref Op-amp
Vsaw
PWL(0 0 500u 1) application
PULSE({Vlow} {Vhigh} 0 {Tr} {Ts-Tr} 0 {Ts})
circuits and
.param Fs=1meg Tr={0.9/Fs} Ts={1/Fs} Vlow=1 Vhigh=2 transistor-level
.tran 0 1000u 0 2n
op-amp design

ECEN4827/5827 Analog IC Design 19

 Transistor-level op -am p d esign exam ple
V DD
L = 2U U8 U5 L = 2U U7 L = 2U U10 L = 2U V DD
W = 2U W = 10 U W = 50 U W = 50 U DC = 3 .3

N2

o ut 0
N1
U1 U2
2
i np Ibi a s i np U9 L = 1U
Vp W = 50 U W = 50 U W = 20 0U
1u L = 1U L = 1U
i nm {Cc} Cc
N3 1
DC = 1 .65
L = 2U U3 U4 L = 2U U6 L = 2U PARAMETERS:
AC = 0 W = 10 U W = 10 U W = 10 0U Cc = 1 0 p
0
T RA N = P UL SE (1.6 1.7 1 0 0n 1n 1n 5 0 0n 1u )

0 Vz
1 Va c

Design:
• Circuit configuration
• DC biasing
• device W/L aspect ratios

ECEN4827/5827 Analog IC Design 20

 ECEN 4827/ 5827 cou rse topics
Buck switched-mode DC-DC converter

.model SW SW(Ron=.05 Roff=1Meg Vt=0.5 Vh=0)

SW
S1
L1
g sw out

Vg 1µ
SW R1
C1 I1
1
PWL(0A 0 800u 0A 801u 1A)
3.3 100µ
S2

c inv

ECEN4827/5827 PWM controller behavioral model

c

R3 C2 R4 C3
A1

30k 0.1n 1k 0.5n

R2
U1
ctrl
100k
t

re f
Bpwm
.lib opamp.sub
V=if(v(ctrl,t)+0.5,1,0) Vref
Vsaw
PWL(0 0 500u 1)

PULSE({Vlow} {Vhigh} 0 {Tr} {Ts-Tr} 0 {Ts}) Design of

.param Fs=1meg Tr={0.9/Fs} Ts={1/Fs} Vlow=1 Vhigh=2
.tran 0 1000u 0 2n
bandgap
references

ECEN4827/5827 Analog IC Design 21

 Band gap reference exam ple
ECEN4827/5827 bandgap1 using
NMOS, PMOS and WDIODE devices
from 0.35u CMOS library
5827_035.lib vdd
U7 U2 U8
L = 5u L = 5u L = 5u
W = 10 U W = 10 U W = 10 U

V DD

DC = 3 .3V

V Ire f

DC = 0
U3 U1
0
W = 5U W = 5U
L = 5u L = 5u
ref
V RE F
0 0

U4 U9
RPN RPN
W = 1u W = 1u
PARAMETERS:
L = {LR1} L = {LR2}
L R2 = to b e d ete rmi ne d
L R1 = to b e d ete rmi ne d

U6 U5 U10
WDIODE WDIODE WDIODE
n= 1 n= 8 n= 1

0 0 0

ECEN4827/5827 Analog IC Design 22

 ECEN 4827/ 5827 cou rse topics
Buck switched-mode DC-DC converter

.model SW SW(Ron=.05 Roff=1Meg Vt=0.5 Vh=0)

SW
S1
L1
g sw out

Vg 1µ
SW R1
C1 I1
1
PWL(0A 0 800u 0A 801u 1A)
3.3 100µ
S2

c inv

ECEN4827/5827 PWM controller behavioral model

c

R3 C2 R4 C3
A1

30k 0.1n 1k 0.5n

R2
U1
ctrl
100k
t

re f
Bpwm
.lib opamp.sub
V=if(v(ctrl,t)+0.5,1,0) Vref
Vsaw
PWL(0 0 500u 1)

PULSE({Vlow} {Vhigh} 0 {Tr} {Ts-Tr} 0 {Ts})

.param Fs=1meg Tr={0.9/Fs} Ts={1/Fs} Vlow=1 Vhigh=2
Transistor-level design of
.tran 0 1000u 0 2n PWM oscillators,
waveform generators,
and voltage comparators
ECEN4827/5827 Analog IC Design 23
 ECEN 4827/ 5827 cou rse topics
Buck switched-mode DC-DC converter

.model SW SW(Ron=.05 Roff=1Meg Vt=0.5 Vh=0)

SW
S1
L1
g sw out

Vg 1µ
SW R1
C1 I1
1
PWL(0A 0 800u 0A 801u 1A)
3.3 100µ
S2

c inv

ECEN4827/5827 PWM controller behavioral model

c

R3 C2 R4 C3
A1

30k 0.1n 1k 0.5n

MOSFETs and U1
R2

ctrl
driver circuits t
100k

re f
Bpwm
.lib opamp.sub
V=if(v(ctrl,t)+0.5,1,0) Vref
Vsaw
PWL(0 0 500u 1)

PULSE({Vlow} {Vhigh} 0 {Tr} {Ts-Tr} 0 {Ts})

.param Fs=1meg Tr={0.9/Fs} Ts={1/Fs} Vlow=1 Vhigh=2
.tran 0 1000u 0 2n

ECEN4827/5827 Analog IC Design 24

 ECEN 4827/ 5827 cou rse topics
Buck switched-mode DC-DC converter

.model SW SW(Ron=.05 Roff=1Meg Vt=0.5 Vh=0)

SW
S1
L1
g sw out

Vg 1µ
SW R1
C1 I1
1
PWL(0A 0 800u 0A 801u 1A)
3.3 100µ
S2

c inv

ECEN4827/5827 PWM controller behavioral model

c

R3 C2 R4 C3
A1

30k 0.1n 1k 0.5n

R2
U1
ctrl
100k
t

re f
Bpwm
.lib opamp.sub
V=if(v(ctrl,t)+0.5,1,0) Vref
Vsaw
PWL(0 0 500u 1) Feedback
PULSE({Vlow} {Vhigh} 0 {Tr} {Ts-Tr} 0 {Ts})
.param Fs=1meg Tr={0.9/Fs} Ts={1/Fs} Vlow=1 Vhigh=2
.tran 0 1000u 0 2n

ECEN4827/5827 Analog IC Design 25

 ECEN 4827/ 5827 ou tline
1. Real op-amp characteristics and limitations, impact on application circuits
• Open-loop gain, input and output impedance, output voltage swing
• Introduction to feedback
• Voltage offset and drift, input bias current and offset
• Introduction to component tolerances and temperature drift
• Input common-mode voltage range, CMRR, PSRR
2. Transistor-level analysis and design of a two-stage CMOS op-amp
• CMOS process technology, 0.35u CMOS process example
• Basic principles of analog IC design via examples: matching, process and temperature
variations
• DC biasing
• Small-signal modeling and design of gain stages
3. Current and voltage references
• Current mirrors, design of current sources
• Temperature drift and supply voltage sensitivity
• Bandgap references
4. Frequency responses of gain stages
• Device high-frequency models and parasitic capacitances
• Design-oriented analysis techniques: zero-value time constant (ZVTC) method, and N-extra
element theorem (NEET) method
5. Frequency response, stability and design-oriented analysis of negative feedback circuits
• Loop gain, phase margin and compensation
6. IC application examples
• Design of linear voltage regulators
• Design of pulse-width modulation controllers for switched-mode power converters

ECEN4827/5827 Analog IC Design 26

 ANALOG AND MIXED-SIGNAL
INTEGRATED CIRCUIT DESIGN
TWO-SEMESTER COURSE SEQUENCE
Fall 2010: ECEN 4827/5827 Spring 2011: ECEN 4837/5837
ANALOG IC DESIGN MIXED-SIGNAL IC DESIGN LAB
This course presents a practical This lab introduces full custom integrated
approach to transistor-level design of circuit design for real-world applications
analog integrated circuits. Topics include where analog and digital signal
• Real op-amp characteristics, processing meet. Topics include:
limitations and impact on design • Design of analog-to-digital and
• Transistor-level analysis and design digital-to-analog data converters
of CMOS amplifiers • Full custom IC design and layout
• Current and voltage reference • Final project: group based project
circuits targeting a real-world application
• Frequency response, stability and • Opportunity for fabrication and
design-oriented feedback analysis testing of final project IC!
• IC application examples
Micro-photograph
of a 2mm x 2mm
custom IC design
in a 0.35u CMOS
process

ECEN4827/5827 Analog IC Design 27