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Report: LED Circuit in VHDL: Canché Acevedo Fernando Ivan Moo Sierra Marco Alejandro

This document describes a project to design an LED circuit using VHDL that displays letters of the alphabet. A truth table is developed first to specify the logic needed. Boolean equations are then derived from the truth table. A VHDL code is written to implement the logic. The code is compiled and uploaded to an FPGA board. Finally, the physical circuit is assembled and tested by connecting LEDs, transistors, and the FPGA board. The project provides experience with the VHDL design process from specification to implementation.

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JESUS MARTIN SIERRA
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15 views

Report: LED Circuit in VHDL: Canché Acevedo Fernando Ivan Moo Sierra Marco Alejandro

This document describes a project to design an LED circuit using VHDL that displays letters of the alphabet. A truth table is developed first to specify the logic needed. Boolean equations are then derived from the truth table. A VHDL code is written to implement the logic. The code is compiled and uploaded to an FPGA board. Finally, the physical circuit is assembled and tested by connecting LEDs, transistors, and the FPGA board. The project provides experience with the VHDL design process from specification to implementation.

Uploaded by

JESUS MARTIN SIERRA
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Report: LED circuit in VHDL

Canché acevedo Fernando Ivan Moo Sierra Marco Alejandro


Instituto tecnológico de Mérida Instituto tecnológico de Mérida
Mérida, México Mérida, México
[email protected] [email protected]

Canché Sierra Jesús Martín


Instituto tecnológico de Mérida Perez Chay Abraham Rafael
Mérida, México Instituto tecnológico de Mérida
[email protected] Mérida, México
C18081502 @merida.tecnm.mx

Abstract—This electronic document is a “live” template. The


various components of your paper [title, text, heads, etc.] are
already defined on the style sheet, as illustrated by the portions
given in this document. (Abstract)

I. INTRODUCTION

Throughout this course we have been seeing how VHDL


works, learning how to program in it, as well as taking out the
schematic diagrams, all this through different combinational
circuits and true tables to make the program behave in the way
that we expect from it.
II. OBJETIVE
In this project we will learn how to design and implement
a code in VHDL language to be able to make a circuit of LED
Diodes that form letters of the alphabet, all this depending on
the combination of the input signal that is given to it.
Image 1: true table
III. DEVELOPMENT OF THE TRUE TABLE
To start designing our program, we first must start from
the notebook, stipulating the parameters to be able to have the
behaviour that we expect the program to do.
After we complete the true table and verify that all its
The values “a”, “b”, “c”, “z” are going to be our input correct, we continue to solve it to have the boolean ecuation
value signal, the variables “f0”, “f1”, “f2”, “f3 are going to be that we need for each possible combination of the imput
all the rows of LED that we want to turn on, while the signal, and that went as follows:
variables “g0”, “g1”, “g2”, “g3 will be the transistors of each
column that we want to turn on, in the next image we can see
our true table of the combination to form the letter we want.
a)
❖ 𝐹0 = 𝑎’𝑏’𝑐’𝑧’ + 𝑎’𝑏’𝑐’𝑧 + 𝑎’𝑏’𝑐𝑧’ + 𝑎’𝑏’𝑐𝑧 +
𝑎𝑏’𝑐’𝑧 + 𝑎𝑏’𝑐𝑧’ + 𝑎𝑏’𝑐𝑧
❖ 𝐹1 = 𝑎’𝑏’𝑐’𝑧’ + 𝑎’𝑏’𝑐𝑧 + 𝑎’𝑏𝑐’𝑧’ + 𝑎’𝑏𝑐’𝑧 +
𝑎’𝑏𝑐𝑧’ + 𝑎’𝑏𝑐𝑧 + 𝑎𝑏’𝑐𝑧’ + 𝑎𝑏’𝑐𝑧 + 𝑎𝑏𝑐’𝑧 +
𝑎𝑏𝑐𝑧
❖ 𝐹2 = 𝑎’𝑏’𝑐’𝑧’ + 𝑎’𝑏’𝑐’𝑧 + 𝑎’𝑏’𝑐𝑧’ + 𝑎’𝑏’𝑐𝑧 + b)
𝑎’𝑏𝑐’𝑧’ + 𝑎’𝑏𝑐𝑧’ + 𝑎𝑏’𝑐’𝑧’ + 𝑎𝑏’𝑐’𝑧 +
𝑎𝑏’𝑐𝑧’ + 𝑎𝑏’𝑐𝑧 + 𝑎𝑏𝑐𝑧’
❖ 𝐹3 = 𝑎’𝑏’𝑐’𝑧’ + 𝑎’𝑏’𝑐𝑧 + 𝑎’𝑏𝑐’𝑐’ + 𝑎’𝑏𝑐’𝑧 +
𝑎’𝑏𝑐𝑧’ + 𝑎’𝑏𝑐𝑧 + 𝑎𝑏’𝑐’𝑧 + 𝑎𝑏𝑐’𝑧’ + 𝑎𝑏𝑐’𝑧
❖ 𝐺0 = 𝑎’𝑏’𝑐’𝑧’ + 𝑎𝑏𝑐’𝑧
c)
❖ 𝐺1 = 𝑎’𝑏’𝑐’𝑧 + 𝑎’𝑏𝑐’𝑧’ + 𝑎𝑏’𝑐𝑧 + 𝑎𝑏𝑐𝑧’
❖ 𝐺2 = 𝑎’𝑏’𝑐𝑧’ + 𝑎’𝑏𝑐’𝑧 + 𝑎𝑏’𝑐’𝑧’ + 𝑎𝑏’𝑐’𝑧 +
𝑎𝑏’𝑐𝑧’ + 𝑎𝑏𝑐’𝑧’ + 𝑎𝑏𝑐𝑧
❖ 𝐺3 = 𝑎’𝑏’𝑐𝑧 + 𝑎’𝑏𝑐𝑧’ + 𝑎’𝑏𝑐𝑧

d)

IV. DEVELOPMENT OF THE MAIN CODE


After we Already have the Boolean functions we begin to
design the code in xilinx Project navigator, first we introduce
the model of the module which we will work, after thar we
select the program language that we will use, in our case is
going to be VHDL Module. Image 3: a) combinational code. b), c), d) continuation of
the code
Inside the main code w estar to declarate each variable that
we are going to use, and declare if each one is a imput signal Now, once we finish writing the code, we begin to assign
or a output signal. each output variable to a physical output of the FPGA
module., for this we generate the code to a ".bit" format, to be
able to upload it to the module, and this is generated through
the “generate programing” file function inside project
navigator.

Image 2: Variable declaration.

After we finish this, we stard top ut all the booleans Image 4: output code
functions of each output.
When compiling the code we have to make sure that it
does not have errors, since otherwise it will not generate
anything, in our case there was no errors or warning to correct.

Image 7
Image 5: Compiled code
To finish the programming part of our project, we proceed
to creat the RTL Schematics to see the internal connections of
our design in the device, and we verify that it is in accordance
with what we have established.

Image 8

V. PHISIC IMPLEMENTATION
Image 6 With the code already generated, we begin to assemble the
circuit in a physical way, for this we will use the following
materials:
I. 16 LED Diodes
II. 4 Transistor 2n2222a
III. 1 FPGA module,
IV. 1 PCB board
V. Tin
VI. Soldering Iron
VII. Flux
Once we solder all the components to the PCB, we upload
the program to the FPGA, and connect the outputs to the
circuit to start testing the program.

Image 9: Phisic conection.


Now, we test the outputs through the input combinations.
Image 11: Thirth part of the letter a (a’b’cz’)

Image 10: First part of the letter a (a’b’c’z’)

Image 11: Fourth part of the letter a (a’b’cz)


CONCLUSION
I consider that it was a good practice, since it is giving me the
bases that I need, such as the methodology, the principles of
code, In this project we again use both new and review
functions with respect to the topic, it must be said that
everything done is almost the same as was done with the
laboratory practice number one. In the development of these
practices, I understood how the coding order goes to
implement it in VHDL, we use the IEEE library to be able to
declare things in one way, then the entity is where the inputs
and outputs are declared, and finally the structure, in which
the behavior of the logic gates is described. Then we try to
Image 11: second part of the letter a (a’b’c’z) analyze data from the project such as the diagrams they read,
speed, signals, etc.

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